Commit
90010c2e1d60c6a9a4a0b30a113d4dae2b7214eb
by erich.keaneDon't consider 'LinkageSpec' when calculating DeclContext 'Encloses'
We don't properly handle lookup through using directives when there is a linkage spec in the common chain. This is because `CppLookupName` and `CppNamespaceLookup` end up skipping `LinkageSpec`'s (correctly, as they are not lookup scopes), but the `UnqualUsingDirectiveSet` does not.
I discovered that when we are calculating the `CommonAncestor` for a using-directive, we were coming up with the `LinkageSpec`, instead of the `LinkageSpec`'s parent. Then, when we use `UnqualUsingDirectiveSet::getNamespacesFor` a scope, we don't end up finding any that were in the `LinkageSpec` (again, since `CppLookupName` skips linkage specs), so those don't end up participating in the lookup.
The function `UnqualUsingDirectiveSet::addUsingDirective` calculates this common ancestor via a loop through the the `DeclSpec::Encloses` function.
Changing this Encloses function to believe that a `LinkageSpec` `Encloses` nothing ends up fixing the problem without breaking any other tests, so I opted to do that. A less aggressive patch could perhaps change only the `addUsingDirective`, but my examination of all uses of `Encloses` showed that it seems to be used exclusively in lookup, which makes me think this is correct everywhere.
Differential Revision: https://reviews.llvm.org/D113709
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 | clang/test/SemaCXX/lookup-through-linkage.cpp |
 | clang/lib/AST/DeclBase.cpp |
Commit
84364bdaabfca35f083c932ffd3a14f3b9ad4f3a
by david.sherwood[CodeGen][AArch64] Bail out in performConcatVectorsCombine for scalable vectors
I tried to exercise the existing combine patterns in performConcatVectorsCombine for scalable vectors and at the moment it doesn't seem possible. Parts of the code currently assume we're dealing with fixed-width vectors with calls to getVectorNumElements(), therefore I've decided to simply bail out early for scalable vectors.
Added a test here to show that we don't crash when attempting to combine truncate + concat:
CodeGen/AArch64/concat_vector-truncate-combine.ll
Differential Revision: https://reviews.llvm.org/D114600
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 | llvm/test/CodeGen/AArch64/concat_vector-truncate-combine.ll |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
Commit
814aabae37757d21d96e22608ccb98e91c1f3a06
by mydeveloperday[clang-format] regressed default behavior for operator parentheses
{D110833} regressed behavior of spaces before parentheses for operators, this revision reverts that so that operators are handled as they were before.
I think in hindsight it was a mistake to try and consume operator behaviour in with the function behaviour, I think Operators can be considered a special style. Its seems the code is getting confused as to if this is a function declaration or definition.
I think latterly we can consider adding an operator parentheses specific custom option but this should have been explicitly called out as it can impact projects.
Reviewed By: HazardyKnusperkeks, curdeius
Differential Revision: https://reviews.llvm.org/D114696
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 | clang/lib/Format/TokenAnnotator.cpp |
 | clang/unittests/Format/FormatTest.cpp |
Commit
fc53eb69c26cdd7efa6b629c187d04326f0448ca
by erich.keaneReapply 'Implement target_clones multiversioning'
See discussion in D51650, this change was a little aggressive in an error while doing a 'while we were here', so this removes that error condition, as it is apparently useful.
This reverts commit bb4934601d731465e01e2e22c80ce2dbe687d73f.
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 | clang/lib/AST/Decl.cpp |
 | clang/test/Misc/pragma-attribute-supported-attributes-list.test |
 | clang/lib/CodeGen/CodeGenModule.h |
 | clang/test/Sema/attr-cpuspecific.c |
 | clang/include/clang/Sema/Sema.h |
 | clang/test/Sema/attr-target-clones.c |
 | clang/include/clang/Basic/Attr.td |
 | clang/include/clang/Basic/AttrDocs.td |
 | clang/test/SemaCXX/attr-target-clones.cpp |
 | clang/include/clang/Basic/DiagnosticGroups.td |
 | clang/include/clang/AST/Decl.h |
 | clang/lib/CodeGen/CodeGenModule.cpp |
 | clang/test/CodeGenCXX/attr-target-clones.cpp |
 | clang/lib/Sema/SemaDecl.cpp |
 | clang/lib/AST/ASTContext.cpp |
 | clang/test/CodeGen/attr-target-clones.c |
 | clang/lib/Sema/SemaDeclAttr.cpp |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
Commit
95f34e318c469806879a0cd1a6c5290901ed12df
by herhut[mlir][memref] Fix bug in verification of memref.collapse_shape
The verifier computed an illegal type with negative dimension size when collapsing partially static memrefs.
Differential Revision: https://reviews.llvm.org/D114702
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 | mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp |
 | mlir/test/Dialect/MemRef/ops.mlir |
Commit
a7363067e69a60442a1d52e93207ed7a86ce9d6a
by spatel[X86] Add vector test coverage for or with no common bits tests
Ensure D113970 handles vector types patterns as well.
Differential Revision: https://reviews.llvm.org/D114575
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 | llvm/test/CodeGen/X86/vec_no-common-bits.ll |
Commit
7319d11586c4aa836204316a5be7cd71cfe5e05d
by jay.foad[AMDGPU] Fix "must generated" typo in docs
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 | llvm/docs/AMDGPUUsage.rst |
Commit
65d9dc7f1f4ac5b4d76502d36bd81d9857538148
by jay.foad[AMDGPU] Fix list indentation in docs
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 | llvm/docs/AMDGPUUsage.rst |
Commit
881840fc268e6523b71b40e717c647ed45682816
by Mirko.Brkusanin[AMDGPU][GlobalISel] Transform (fadd (fmul x, y), z) -> (fma x, y, z)
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D93305
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-post-legalize.mir |
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/include/llvm/CodeGen/TargetLowering.h |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
 | llvm/include/llvm/Target/GlobalISel/Combine.td |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-pre-legalize.mir |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
 | llvm/lib/Target/AMDGPU/SIISelLowering.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll |
Commit
89511362165332695bf0e26767662b47f8e11f98
by Mirko.Brkusanin[AMDGPU][GlobalISel] Transform (fadd (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), z)
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D97937
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 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/include/llvm/CodeGen/TargetLowering.h |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
 | llvm/lib/Target/AMDGPU/SIISelLowering.h |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll |
 | llvm/include/llvm/Target/GlobalISel/Combine.td |
Commit
f7322925365c165e8e92a699a2a699b6fe04f6d5
by Mirko.Brkusanin[AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y, (fma u, v, z))
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D97938
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 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll |
 | llvm/include/llvm/Target/GlobalISel/Combine.td |
Commit
e5e49a08f11618653aca133f22603c165889505e
by Mirko.Brkusanin[AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fpext (fmul u, v))), z) -> (fma x, y, (fma (fpext u), (fpext v), z))
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D98047
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 | llvm/include/llvm/Target/GlobalISel/Combine.td |
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll |
Commit
a7821692708c413d7a2488137dea2fbbfac31ca7
by Mirko.Brkusanin[AMDGPU][GlobalISel] Transform (fsub (fmul x, y), z) -> (fma x, y, -z)
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D96614
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 | llvm/include/llvm/Target/GlobalISel/Combine.td |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll |
Commit
5fe7fcd28e5e7df174a46a78e19316856152eefa
by Mirko.Brkusanin[AMDGPU][GlobalISel] Transform (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z))
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D98048
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 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
 | llvm/include/llvm/Target/GlobalISel/Combine.td |
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll |
Commit
37c2a2201d683383d3683321ff1f33fd8dd22298
by Mirko.Brkusanin[AMDGPU][GlobalISel] Transform (fsub (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), (fneg z))
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D98049
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 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll |
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/include/llvm/Target/GlobalISel/Combine.td |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
Commit
0dd570ff56c53dd6d11305fb0b36edab69eb1484
by Mirko.Brkusanin[AMDGPU][GlobalISel] Transform (fsub (fpext (fneg (fmul x, y))), z) -> (fneg (fma (fpext x), (fpext y), z))
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D98050
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 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/include/llvm/Target/GlobalISel/Combine.td |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
Commit
7e73c2a66a8bb73b80aedc94c4e58598ac87e9d5
by lebedev.ri[X86][Costmodel] `getInterleavedMemoryOpCostAVX512()`: masked load can not be folded into a shuffle
The mask on the shuffle is for the output, not the input.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D114697
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 | llvm/lib/Target/X86/X86TargetTransformInfo.cpp |
 | llvm/test/Analysis/CostModel/X86/masked-interleaved-load-i16.ll |
Commit
1cc3b135aa61a31a7f7e488dd720e29bd8907bfc
by clementval[fir] Get rid of the global option in FIRBuilder
Replace the global option `nameLengthHashSize` with a constexpr with the same name. The option was not used in fir-dev so switching to a constexpr is fine.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D114630
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 | flang/lib/Optimizer/Builder/FIRBuilder.cpp |
Commit
2022e2fcd05c68a38c4b5ef865461c9c86a81997
by mascasa[HWASan] Disable LTO test on aarch64.
It fails for non-Android aarch64 bots as well.
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 | compiler-rt/test/hwasan/TestCases/lto.c |
Commit
77dd579827f2e7574be4bbf3f94a48930e7b094f
by nikita.ppv[SCEV] Remove incorrect assert
Fix assertion failure reported on D113349 by removing the assert. While the produced expression should be equivalent, it may not be strictly the same, e.g. due to lazy nowrap flag updates. Similar to what the main createSCEV() code does, simply retain the old value map entry if one already exists.
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 | llvm/test/Analysis/ScalarEvolution/addrec-computed-during-addrec-calculation.ll |
 | llvm/lib/Analysis/ScalarEvolution.cpp |
Commit
c572eb1ad9d8a528bcaff0160888aff31b1f4b5f
by mehrnoosh.heidarpour[InstCombine] Fold (~A | B) ^ A --> ~(A & B)
https://alive2.llvm.org/ce/z/gLrYPk
Fixes: https://llvm.org/PR52518
Reviewed by: spatel
Differential revision: https://reviews.llvm.org/D114339
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 | llvm/test/Transforms/InstCombine/xor.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp |
Commit
f240e528cea25fd2a9ae01b1e1fe77f507ed7a2c
by kazu[llvm] Use range-based for loops (NFC)
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 | llvm/lib/Object/ELFObjectFile.cpp |
 | llvm/lib/ObjectYAML/COFFEmitter.cpp |
 | llvm/lib/ProfileData/InstrProf.cpp |
 | llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp |
 | llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp |
 | llvm/lib/CodeGen/MachinePipeliner.cpp |
 | llvm/lib/Passes/StandardInstrumentations.cpp |
 | llvm/lib/Target/Hexagon/HexagonCommonGEP.cpp |