Commit
32815bc907c4bf25866545da93b00b5d6c2ce45f
by jeremy.morse[DebugInfo][InstrRef][NFC] Test changes: DBG_VALUE to DBG_INSTR_REF
This patch contains a bunch of replacements of:
DBG_VALUE $somereg
with,
SOMEINST debug-instr-number1 DBG_INSTR_REF 1, 0, ...
It's mostly SelectionDAG tests that are making sure that the variable location assignment is placed in the correct position in the instructions.
To avoid a loss in test coverage of SelectionDAG, which is used by a lot of different backends, all these tests now have two modes and sets of RUN lines, one for DBG_VALUE mode, the other for instruction referencing.
Differential Revision: https://reviews.llvm.org/D114258
|
 | llvm/test/DebugInfo/X86/pr40427.ll |
 | llvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll |
 | llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll |
 | llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll |
 | llvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll |
 | llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll |
 | llvm/test/DebugInfo/X86/pr34545.ll |
 | llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll |
 | llvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll |
 | llvm/test/DebugInfo/X86/sdag-salvage-add.ll |
 | llvm/test/DebugInfo/X86/sdag-ir-salvage.ll |
Commit
4f215bfa6ee525b245b81462d75c3e1e47d18f13
by Adrian PrantlUpdate unit test API usage (NFC)
|
 | lldb/unittests/Platform/PlatformAppleSimulatorTest.cpp |
Commit
935abeaace123e5f11792a5175079d974d0a0be8
by Matthew.ArsenaultOpenMP: Correctly query location for amdgpu-arch
This was trying to figure out the build path for amdgpu-arch, and making assumptions about where it is which were not working on my system. Whether a standalone build or not, we should have a proper imported target to get the location from.
|
 | openmp/libomptarget/plugins/amdgpu/CMakeLists.txt |
Commit
410d276400a9ee2440387d372db6b0f112853cc0
by david.green[DAG] Add tests for fpsti.sat for various architectures. NFC
|
 | llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll |
 | llvm/test/CodeGen/RISCV/fpclamptosat.ll |
 | llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll |
 | llvm/test/CodeGen/AArch64/fpclamptosat.ll |
 | llvm/test/CodeGen/WebAssembly/fpclamptosat.ll |
 | llvm/test/CodeGen/X86/fpclamptosat_vec.ll |
 | llvm/test/CodeGen/ARM/fpclamptosat_vec.ll |
 | llvm/test/CodeGen/WebAssembly/fpclamptosat_vec.ll |
 | llvm/test/CodeGen/X86/fpclamptosat.ll |
Commit
9cf31b8d39d67843eeb314bacf6f78a1c969e1cc
by jeremy.morse[DebugInfo][InstrRef] Preserve properties of restored variables
InstrRefBasedLDV observes when variable locations are clobbered, scans what values are available in the machine, and re-issues a DBG_VALUE for the variable if it can find another location. Unfortunately, I hadn't joined up the Indirectness flag, so if it did this to an Indirect Value, the indirectness would be dropped.
Fix this, and add a test that if we clobber a variable value (on the stack in this case), then the recovered variable location keeps the Indirect flag.
Differential Revision: https://reviews.llvm.org/D114378
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 | llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp |
 | llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir |
Commit
99f8b795cc03f9bcda7f9cbd9625c2976ae62bd5
by spatel[InstCombine] try to fold 'or' into 'mul' operand
or (mul X, Y), X --> mul X, (add Y, 1) (when the multiply has no common bits with X)
We already have this fold if the pattern ends in 'add', but we can miss it if the 'add' becomes 'or' via another no-common-bits transform.
This is part of fixing: http://llvm.org/PR49055 ...but it won't make a difference on that example yet.
https://alive2.llvm.org/ce/z/Vrmoeb
Differential Revision: https://reviews.llvm.org/D114729
|
 | llvm/test/Transforms/InstCombine/or.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp |
Commit
1ce51a5f355ffba72b01e5e688cda7bbba2aa282
by i[ELF] --cref: If -Map is specified, print to the map file
PR48282: This behavior matches GNU ld and gold.
Reviewed By: markj
Differential Revision: https://reviews.llvm.org/D114663
|
 | lld/test/ELF/cref.s |
 | lld/docs/ReleaseNotes.rst |
 | lld/docs/ld.lld.1 |
 | lld/ELF/Writer.cpp |
 | lld/ELF/MapFile.cpp |
 | lld/ELF/Options.td |
 | lld/ELF/MapFile.h |
Commit
829b62adf5db189843b9a9ce626dfef97f76059f
by listmail[unroll] Split full exact and full bound unroll costing [NFC]
This change should be NFC. It's posted for review mostly to make sure others are happy with the names I'm introducing for "exact full unroll" and "bounded full unroll". The motivation here is that our cost model for bounded unrolling is too aggressive - it gives benefits for exits we aren't going to prune - but I also just think the new version of the code is a lot easier to follow.
Differential Revision: https://reviews.llvm.org/D114453
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 | llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp |
Commit
a20987adf4f80e2657eb3032a5a91e13f58106a0
by jeremy.morse[DebugInfo][InstrRef] Add indirection from dbg.declare in SelectionDAG
Usually dbg.declares get translated into either entries in an MF side-table, or a DBG_VALUE on entry to the function with IsIndirect set (including in instruction referencing mode). Much rarer is a dbg.declare attached to a non-argument value, such as in the test added in this patch where there's a variable-length-array. Such dbg.declares become SDDbgValue nodes with InIndirect=true.
As it happens, we weren't correctly emitting DBG_INSTR_REFs with the additional indirection. This patch adds the extra indirection, encoded as adding an additional DW_OP_deref to the expression.
Differential Revision: https://reviews.llvm.org/D114440
|
 | llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp |
 | llvm/test/DebugInfo/X86/instr-ref-dbg-declare.ll |
Commit
a655e0f991ba59f34fc24c44d04bbc56ff564c3e
by listmail[unroll] Reduce scope of UnrollFactor variable in computeUnrollCount [NFC]
Suggested in review of D114453, done as a separate change to get all uses at once.
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 | llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp |
Commit
f50207c015df91132efe135fd64c3c5bb36c0909
by listmail[unroll] Use early return in shouldPartialUnroll [nfc]
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 | llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp |
Commit
fc9dae420c0c7f0f4667e0aa9f3d37d72b2a9906
by jeremy.morse[DebugInfo][InstrRef][NFC] "Final" x86 test cleanup
These are some final test changes for using instruction referencing on X86: * Most of these tests just have the flag switched so that they run with instr-ref, and just work: these tests were fixed by earlier patches. * There are some spurious differences in textual outputs, * A few have different temporary labels in the output because more MCSymbols are printed to the output.
Differential Revision: https://reviews.llvm.org/D114588
|
 | llvm/test/DebugInfo/COFF/fpo-shrink-wrap.ll |
 | llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir |
 | llvm/test/DebugInfo/COFF/types-array-advanced.ll |
 | llvm/test/DebugInfo/X86/sdagsplit-1.ll |
 | llvm/test/DebugInfo/COFF/fpo-stack-protect.ll |
 | llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir |
 | llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir |
 | llvm/test/tools/llvm-locstats/locstats.ll |
 | llvm/test/DebugInfo/X86/sdag-split-arg.ll |
 | llvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir |
 | llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll |
 | llvm/test/CodeGen/MIR/X86/diexpr-win32.mir |
 | llvm/test/DebugInfo/X86/dbg-addr-dse.ll |
Commit
8906a0fe64abf1a9c8641ee51908bba7cbf8ec54
by listmail[SCEVExpander] Drop poison generating flags when reusing instructions
The basic problem we have is that we're trying to reuse an instruction which is mapped to some SCEV. Since we can have multiple such instructions (potentially with different flags), this is analogous to our need to drop flags when performing CSE. A trivial implementation would simply drop flags on any instruction we decided to reuse, and that would be correct.
This patch is almost that trivial patch except that we preserve flags on the reused instruction when existing users would imply UB on overflow already. Adding new users can, at most, refine this program to one which doesn't execute UB which is valid.
In practice, this fixes two conceptual problems with the previous code: 1) a binop could have been canonicalized into a form with different opcode or operands, or 2) the inbounds GEP case which was simply unhandled.
On the test changes, most are pretty straight forward. We loose some flags (in some cases, they'd have been dropped on the next CSE pass anyways). The one that took me the longest to understand was the ashr-expansion test. What's happening there is that we're considering reuse of the mul, previously we disallowed it entirely, now we allow it with no flags. The surrounding diffs are all effects of generating the same mul with a different operand order, and then doing simple DCE.
The loss of the inbounds is unfortunate, but even there, we can recover most of those once we actually treat branch-on-poison as immediate UB.
Differential Revision: https://reviews.llvm.org/D112734
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 | llvm/test/Transforms/PhaseOrdering/loop-rotation-vs-common-code-hoisting.ll |
 | llvm/test/Transforms/IndVarSimplify/ashr-expansion.ll |
 | llvm/test/Transforms/LoopUnroll/runtime-loop-multiple-exits.ll |
 | llvm/test/Transforms/IndVarSimplify/lftr-reuse.ll |
 | llvm/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll |
 | llvm/test/Transforms/IndVarSimplify/lftr-address-space-pointers.ll |
 | llvm/test/Transforms/LoopPredication/basic.ll |
 | llvm/test/Transforms/IndVarSimplify/pr24783.ll |
 | llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp |
 | llvm/test/Transforms/IRCE/non-loop-invariant-rhs-instr.ll |
 | llvm/test/CodeGen/PowerPC/common-chain.ll |
Commit
45ecfed6c636d06f76bca0a44803e945cdae9506
by listmail[CVP] Remove ashr of -1 or 0
Fixes PR#52190. There is already a check for converting ashr instructions with non-negative left-hand sides into lshr; this patch adds an optimization to remove ashr altogether if the left-hand side is known to be in the range [-1, 1).
Differential Revision: https://reviews.llvm.org/D113835
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 | llvm/test/Transforms/CorrelatedValuePropagation/ashr.ll |
 | llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp |
Commit
0eee844539e406dfa8010a129ea3655d2298ac10
by jeremy.morse[DebugInfo][InstrRef] Terminate overlapping variable fragments
If we have a variable where its fragments are split into overlapping segments:
DBG_VALUE $ax, $noreg, !123, !DIExpression(DW_OP_LLVM_fragment_0, 16) ... DBG_VALUE $eax, $noreg, !123, !DIExpression(DW_OP_LLVM_fragment_0, 32)
we should only propagate the most recently assigned fragment out of a block. LiveDebugValues only deals with live-in variable locations, as overlaps within blocks is DbgEntityHistoryCalculators domain.
InstrRefBasedLDV has kept the accumulateFragmentMap method from VarLocBasedLDV, we just need it to recognise DBG_INSTR_REFs. Once it's produced a mapping of variable / fragments to the overlapped variable / fragments, VLocTracker uses it to identify when a debug instruction needs to terminate the other parts it overlaps with. The test is updated for some standard "InstrRef picks different registers" variation, and the order of some unrelated DBG_VALUEs changes.
Differential Revision: https://reviews.llvm.org/D114603
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 | llvm/unittests/CodeGen/InstrRefLDVTest.cpp |
 | llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir |
 | llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp |
 | llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h |
Commit
c7aa358798e6330593fd5cc2ff4caf6bc15ba3c9
by mail[clang-tidy] Fix pr48613: "llvm-header-guard uses a reserved identifier"
Fixes https://bugs.llvm.org/show_bug.cgi?id=48613.
llvm-header-guard is suggesting header guards with leading underscores if the header file path begins with a '/' or similar special character. Only reserved identifiers should begin with an underscore.
Differential Revision: https://reviews.llvm.org/D114149
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 | clang-tools-extra/unittests/clang-tidy/LLVMModuleTest.cpp |
 | clang-tools-extra/clang-tidy/utils/HeaderGuard.h |
 | clang-tools-extra/clang-tidy/utils/HeaderGuard.cpp |
Commit
3ab150f6e44b99dea855024c48d0878eb55ae3d0
by jonathanchesterfield[openmp][devicertl] Add a missing loader_uninitialized attribute
|
 | openmp/libomptarget/DeviceRTL/src/Debug.cpp |
Commit
6f99e1aa58e3566fcce689bc986b7676e818c038
by contact[lldb][NFC] Format lldb/include/lldb/Symbol/Type.h
Reviewed By: teemperor, JDevlieghere
Differential Revision: https://reviews.llvm.org/D113604
Signed-off-by: Luís Ferreira <contact@lsferreira.net>
|
 | lldb/source/Symbol/Type.cpp |
 | lldb/include/lldb/Symbol/Type.h |
Commit
e8b8304d76ccefa9880bbb352d9f81f330ef1ea1
by mtrofin[NFC][Regalloc] Split canEvictInterference into hint and general
There are 2 eviction queries. One is made by tryAssign, when it attempts to free an interference occupying the hint of the candidate. The other is during 'regular' interference resolution, where we scan over all physical registers and try to see if we can evict live ranges in favor of the candidate. We currently use the same logic in both cases, just that the former never passes the cost to any subsequent query. Technically, the 2 decisions could be implemented with different policies.
This patch splits the 2.
RFC: https://lists.llvm.org/pipermail/llvm-dev/2021-November/153639.html
Differential Revision: https://reviews.llvm.org/D114019
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 | llvm/lib/CodeGen/RegAllocGreedy.cpp |
Commit
e63c799a767b0f682af62eba9d1d375c59e58627
by dblaikie[Demangle] Add support for D simple single qualified names
This patch adds support for simple single qualified names that includes internal mangled names and normal symbol names.
Differential Revision: https://reviews.llvm.org/D111415
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 | llvm/lib/Demangle/DLangDemangle.cpp |
 | llvm/unittests/Demangle/DLangDemangleTest.cpp |
Commit
6e08abdc256bb9c2158ab5dbfa082a78faa3543a
by dblaikie[Demangle] Add support for multiple identifiers in D qualified names
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D114305
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 | llvm/unittests/Demangle/DLangDemangleTest.cpp |
 | llvm/lib/Demangle/DLangDemangle.cpp |
Commit
b779f02a1cb73bb3885e2059e418dfc1c16d25e2
by dblaikie[Demangle] Add support for D anonymous symbols
Anonymous symbols are represented by 0 in the mangled symbol. We should skip them in order to represent the demangled name correctly, otherwise demangled names like `demangle..anon` can happen.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D114307
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 | llvm/unittests/Demangle/DLangDemangleTest.cpp |
 | llvm/lib/Demangle/DLangDemangle.cpp |
Commit
53dfa52546833d4c8443d976e67fef820ff54426
by Matthias BraunTests for D112754
Differential Revision: https://reviews.llvm.org/D113151
|
 | llvm/test/CodeGen/X86/fold-masked-merge.ll |
Commit
87ba99c263afd4c1c090c17eaf51089b1edbc280
by Matthias BraunX86: Fold masked-merge when and-not is not available
Differential Revision: https://reviews.llvm.org/D112754
|
 | llvm/test/CodeGen/X86/or-lea.ll |
 | llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll |
 | llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll |
 | llvm/test/CodeGen/X86/fold-masked-merge.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
Commit
7d4da4e1ab7f79e51db0d5c2a0f5ef1711122dd7
by ajcbik[mlir][sparse] generalize sparse tensor output implementation
Moves sparse tensor output support forward by generalizing from injective insertions only to include reductions. This revision accepts the case with all parallel outer and all reduction inner loops, since that can be handled with an injective insertion still. Next revision will allow the inner parallel loop to move inward (but that will require "access pattern expansion" aka "workspace").
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D114399
|
 | mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp |
 | mlir/lib/Dialect/SparseTensor/Utils/Merger.cpp |
 | mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_vector_ops.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_out.mlir |
 | mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_reduction.mlir |
 | mlir/include/mlir/Dialect/SparseTensor/Utils/Merger.h |
Commit
bd4c6a476fd037fb07a1c484f75d93ee40713d3d
by dblaikieAdd missing header
|
 | llvm/lib/Demangle/DLangDemangle.cpp |