SuccessChanges

Summary

  1. Add an option to hide "cold" blocks from CFG graph (details)
  2. Add a static assertions for custom Op<> to not defined data members (NFC) (details)
  3. [ARM] A couple of extra VMOVimm tests, useful for showing BE codegen. NFC (details)
  4. GlobalISel: Hide virtual register creation in MIRBuilder (details)
  5. GlobalISel: Avoid use of G_INSERT in insertParts (details)
  6. [SystemZ][z/OS] Pass OpenFlags when creating tmp files (details)
  7. [NFC][compiler-rt][hwasan] Move allocation functions into their own file (details)
  8. [gn build] (semi-manually) port 944b3c53aec5 (details)
  9. [CMake][Fuchsia] Use PIC for Fuchsia runtimes (details)
  10. [CodeGen] remove instcombine from codegen tests; NFC (details)
  11. [lldb][NFC] Refactor name to index maps in Symtab (details)
  12. Fix for failing test mentioned in https://reviews.llvm.org/D103564. (details)
  13. [amdgpu] Add `-enable-ocl-mangling-mismatch-workaround`. (details)
  14. [ms] [llvm-ml] Disambiguate size directives and variable declarations (details)
  15. [ARM] Generate VDUP(Const) from constant buildvectors (details)
  16. Partially revert the Fuchsia changes to avoid the use of PIC (details)
  17. Revert "[DSE] Remove stores in the same loop iteration" (details)
  18. Revert "[AMDGPU] Add gfx1013 target" (details)
  19. [SystemZ] Return true from isMaskAndCmp0FoldingBeneficial(). (details)
  20. [CMake][Fuchsia] Disable vcruntime for first stage as well (details)
  21. Revert "[LoopNest] Fix Wdeprecated-copy warnings" (details)
  22. [libc++] NFC: Rewrite the documentation for the debug mode (details)
  23. [DSE] Add another multiblock loop DSE test. NFC (details)
  24. [lldb] Don't print script output twice in HandleCommand (details)
  25. [scudo] Add Scudo support for Trusty OS (details)
  26. [InstCombine] add FMF tests for fneg-of-select; NFC (details)
  27. [InstCombine] fix nsz (fast-math) propagation from fneg-of-select (details)
  28. [LLDB][NFC] Remove parameter names from forward declarations from hand written expressions used in heap.py (details)
  29. [SystemZ] Return true from convertSetCCLogicToBitwiseLogic for scalar integer. (details)
  30. Update and improve compiler-rt tests for -mllvm -asan_use_after_return=(never|[runtime]|always). (details)
  31. [Polly][Isl] Removing nullptr constructor from C++ bindings. NFC. (details)
  32. Revert "Revert "[LoopNest] Fix Wdeprecated-copy warnings"" (details)
  33. LTO: Export functions referenced by non-canonical CFI jump tables (details)
  34. [NFC] In the future, all intrinsics defined for compatibility with the XL (details)
  35. [mlir][tosa] Temporarily support 2D and 3D tensor types in matmul (details)
  36. [libc][NFC] Use add_library instead of add_llvm_library for a few libraries. (details)
  37. [libc] Add a macro to include/exclude subprocess tests. (details)
  38. [libc][NFC][Obvious] Compare against size_t values in ArrayRef tests. (details)
  39. [JITLink][MachO] Split C-string literal sections on null-terminators. (details)
  40. [OpenMP] Add an information flag for device data transfers (details)
  41. Add llvm_unreacheable to silence warning "not all control paths return a value" (NFC) (details)
  42. Revert "Add a static assertions for custom Op<> to not defined data members (NFC)" (details)
  43. Rename compiler-rt/lib/orc/endian.h to endianness.h to avoid conflict with system headers (details)
  44. Add a couple of missing includes (details)
  45. ORTRT: Add tests for string_view equality and inequality operators (details)
  46. Reland "[AMDGPU] Add gfx1013 target" (details)
  47. [PowerPC][Dwarf] Assign MMA register's dwarf register number to negative value (details)
  48. [NFC][XCOFF] Use yaml2obj in llvm-objdump/XCOFF/section-headers.test instead of binary files. (details)
  49. [RISCV][NFC] Add a single space after comma for VType (details)
  50. Add Twine support for std::string_view. (details)
  51. Fix LIT test failure encountered on AIX (details)
  52. Remove white space in llvm-objdump/XCOFF/section-headers.test (details)
  53. [mlir] Fix body-less async.execute printing (details)
  54. [PowerPC] Make sure the first probe is full size or is the last probe when stack is realigned (details)
  55. [CMake] Don't use libc++ by default on Windows yet (details)
  56. [mlir][linalg] Prepare fusion on tensors for scalar operands. (details)
  57. [Docs] Fix incorrect return type for example code (details)
  58. [NFC] Reformat MachineValueType (details)
  59. Fix the 4203-Buildbot failure in LLVM Buildbot on llvm-clang-win-x-aarch64 (details)
  60. Prevent generation of dependency on _cxa_guard for static initialization (details)
  61. [MLIR] Make DictionaryAttr::getAs take name as && reference (details)
  62. [llvm] Sync DebugInfo.h with DebugInfoFlags.def (details)
  63. [RISCV] Support CONCAT_VECTORS on scalable masks (details)
  64. [ScalarEvolution] Add test for preserving add overflow flags. (details)
  65. [flang] Define the API for CPU_TIME (details)
  66. Revert "[llvm] Sync DebugInfo.h with DebugInfoFlags.def" (details)
  67. Revert "[lldb] Set return status to failed when adding a command error" (details)
  68. [LoopBoundSplit] Ignore phi node which is not scevable (details)
  69. [ValueTypes] Add missing enum names for MVTs (details)
  70. [compiler-rt] Mark symbolize_stack_fp test unsupported on Arm Thumb (details)
  71. [RISCV] Fix failing RVV MC tests (details)
  72. [mlir][ArmSVE] Add basic mask generation operations (details)
  73. [LTO] Support new PM in ThinLTOCodeGenerator. (details)
  74. [JITLink][MachO] Handle muliple symbols at same offset when splitting C-strings. (details)
  75. [docs] Fix load instructions in chapter 7 of the tutorial (details)
  76. [SROA] Avoid splitting loads/stores with irregular type (details)
  77. Interp.h - AddSubMulHelper - avoid APSInt::toString std::string wrapper. NFCI (details)
  78. JSONNodeDumper.cpp - VisitIntegerLiteral - avoid APSInt::toString std::string wrapper. NFCI (details)
  79. [clang] NFC: Rename rvalue to prvalue (details)
  80. Revert "[SROA] Avoid splitting loads/stores with irregular type" (details)
  81. [clang] NFC: rename SK_CastDerivedToBaseRValue to SK_CastDerivedToBasePRValue (details)
  82. Correct the behavior of va_arg checking in C++ (details)
  83. [ValueTypes][RISCV] Cap RVV fixed-length vectors by size (details)
  84. [AArch64LoadStoreOptimizer] Generate more STPs by renaming registers earlier (details)
  85. [OpenMP][Tools] Fix Archer for MACOS (details)
  86. [OpenMP][Tools] Cleanup memory pool used in Archer (details)
  87. [OpenMP][Tools] Fix Archer handling of task dependencies (details)
  88. [mlir] Expose a function to populate tensor constant bufferization patterns (details)
  89. [Test] Add more elaborate case of symbolic execution of 1-iteration loop (details)
  90. [SLP]Improve gathering of scalar elements. (details)
  91. [clang-cl] Parse /await:strict, new in MSVC 16.10 (details)
  92. [clang] p1099 using-enum feature macro & web page (details)
  93. [X86][SSE] Regenerate slow-pmulld.ll test checks (details)
  94. [X86][SLM] Adjust XMM non-PMULLD throughput costs to half rate. (details)
  95. [OpenCL] Add OpenCL builtin test generator (details)
  96. [x86] add tests for store merging miscompile (PR50623); NFC (details)
  97. [TableGen] Fix ProfileFoldOpInit so that parameters are named consistently [NFC] (details)
  98. [ARM] Fix Machine Outliner LDRD/STRD handling in Thumb mode. (details)
  99. Sanitizers.h - remove MathExtras.h include dependency (details)
  100. [SDAG] fix miscompile from merging stores of different sizes (details)
Commit 9197bac297f73552882820ba25d245115e29e7af by apilipenko
Add an option to hide "cold" blocks from CFG graph

Introduce a new cl::opt to hide "cold" blocks from CFG DOT graphs.
Use BFI to get block relative frequency. Hide the block if the
frequency is below the threshold set by the command line option value.

Reviewed By: davidxl, hoy
Differential Revision: https://reviews.llvm.org/D103640
The file was modifiedllvm/lib/Analysis/CFGPrinter.cpp
Commit c0edcec630eb26e12d66dae2f0e1fbf5258cb6ac by joker.eph
Add a static assertions for custom Op<> to not defined data members (NFC)

A common mistake for newcomers to MLIR is to try to store extra member
on the Op class. However these are intended to be thing wrapper around
an Operation*, all the storage is meant to be encoded in attribute on
the underlying Operation. This can be confusing to debug, so better
catch it at build time.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D103869
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
Commit f44770c32992d51586d11c352f9e825f6aa15fc2 by david.green
[ARM] A couple of extra VMOVimm tests, useful for showing BE codegen. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmovimm.ll
Commit 2927d40f044650e787985235a1d3d76db345cf87 by Matthew.Arsenault
GlobalISel: Hide virtual register creation in MIRBuilder
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit 31a9659de550b25b6bc0ad5cab73d133095c351f by Matthew.Arsenault
GlobalISel: Avoid use of G_INSERT in insertParts

G_INSERT legalization is incomplete and doesn't work very
well. Instead try to use sequences of G_MERGE_VALUES/G_UNMERGE_VALUES
padding with undef values (although this can get pretty large).

For the case of load/store narrowing, this is still performing the
load/stores in irregularly sized pieces. It might be cleaner to split
this down into equal sized pieces, and rely on load/store merging to
optimize it.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/ds-alignment.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
The file was modifiedllvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
Commit 0e8506debae3ad534b4eecfa922fc6281506a635 by Abhina.Sreeskantharajan
[SystemZ][z/OS] Pass OpenFlags when creating tmp files

This patch https://reviews.llvm.org/D102876 caused some lit regressions on z/OS because tmp files were no longer being opened based on binary/text mode. This patch passes OpenFlags when creating tmp files so we can open files in different modes.

Reviewed By: amccarth

Differential Revision: https://reviews.llvm.org/D103806
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedllvm/lib/Support/Path.cpp
The file was modifiedllvm/include/llvm/Support/FileSystem.h
Commit 944b3c53aec54c205d6898ffca548a484309e139 by leonardchan
[NFC][compiler-rt][hwasan] Move allocation functions into their own file

This removes the `__sanitizer_*` allocation function definitions from
`hwasan_interceptors.cpp` and moves them into their own file. This way
implementations that do not use interceptors at all can just ignore
(almost) everything in `hwasan_interceptors.cpp`.

Also remove some unused headers in `hwasan_interceptors.cpp` after the move.

Differential Revision: https://reviews.llvm.org/D103564
The file was addedcompiler-rt/lib/hwasan/hwasan_allocation_functions.cpp
The file was modifiedcompiler-rt/lib/hwasan/hwasan_interceptors.cpp
The file was modifiedcompiler-rt/lib/hwasan/hwasan.h
The file was modifiedcompiler-rt/lib/hwasan/CMakeLists.txt
Commit 9ec6c3bb2ff0ad94edd4c09189f3a0310947fc58 by thakis
[gn build] (semi-manually) port 944b3c53aec5
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/hwasan/BUILD.gn
Commit 2a5afb466553ae4e185d7fa50c9b8df9fe62ecda by phosek
[CMake][Fuchsia] Use PIC for Fuchsia runtimes

Disabling PIC globally also disabled PIC for runtimes which was
undesirable, manually override it.

Differential Revision: https://reviews.llvm.org/D103919
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
The file was modifiedclang/cmake/caches/Fuchsia.cmake
Commit d69c4372bfbe81961160a4e6cb238fb53a279515 by spatel
[CodeGen] remove instcombine from codegen tests; NFC

The FileCheck lines in these files are auto-generated and complete,
so there's very little upside (less CHECK lines) from running
-instcombine on them and violating the expected test layering
(optimizer developers shouldn't have to be aware of clang tests).

Running opt passes like this makes it harder to make changes such as:
D93817
The file was modifiedclang/test/CodeGen/arm-bf16-dotprod-intrinsics.c
The file was modifiedclang/test/CodeGen/arm-bf16-getset-intrinsics.c
The file was modifiedclang/test/CodeGen/aarch64-bf16-getset-intrinsics.c
The file was modifiedclang/test/CodeGen/arm-bf16-convert-intrinsics.c
The file was modifiedclang/test/CodeGen/aarch64-bf16-lane-intrinsics.c
The file was modifiedclang/test/CodeGen/aarch64-bf16-dotprod-intrinsics.c
Commit 64576a1be887b7afcacf0534e6c168805fba5677 by apl
[lldb][NFC] Refactor name to index maps in Symtab

The various maps in Symtab lead to some repetative code. This should
improve the situation somewhat.

Differential Revision: https://reviews.llvm.org/D103652
The file was modifiedlldb/include/lldb/Symbol/Symtab.h
The file was modifiedlldb/source/Symbol/Symtab.cpp
Commit a9ea0a6a77b30305bfbe1b06c30bf6136f64c1ad by leonardchan
Fix for failing test mentioned in https://reviews.llvm.org/D103564.

This updates the path shown in the stack trace.
The file was modifiedcompiler-rt/test/hwasan/TestCases/use-after-free.c
Commit 27332968d85e1ad4a58df884030e55abc00e91b1 by michael.hliao
[amdgpu] Add `-enable-ocl-mangling-mismatch-workaround`.

- Add `-enable-ocl-mangling-mismatch-workaround` to work around the
  mismatch on OCL name mangling so far.

Reviewed By: yaxunl, rampitec

Differential Revision: https://reviews.llvm.org/D103920
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
Commit dc0c3fe5f35eb5fc8d5b36bb79761fb374a87269 by epastor
[ms] [llvm-ml] Disambiguate size directives and variable declarations

MASM allows statements of the form:
<VAR> DWORD 5
to declare a variable with name <VAR>, while:
call dword ptr [<value>]
is a valid instruction. To disambiguate, we recognize size directives by the trailing "ptr" token.

As discussed in https://lists.llvm.org/pipermail/llvm-dev/2021-May/150774.html

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D103257
The file was addedllvm/test/tools/llvm-ml/reserved_words_conflict.asm
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
Commit d7853bae941006cece63013f09d524e72bbbec45 by david.green
[ARM] Generate VDUP(Const) from constant buildvectors

If we cannot otherwise use a VMOVimm/VMOVFPimm/VMVNimm, fall back to
producing a VDUP(const) as opposed to a constant pool load. This will at
least be smaller codesize and can allow the VDUP to be folded into other
instructions.

Differential Revision: https://reviews.llvm.org/D103808
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/predicated-liveout-unknown-lanes.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmovimm.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-shifts.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmvnimm.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-fp16convertloops.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-tailpred.ll
Commit a7142f5c91ba0e4dbe6dbd36e3f4ac6ccd33a418 by phosek
Partially revert the Fuchsia changes to avoid the use of PIC

This reverts commit:
2a5afb466553ae4e185d7fa50c9b8df9fe62ecda
de98da2eced72eee791a93b076b70a7b22175abc
1dba2a026956b0f3918dcf8bb1d3f3483db2de8c
The file was modifiedclang/cmake/caches/Fuchsia.cmake
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
Commit 297088d1add70cae554c8f96dde3a97a3e8d56a5 by david.green
Revert "[DSE] Remove stores in the same loop iteration"

Apparently non-dead stores are being removed, as noted in D100464.

This reverts commit 222aeb4d51a46c5a81c9e4ccb16d1d19dd21ec95.
The file was modifiedllvm/test/Other/opt-O3-pipeline-enable-matrix.ll
The file was modifiedllvm/test/Other/opt-O3-pipeline.ll
The file was modifiedllvm/test/Other/opt-O2-pipeline.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/opt-pipeline.ll
The file was modifiedllvm/test/Other/opt-Os-pipeline.ll
The file was modifiedllvm/test/Transforms/DeadStoreElimination/multiblock-loops.ll
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit 211e584fa2a4c032e4d573e7cdbffd622aad0a8f by brendon.cahoon
Revert "[AMDGPU] Add gfx1013 target"

This reverts commit ea10a86984ea73fcec3b12d22404a15f2f59b219.

A sanitizer buildbot reports an error.
The file was modifiedllvm/test/MC/AMDGPU/gfx10_unsupported.s
The file was modifiedllvm/test/MC/AMDGPU/dl-insts-err.s
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/lib/Support/TargetParser.cpp
The file was modifiedclang/include/clang/Basic/Cuda.h
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/lib/Object/ELFObjectFile.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/include/llvm/Support/TargetParser.h
The file was modifiedllvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/get_elf_mach_gfx_name.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/ELF.h
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-features.cl
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedclang/test/Driver/amdgpu-mcpu.cl
The file was modifiedllvm/lib/Target/AMDGPU/GCNProcessors.td
The file was modifiedllvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedclang/lib/Basic/Targets/AMDGPU.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedclang/lib/Basic/Cuda.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
The file was modifiedllvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
The file was modifiedclang/lib/Basic/Targets/NVPTX.cpp
The file was modifiedclang/test/Driver/amdgpu-macros.cl
The file was modifiedllvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNSubtarget.h
Commit d5e4f28c0a45a659d45ae8a822c24d68fbadcfbd by paulsson
[SystemZ] Return true from isMaskAndCmp0FoldingBeneficial().

Return true if the mask is a constant uint of 2 bytes, in which case TMLL is
available.

Review: Ulrich Weigand
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.h
The file was addedllvm/test/CodeGen/SystemZ/codegenprepare-sink-and-for-tm.ll
Commit 1683dbf0ddb28c829926b18065f692ee670693fc by phosek
[CMake][Fuchsia] Disable vcruntime for first stage as well

Using vcruntime is breaking libc++ headers so don't use it.

Differential Revision: https://reviews.llvm.org/D103926
The file was modifiedclang/cmake/caches/Fuchsia.cmake
Commit 07ef5805abe5d4576eb5528eab63e75505bfd0bd by whitneyt
Revert "[LoopNest] Fix Wdeprecated-copy warnings"

This reverts commit dee1f0cb348b0a56375d9b563fb4d6918c431ed1.

It appears that this change broke the sanitizer-windows bot:
https://lab.llvm.org/buildbot/#/builders/127/builds/12064

Differential Revision: https://reviews.llvm.org/D103752
The file was modifiedllvm/include/llvm/Analysis/LoopNestAnalysis.h
Commit 12933ba9eab2a6c0cb63a590d0b7338817fe88ed by Louis Dionne
[libc++] NFC: Rewrite the documentation for the debug mode
The file was modifiedlibcxx/docs/DesignDocs/DebugMode.rst
Commit 0178ae734ca33265fe051c39deff6d7d530f6239 by david.green
[DSE] Add another multiblock loop DSE test. NFC

As reported in D100464, the stores in these loops should not be removed.
The file was modifiedllvm/test/Transforms/DeadStoreElimination/multiblock-loops.ll
Commit 1a216fb15a188f9ac7de6d79267b3cfb2946f792 by Jonas Devlieghere
[lldb] Don't print script output twice in HandleCommand

When executing a script command in HandleCommand(s) we currently print
its output twice
You can see this issue in action when adding a breakpoint command:

(lldb) b main
Breakpoint 1: where = main.out`main + 13 at main.cpp:2:3, address = 0x0000000100003fad
(lldb) break command add 1 -o "script print(\"Hey!\")"
(lldb) r
Process 76041 launched: '/tmp/main.out' (x86_64)
Hey!
(lldb)  script print("Hey!")
Hey!
Process 76041 stopped

The issue is caused by HandleCommands using a temporary
CommandReturnObject and one of the commands (`script` in this case)
setting an immediate output stream. This causes the result to be printed
twice: once directly to the immediate output stream and once when
printing the result of HandleCommands.

This patch fixes the issue by introducing a new option to suppress
immediate output for temporary CommandReturnObjects.

Differential revision: https://reviews.llvm.org/D103349
The file was addedlldb/lldb/test/Shell/Breakpoint/breakpoint-command.test
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
The file was modifiedlldb/test/Shell/ScriptInterpreter/Lua/nested_sessions.test
The file was modifiedlldb/include/lldb/Interpreter/CommandReturnObject.h
The file was modifiedlldb/source/Interpreter/CommandReturnObject.cpp
The file was addedlldb/test/Shell/Breakpoint/breakpoint-command.test
Commit 2551053e8d8df464d5b60e7c9b0add8f85cc1e10 by kostyak
[scudo] Add Scudo support for Trusty OS

trusty.cpp and trusty.h define Trusty implementations of map and other
platform-specific functions. In addition to adding Trusty configurations
in allocator_config.h and size_class_map.h, MapSizeIncrement and
PrimaryEnableRandomOffset are added as configurable options in
allocator_config.h.
Background on Trusty: https://source.android.com/security/trusty

Differential Revision: https://reviews.llvm.org/D103578
The file was modifiedcompiler-rt/lib/scudo/standalone/primary64.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/primary_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/platform.h
The file was modifiedcompiler-rt/lib/scudo/standalone/size_class_map.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/combined_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/common.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary32.h
The file was modifiedcompiler-rt/lib/scudo/standalone/allocator_config.h
The file was addedcompiler-rt/lib/scudo/standalone/trusty.cpp
The file was addedcompiler-rt/lib/scudo/standalone/trusty.h
Commit c52ed5c4f1f2a2e54634226dc6bd305f98f0c541 by spatel
[InstCombine] add FMF tests for fneg-of-select; NFC

As noted in the post-commit comments for 3cdd05e519d,
we need to be more careful about FMF propagation.
The file was modifiedllvm/test/Transforms/InstCombine/fneg.ll
Commit d2012d965d60c3258b3a69d024491698f8aec386 by spatel
[InstCombine] fix nsz (fast-math) propagation from fneg-of-select

As discussed in the post-commit comments for:
3cdd05e519dd

It seems to be safe to propagate all flags from the final fneg
except for 'nsz' to the new select:
https://alive2.llvm.org/ce/z/J_APDc

nsz has unique FMF semantics: it is not poison, it is only
"insignificant" in the calculation according to the LangRef.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
The file was modifiedllvm/test/Transforms/InstCombine/fneg.ll
Commit ae1a699554cfa01d9fb307a964c3a9f71831a62e by Shafik Yaghmour
[LLDB][NFC] Remove parameter names from forward declarations from hand written expressions used in heap.py

heap.py has a lot of large hand written expressions and each name in the
expression will be looked up by clang during expression parsing. For
function parameters this will be in Sema::ActOnParamDeclarator(...) in order to
catch redeclarations of parameters. The names are not needed and we have seen
some rare cases where since we don't have symbols we end up in
SymbolContext::FindBestGlobalDataSymbol(...) which may conflict with other global
symbols.

There may be a way to make this lookup smarter to avoid these cases but it is
not clear how well tested this path is and how much work it would be to fix it.
So we will go with this fix while we investigate more.

Ref: rdar://78265641
The file was modifiedlldb/examples/darwin/heap_find/heap.py
Commit 8b32e25bc229f98faed002b1cc90587ca300c92a by paulsson
[SystemZ] Return true from convertSetCCLogicToBitwiseLogic for scalar integer.

Review: Ulrich Weigand
The file was addedllvm/test/CodeGen/SystemZ/int-cmp-61.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.h
Commit af8c59e06d281f96db101d87ec227b238045a1d8 by kda
Update and improve compiler-rt tests for -mllvm -asan_use_after_return=(never|[runtime]|always).

In addition:
  - optionally add global flag to capture compile intent for UAR:
    __asan_detect_use_after_return_always.
    The global is a SANITIZER_WEAK_ATTRIBUTE.

for issue: https://github.com/google/sanitizers/issues/1394

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D103304
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/stack-poisoning.ll
The file was modifiedcompiler-rt/test/asan/TestCases/pass-struct-byval-uar.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/scariness_score_test.cpp
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/fake-stack.ll
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/stack_dynamic_alloca.ll
The file was modifiedcompiler-rt/test/asan/TestCases/uar_and_exceptions.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/heavy_uar_test.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/Windows/stack_use_after_return.cpp
The file was modifiedcompiler-rt/lib/asan/asan_fake_stack.cpp
The file was modifiedcompiler-rt/lib/asan/asan_interface.inc
The file was modifiedcompiler-rt/test/asan/TestCases/Windows/dll_stack_use_after_return.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/Linux/uar_signals.cpp
The file was modifiedcompiler-rt/test/asan/TestCases/Posix/stack-use-after-return.cpp
Commit 9b41d0958e78c397c702c913d60946dd8c01f0a5 by patacca
[Polly][Isl] Removing nullptr constructor from C++ bindings. NFC.

[Polly][Isl] Removing nullptr constructor from C++ bindings. NFC.

This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
- Removed `std::nullptr_t` constructor from all the classes in the isl C++ bindings.
- `isl-noexceptions.h` has been generated by this https://github.com/patacca/isl/commit/a7e00bea38f251a4bcf5c2c6ce5fa7ee5f661528

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D103751
The file was modifiedpolly/lib/Support/ISLTools.cpp
The file was modifiedpolly/lib/Transform/FlattenSchedule.cpp
The file was modifiedpolly/lib/CodeGen/IslAst.cpp
The file was modifiedpolly/lib/CodeGen/PPCGCodeGeneration.cpp
The file was modifiedpolly/lib/External/isl/include/isl/isl-noexceptions.h
The file was modifiedpolly/unittests/DeLICM/DeLICMTest.cpp
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
The file was modifiedpolly/lib/Analysis/ScopBuilder.cpp
The file was modifiedpolly/include/polly/ScopInfo.h
The file was modifiedpolly/lib/Transform/ZoneAlgo.cpp
The file was modifiedpolly/lib/Transform/FlattenAlgo.cpp
The file was modifiedpolly/lib/Transform/DeLICM.cpp
The file was modifiedpolly/lib/Transform/ScheduleOptimizer.cpp
The file was modifiedpolly/lib/Transform/ForwardOpTree.cpp
Commit 9b022a679b2ba79b8c7d11135b9297f0149f1433 by whitneyt
Revert "Revert "[LoopNest] Fix Wdeprecated-copy warnings""

This reverts commit 07ef5805abe5d4576eb5528eab63e75505bfd0bd.

The broke of the sanitizer-windows bot:
https://lab.llvm.org/buildbot/#/builders/127/builds/12064
is not caused by the original commit.

Differential Revision: https://reviews.llvm.org/D103752
The file was modifiedllvm/include/llvm/Analysis/LoopNestAnalysis.h
Commit 2f9ba6aa8b6d805728b5df42b7b049b3c23d28a2 by ndesaulniers
LTO: Export functions referenced by non-canonical CFI jump tables

LowerTypeTests pass adds functions with a non-canonical jump table
to cfiFunctionDecls instead of cfiFunctionDefs. As the jump table
is in the regular LTO object, these functions will also need to be
exported. This change fixes the non-canonical jump table case and
adds a test similar to the existing one for canonical jump tables.

Reviewed By: pcc

Differential Revision: https://reviews.llvm.org/D103120
The file was modifiedllvm/lib/LTO/LTO.cpp
The file was addedllvm/test/LTO/Resolution/X86/export-jumptable-noncanonical.ll
Commit 898e38a3c1593024cdb8904cdd999a0fe1193427 by albionapc
[NFC] In the future, all intrinsics defined for compatibility with the XL
compiler will be placed in this collection.

This patch has no functional changes.

Differential revision: https://reviews.llvm.org/D103921
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
Commit 05cadc6f71555319882ccabf631d2e6410e3fea4 by rob.suderman
[mlir][tosa] Temporarily support 2D and 3D tensor types in matmul

Temporarily support 2D and 3D while the TOSA Matmul op is updated to support batched operations.

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D103854
The file was modifiedmlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
The file was modifiedmlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
Commit f4c8fd12d58ed93c447081fd8f499fb503da12ff by sivachandra
[libc][NFC] Use add_library instead of add_llvm_library for a few libraries.

These libraries do not depend on LLVM libraries anymore so they do not
have to be added using add_llvm_library.
The file was modifiedlibc/utils/testutils/CMakeLists.txt
The file was modifiedlibc/utils/FPUtil/CMakeLists.txt
The file was modifiedlibc/utils/UnitTest/CMakeLists.txt
Commit 6344a583ca8d1650def86d8effd1ad8a3a9598b1 by sivachandra
[libc] Add a macro to include/exclude subprocess tests.

This is useful when bringing up LLVM libc on a new OS on which we do not
yet have the subprocess related helper functions.
The file was addedlibc/utils/UnitTest/PlatformDefs.h
The file was modifiedlibc/utils/UnitTest/LibcTest.h
The file was modifiedlibc/utils/UnitTest/LibcTest.cpp
Commit 3d515cb185d86d8f89fe60a4e5ef2a6278baa368 by sivachandra
[libc][NFC][Obvious] Compare against size_t values in ArrayRef tests.

Different platforms treat size_t differently so we should compare sizes
of ArrayRef objects with size_t values (instead of the current unsigned
long values.)
The file was modifiedlibc/test/utils/CPP/arrayref_test.cpp
Commit f9649d123db64e38bce7bcb4cc5791239820f3e2 by Lang Hames
[JITLink][MachO] Split C-string literal sections on null-terminators.

MachO C-string literal sections should be split on null-terminator boundaries,
rather than the usual symbol boundaries. This patch updates
MachOLinkGraphBuilder to do that.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
Commit df965513a9aa0cbf0d20e8458fa07577f58e112d by huberjn
[OpenMP] Add an information flag for device data transfers

This patch adds an information flag that indicated when data is being copied to
and from the device. This will be helpful for finding redundant or unnecessary
data transfers in applications.

Reviewed By: jdoerfert, grokos

Differential Revision: https://reviews.llvm.org/D103927
The file was modifiedopenmp/libomptarget/src/device.cpp
The file was modifiedopenmp/docs/design/Runtimes.rst
The file was modifiedopenmp/libomptarget/test/offloading/info.c
The file was modifiedopenmp/libomptarget/include/Debug.h
Commit 2c8115482312fc0c7ce836f0f0886d0e153183eb by joker.eph
Add llvm_unreacheable to silence warning "not all control paths return a value" (NFC)
The file was modifiedmlir/lib/IR/SymbolTable.cpp
Commit a0ac51467697d45a353ed9710ca5c75b6bf9b763 by joker.eph
Revert "Add a static assertions for custom Op<> to not defined data members (NFC)"

This reverts commit c0edcec630eb26e12d66dae2f0e1fbf5258cb6ac.

The windows bot was broken by this change.
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
Commit cb09f2b10cbebb76842998b9ac6173f9723e419e by dblaikie
Rename compiler-rt/lib/orc/endian.h to endianness.h to avoid conflict with system headers
The file was addedcompiler-rt/lib/orc/endianness.h
The file was removedcompiler-rt/lib/orc/endian.h
The file was modifiedcompiler-rt/lib/orc/unittests/endian_test.cpp
The file was modifiedcompiler-rt/lib/orc/CMakeLists.txt
The file was modifiedcompiler-rt/lib/orc/wrapper_function_utils.h
Commit 4d9cc7c244e7fe2ce60202f1a7174109efb92504 by dblaikie
Add a couple of missing includes
The file was modifiedcompiler-rt/lib/orc/c_api.h
The file was modifiedcompiler-rt/lib/orc/stl_extras.h
Commit 8051a48e65cc78ccedc9bbd590dbc34a21a07184 by dblaikie
ORTRT: Add tests for string_view equality and inequality operators
The file was modifiedcompiler-rt/lib/orc/unittests/adt_test.cpp
Commit 294efbbd3e3d55671ef8b220c231a2807c38eefe by brendon.cahoon
Reland "[AMDGPU] Add gfx1013 target"

This reverts commit 211e584fa2a4c032e4d573e7cdbffd622aad0a8f.

Fixed a use-after-free error that caused the sanitizers to fail.
The file was modifiedllvm/test/MC/AMDGPU/gfx10_unsupported.s
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedclang/include/clang/Basic/Cuda.h
The file was modifiedclang/lib/Basic/Targets/NVPTX.cpp
The file was modifiedllvm/include/llvm/Support/TargetParser.h
The file was modifiedllvm/include/llvm/BinaryFormat/ELF.h
The file was modifiedllvm/lib/Target/AMDGPU/GCNProcessors.td
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-features.cl
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedllvm/test/tools/llvm-readobj/ELF/amdgpu-elf-headers.test
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/get_elf_mach_gfx_name.cpp
The file was modifiedclang/test/Driver/amdgpu-mcpu.cl
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/test/MC/AMDGPU/dl-insts-err.s
The file was modifiedllvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
The file was modifiedclang/lib/Basic/Targets/AMDGPU.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
The file was modifiedclang/test/Driver/amdgpu-macros.cl
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/lib/Support/TargetParser.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c
The file was modifiedllvm/lib/Target/AMDGPU/GCNSubtarget.h
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
The file was modifiedllvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
The file was modifiedllvm/lib/Object/ELFObjectFile.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedclang/lib/Basic/Cuda.cpp
Commit c87c294397ea4c3dae31f5a7fd6e38602338fd57 by lkail
[PowerPC][Dwarf] Assign MMA register's dwarf register number to negative value

According to ELF V2 ABI, `0` should be the dwarf number of `r0`. Currently MMA's register also uses `0` as its dwarf number, this confuses `RegisterInfoEmitter` and generates wrong dwarf -> llvm mapping.
```
extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1Dwarf2L[] = {
  { 0U, PPC::VSRp31 },
```
This leads to wrong cfi output in https://reviews.llvm.org/D100290.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D103761
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.td
Commit db4ac5a63e11b90ab585abf9531edb4ed6f69be0 by esme.yi
[NFC][XCOFF] Use yaml2obj in llvm-objdump/XCOFF/section-headers.test instead of binary files.

Summary: This a minor patch to refactor the test file,
llvm-objdump/XCOFF/section-headers.test, to use yaml2obj
for this testing rather than a canned binary.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D103146
The file was removedllvm/test/tools/llvm-objdump/XCOFF/Inputs/xcoff-long-sec-names.o
The file was modifiedllvm/test/tools/llvm-objdump/XCOFF/section-headers.test
The file was removedllvm/test/tools/llvm-objdump/XCOFF/Inputs/xcoff-section-headers-truncate.o
Commit 242ddd50897cef56de3e4f993bbd0c70a22f528f by jim
[RISCV][NFC] Add a single space after comma for VType

In most of cases, it has a single space after comma in assembly operands.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103790
The file was modifiedllvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/constant-folding.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/unsupported-calling-conv.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/load-add-store-16.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vle1-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast-large-vector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmornot-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulh-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/masked-store-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/select-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vor-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/localvar.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmandnot-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsbc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vid-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/load-add-store-8.ll
The file was modifiedllvm/test/CodeGen/RISCV/spill-fpr-scalar.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/calling-conv.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvl-ext.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-load-store.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extload-truncstore.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/load-add-store-32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-emergency-slot.mir
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll
Commit e11b5b87bebf2aad41ad769015a21567198291b9 by saugustine
Add Twine support for std::string_view.

With Twine now ubiquitous after rG92a79dbe91413f685ab19295fc7a6297dbd6c824,
it needs support for string_view when building clang with newer C++ standards.

This is similar to how StringRef is handled.

Differential Revision: https://reviews.llvm.org/D103935
The file was modifiedllvm/include/llvm/Support/raw_ostream.h
The file was modifiedllvm/lib/Support/Twine.cpp
The file was modifiedllvm/include/llvm/ADT/Twine.h
The file was modifiedllvm/unittests/ADT/TwineTest.cpp
Commit e48880078a49faeacb28fd5478948fd674d7350b by cebowleratibm
Fix LIT test failure encountered on AIX

```
fatal error: error in backend: getLangStandardForKind() on unspecified kind
```

Clang :: Modules/preprocess-module.cpp
Clang :: Modules/no-module-map.cpp
Clang :: Modules/preprocess-build-diamond.m
Clang :: Modules/preprocess-decluse.cpp
Clang :: Modules/string_names.cpp

Fix to prior commit f38eff777e46f42884d82815d0b39766520ac2bf, D103707
The file was modifiedclang/lib/Basic/Targets/OSTargets.h
Commit 955bc5950b454613e6367b9c9ae2b6e2e78fdd40 by esme.yi
Remove white space in llvm-objdump/XCOFF/section-headers.test
The file was modifiedllvm/test/tools/llvm-objdump/XCOFF/section-headers.test
Commit 674dd9d08ec085a82f2a4b3236a890644b4d0bc2 by csigg
[mlir] Fix body-less async.execute printing

Reviewed By: ezhulenev

Differential Revision: https://reviews.llvm.org/D103686
The file was modifiedmlir/lib/Dialect/Async/IR/Async.cpp
Commit bf58600badb1138a501ad81b07298207a7a64b2a by lkail
[PowerPC] Make sure the first probe is full size or is the last probe when stack is realigned

When `-fstack-clash-protection` is enabled and stack has to be realigned, some parts of redzone is written prior the probe, so probe might overwrite content already written in redzone. To avoid it, we have to make sure the first probe is at full probe size or is the last probe so that we can skip redzone.

It also fixes violation of ABI under PPC where `r1` isn't updated atomically.

This fixes https://bugs.llvm.org/show_bug.cgi?id=49903.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D100290
The file was modifiedllvm/test/CodeGen/PowerPC/pr46759.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCFrameLowering.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/stack-clash-prologue-nounwind.ll
The file was modifiedllvm/test/CodeGen/PowerPC/stack-clash-prologue.ll
Commit b413e44200e715c254fa9a41f6a86f8761c9b362 by phosek
[CMake] Don't use libc++ by default on Windows yet

libc++ has issues when used with -fno-exceptions and vcruntime,
don't use it on Windows by default until we address those issues.

Differential Revision: https://reviews.llvm.org/D103941
The file was modifiedclang/cmake/caches/Fuchsia.cmake
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
Commit 9c27fa3821dc5c04f5710e64411815893de160ce by gysit
[mlir][linalg] Prepare fusion on tensors for scalar operands.

Adapt fusion on tensors to support structured ops taking scalar operands.

Differential Revision: https://reviews.llvm.org/D103889
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
Commit 9751af22c49926840e043fa4c386ba2bfafa2053 by jim
[Docs] Fix incorrect return type for example code
The file was modifiedllvm/docs/Vectorizers.rst
Commit 20f571dbff530f671de6922fd92af3e301a126c2 by gchatelet
[NFC] Reformat MachineValueType

This is a follow up patch based on https://reviews.llvm.org/D103251#2804016.

Differential Revision: https://reviews.llvm.org/D103893
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
Commit 699231ab3c7dd8f028d868b103481fa901f3c721 by esme.yi
    Fix the 4203-Buildbot failure in LLVM Buildbot on llvm-clang-win-x-aarch64

    Failure in llvm/test/tools/llvm-objdump/XCOFF/section-headers.test:

    SyntaxError: (unicode error) 'unicodeescape' codec can't decode bytes
                 in position 24-25: truncated \xXX escape
The file was modifiedllvm/test/tools/llvm-objdump/XCOFF/section-headers.test
Commit 414482751452e54710f16bae58458c66298aaf69 by sguelton
Prevent generation of dependency on _cxa_guard for static initialization

This fixes an issue introduced by https://reviews.llvm.org/D70662

Function-scope static initialization are guarded in C++, so we should probably
not use it because it introduces a dependency on __cxa_guard* symbols.
In the context of clang, libasan is linked statically, and it currently needs to
the odd situation where compiling C code with clang and asan requires -lstdc++

Differential Revision: https://reviews.llvm.org/D102475
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp
Commit 41135a4367a75cf02d9873be7bd904456ce77329 by fabian
[MLIR] Make DictionaryAttr::getAs take name as && reference

As a follow-up to the discussion in https://reviews.llvm.org/D103822,
make the templated `DictionaryAttr::getAs` take the name by `&&`
reference and properly forward the argument to the underlying `get`.
The file was modifiedmlir/include/mlir/IR/BuiltinAttributes.td
Commit 093750dd0be6b0729f8e817766c3d5849545e10c by jan.kratochvil
[llvm] Sync DebugInfo.h with DebugInfoFlags.def

Command to see the differences:
  diff -u <(sed -n 's#^HANDLE_DI_FLAG *([^,]*, *\([^()]*\)) *\(//.*\)\?$#\1#p' <llvm/include/llvm/IR/DebugInfoFlags.def | grep -vw Largest) <(sed -n 's#^ *LLVMDIFlag\([^ ]*\) *= (\?[0-9].*$#\1#p' <llvm/include/llvm-c/DebugInfo.h)

OCaml binding is more seriously out of sync but I have not tried to sync it.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D103910
The file was modifiedllvm/include/llvm-c/DebugInfo.h
Commit e8f1f891031385a34f0548803f3bc76ce50544c1 by fraser
[RISCV] Support CONCAT_VECTORS on scalable masks

This patch is a simple fix which registers CONCAT_VECTORS as
custom-lowered for scalable mask vectors. This follows the pattern of
all other scalable-vector types, as the default expansion of
CONCAT_VECTORS cannot handle scalable types, and even if it did it'd go
through the stack and generate worse code.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103896
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll
Commit 5c5ae6a661ce01fb4e5f3a645de188028e8c981e by flo
[ScalarEvolution] Add test for preserving add overflow flags.
The file was modifiedllvm/test/Analysis/ScalarEvolution/no-wrap-symbolic-becount.ll
Commit 35b0ddab0ee8064d23c6f390e30da14e756b5ba6 by diana.picus
[flang] Define the API for CPU_TIME

CPU_TIME takes a single real scalar INTENT(OUT) argument. We can
therefore return a double and let lowering handle casting that to the
precision used for the default real kind.

Differential Revision: https://reviews.llvm.org/D103805
The file was addedflang/runtime/time-intrinsic.h
Commit 09ac4eca665011f056779af6eafdff51f30dc870 by jan.kratochvil
Revert "[llvm] Sync DebugInfo.h with DebugInfoFlags.def"

This reverts commit 093750dd0be6b0729f8e817766c3d5849545e10c.

It broke buildbots, goint to investigate it more.
The file was modifiedllvm/include/llvm-c/DebugInfo.h
Commit db93e4e70aa453e5ba04ba0d9e01f581882b6c81 by david.spickett
Revert "[lldb] Set return status to failed when adding a command error"

This reverts commit e05b03cf4f45ac5ee63c59a3464e7d484884645c.

While I investigate a register test failure:
http://green.lab.llvm.org/green/blue/organizations/jenkins/lldb-cmake/detail/lldb-cmake/32693/pipeline/
The file was modifiedlldb/source/Interpreter/CommandReturnObject.cpp
The file was modifiedlldb/test/API/commands/register/register/register_command/TestRegisters.py
The file was removedlldb/test/Shell/Commands/command-backtrace-parser-1.test
The file was removedlldb/test/Shell/Commands/command-backtrace-parser-2.test
The file was addedlldb/test/Shell/Commands/command-backtrace.test
Commit 8eee02020b92d986b6d089dbe5f1e312ecb4575c by jingu.kang
[LoopBoundSplit] Ignore phi node which is not scevable

There was a bug in LoopBoundSplit. The pass should ignore phi node which is not
scevable.

Differential Revision: https://reviews.llvm.org/D103913
The file was modifiedllvm/test/Transforms/LoopBoundSplit/loop-bound-split.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
Commit 80d556441adca45c0ad82c9463ed77bc25399f2b by fraser
[ValueTypes] Add missing enum names for MVTs

These types are (presumably) never used in the generated TableGen files.
The `default` switch case silences any compiler warnings for these
missing types so it's easy to miss.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103883
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
Commit 11ad9e31eb3b11d8996c31084c617245b5af1b87 by david.spickett
[compiler-rt] Mark symbolize_stack_fp test unsupported on Arm Thumb

The new test `symbolize_stack_fp.cpp` added in
https://reviews.llvm.org/D102046 assumes that
we can fall back to the fast unwinder.

This is not the case for Thumb and the test is currently
failing on our v7 thumb bot:
https://lab.llvm.org/buildbot/#/builders/26/builds/2096

Skip the test if we're building for a Thumb target.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D103512
The file was modifiedcompiler-rt/test/sanitizer_common/TestCases/Linux/symbolize_stack_fp.cpp
The file was modifiedcompiler-rt/test/sanitizer_common/lit.common.cfg.py
The file was modifiedcompiler-rt/test/sanitizer_common/lit.site.cfg.py.in
Commit 292f4197249bec40143c88fe3fea50d038676889 by fraser
[RISCV] Fix failing RVV MC tests

I believe these failures were introduced by D103790's changes to the
VType formatting found in vsetvli/vsetivli instructions.
The file was modifiedllvm/test/MC/RISCV/rvv/vsetvl.s
The file was modifiedllvm/test/MC/RISCV/rvv/snippet.s
Commit f880bd261f4e13d4d58a75886a2942f05783c7de by javier.setoain
[mlir][ArmSVE] Add basic mask generation operations

These `arm_sve.cmp` functions are needed to generate scalable vector
masks as long as scalable vectors are not part of the standard types.
Once in standard, these can be removed and `std.cmp` can be used
instead.

Differential Revision: https://reviews.llvm.org/D103473
The file was modifiedmlir/lib/Dialect/ArmSVE/IR/CMakeLists.txt
The file was modifiedmlir/test/Dialect/ArmSVE/roundtrip.mlir
The file was modifiedmlir/include/mlir/Dialect/ArmSVE/ArmSVEDialect.h
The file was modifiedmlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
The file was modifiedmlir/include/mlir/Dialect/ArmSVE/ArmSVE.td
The file was modifiedmlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/test/Target/LLVMIR/arm-sve.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/StandardOpsBase.td
The file was modifiedmlir/lib/Dialect/ArmSVE/IR/ArmSVEDialect.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
Commit e978f6bc97064603a5665a6797d6e613a231479a by flo
[LTO] Support new PM in ThinLTOCodeGenerator.

This patch adds initial support for using the new pass manager when
doing ThinLTO via libLTO.

Reviewed By: steven_wu

Differential Revision: https://reviews.llvm.org/D102627
The file was modifiedllvm/tools/llvm-lto/llvm-lto.cpp
The file was modifiedllvm/lib/LTO/ThinLTOCodeGenerator.cpp
The file was modifiedllvm/test/ThinLTO/X86/diagnostic-handler-remarks.ll
The file was modifiedllvm/include/llvm/LTO/legacy/ThinLTOCodeGenerator.h
The file was modifiedllvm/test/ThinLTO/X86/newpm-basic.ll
The file was modifiedllvm/test/ThinLTO/X86/diagnostic-handler-remarks-with-hotness.ll
Commit 82f8aef3deb196ad323a3ef57c03276c6e93a246 by Lang Hames
[JITLink][MachO] Handle muliple symbols at same offset when splitting C-strings.

The C-string section splitting support added in f9649d123db triggered an assert
("Duplicate canonical symbol at address") when multiple symbols were defined at
the the same offset within a C-string block (this triggered on arm64, where we
always add a block start symbol). The bug was caused by a failure to update the
record of the last canonical symbol address. The fix was to maintain this record
correctly, and move the auto-generation of the block-start symbol above the
handling for symbols defined in the object itself so that all symbols
(auto-generated and defined) are processed in address order.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
Commit 391f9ef1aa8b28ef8bad4486576477c0700e43e9 by jim
[docs] Fix load instructions in chapter 7 of the tutorial

Loads in the first half of the chapter are missing the type argument.

Patched By: klao (Mihaly Barasz)

Reviewed By: Jim

Differential Revision: https://reviews.llvm.org/D90326
The file was modifiedllvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl07.rst
Commit 905f4eb537c118783969fded19e96fe6504c2956 by thatlemon
[SROA] Avoid splitting loads/stores with irregular type

Upon encountering loads/stores on types whose size is not a multiple of 8 bits the SROA pass would either trip an assertion or use logic that was not meant to work with such irregularly-sized types.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D99435
The file was modifiedllvm/lib/Transforms/Scalar/SROA.cpp
The file was addedllvm/test/Transforms/SROA/irregular-type.ll
Commit d806d11b14e1db7d5c5986d563e74ca972f0e5e6 by llvm-dev
Interp.h - AddSubMulHelper - avoid APSInt::toString std::string wrapper. NFCI

Pulled out of D103888 - use the underlying SmallString version directly
The file was modifiedclang/lib/AST/Interp/Interp.h
Commit f3fd36e590f4ca36e466801bee40497714df895c by llvm-dev
JSONNodeDumper.cpp - VisitIntegerLiteral - avoid APSInt::toString std::string wrapper. NFCI

Pulled out of D103888 - use the underlying SmallString version directly
The file was modifiedclang/lib/AST/JSONNodeDumper.cpp
Commit aef5d8fdc7d0d348125d5ecf4a13be5888eb1654 by mizvekov
[clang] NFC: Rename rvalue to prvalue

This renames the expression value categories from rvalue to prvalue,
keeping nomenclature consistent with C++11 onwards.

C++ has the most complicated taxonomy here, and every other language
only uses a subset of it, so it's less confusing to use the C++ names
consistently, and mentally remap to the C names when working on that
context (prvalue -> rvalue, no xvalues, etc).

Renames:
* VK_RValue -> VK_PRValue
* Expr::isRValue -> Expr::isPRValue
* SK_QualificationConversionRValue -> SK_QualificationConversionPRValue
* JSON AST Dumper Expression nodes value category: "rvalue" -> "prvalue"

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D103720
The file was modifiedclang/lib/Frontend/Rewrite/RewriteModernObjC.cpp
The file was modifiedclang/test/AST/ast-dump-record-definition-data-json.cpp
The file was modifiedclang/lib/Sema/SemaCoroutine.cpp
The file was modifiedclang/lib/Sema/SemaInit.cpp
The file was modifiedclang/lib/Sema/Sema.cpp
The file was modifiedclang-tools-extra/clang-tidy/misc/UniqueptrResetReleaseCheck.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/CallEvent.cpp
The file was modifiedclang/test/AST/ast-dump-expr-json.m
The file was modifiedclang/lib/AST/JSONNodeDumper.cpp
The file was modifiedclang/lib/Sema/SemaFixItUtils.cpp
The file was modifiedclang/test/AST/multistep-explicit-cast-json.c
The file was modifiedclang/lib/CodeGen/CGObjC.cpp
The file was modifiedclang/lib/AST/ExprCXX.cpp
The file was modifiedclang/test/AST/ast-dump-types-errors-json.cpp
The file was modifiedclang/lib/Sema/SemaExprObjC.cpp
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaLookup.cpp
The file was modifiedclang/include/clang/AST/ExprCXX.h
The file was modifiedclang/lib/AST/ExprConcepts.cpp
The file was modifiedclang/include/clang/Sema/Initialization.h
The file was modifiedclang/lib/Analysis/ThreadSafety.cpp
The file was modifiedclang/lib/Sema/SemaLambda.cpp
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
The file was modifiedclang/test/AST/ast-dump-records-json.cpp
The file was modifiedclang/test/AST/multistep-explicit-cast-json.cpp
The file was modifiedclang/test/AST/ast-dump-template-decls-json.cpp
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was modifiedclang/test/AST/ast-dump-stmt-json.c
The file was modifiedclang/test/AST/ast-dump-objc-arc-json.m
The file was modifiedclang/test/AST/ast-dump-temporaries-json.cpp
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp
The file was modifiedclang/include/clang/Basic/Specifiers.h
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/test/AST/ast-dump-decl-json.c
The file was modifiedclang/test/AST/ast-dump-funcs-json.cpp
The file was modifiedclang/include/clang/AST/Expr.h
The file was modifiedclang/lib/CodeGen/CGBlocks.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/lib/AST/DeclCXX.cpp
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/test/AST/ast-dump-decl-json.m
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/lib/Frontend/Rewrite/RewriteObjC.cpp
The file was modifiedclang/include/clang/AST/ExprObjC.h
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/lib/AST/ExprObjC.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
The file was modifiedclang/lib/Sema/SemaCast.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was modifiedclang/test/AST/ast-dump-expr-json.c
The file was modifiedclang/lib/Sema/SemaPseudoObject.cpp
The file was modifiedclang/test/AST/ast-dump-stmt-json.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp
The file was modifiedclang/test/AST/ast-dump-stmt-json.m
The file was modifiedclang/lib/Sema/SemaExprMember.cpp
The file was modifiedclang/lib/Sema/SemaStmtAsm.cpp
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/lib/Sema/SemaType.cpp
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/lib/Sema/SemaObjCProperty.cpp
The file was modifiedclang/lib/AST/TextNodeDumper.cpp
The file was modifiedclang/lib/AST/ExprClassification.cpp
The file was modifiedclang/lib/Analysis/BodyFarm.cpp
The file was modifiedclang/test/AST/ast-dump-expr-json.cpp
The file was modifiedclang/test/AST/ast-dump-if-json.cpp
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
Commit 205cde63c70e017a71d1ec06377421f7733f2ad5 by thakis
Revert "[SROA] Avoid splitting loads/stores with irregular type"

This reverts commit 905f4eb537c118783969fded19e96fe6504c2956.
Breaks check-llvm on most (all?) bots, see https://reviews.llvm.org/D99435
The file was removedllvm/test/Transforms/SROA/irregular-type.ll
The file was modifiedllvm/lib/Transforms/Scalar/SROA.cpp
Commit c25572bf2993438f24b57d859d072e8b2aa975d2 by mizvekov
[clang] NFC: rename SK_CastDerivedToBaseRValue to SK_CastDerivedToBasePRValue

This is a follow up to the "rvalue-to-prvalue" rename at D103720.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Depends on D103720

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D103933
The file was modifiedclang/lib/Sema/SemaInit.cpp
The file was modifiedclang/include/clang/Sema/Initialization.h
Commit c92f505346b80fd053ef191bbc66810c9d564b0c by aaron
Correct the behavior of va_arg checking in C++

Clang checks whether the type given to va_arg will automatically cause
undefined behavior, but this check was issuing false positives for
enumerations in C++. The issue turned out to be because
typesAreCompatible() in C++ checks whether the types are *the same*, so
this uses custom logic if the type compatibility check fails.

This issue was found by a user on code like:

typedef enum {
  CURLINFO_NONE,
  CURLINFO_EFFECTIVE_URL,
  CURLINFO_LASTONE = 60
} CURLINFO;

...

__builtin_va_arg(list, CURLINFO); // false positive warning

Given that C++ defers to C for the rules around va_arg, the behavior
should be the same in both C and C++ and not diagnose because int and
CURLINFO are "compatible enough" types for va_arg.
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/SemaCXX/varargs.cpp
Commit 502edebd9d6eb4665add9fd5edaa2dd1b1b24298 by fraser
[ValueTypes][RISCV] Cap RVV fixed-length vectors by size

This patch changes RVV's policy for its supported list of fixed-length
vector types by capping by vector size rather than element count. Now
all 1024-byte vectors (of supported element types) are supported, rather
than all 256-element vectors.

This is a more natural fit for the architecture, and allows us to, for
example, improve the support for vector bitcasts.

This change necessitated the adding of some new simple types to avoid
"regressing" on the number of currently-supported vectors. We round out
the 1024-byte types by adding `v512i8`, `v1024i8`, `v512i16` and
`v512f16`.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103884
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
The file was modifiedllvm/lib/CodeGen/ValueTypes.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast-large-vector.ll
Commit d96ea46629803641038ebe46d8cd512f8cf7e20f by meera.nakrani
[AArch64LoadStoreOptimizer] Generate more STPs by renaming registers earlier

Our initial motivating case was memcpy's with alignments > 16. The
loads/stores, to which small memcpy's expand, are kept together in
several places so that we get a sequence like this for a 64 bit copy:
LD w0
LD w1
ST w0
ST w1
The load/store optimiser can generate a LDP/STP w0, w1 from this because
the registers read/written are consecutive. In our case however, the
sequence is optimised during ISel, resulting in:
LD w0
ST w0
LD w0
ST w0
This instruction reordering allows reuse of registers. Since the registers
are no longer consecutive (i.e. they are the same), it inhibits LDP/STP
creation. The approach here is to perform renaming:
LD w0
ST w0
LD w1
ST w1
to enable the folding of the stores into a STP. We do not yet generate
the LDP due to a limitation in the renaming implementation, but plan to
look at that in a follow-up so that we fully support this case. While
this was initially motivated by certain memcpy's, this is a general
approach and thus is beneficial for other cases too, as can be seen
in some test changes.

Differential Revision: https://reviews.llvm.org/D103597
The file was modifiedllvm/test/CodeGen/AArch64/stp-opt-with-renaming.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/byval-call.ll
The file was modifiedllvm/test/CodeGen/AArch64/consthoist-gep.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
The file was modifiedllvm/test/CodeGen/AArch64/ldst-opt.ll
Commit 82e4e505315b8df27e82c0e1cb9d5eb1aa7d45da by protze
[OpenMP][Tools] Fix Archer for MACOS

Archer uses weak symbol overloads of TSan functions to enable loading the tool
even if the application is not built with TSan. For MACOS the tool collects
the function pointer at runtime.
When adding the function entry/exit markers, we missed to add the functions
in the MACOS codepath.
This patch also replaces the repeated function lookup by a single initial
function lookup and fixes the disabling logic in RunningOnValgrind.

Differential Revision: https://reviews.llvm.org/D103607
The file was modifiedopenmp/tools/archer/ompt-tsan.cpp
Commit 08d8f1a958bd8be681e3e1f346be80818a83a556 by protze
[OpenMP][Tools] Cleanup memory pool used in Archer

The main motivation for reusing objects is that it helps to avoid creating and
leaking synchronization clocks in TSan. The reused object will reuse the
synchronization clock in TSan.

Before, new and delete operators were overloaded to get and return memory for
the object from/to the object pool.
This patch replaces the operator overloading with explicit static New/Delete
functions.

Objects for parallel regions and implicit tasks will always be recruited and
returned to the thread-local object pool. Only for explicit task, there is a
chance that an other thread completes the task and will free the object. This
patch optimizes the thread-local New/Delete calls by avoiding locks and only
lock if the pool is empty. Remote threads return the object into a separate
queue.

The chunk size for allocations is now decided based on page size. The objects
will also be aligned to cache lines avoiding false sharing.

This is the first patch in a series to provide better tasking support.

Differential Revision: https://reviews.llvm.org/D103606
The file was modifiedopenmp/tools/archer/README.md
The file was modifiedopenmp/tools/archer/ompt-tsan.cpp
The file was modifiedopenmp/tools/archer/tests/lit.cfg
Commit 639b3979310d8cec82b9b0a3ad3e64566244717f by protze
[OpenMP][Tools] Fix Archer handling of task dependencies

The current handling of dependencies in Archer has two flaws:

- annotation of dependency synchronization is not limited to sibling tasks
- annotation of in/out dependencies is based on the assumption, that dependency
  variables will rarely be byte-sized variables.

This patch introduces a map in the generating task to manage the dependency
variables for the child tasks. The map is only accesses from the generating
task, so no locking is necessary. This also limits the dependency-based
synchronization to sibling tasks.
This patch also introduces proper handling for new dependency types such as
mutexinoutset and inoutset.

Differential Revision: https://reviews.llvm.org/D103608
The file was modifiedopenmp/tools/archer/ompt-tsan.cpp
Commit c0db8d50ca3ceb1301b2ade2fb86c591a5b64e5c by benny.kra
[mlir] Expose a function to populate tensor constant bufferization patterns

This makes it easier to use it from other bufferization passes.

Differential Revision: https://reviews.llvm.org/D103838
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/TensorConstantBufferize.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Transforms/Passes.h
Commit 0120e6c295e42d3b9ed2cd125b1c9056a59fbcf6 by mkazantsev
[Test] Add more elaborate case of symbolic execution of 1-iteration loop
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
Commit a0086add2e52a82dd83114f458c10e2e4bdd15ac by a.bataev
[SLP]Improve gathering of scalar elements.

1. Better sorting of scalars to be gathered. Trying to insert
   constants/arguments/instructions-out-of-loop at first and only then
   the instructions which are inside the loop. It improves hoisting of
   invariant insertelements instructions.
2. Better detection of shuffle candidates in gathering function.
3. The cost of insertelement for constants is 0.

Part of D57059.

Differential Revision: https://reviews.llvm.org/D103458
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/pr35497.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/matched-shuffled-entries.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/value-bug-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/insertelement.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/tiny-tree.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/value-bug.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/geps-non-pow-2.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_mandeltext.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_exceed_scheduling.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/partail.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_lencod.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_smallpt.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/phi3.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/SystemZ/pr34619.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/slp-max-phi-size.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/remark_extract_broadcast.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/hoist.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/phi_landingpad.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/commutativity.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/insertelement-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/slp-umax-rdx-matcher-crash.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reorder_repeated_ops.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/jumbled-load-used-in-phi.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/jumbled-load-multiuse.ll
Commit 64dbd649cf661cbca5e8670d220aec40d6892572 by hans
[clang-cl] Parse /await:strict, new in MSVC 16.10
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/Driver/cl-options.c
Commit c1cd743519af3978b944df88f57c6e523caa10dc by nathan
[clang] p1099 using-enum feature macro & web page

This completes the series implementing p1099, by adding the feature
macro and updating the web page.

Differential Revision: https://reviews.llvm.org/D102242
The file was modifiedclang/test/Lexer/cxx-features.cpp
The file was modifiedclang/www/cxx_status.html
The file was modifiedclang/lib/Frontend/InitPreprocessor.cpp
Commit 8ffeb5c47d94d8f8eafc4e986fe47578b716c1dc by llvm-dev
[X86][SSE] Regenerate slow-pmulld.ll test checks
The file was modifiedllvm/test/CodeGen/X86/slow-pmulld.ll
Commit 630820bafc6866ce1efa4f1e2c4b11f6250eae9c by llvm-dev
[X86][SLM] Adjust XMM non-PMULLD throughput costs to half rate.

Match what's reported in the costs table, Agner's tables and the Intel AOM
The file was modifiedllvm/lib/Target/X86/X86ScheduleSLM.td
The file was modifiedllvm/test/CodeGen/X86/slow-pmulld.ll
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-sse2.s
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-ssse3.s
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-sse41.s
Commit 8866793b4e0abd31e4f57abf9ba832d691a3a3e1 by sven.vanhaastregt
[OpenCL] Add OpenCL builtin test generator

Add a new clang-tblgen flag `-gen-clang-opencl-builtin-tests` that
generates a .cl file containing calls to every builtin function
defined in the .td input.

This patch does not add any use of the new flag yet, so the only way
to obtain a generated test file is through a manual invocation of
clang-tblgen.  A test making use of this emitter will be added in a
followup commit.

Differential Revision: https://reviews.llvm.org/D97869
The file was modifiedclang/utils/TableGen/TableGenBackends.h
The file was modifiedclang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
The file was modifiedclang/utils/TableGen/TableGen.cpp
Commit 2ef81cb297954cdbc2eca2f204a5ecba4ec1ccd8 by spatel
[x86] add tests for store merging miscompile (PR50623); NFC
The file was modifiedllvm/test/CodeGen/X86/stores-merging.ll
Commit ef8df920fbbc945dce6aeec717629ddde90a8ebe by Paul C. Anagnostopoulos
[TableGen] Fix ProfileFoldOpInit so that parameters are named consistently [NFC]

See https://bugs.llvm.org/show_bug.cgi?id=50595

Differential Revision: https://reviews.llvm.org/D103823
The file was modifiedllvm/lib/TableGen/Record.cpp
Commit 6c78dbd4ca1f2c25cdc276d646c7920afe856ca3 by yvan.roux
[ARM] Fix Machine Outliner LDRD/STRD handling in Thumb mode.

This is a fix for PR50481

Immediate values for AddrModeT2_i8s4 are already scaled in MCinst operand.
This patch changes the number of bits and scale factor to reflect that
state when checking stack offset status. AddrModeT2_i7s[2|4] also have
this particularity but since MVE instructions are not outlined, just move
these cases to the unhandled ones.

Differential Revision: https://reviews.llvm.org/D103167
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir
Commit 206a66de5902b2b6dc0c62c4a25526d7e7f24186 by llvm-dev
Sanitizers.h - remove MathExtras.h include dependency

The MathExtras.h header is included purely for the countPopulation() method - by moving this into Sanitizers.cpp we can remove the use of this costly header.

We only ever use isPowerOf2() / countPopulation() inside asserts so this shouldn't have any performance effects on production code.

Differential Revision: https://reviews.llvm.org/D103953
The file was modifiedclang/lib/Basic/Sanitizers.cpp
The file was modifiedclang/include/clang/Basic/Sanitizers.h
Commit dd763ac79196b3d3bc0370b9dbd35e0c083e52a4 by spatel
[SDAG] fix miscompile from merging stores of different sizes

As shown in:
https://llvm.org/PR50623
...and the similar tests here, we were not accounting for
store merging of different sizes that do not cover the
entire range of the wide value to be stored.

This is the easy fix: just make sure that all of the
original stores are the same size, so when we calculate
the wide width, it's a simple N * M check.

This still allows all of the motivating optimizations from:
D86420 / 54a5dd485c4d
D87112 / 7a06b166b1af

We could enhance this code to track individual bytes and
allow merging multiple sizes.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/stores-merging.ll