Changes

Summary

DWARFDie.cpp: Reduce indentation with early continue (details)
DWARFDie:DWARFTypePrinter: Add common utility function for checking where parentheses are required (details)
[RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD (details)
llvm/cmake: fix a typo (details)
[X86][Atom] Fix (U)COMISS/SD uops, latency and throughput (details)
[mlir][emitc] Fix indent in CondBranchOp and block label (details)
[ARM] Add VGETLANEu patterns for v4f16 and v8f16 (details)
[InstCombine] add/adjust tests for min/max intrinsics; NFC (details)
[X86] combineX86ShufflesRecursively(): call SimplifyMultipleUseDemandedVectorElts() on after finishing recursing (details)
[NFC] combineX86ShufflesRecursively(): actually address nits for previous patch (details)
[X86] lowerShuffleAsDecomposedShuffleMerge(): if both inputs are broadcastable/identities, canonicalize broadcasts as such (details)
[X86][TLI] SimplifyDemandedVectorEltsForTargetNode(): don't break apart broadcasts from which not just the 0'th elt is demanded (details)
[X86][Atom] Specific uops for all IMUL/IDIV instructions (details)
llvm-dwarfdump: Refactor type pretty printing tests (details)
[X86] Fold SHUFPS(shuffle(x),shuffle(y),mask) -> SHUFPS(x,y,mask') (details)
[X86][Atom] Fix FP uops + port usage (details)
DWARFDie: Improve type printing for function and array types - with qualifiers (cv/reference) and pointers to them (details)
DWARFDie.cpp: Minor follow-up clang-format (details)

Commit d2373c04a7cbbc38221bbfb6120e5285c765785c by dblaikie DWARFDie.cpp: Reduce indentation with early continue
	llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit ae0873483d9393d35bd5bdbfcb2bfb843c335cd5 by dblaikie DWARFDie:DWARFTypePrinter: Add common utility function for checking where parentheses are required
	llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
Commit dee5a8ca325f3c752534442233cb601910e918c4 by ben.shi [RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SHADD Optimize (add (shl x, c0), (shl y, c1)) -> (SLLI (SHADD x, y), c1), if c0-c1 == 1/2/3. Reviewed By: craig.topper, luismarques Differential Revision: https://reviews.llvm.org/D108916
	llvm/test/CodeGen/RISCV/rv64zba.ll
	llvm/lib/Target/RISCV/RISCVISelLowering.cpp
	llvm/test/CodeGen/RISCV/rv32zba.ll
Commit b7ec8f3dcbcdf6d27902688c8eac0e6196061cb3 by sylvestre llvm/cmake: fix a typo
	llvm/CMakeLists.txt
Commit e381d8b24329cae6408205f74d0d6d9eaa6b29cf by llvm-dev [X86][Atom] Fix (U)COMISS/SD uops, latency and throughput Both ports are required, for reg and mem variants - we can also use the WriteFComX class directly and remove the unnecessary InstRW overrides. Matches what Intel AoM / Agner / InstLatX64 report as well.
	llvm/lib/Target/X86/X86ScheduleAtom.td
	llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
	llvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s
Commit 9de88fc0eac1bfc719dfd63a32b7eb069489407e by xndchn [mlir][emitc] Fix indent in CondBranchOp and block label 1. Add missing indent in CondBranchOp 2. Remove indent in block label Differential Revision: https://reviews.llvm.org/D109805
	mlir/lib/Target/Cpp/TranslateToCpp.cpp
Commit 1da52ef2943b67c0ec1ccd3b8e459d0e57e67a6d by david.green [ARM] Add VGETLANEu patterns for v4f16 and v8f16 These were apparently missing, having no pattern that could convert a VGETLANEu of a v4f16 to an i32. Added bf16 whilst here, following the same code.
	llvm/test/CodeGen/ARM/bf16-getlane-with-fp16.ll
	llvm/lib/Target/ARM/ARMInstrNEON.td
	llvm/test/CodeGen/ARM/fp16-insert-extract.ll
Commit 9555d1edb0d16f135ae57695fc2da55deaabf082 by spatel [InstCombine] add/adjust tests for min/max intrinsics; NFC If we transform these, we have to propagate no-wrap/undef carefully.
	llvm/test/Transforms/InstCombine/minmax-intrinsics.ll
Commit 1e72ca94e5796a744d0e1a8871c33b1b4edb0acb by lebedev.ri [X86] combineX86ShufflesRecursively(): call SimplifyMultipleUseDemandedVectorElts() on after finishing recursing This was suggested in https://reviews.llvm.org/D108382#inline-1039018, and it avoids regressions in that patch. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D109065
	llvm/test/CodeGen/X86/oddshuffles.ll
	llvm/test/CodeGen/X86/vselect.ll
	llvm/lib/Target/X86/X86ISelLowering.cpp
Commit 0852313e47836152b00fb8b8fd62a7e12bf92abd by lebedev.ri [NFC] combineX86ShufflesRecursively(): actually address nits for previous patch
	llvm/lib/Target/X86/X86ISelLowering.cpp
Commit 07f1d8f0caa1516e0d97616adfea4aa94f7883a4 by lebedev.ri [X86] lowerShuffleAsDecomposedShuffleMerge(): if both inputs are broadcastable/identities, canonicalize broadcasts as such Split off from D108253. Broadcast is simpler than any other shuffle we might produce to do what we want to do here, so prefer it. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D108382
	llvm/lib/Target/X86/X86ISelLowering.cpp
	llvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
	llvm/test/CodeGen/X86/horizontal-sum.ll
Commit 5f2fe48d06c742872804da8b3d86596ed2bb9acb by lebedev.ri [X86][TLI] SimplifyDemandedVectorEltsForTargetNode(): don't break apart broadcasts from which not just the 0'th elt is demanded Apparently this has no test coverage before D108382, but D108382 itself shows a few regressions that this fixes. It doesn't seem worthwhile breaking apart broadcasts, assuming we want the broadcasted value to be preset in several elements, not just the 0'th one. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D108411
	llvm/test/CodeGen/X86/sse41.ll
	llvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
	llvm/lib/Target/X86/X86ISelLowering.cpp
	llvm/test/CodeGen/X86/horizontal-sum.ll
Commit cf8fac7d07307bc6679d60c3ad3e7a7792a2caa6 by llvm-dev [X86][Atom] Specific uops for all IMUL/IDIV instructions Based off a mixture of llvm-exegesis captures (PR36895) and Intel AoM / Agner / InstLatX64 reports.
	llvm/lib/Target/X86/X86ScheduleAtom.td
	llvm/test/tools/llvm-mca/X86/Atom/resources-x86_64.s
Commit 2ca637c9769ff50e94ace3083075a97b50d147f0 by dblaikie llvm-dwarfdump: Refactor type pretty printing tests Move most type tests to a pre-generated assembly file to make it easier to add more weird cases without having to hand craft more DWARF. Move the novel array types that aren't reachable via clang-generated DWARF to a separate file for easy maintenance.
	llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types_handcrafted.s
	llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
Commit b7342e3137d8fa7c356a80c1ddecf1d410c27eef by llvm-dev [X86] Fold SHUFPS(shuffle(x),shuffle(y),mask) -> SHUFPS(x,y,mask') We can combine unary shuffles into either of SHUFPS's inputs and adjust the shuffle mask accordingly. Unlike general shuffle combining, we can be more aggressive and handle multiuse cases as we're not going to accidentally create additional shuffles.
	llvm/test/CodeGen/X86/horizontal-sum.ll
	llvm/lib/Target/X86/X86ISelLowering.cpp
	llvm/test/CodeGen/X86/vselect.ll
Commit f855ef260148df0f08c73a70b9425a5215232874 by llvm-dev [X86][Atom] Fix FP uops + port usage Both ports are required in most cases. Update the uops counts + port usage based off the most recent llvm-exegesis captures (PR36895) and what Intel AoM / Agner / InstLatX64 reports as well. Noticed while trying to improve fp costs for vectorization via the D103695 helper script.
	llvm/test/tools/llvm-mca/X86/Atom/resources-sse3.s
	llvm/test/tools/llvm-mca/X86/Atom/resources-x87.s
	llvm/test/tools/llvm-mca/X86/Atom/resources-ssse3.s
	llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
	llvm/lib/Target/X86/X86ScheduleAtom.td
	llvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s
Commit f09ca5c6461b604113b6e1adb825be2d92575aff by dblaikie DWARFDie: Improve type printing for function and array types - with qualifiers (cv/reference) and pointers to them
	llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
	llvm/test/tools/llvm-dwarfdump/X86/prettyprint_types.s
Commit a51fb58c557c2cd217eddc8a2332b245350118cf by dblaikie DWARFDie.cpp: Minor follow-up clang-format
	llvm/lib/DebugInfo/DWARF/DWARFDie.cpp