Started 8 hr 37 min ago
Build has been executing for 8 hr 37 min on green-dragon-06

In progress Build #7828 (May 10, 2021 1:54:22 PM)


Git (git http://labmaster3.local/git/llvm-project.git)

  1. [AsmParser][ARM] Make .thumb_func imply .thumb (detail)
  2. [llvm][NFC] Remove deprecated TargetFrameLowering and InstrTypes alignment functions (detail)
  3. [llvm][NFC] Remove remaining deprecated alignment functions from CodeGen (detail)
  4. [llvm-dwarfdump] Help option output should be consistent with the command guide (detail)
  5. [DebugInfo] Fix updateDbgUsersToReg to support DBG_VALUE_LIST (detail)
  6. [NFC][X86][MCA] AMD Zen 3: add tests with eliminatible GPR moves (detail)
  7. [X86] AMD Zen 3: 32/64 -bit GPR register moves are zero-cycle (detail)
  8. [NFC][X86][MCA] AMD Zen 3: add tests with non-eliminatible MMX moves (detail)
  9. AMDGPU: Correct const_index_stride for wave 32 for PAL ABI (detail)
  10. [NFC] (test commit) Changed example invocation of C++ for OpenCL (detail)
  11. [X86] Ensure we pass DebugLoc by const reference where possible. NFCI. (detail)
  12. [SLP] Regenerate tests to reduce diff in D98714. NFCI. (detail)
  13. Revert "AMDGPU: Correct const_index_stride for wave 32 for PAL ABI" (detail)
  14. [DAG] Add a generic expansion for SHIFT_PARTS opcodes using funnel shifts (detail)
  15. [DebugInfo] Fix crash when emitting an invalidated SDDbgValue (detail)
  16. [NFC] Correctly assert the indents for printEnumValHelpStr. (detail)
  17. [OpenCL] Fix optional image types. (detail)
  18. [ARM] Transforming memset to Tail predicated Loop (detail)
  19. Fix: [DebugInfo] Fix crash when emitting an invalidated SDDbgValue (detail)
  20. AMDGPU: Correct const_index_stride for wave 32 for PAL ABI (detail)
  21. [AMDGPU] Restrict immediate scratch offsets (detail)
  22. Retire TargetRegisterInfo::getSpillAlignment (detail)
  23. [DAG] Ensure all SD classes consistently return a const reference with getDebugLoc(). NFCI. (detail)
  24. [CodeGen] Ensure UserValue::getDebugLoc() and UserLabel::getDebugLoc() consistently return a const reference NFCI. (detail)
  25. Reapply "[DebugInfo] Drop DBG_VALUE_LISTs with an excessive number of debug operands" (detail)
  26. [libc++] [test] Test that list::swap/move/move-assign does not invalidate iterators. (detail)
  27. [libc++] [test] Simplify arithmetic in list.special/swap.pass.cpp. NFCI. (detail)
  28. [libc++] [test] Test that unordered_*::swap/move/assign does not invalidate iterators. (detail)
  29. [NFC][X86][MCA] Increase iteration count in reg move elimination tests (detail)
  30. [NFC][X86] AMD Zen 3: move sched classes for renameables moves togeter (detail)
  31. [X86] AMD Zen 3: throughput for renameable GPR moves is 6 (detail)
  32. [NFC][X86][MCA] AMD Zen 3: Add tests for renameable SSE XMM moves (detail)
  33. [NFC][X86][MCA] AMD Zen 3: Add tests for renameable AVX XMM moves (detail)
  34. [NFC][X86][MCA] AMD Zen 3: Add tests for renameable AVX YMM moves (detail)
  35. [X86] AMD Zen 3: SSE XMM moves are zero-cycle (detail)
  36. [X86] AMD Zen 3: AVX XMM moves are zero-cycle (detail)
  37. [X86] AMD Zen 3: AVX YMM moves are zero-cycle (detail)
  38. [X86] AMD Zen 3: throughput for renameable XMM/YMM moves is 6 (detail)
  39. [NFC][X86][MCA] AMD Zen3 Decrease iteration count in reg-move-elimination tests (detail)
  40. [PowerPC] Provide MMA builtins for compatibility (detail)
  41. [mlir] Rename BufferAliasAnalysis to BufferViewFlowAnalysis (detail)
  42. [mlir][linalg] Remove redundant indexOp builder. (detail)
  43. [libomptarget] Add support for target memory allocators to cuda RTL (detail)
  44. [AArch64] add test for missed vectorization; NFC (detail)
  45. BasicAA: Recognize inttoptr as isEscapeSource (detail)
  46. [mlir][spirv] add support lowering of extract_slice to scalar type (detail)
  47. [mlir][vector] add pattern to cast away leading unit dim for elementwise op (detail)
  48. [libFuzzer] Fix stack overflow detection (detail)
  49. [NFC][X86][MCA] AMD Zen3: add test for zero-cycle X87 move (detail)
  50. [X86] AMD Zen 3: _REV variants of zero-cycles moves are also zero-cycles (PR50261) (detail)
  51. [X86] combineXor - limit fold to non-opaque constants (PR50254) (detail)
  52. [LoopNest] Consider loop nest with inner loop guard using outer loop (detail)
  53. [libFuzzer] Fix stack-overflow-with-asan.test. (detail)
  54. [AArch64][ELF] Prefer to lower MC_GlobalAddress operands to .Lfoo$local (detail)
  55. [X86] AMD Zen 3: MOVSX32rr32 is a zero-cycle move (detail)
  56. [X86] AMD Zen 3: mark XMM/YMM (but not MMX!) reg moves as eliminatible in RegisterFile (detail)
  57. lit: revert 134b103fc0f3a995d76398bf4b029d72bebe8162 (detail)
  58. [libc++][ci] Run longer CI jobs first (detail)
  59. Internalize some cl::opt global variables or move them under namespace llvm (detail)
  60. Allow empty value list in propagateMetadata(Inst, ArrayOf...) (detail)
  61. [unittest] Fix -Wunused-variable after D94717 (detail)
  62. [WebAssembly] Use functions instead of macros for const SIMD intrinsics (detail)
  63. [SCEV] By more careful when traversing phis in isImpliedViaMerge. (detail)
  64. Revert "[DebugInfo] Fix updateDbgUsersToReg to support DBG_VALUE_LIST" (detail)
  65. [mlir][docs] remove stale statement about index type in vectors (detail)
  66. [mlir] Add a pattern to bufferize linalg.tensor_reshape. (detail)
  67. [mlir] Add a pattern to bufferize std.index_cast. (detail)
  68. An attempt to abandon omptarget out-of-tree builds. (detail)
  69. [RISCV] Consider scalar types for required extensions. (detail)
  70. [BareMetal] Ensure that sysroot always comes after library paths (detail)
  71. [flang] Implement NORM2 in the runtime (detail)
  72. [LV] Rename Region to TargetRegion, similar to SinkRegion (NFC). (detail)
  73. [LV] Assert if trying to sink replicate region into another region (NFC) (detail)
  74. [SEH] Fix regression with SEH in noexpect functions (detail)
  75. [MCA][RegisterFile] Fix register class check for move elimination (PR50265) (detail)
  76. [LV] Remove reference of PHI from comment, they are not recorded (NFC). (detail)
  77. Revert "[BareMetal] Ensure that sysroot always comes after library paths" (detail)
  78. [mlir][vector] Extend pattern to trim lead unit dimension to Splat Op (detail)
  79. [mlir] Missed clang-format (detail)
  80. [lld/mac] Write every weak symbol only once in the output (detail)
  81. [BareMetal] Ensure that sysroot always comes after library paths (detail)
  82. Fix the module-enabled build by removing a redundant type definition. (detail)
  83. [AArch64][GlobalISel] Legalize narrow type G_CTPOPs (detail)
  84. [NewPM] Move analysis invalidation/clearing logging to instrumentation (detail)
  85. NFC: Move TypeList implementation up the file (detail)
  86. Make `hasTypeLoc` matcher support more node types. (detail)
  87. [GlobalISel] Don't form zero/sign extending loads for atomics. (detail)
  88. [AArch64][GlobalISel] Create a new minimal combiner pass just for -O0. (detail)
  89. [mlir][vector] Fix warning (detail)
  90. [gn build] Manually port 5b158093e (detail)
  91. Revert "lit: revert 134b103fc0f3a995d76398bf4b029d72bebe8162" (detail)
  92. [mlir] Add hover support to mlir-lsp-server (detail)
  93. [lit] Bump up the Windows process cap from 32 to 60 (detail)
  94. [mlir] Refactor the representation of function-like argument/result attributes. (detail)
  95. [DebugInfo] UnwindTable::create() should not add empty rows to CFI unwind table (detail)
  96. [NewPM] Hide pass manager debug logging behind -debug-pass-manager-verbose (detail)
  97. Replace a remaining CRLF with LF. NFC. (detail)
  98. [X86] Support AMX fast register allocation (detail)
  99. Revert "[X86] Support AMX fast register allocation" (detail)
  100. Fix build after 34a8a437b (detail)
  101. [X86] Support AMX fast register allocation (detail)
  102. [mlir] Debug print pattern before and after matchAndRewrite call (detail)
  103. [VectorCombine] Simplify to scalar store if only one element updated (detail)
  104. [libc++] Use Xcode's CMake if it's present (detail)
  105. [X86] Improve costmodel for scalar byte swaps (detail)
  106. Revert "[LICM] Hoist loads with metadata" (detail)
  107. [MLIR][NFC] Remove unused MLIRContext declaration (detail)
  108. [MLIR] Add memref dialect dependency for affine fusion pass (detail)
  109. [libc++] Move handling of the target triple to the DSL (detail)
  110. [X86] combineHorizOpWithShuffle - generalize HOP(SHUFFLE(X),SHUFFLE(Y)) -> SHUFFLE(HOP(X,Y)) fold. (detail)
  111. [GlobalISel] Ensure MachineIRBuilder::getDebugLoc() returns a const reference. NFCI. (detail)
  112. [VPlan] Add test for sink scalars and merging using VPlan. (detail)
  113. [libc++] NFC: Refactor Lit annotations (detail)
  114. [lld/mac] Copy some of the commit message of d5a70db193 into a comment (detail)
  115. [MCA][RegisterFile] Refactor the move elimination logic to address PR50258. (detail)
  116. [lld-macho] Explicitly undefine literal exported symbols (detail)
  117. [llvm-mca][View] Update the Register File statistics. (detail)
  118. [Hexagon] Propagate metadata in Hexagon Vector Combine (detail)
  119. [test] Fix tools/gold/X86/new-pm.ll after D101797 (detail)
  120. [NFCI][X86] Mark a few lately-added system instructions as such for Scheduling purposes (detail)
  121. [NFCI][X86] Mark Znver3 scheduling model as complete (detail)
  122. [NFC][LoopIdiom] Add some tests for 'lshr until zero' ('count active bits') "on steroids" idiom (detail)
  123. [lld-macho][NFC] Purge stale test-output trees prior to split-file (detail)
  124. [libc++][doc] Update the Format library status. (detail)
  125. [SROA] Regenerate test checks (NFC) (detail)
  126. [SelectionDAG] Regenerate test checks (NFC) (detail)
  127. [X86] AMD Zen 3: XCHG is a zero-cycle instruction (detail)
  128. [NFC][X86] Znver3: drop obsolete fixme (detail)
  129. [SCEV] Add additional loop guard and/or tests (NFC) (detail)
  130. [SCEV] Handle and/or in applyLoopGuards() (detail)
  131. [ARM] Fix postinc of vst1xN (detail)
  132. [NFC][X86][MCA] AMD Zen3: add GPR zero-idiom dependency breaking tests (detail)
  133. [X86] AMD Zen 3: same-register XOR/SUB are GPR dependency breaking zero-idioms (detail)
  134. [NFC][X86][MCA] AMD Zen 3: add tests for SBB dependency breaking (detail)
  135. [X86] AMD Zen 3: same-reg SBB is a dependency-breaking instruction (detail)
  136. [NFC][X86][MCA] AMD Zen 3: add tests for CMP dependency breaking (detail)
  137. [X86] AMD Zen 3: same-reg CMP is a zero-cycle dependency-breaking instruction (detail)
  138. [Demangle][Rust] Print special namespaces (detail)
  139. [lld-macho] Don't reference entry symbol for non-executables (detail)
  140. [lld/mac] Fix alignment on subsections (detail)
  141. [lld-macho] Add llvm-otool as a test dependency (detail)
  142. Support NativeCodeCall binding in rewrite pattern. (detail)
  143. [RISCV][NFC] Don't need to create a new STI in RISCVAsmPrinter. (detail)
  144. [NFC][Coroutines] Fix two tests by removing hardcoded SSA value. (detail)
  145. [SimplifyCFG] Ignore ephemeral values when counting insts for threading (detail)
  146. [ORC] Generalize materialization dispatch to task dispatch. (detail)
  147. [ORC] Use the new dispatchTask API to run query callbacks. (detail)
  148. [AArch64][SVE] Remove index_vector node. (detail)
  149. [mlir] Fix compile error. (detail)
  150. [LegalizeVectorOps][RISCV] Add scalable-vector SELECT expansion (detail)
  151. [amdgpu-arch] Guard hsa.h with __has_include (detail)
  152. [AMDGPU][OpenMP] Disable tests when amdgpu-arch fails (detail)
  153. [libc] Allow target architecture customization (detail)
  154. [AMDGPU][OpenMP] Emit textual IR for -emit-llvm -S (detail)
  155. [mlir] OpenMP-to-LLVM: properly set outer alloca insertion point (detail)
  156. AMDGPU/GlobalISel: Add regbankselect test for vgpr(dest) sgpr(address) load (detail)
  157. AMDGPU/GlobalISel: Use destination register bank in applyMappingLoad (detail)
  158. [libc] Simplifies multi implementations and benchmarks (detail)
  159. [MLIR][Shape] Concretize broadcast result type if possible (detail)
  160. [compiler-rt] Handle None value when polling addr2line pipe (detail)
  161. Fixed bug in buffer deallocation pass using unranked memref types. (detail)
  162. [OpenMP][MLIR]Add support for guided, auto and runtime scheduling (detail)
  163. [clang][PreProcessor] Cutoff parsing after hitting completion point (detail)
  164. HexagonVectorCombine.cpp - don't negate a bool value. NFCI. (detail)
  165. [AArch64][SVE] Fix isel failure for FP-extending loads (detail)
  166. [GlobalISel] Fix wrong invocation of `getParamStackAlign` (NFC) (detail)
  167. [AArch64][SVE] Better utilisation of unpredicated forms of arithmetic intrinsics (detail)
  168. [AArch64][SVE] Better utilisation of unpredicated forms of remaining intrinsics (detail)
  169. clang: Fix tests after 7f78e409d028 if clang is not called clang-13 (detail)
  170. [NFC][llvm-dwarfdump] Code clean up for inlined var loc stats (detail)
  171. [clangd] Fix data type of WorkDoneProgressReport::percentage (detail)
  172. [Constant] Allow ConstantAggregateZero a scalable element count (detail)
  173. X86LoadValueInjectionLoadHardening.cpp - use const-reference in for-range loops to avoid unnecessary copies. NFCI. (detail)
  174. X86FlagsCopyLowering.cpp - try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies. NFCI. (detail)
  175. [TableGen] Remove redundant `Error:` in msg (NFC) (detail)
  176. [OPENMP]Fix PR48851: the locals are not globalized in SPMD mode. (detail)
  177. [AArch64][SVE] Improve SVE codegen for fixed length BITCAST (detail)
  178. [libc++][AIX] Define _LIBCPP_ELAST (detail)
  179. [SLP]Do not count perfect diamond matches for gathers several times. (detail)
  180. [PowerPC] Enable safe for 32bit vins* P10 instructions (detail)
  181. [libomptarget] Add support for target allocators to dynamic cuda RTL (detail)
  182. Revert "[PassManager] add helper function to hold set of vector passes" (detail)
  183. [clang][AArch32] Correctly align HA arguments when passed on the stack (detail)
  184. [NFC] Synchronize reserved identifier code between macro and variables / symbols (detail)
  185. [X86] Fix position-independent TType encoding (detail)
  186. [libc++][NFC] Remove _VSTD:: when not needed. (detail)
  187. [llvm-objdump][MachO] Print a newline before lazy bind/bind/weak/exports trie (detail)
  188. [X86][SSE] Merge equal X32/X64 check prefixes. NFCI. (detail)
  189. [X86][SSE] Add tests for missing shuffle(pack(x,y),pack(z,w)) -> permute(pack()) folds. (detail)
  190. [llvm-symbolizer] Update Command Guide (detail)
  191. [llvm-nm] Help option output should be consistent with the command guide (detail)
  192. [ORC] Update SpeculativeJIT example for dispatchTask changes in 5344c88dcb2. (detail)
  193. [clang] Support -fpic -fno-semantic-interposition for AArch64 (detail)
  194. [Demangle][Rust] Parse basic types (detail)
  195. [RISCV] Correct VL for fixed length masked scatter. (detail)
  196. [X86][SSE] Add examples of failures to remove a permute(pack(pack(),pack())) shuffle by reordering the packed operands. (detail)
  197. [mlir][CAPI] Add CAPI bindings for the sparse_tensor dialect. (detail)
  198. [cmake] Enable -Wmisleading-indentation (detail)
  199. [lld][WebAssembly] Disallow exporting of TLS symbols (detail)
  200. [mlir][Python] Upstream the PybindAdaptors.h helpers and use it to implement sparse_tensor.encoding. (detail)
  201. [Dependence Analysis] Enable delinearization of fixed sized arrays (detail)
  202. [lld-macho] Improve an external weak def test (detail)
  203. [X86][SSE] canonicalizeShuffleMaskWithHorizOp - add TODO for better 256/512-bit shuffle+hop folding support. NFC. (detail)
  204. [X86][AVX] Add example of failure to remove a 256-bit permute(hadd(hadd(),hadd())) shuffle by reordering the packed operands. (detail)
  205. [NFC][X86][MCA] AMD Zen 3: add tests for sub-32-bit CMP dep breaking (detail)
  206. [X86] AMD Zen 3: sub-32-bit CMP also break dependencies (detail)
  207. [mlir][Python] Re-export cext sparse_tensor module to the public namespace. (detail)

Started by upstream project clang-stage2-cmake-RgSan_relay build number 3491
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This run spent 1 hr 3 min waiting in the queue.

Revision: f38633d1bbf5842f37ad722a2f0edfdfd80733a2
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Revision: f7b888457641941a8e6024f36ee2e5ddc53695d5
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