Commit
a6e3027db7ebe6863e44bafcfeaacc16bdc88a3f
by craig.topper[X86] Avoid converting u64 to f32 using x87 on Windows
The code below currently prints less accurate values only on Windows 32-bit. On Windows, the default precision control on x87 is only 53-bit, and FADD triggers rounding with that precision, so the final result may be less accurate. This revision avoids less accurate conversions by using library calls instead.
```
int main() { int64_t n = 0b0000000000111111111111111111111111011111111111111111111111111111; printf("%lld, %.0f, %.0f", n, (float)n, (float)(uint64_t)n);
return 0; } ```
Reviewed By: craig.topper, lebedev.ri
Differential Revision: https://reviews.llvm.org/D141074
|
 | llvm/test/CodeGen/X86/uint64-to-float.ll (diff) |
 | llvm/lib/Target/X86/X86ISelLowering.cpp (diff) |
|
 | clang/lib/AST/Interp/ByteCodeExprGen.h (diff) |
|
 | clang/lib/AST/Interp/ByteCodeEmitter.cpp (diff) |
 | clang/lib/AST/Interp/PrimType.h (diff) |
 | clang/lib/AST/Interp/Source.h (diff) |
|
 | clang/lib/AST/Interp/Pointer.h (diff) |
|
 | llvm/test/Transforms/InstCombine/icmp-logical.ll (diff) |
Commit
7fa0a3c92377c2ce5b836b43e33a4a7107a3af38
by wanglei[LoongArch] Add an option for MCInstPrinter to print numeric reg names
`-loongarch-numeric-reg` for llvm-mc and llc. `-M numeric` (which matches GNU objdump) for llvm-objdump and llvm-mc.
Reviewed By: SixWeining
Differential Revision: https://reviews.llvm.org/D141743
|
 | llvm/test/MC/LoongArch/Misc/numeric-reg-names.s |
 | llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp (diff) |
 | llvm/test/CodeGen/LoongArch/numeric-reg-names.ll |
 | llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h (diff) |
|
 | clang/test/AST/Interp/records.cpp (diff) |
 | clang/lib/AST/Interp/InterpFrame.cpp (diff) |
 | clang/lib/AST/Interp/Interp.h (diff) |
 | clang/lib/AST/Interp/Interp.cpp (diff) |
 | clang/test/AST/Interp/cxx20.cpp (diff) |
 | clang/lib/AST/Interp/Descriptor.cpp (diff) |
|
 | mlir/test/python/dialects/transform_structured_ext.py (diff) |
 | mlir/python/mlir/dialects/_structured_transform_ops_ext.py (diff) |
Commit
d49d83e79ca0b59c3d68ff6c46eea69d848b0617
by tobias.gysi[MLIR][LLVM] Don't use void return type in `getCallableResults`.
In the LLVM IR dialect, `LLVMVoidType` is used to model the return type of LLVM IR functions with no return value. This is inconsistent with MLIR APIs, which expect a function with no return value to have an empty return type. Handle this special case in `LLVMFuncOp` to avoid mismatches between the number of return values and return types between caller and callee.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D141676
|
 | mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td (diff) |
Commit
6b85fa6d81b9f50d7a1c347dfd467c9ab01c4a5d
by quentin.colombet[InstCombine] Don't optimize idempotent `atomicrmw <op>, 0` into `load atomic`
Turning idempotent `atomicrmw`s into `load atomic` is perfectly legal with respect to how the loading happens, but it may not be legal for the whole program semantic.
Indeed, this optimization removes a store that may have some effects on the legality of other optimizations. Essentially, we lose some information and depending on the backend it may or may not produce incorrect code, so don't do it!
This fixes llvm.org/PR56450.
Differential Revision: https://reviews.llvm.org/D141277
|
 | llvm/lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp (diff) |
 | llvm/test/Transforms/InstCombine/atomicrmw.ll (diff) |
|
 | llvm/test/Transforms/InstCombine/atomicrmw.ll (diff) |
Commit
921c6f070714233ab707808354520b3f6e0ff4d6
by tobias.gysi[mlir][FuncToLLVM] Drop llvm.linkage attribute
This commit ensures that all functions produced by `FuncToLLVM` drop the llvm.linkage attribute. Furthermore, it adds a small test that checks if the readnone attribute is preserved.
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D142002
|
 | mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp (diff) |
 | mlir/test/Conversion/FuncToLLVM/convert-funcs.mlir (diff) |
 | mlir/test/Conversion/FuncToLLVM/emit-c-wrappers-for-external-callers.mlir (diff) |
 | mlir/test/Conversion/FuncToLLVM/emit-c-wrappers-for-external-functions.mlir (diff) |
Commit
871815e062a9e1d143f29333e6129f1cad0f83bb
by david.sherwood[AArch64][SVE2p1] Add SVE2.1 while (predicate-pair) intrinsics
Adds intrinsics for the following instructions:
* WHILEGE (predicate pair) * WHILEGT (predicate pair) * WHILEHI (predicate pair) * WHILEHS (predicate pair) * WHILELE (predicate pair) * WHILELO (predicate pair) * WHILELS (predicate pair) * WHILELT (predicate pair)
I've added an opcode selector called SelectOpcodeFromVT to AArch64ISelDAGToDAG.cpp that we will extend in future to select opcodes from different MVTs. For now, the only use is for selecting predicate types.
NOTE: These intrinsics are still in development and are subject to future changes.
Differential Revision: https://reviews.llvm.org/D141936
|
 | llvm/test/CodeGen/AArch64/sve2p1-intrinsics-while-pp.ll |
 | llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp (diff) |
 | llvm/include/llvm/IR/IntrinsicsAArch64.td (diff) |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff) |
Commit
5b54cf1a2892767fe949826a32d7820732028a38
by tbaeder[clang][Interp] Unify visiting variable declarations
We often visit the same variable multiple times, e.g. once when checking its initializer and later when compiling the function. Unify both of those in visitVarDecl() and do the returning of the value in visitDecl().
Differential Revision: https://reviews.llvm.org/D136815
|
 | clang/lib/AST/Interp/ByteCodeExprGen.h (diff) |
 | clang/lib/AST/Interp/ByteCodeExprGen.cpp (diff) |
 | clang/lib/AST/Interp/Program.cpp (diff) |
 | clang/lib/AST/Interp/ByteCodeStmtGen.h (diff) |
 | clang/lib/AST/Interp/ByteCodeStmtGen.cpp (diff) |
 | clang/lib/AST/Interp/Program.h (diff) |
|
 | clang-tools-extra/clangd/unittests/IncludeCleanerTests.cpp (diff) |
Commit
9308014195e2f091c0025ef4aa26ece080b7da8d
by tbaeder[clang][Interp] Diagnose uninitialized array record fields
Just like we do for record members, diagnose uninitialized array record fields.
Differential Revision: https://reviews.llvm.org/D136828
|
 | clang/test/AST/Interp/cxx20.cpp (diff) |
 | clang/lib/AST/Interp/Pointer.h (diff) |
 | clang/lib/AST/Interp/Interp.cpp (diff) |
Commit
883c117d1a4cce3c19aa521fccaf8f938269fc57
by npopov[Regex] Avoid NFA machinery for fixed prefix chars (NFC)
Similarly to what backref() does, add an "easy path" to slow() that can handle some non-branching cases, in particular simple character matches.
This has the dual effect of reducing the number of characters we need to match, and the number of states in the NFA.
This reduces FileCheck runtime on vloxseg.c from 17s to 12s on my machine.
|
 | llvm/lib/Support/regengine.inc (diff) |
Commit
88c5027b93a9f447a8b3ce02e5d74f1c10c14da1
by zinenko[mlir] make multi-size tiling use transform parameters
Use the recently introduced transform dialect parameter mechanism to perform controllable multi-size tiling with sizes computed at the transformation time rather than at runtime.
This requires to generalize tile and split structured transform operations to work with any transform dialect handle types, which is desirable in itself to avoid unchecked overuse of PDL OperationType.
Reviewed By: shabalin
Differential Revision: https://reviews.llvm.org/D140980
|
 | mlir/test/Dialect/Linalg/tile-conv.mlir (diff) |
 | mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.td (diff) |
 | mlir/test/Dialect/Linalg/tile-tensors.mlir (diff) |
 | mlir/python/mlir/dialects/_structured_transform_ops_ext.py (diff) |
 | mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h (diff) |
 | mlir/include/mlir/Dialect/Transform/IR/TransformOps.td (diff) |
 | mlir/test/Dialect/Linalg/multisize-tiling-full.mlir (diff) |
 | mlir/test/Dialect/Linalg/transform-ops-invalid.mlir (diff) |
 | mlir/test/Dialect/Linalg/transform-op-multitile-sizes.mlir (diff) |
 | mlir/test/Dialect/Linalg/transform-ops.mlir (diff) |
 | mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td (diff) |
 | mlir/test/Dialect/Linalg/transform-patterns.mlir (diff) |
 | mlir/test/Dialect/Transform/selective-targeting.mlir (diff) |
 | mlir/test/Dialect/Vector/transform-vector.mlir (diff) |
 | mlir/test/Dialect/Linalg/transform-op-tile.mlir (diff) |
 | mlir/test/Dialect/Linalg/tile-indexed.mlir (diff) |
 | mlir/test/Dialect/Linalg/transform-op-split.mlir (diff) |
 | mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp (diff) |
 | mlir/test/Dialect/Linalg/promotion_options.mlir (diff) |
 | mlir/test/python/dialects/transform_structured_ext.py (diff) |
 | mlir/test/Dialect/LLVM/transform-e2e.mlir (diff) |
 | mlir/lib/Dialect/Transform/IR/TransformOps.cpp (diff) |
 | mlir/test/Dialect/Linalg/transform-op-scalarize.mlir (diff) |
 | mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp (diff) |
 | mlir/test/Dialect/Linalg/transform-op-fuse.mlir (diff) |
Commit
98acd7468307b6099e7deae206a749af324ff95f
by zinenko[mlir] simpler transform dialect silenceable failures
Simplify the handling of silenceable failures in the transform dialect. Previously, the logic of `TransformEachOpTrait` required that `applyToEach` returned a list of null pointers when a silenceable failure was emitted. This was not done consistently and also crept into ops without this trait although they did not require it. Handle this case earlier in the interpreter and homogeneously associated preivously unset transform dialect values (both handles and parameters) with empty lists of the matching kind. Ignore the results of `applyToEach` for the targets for which it produced a silenceable failure. As a result, one never needs to set results to lists containing nulls. Furthermore, the objects associated with transform dialect values must never be null.
Depends On D140980
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D141305
|
 | mlir/test/Dialect/Transform/test-interpreter.mlir (diff) |
 | mlir/lib/Dialect/Transform/IR/TransformInterfaces.cpp (diff) |
 | mlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp (diff) |
 | mlir/lib/Dialect/SCF/TransformOps/SCFTransformOps.cpp (diff) |
 | mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp (diff) |
 | mlir/include/mlir/Dialect/Transform/IR/TransformInterfaces.h (diff) |
 | mlir/lib/Dialect/Transform/IR/TransformOps.cpp (diff) |
|
 | mlir/test/Integration/Dialect/Linalg/CPU/test-tensor-matmul.mlir (diff) |
 | mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-nwc-wcf-call.mlir (diff) |
 | mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-call.mlir (diff) |
 | mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-call.mlir (diff) |
 | mlir/test/Integration/Dialect/Linalg/CPU/test-conv-1d-call.mlir (diff) |
 | mlir/test/Integration/Dialect/Linalg/CPU/test-conv-2d-nhwc-hwcf-call.mlir (diff) |
 | mlir/test/Integration/Dialect/Linalg/CPU/test-conv-3d-ndhwc-dhwcf-call.mlir (diff) |
Commit
9b9cfe77a50abccc4b82a497e17566a454b699bd
by christian.ulmann[mlir][LLVM] Replace readnone with memory effects
This commit introduces LLVM's `MemoryEffects` attribute and replaces the deprecated usage of `llvm.readnone` in the LLVM dialect. The absence of the attribute on a `LLVMFuncOp` implies that it might access all kinds of memory. This semantic corresponds to `llvm::Function`'s behaviour.
Depends on D142002
Differential Revision: https://reviews.llvm.org/D142013
|
 | mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp (diff) |
 | mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp (diff) |
 | mlir/lib/Target/LLVMIR/ModuleTranslation.cpp (diff) |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td (diff) |
 | mlir/test/Target/LLVMIR/llvmir.mlir (diff) |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td (diff) |
 | mlir/test/Dialect/LLVMIR/func.mlir (diff) |
 | mlir/test/Conversion/FuncToLLVM/convert-funcs.mlir (diff) |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td (diff) |
 | mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp (diff) |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td (diff) |
 | mlir/lib/Target/LLVMIR/ModuleImport.cpp (diff) |
 | mlir/test/Target/LLVMIR/Import/function-attributes.ll (diff) |
 | mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp (diff) |
Commit
e91a5ce278381771ea6d4e6d602e1e486de655f9
by quentin.colombet[mlir][vector] Add a custom builder for LowerVectorsOp
The `lower_vectors` operation of the transform dialect takes a lot of arguments to build. In order to make C++ code easier to work with when using this instruction, introduce a new structure, named `LowerVectorsOptions`, that aggregates all the options that are used to build this instruction.
This allows to use patterns like: ``` LowerVectorsOptions opts; opts.setOptZ(...) .setOptY(...)...; builder.create<LowerVectorsOp>(target, opts); ```
Instead of having to pass all N options directly to the builder and set them in the right order.
NFC
Differential Revision: https://reviews.llvm.org/D141923
|
 | mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.h (diff) |
 | mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td (diff) |
|
 | clang/lib/AST/Interp/State.h (diff) |
 | clang/lib/AST/ExprConstant.cpp (diff) |
 | clang/lib/AST/Interp/InterpState.h (diff) |
|
 | clang/lib/AST/Interp/Interp.h (diff) |
 | clang/lib/AST/Interp/Interp.cpp (diff) |
|
 | clang/lib/AST/Interp/Interp.cpp (diff) |
 | clang/lib/AST/Interp/Interp.h (diff) |
|
 | clang/test/AST/Interp/literals.cpp (diff) |
 | clang/lib/AST/Interp/ByteCodeExprGen.cpp (diff) |
|
 | clang/lib/AST/Interp/Interp.h (diff) |
 | clang/lib/AST/Interp/Interp.cpp (diff) |
|
 | utils/bazel/llvm-project-overlay/mlir/BUILD.bazel (diff) |
 | utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel (diff) |
 | utils/bazel/llvm-project-overlay/mlir/unittests/BUILD.bazel (diff) |
Commit
e4ebe14fd16f9aa3ec38ccad3297636e23c7f40d
by dominik.adamski[mlir][OpenMP] Add nontemporal clause definition to simd construct
simd nontemporal construct is represented as a list of variables which have low locality accross simd iterations
Added verifier of nontemporal clause. MLIR tests were updated to test correctness of MLIR definition of nontemporal clause.
Differential Revision: https://reviews.llvm.org/D140553
Reviewed By: kiranchandramohan
|
 | mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td (diff) |
 | mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp (diff) |
 | mlir/test/Target/LLVMIR/openmp-llvm.mlir (diff) |
 | mlir/test/Dialect/OpenMP/invalid.mlir (diff) |
 | flang/lib/Lower/OpenMP.cpp (diff) |
 | mlir/test/Dialect/OpenMP/ops.mlir (diff) |
Commit
85acfc64257b133dcdc1d39f0ea07a0dc30a3656
by tbaederRevert "[clang][Interp][NFC] Remove shift error checking code duplication"
This reverts commit fddf6418e8492a544c9bfdb42a4dbc949d9dc2ee.
Apparently this also breaks some builders:
/usr/bin/ld: EvalEmitter.cpp:(.text._ZN5clang6interp11EvalEmitter7emitShlENS0_8PrimTypeES2_RKNS0_10SourceInfoE+0x1f54): undefined reference to `bool clang::interp::CheckShift<clang::interp::Integral<16u, true> >(clang::interp::InterpState&, clang::interp::CodePtr, clang::interp::Integral<16u, true> const&, unsigned int)' /usr/bin/ld: EvalEmitter.cpp:(.text._ZN5clang6interp11EvalEmitter7emitShlENS0_8PrimTypeES2_RKNS0_10SourceInfoE+0x1fd4): undefined reference to `bool clang::interp::CheckShift<clang::interp::Integral<32u, true> >(clang::interp::InterpState&, clang::interp::CodePtr, clang::interp::Integral<32u, true> const&, unsigned int)' /usr/bin/ld: EvalEmitter.cpp:(.text._ZN5clang6interp11EvalEmitter7emitShlENS0_8PrimTypeES2_RKNS0_10SourceInfoE+0x2058): undefined reference to `bool clang::interp::CheckShift<clang::interp::Integral<32u, true> >(clang::interp::InterpState&, clang::interp::CodePtr, clang::interp::Integral<32u, true> const&, unsigned int)'
(etc)
|
 | clang/lib/AST/Interp/Interp.cpp (diff) |
 | clang/lib/AST/Interp/Interp.h (diff) |
Commit
bf4140c2768ee71d3c4dbf922ed39356ef219a67
by mariusz.sikora[AMDGPU] Add feature predicate for v_fmac_f64 instruction
Introducing feature predicate VFmacF64Inst for targets which supports v_fmac_f64 instructions.
Differential Revision: https://reviews.llvm.org/D142017
|
 | llvm/lib/Target/AMDGPU/GCNSubtarget.h (diff) |
 | llvm/lib/Target/AMDGPU/SIInstructions.td (diff) |
 | llvm/lib/Target/AMDGPU/VOP2Instructions.td (diff) |
 | llvm/lib/Target/AMDGPU/AMDGPU.td (diff) |
Commit
655c88ca3631c0f64fa187f0fe9ad0dae7273026
by flo[VPlan] Add vp_depth_first_shallow + graph traits for wrapper(NFC)
This patch adds a new VPBlockShallowTraversalWrapper struct to provide graph traits specialization that do not traverse through VPRegionBlocks. This matches the behavior of the existing traits for plain VPBlockBase and is a step before moving the graph traits for VPBlockBase to traverse through VPRegionBlocks to enable cross region support in VPDominatorTree.
Depends on D140511.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D140512
|
 | llvm/lib/Transforms/Vectorize/VPlanCFG.h (diff) |
 | llvm/lib/Transforms/Vectorize/VPlan.cpp (diff) |
 | llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp (diff) |
Commit
1499cce2646cbf4dd78f8534a4e71bd856b10994
by tbaeder[clang] Improve diagnostic for "initializer-string for char array is too long"
This patch improves the diagnostic message "initializer-string for char array is too long" by specifying an expected array length and by indicating that the initializer string implicitly includes the null terminator.
Fixes #58829
Differential Revision: https://reviews.llvm.org/D141283
|
 | clang/include/clang/Basic/DiagnosticSemaKinds.td (diff) |
 | clang/lib/Sema/SemaInit.cpp (diff) |
 | clang/test/CXX/dcl.decl/dcl.init/dcl.init.string/p2.cpp (diff) |
Commit
2826869d7b3119f96b973f5cd15128162334f1fe
by deadalnix[DAG] Do not combine any_ext when we combine and into zext.
This transofrm loses information that can be useful for other transforms.
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D141883
|
 | llvm/test/CodeGen/X86/ushl_sat_vec.ll (diff) |
 | llvm/test/CodeGen/X86/known-signbits-vector.ll (diff) |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff) |
 | llvm/test/CodeGen/X86/ushl_sat.ll (diff) |
 | llvm/test/CodeGen/X86/illegal-bitfield-loadstore.ll (diff) |
 | llvm/test/CodeGen/X86/clear_upper_vector_element_bits.ll (diff) |
|
 | clang/lib/AST/Interp/Interp.h (diff) |
Commit
f6ea1af9a4b71d27de2dde629224af1220c5c85b
by tbaederRevert "[clang][Interp] Implement missing compound assign operators"
This reverts commit 490e8214fca48824beda8b508d6d6bbbf3d8d9a7.
This breaks a builder: https://lab.llvm.org/buildbot/#/builders/214/builds/5415
|
 | clang/test/AST/Interp/literals.cpp (diff) |
 | clang/lib/AST/Interp/ByteCodeExprGen.cpp (diff) |
Commit
8df7e818de45c367dc497e28d4d0e5a1fa1e64fe
by tbaederRevert "[clang][Interp] Unify visiting variable declarations"
This reverts commit 5b54cf1a2892767fe949826a32d7820732028a38.
This breaks a builder: https://lab.llvm.org/buildbot/#/builders/5/builds/30854
|
 | clang/lib/AST/Interp/ByteCodeStmtGen.cpp (diff) |
 | clang/lib/AST/Interp/ByteCodeStmtGen.h (diff) |
 | clang/lib/AST/Interp/Program.cpp (diff) |
 | clang/lib/AST/Interp/ByteCodeExprGen.cpp (diff) |
 | clang/lib/AST/Interp/Program.h (diff) |
 | clang/lib/AST/Interp/ByteCodeExprGen.h (diff) |
|
 | llvm/test/CodeGen/SPIRV/SampledImageRetType.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/BuildNDRange_2.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/check_ro_qualifier.ll (diff) |
 | llvm/test/CodeGen/SPIRV/read_image.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/extract_insert_value.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/optional-core-features-multiple.ll (diff) |
 | llvm/test/CodeGen/SPIRV/half_no_extension.ll (diff) |
 | llvm/test/CodeGen/SPIRV/opencl.queue_t.ll (diff) |
 | llvm/test/CodeGen/SPIRV/EnqueueEmptyKernel.ll (diff) |
 | llvm/test/CodeGen/SPIRV/function/alloca-load-store.ll (diff) |
 | llvm/test/CodeGen/SPIRV/pstruct.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_legacy.ll (diff) |
 | llvm/test/CodeGen/SPIRV/opencl/basic/get_global_offset.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/OpImageWrite.ll (diff) |
 | llvm/test/CodeGen/SPIRV/constant/local-null-constants.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/get_image_num_mip_levels.ll (diff) |
 | llvm/test/CodeGen/SPIRV/image_dim.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/OpenCL/atomic_cmpxchg.ll (diff) |
 | llvm/test/CodeGen/SPIRV/image.ll (diff) |
 | llvm/test/CodeGen/SPIRV/opencl/image.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/block_w_struct_return.ll (diff) |
 | llvm/test/CodeGen/SPIRV/constant/global-constants.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/OpImageQuerySize.ll (diff) |
 | llvm/test/CodeGen/SPIRV/linked-list.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/image_with_access_qualifiers.ll (diff) |
 | llvm/test/CodeGen/SPIRV/image_store.ll (diff) |
 | llvm/test/CodeGen/SPIRV/opencl/basic/progvar_prog_scope_init.ll (diff) |
 | llvm/test/CodeGen/SPIRV/half_extension.ll (diff) |
 | llvm/test/CodeGen/SPIRV/llvm-intrinsics/sqrt.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/enqueue_kernel.ll (diff) |
 | llvm/test/CodeGen/SPIRV/image-unoptimized.ll (diff) |
 | llvm/test/CodeGen/SPIRV/literal-struct.ll (diff) |
 | llvm/test/CodeGen/SPIRV/struct.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/global_block.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/OpImageReadMS.ll (diff) |
 | llvm/test/CodeGen/SPIRV/image_decl_func_arg.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/OpConstantSampler.ll (diff) |
 | llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll (diff) |
 | llvm/test/CodeGen/SPIRV/link-attribute.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/spec_const.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/OpImageSampleExplicitLod.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/image_get_size_with_access_qualifiers.ll (diff) |
 | llvm/test/CodeGen/SPIRV/spirv.Queue.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/cl-types.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/spirv-private-array-initialization.ll (diff) |
 | llvm/test/CodeGen/SPIRV/atomicrmw.ll (diff) |
 | llvm/test/CodeGen/SPIRV/opencl/basic/vstore_private.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/SampledImage.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/clk_event_t.ll (diff) |
 | llvm/test/CodeGen/SPIRV/transcoding/spirv-types.ll (diff) |
Commit
94750af83640cd702d80c53ab99d5bb303e55796
by groverkss[MLIR][Presburger] Support divisions in union of two PWMAFunction
This patch adds support for divisions in the union of two PWMAFunction. This is now possible because of previous patches, which made divisions explicitly stored in MultiAffineFunction (MAF). This patch also refactors the previous implementation, moving the implementation for obtaining a set of points where a MAF is lexicographically "better" than the other to MAF.
Reviewed By: arjunp
Differential Revision: https://reviews.llvm.org/D138118
|
 | mlir/include/mlir/Analysis/Presburger/PresburgerSpace.h (diff) |
 | mlir/include/mlir/Analysis/Presburger/PWMAFunction.h (diff) |
 | mlir/unittests/Analysis/Presburger/PWMAFunctionTest.cpp (diff) |
 | mlir/lib/Analysis/Presburger/PresburgerSpace.cpp (diff) |
 | mlir/lib/Analysis/Presburger/PWMAFunction.cpp (diff) |
Commit
6ad1b4095172373590134afff19a7fbad9d7889d
by sgueltonOptimize OptTable::findNearest implementation and usage
When used to find an exact match, some extra context can be used to totally cut some computations.
This saves 1% of the instruction count when pre processing sqlite3.c through
valgrind --tool=callgrind ./bin/clang -E sqlite3.c -o/dev/null
Differential Revision: https://reviews.llvm.org/D142026
|
 | llvm/lib/Option/OptTable.cpp (diff) |
 | clang/lib/Driver/Driver.cpp (diff) |
 | llvm/include/llvm/Option/OptTable.h (diff) |
Commit
1119c15ef5c55f2fe8a219443a9ea28f82ffe870
by jperier[flang][hlfir] Enable lowering and passing of allocatables and pointers.
Adds support for: - referencing a whole allocatable/pointer symbol - passing allocatable/pointer in a call
This required update in HLFIRTools.cpp helpers so that the raw address, extents, lower bounds, and type parameters of a fir.box/fir.class can be extracted. This is required because in hlfir lowering, dereferencing a pointer/alloc is only doing the fir.load fir.box part, and the helpers have to be able to reason about that fir.box without the help of a "fir::FortranVariableOpInterface".
Missing: - referencing part of allocatable/pointer (will need to update Designator lowering to dereference the pointer/alloc). Same for whole allocatable and pointer components. - allocate/deallocate/pointer assignment statements. - Whole allocatable assignment. - Lower inquires.
Differential Revision: https://reviews.llvm.org/D142043
|
 | flang/lib/Lower/Allocatable.cpp (diff) |
 | flang/lib/Optimizer/Dialect/FIROps.cpp (diff) |
 | flang/lib/Lower/ConvertCall.cpp (diff) |
 | flang/include/flang/Lower/Allocatable.h (diff) |
 | flang/include/flang/Optimizer/Dialect/FIROps.td (diff) |
 | flang/lib/Lower/ConvertVariable.cpp (diff) |
 | flang/lib/Optimizer/Builder/HLFIRTools.cpp (diff) |
 | flang/include/flang/Optimizer/Dialect/FortranVariableInterface.td (diff) |
 | flang/include/flang/Optimizer/Builder/HLFIRTools.h (diff) |
 | flang/test/Lower/HLFIR/allocatables-and-pointers.f90 |
Commit
e70ca7b35319a3621f9d9c6475926428f8c5c000
by hokein.wu[clang] Build UsingType for elaborated type specifiers.
Support building UsingType for elaborated type specifiers:
``` namespace ns { class Foo {}; }
using ns::Foo;
// The TypeLoc of `Foo` below should be a ElaboratedTypeLoc with an // inner UsingTypeLoc rather than the underlying `CXXRecordTypeLoc` class Foo foo; ```
Differential Revision: https://reviews.llvm.org/D141280
|
 | clang/include/clang/Sema/Sema.h (diff) |
 | clang/lib/Parse/ParseDecl.cpp (diff) |
 | clang/lib/Sema/SemaTemplate.cpp (diff) |
 | clang/lib/Parse/ParseDeclCXX.cpp (diff) |
 | clang/test/CXX/drs/dr4xx.cpp (diff) |
 | clang/lib/Sema/SemaDecl.cpp (diff) |
 | clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp (diff) |
 | clang/lib/Sema/SemaDeclCXX.cpp (diff) |
 | clang/test/CXX/drs/dr2xx.cpp (diff) |
 | clang/include/clang/Sema/DeclSpec.h (diff) |
 | clang/lib/Sema/SemaType.cpp (diff) |
|
 | llvm/test/CodeGen/X86/known-signbits-vector.ll (diff) |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff) |
Commit
e741b8c2e5200269f846bdd88ca98e44681fe8df
by christian.ulmann[llvm][ir] Purge MD_prof custom accessors
This commit purges direct accesses to MD_prof metadata and replaces them with the accessors provided from the utility file wherever possible. This commit can be seen as the first step towards switching the branch weights to 64 bits. See post here: https://discourse.llvm.org/t/extend-md-prof-branch-weights-metadata-from-32-to-64-bits/67492
Reviewed By: davidxl, paulkirth
Differential Revision: https://reviews.llvm.org/D141393
|
 | llvm/include/llvm/Analysis/CFGPrinter.h (diff) |
 | llvm/lib/IR/Metadata.cpp (diff) |
 | llvm/lib/IR/ProfDataUtils.cpp (diff) |
 | llvm/lib/Analysis/BranchProbabilityInfo.cpp (diff) |
 | llvm/include/llvm/IR/Instructions.h (diff) |
 | llvm/lib/Transforms/Scalar/JumpThreading.cpp (diff) |
 | llvm/lib/Transforms/Scalar/LoopPredication.cpp (diff) |
 | llvm/lib/Transforms/Utils/Local.cpp (diff) |
 | llvm/lib/IR/Instruction.cpp (diff) |
 | llvm/lib/IR/Instructions.cpp (diff) |
 | llvm/lib/Transforms/Instrumentation/ControlHeightReduction.cpp (diff) |
 | llvm/lib/Transforms/IPO/PartialInlining.cpp (diff) |
 | llvm/include/llvm/IR/ProfDataUtils.h (diff) |
Commit
939dce12f9f35f7e0953a036c16e89d30011d047
by hokein.wu[clangd] Implement unused include warnings with include-cleaner library.
A prototype of using include-cleaner library in clangd:
- (re)implement clangd's "unused include" warnings with the library - the new implementation is hidden under a flag `Config::UnusedIncludesPolicy::Experiment`
Differential Revision: https://reviews.llvm.org/D140875
|
 | clang-tools-extra/clangd/IncludeCleaner.cpp (diff) |
 | clang-tools-extra/clangd/Preamble.cpp (diff) |
 | clang-tools-extra/clangd/IncludeCleaner.h (diff) |
 | clang-tools-extra/clangd/Preamble.h (diff) |
 | clang-tools-extra/clangd/unittests/IncludeCleanerTests.cpp (diff) |
 | clang-tools-extra/clangd/ParsedAST.h (diff) |
 | clang-tools-extra/clangd/ParsedAST.cpp (diff) |
 | clang-tools-extra/clangd/CMakeLists.txt (diff) |
 | clang-tools-extra/clangd/ConfigCompile.cpp (diff) |
 | clang-tools-extra/clangd/Config.h (diff) |
|
 | llvm/utils/gn/secondary/clang-tools-extra/clangd/tool/BUILD.gn (diff) |
 | llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn (diff) |
 | llvm/utils/gn/secondary/clang-tools-extra/clangd/refactor/tweaks/BUILD.gn (diff) |
 | llvm/utils/gn/secondary/clang-tools-extra/include-cleaner/lib/BUILD.gn |
|
 | llvm/utils/gn/secondary/clang-tools-extra/clangd/unittests/BUILD.gn (diff) |
Commit
67bd3c58c0c7389e39c5a2f4d3b1a30459ccf5b7
by abrachet[X86] Add register definitions for cfi directives
Add {e,r}flags, {g,f}s.base registers so they can be referenced in cfi directives,. They are not otherwise useable in any instructions, but can be implicitly pushed to the stack like with pushf for {e,r}flags.
Differential Revision: https://reviews.llvm.org/D141879
|
 | llvm/test/CodeGen/X86/ipra-reg-usage.ll (diff) |
 | llvm/lib/Target/X86/X86RegisterInfo.td (diff) |
 | llvm/test/MC/ELF/cfi-offset.s (diff) |
|
 | llvm/test/Transforms/InstCombine/freeze.ll (diff) |
Commit
2bcedd464348e170587b6f798d021f4e182f62e2
by michal.paszkowski[SPIR-V] Emit OpExecutionMode ContractionOff for no FP_CONTRACT metadata
This change makes the AsmPrinter emit OpExecutionMode ContractionOff when both opencl.enable.FP_CONTRACT and spirv.ExecutionMode metadata are not present.
Differential Revision: https://reviews.llvm.org/D141734
|
 | llvm/test/CodeGen/SPIRV/opencl/metadata/fp_contractions_metadata.ll |
 | llvm/test/CodeGen/SPIRV/opencl/metadata/kernel_arg_type_module_metadata.ll |
 | llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp (diff) |
 | llvm/test/CodeGen/SPIRV/opencl/kernel_arg_type_function_metadata.ll |
 | llvm/test/CodeGen/SPIRV/opencl/metadata/kernel_arg_type_function_metadata.ll |
 | llvm/test/CodeGen/SPIRV/metadata-opencl.ll |
 | llvm/test/CodeGen/SPIRV/opencl/metadata/opencl_version_metadata.ll |
 | llvm/test/CodeGen/SPIRV/opencl/kernel_arg_type_module_metadata.ll |
 | llvm/test/CodeGen/SPIRV/opencl/metadata/no_fp_contractions_metadata.ll |
Commit
c441f65f9183a4d1d7f5ecc63b4e32a42e09367e
by yitzhakm[clang][dataflow] Add (initial) debug printing for `Value` and `Environment`.
Also adds uses of the new printing in analysis inner loop.
Differential Revision: https://reviews.llvm.org/D141716
|
 | clang/lib/Analysis/FlowSensitive/Value.cpp (diff) |
 | clang/include/clang/Analysis/FlowSensitive/Value.h (diff) |
 | clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp (diff) |
 | clang/lib/Analysis/FlowSensitive/TypeErasedDataflowAnalysis.cpp (diff) |
 | clang/include/clang/Analysis/FlowSensitive/DataflowEnvironment.h (diff) |
Commit
0c2630be22610b4bc79305f73759ac5334ded540
by npopov[InstCombine] Drop incorrect test (NFC)
I made a typo here, this was supposed to be !align rather than !aligned. But then !align can only be applied to loads, not calls (where one would use the return attribute instead). And freeze can't be pushed through loads anyway, so there's no way to test this case (same as !nonnull).
|
 | llvm/test/Transforms/InstCombine/freeze.ll (diff) |
|
 | llvm/test/Transforms/InstCombine/ispow2.ll (diff) |
Commit
03c45f14bf639c7d2346b956cd1ec61a669236e0
by orlando.hyams[Dexter] Add on_line parameter to DexExpectStepOrder command
DexExpectStepOrder uses the line to expect a debugger step from the actual line of the command in the Dexter source file. Now Dexter scripts have mainly moved to thier own script files instead of the actual source, there should be a option to override this behaviour to choose your own debugger step location.
Reviewed By: Orlando
Differential Revision: https://reviews.llvm.org/D142099
|
 | cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ControllerHelpers.py (diff) |
 | cross-project-tests/debuginfo-tests/dexter/dex/heuristic/Heuristic.py (diff) |
 | cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectStepOrder.py (diff) |
 | cross-project-tests/debuginfo-tests/dexter/Commands.md (diff) |
 | cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_order.cpp (diff) |
Commit
e0b3b6cec7cf1c03bde8b65dcd2f9233839ad0a9
by guilherme.a.valarini[OpenMP][Fix] Track all threads that may delete an entry
The entries inside a "target data end" is processed in three steps:
1. Query internal data maps for the entries and dispatch any necessary device-side operations (i.e., data retrieval); 2. Synchronize the such operations; 3. Update the host-side pointers and remove any entry which reference counter reached zero.
Such steps may be executed by multiple threads which may even operate on the same entries. The current implementation (D121058) tries to synchronize these threads by tracking the "owner" for the deletion of each entry using their thread ID. Unfortunately it may failed to do so because of the following reasons:
1. The owner is always assigned at the first step only if the reference count is 0 when the map is queried. This does not work when such owner thread is faster than a previous one that is also processing the same entry on another "target data end", leading to user-after-free problems. 2. The entry is only added for post-processing (step 3) if its reference count was 0 at query time (step 1). This does not allow for threads to exchange responsibility for the deletion, leading again to user-after-free problems. 3. An entry may appear multiple times in the arguments array of a "target data end", which may lead to deleting the entry prematurely, leading, again, to user-after-free problems.
This patch addresses these problems by tracking all the threads that are using an entry at "target data end" region through a counter, ensuring only the last one deletes it when needed. It also ensures that all entries that are successfully found inside the data maps in step 1 are also processed in step 3, regardless if their reference count was zeroed or not at query time. This ensures the deletion ownership may be passed to any thread that is using such entry.
Reviewed By: ye-luo
Differential Revision: https://reviews.llvm.org/D132676
|
 | openmp/libomptarget/src/omptarget.cpp (diff) |
 | openmp/libomptarget/src/device.cpp (diff) |
 | openmp/libomptarget/test/mapping/map_back_race.cpp (diff) |
 | openmp/libomptarget/include/device.h (diff) |
Commit
ee700dec052a0336798fb2570faec31719b53f8d
by david.green[AArch64] Armv9-A implies FP16
As Armv9-a implies SVE2 it implies SVE (added in D141411) and so it should also imply FP16, which this patch adds. This helps get the target features correct when using `target("arch=armv9-a")` attributes.
There is also an adjustment to AssertSameExtensionFlags in this patch to make it print cpu names, useful when the TargetParser unit tests are run through lit to distinguish which cpu is failing.
Differential Revision: https://reviews.llvm.org/D142087
|
 | clang/test/CodeGen/aarch64-targetattr.c (diff) |
 | llvm/include/llvm/TargetParser/AArch64TargetParser.h (diff) |
 | clang/test/CodeGen/aarch64-targetattr-arch.c (diff) |
 | llvm/unittests/TargetParser/TargetParserTest.cpp (diff) |
|
 | llvm/test/Transforms/InstCombine/loadstore-metadata.ll (diff) |
Commit
f13d6001324e9c9653d8568c1d86e182b217e272
by kli[flang] Add semantic check for multiple part-ref with non-zero rank
This patch is to diagnose the case when a type bound procedure is passed as an actual procedure argument.
call sub0(t%t3%t2%t%info1)
Fix: https://github.com/llvm/llvm-project/issues/55826
Committed on behalf of DanielCChen
Differential Revision: https://reviews.llvm.org/D141506
|
 | flang/test/Semantics/expr-errors04.f90 (diff) |
 | flang/lib/Semantics/expression.cpp (diff) |
|
 | llvm/test/Transforms/InstCombine/loadstore-metadata.ll (diff) |
 | llvm/lib/Transforms/Utils/Local.cpp (diff) |
Commit
3508f69174e663d276b58c55e176688f828591ac
by jperier[flang][hlfir] Lower whole allocatable or pointer component ref
Compare to other component ref lowering, the hlfir.designate result type computation is different, and the allocatable/pointer/contiguous must be set on the hlfir.designate so that the component attributes are kept in the IR.
Differential Revision: https://reviews.llvm.org/D142111
|
 | flang/include/flang/Lower/ConvertVariable.h (diff) |
 | flang/lib/Lower/ConvertVariable.cpp (diff) |
 | flang/test/Lower/HLFIR/allocatable-and-pointer-components.f90 |
 | flang/lib/Lower/ConvertExprToHLFIR.cpp (diff) |
 | flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp (diff) |
Commit
daa316bcaf717e1dacdfee443f2c325a783d2c70
by yitzhakm[clang][dataflow] Fix bug in joining bool values.
Currently, the code assumes that all boolean-typed values are an instance of `BoolValue` (or its subclasses). Yet, lvalues violate this assumption. This patch drops the assumption and strengthens the check to confirm the shape of both values being joined.
The patch also notes as FIXMES a number of problems discovered fixing this bug.
Differential Revision: https://reviews.llvm.org/D141709
|
 | clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp (diff) |
 | clang/lib/Analysis/FlowSensitive/Transfer.cpp (diff) |
 | clang/unittests/Analysis/FlowSensitive/TypeErasedDataflowAnalysisTest.cpp (diff) |
Commit
48df06f1d00c6accb396438c04133fb7fdd99d2c
by matthew.devereau[AArch64] Allow poison elements of fixed-vectors to be duplicated as a widened element
Expanding upon https://reviews.llvm.org/D138203, allow null indices in InsertElts to be matched with any value and be duplicated if the fixed vector the scalar values are inserted into is poison, and the scalable vector the subvector being inserted into is poison.
Differential Revision: https://reviews.llvm.org/D141846
|
 | llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-dupqlane.ll (diff) |
 | llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff) |
|
 | clang-tools-extra/clangd/fuzzer/CMakeLists.txt (diff) |
|
 | llvm/test/Transforms/SROA/tbaa-subload.ll (diff) |
 | llvm/utils/UpdateTestChecks/common.py (diff) |
 | llvm/test/Transforms/SROA/tbaa-struct.ll (diff) |
 | llvm/test/Transforms/SROA/tbaa-struct2.ll (diff) |
Commit
22e8525dfdd7d78d05ad3873cf94476021e4a08f
by koraq[libc++][format] Implements range_formatter
Implements parts of - P2286R8 Formatting Ranges - P2585R0 Improving default container formatting
Depends on D140651
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D140653
|
 | libcxx/include/__format/range_formatter.h |
 | libcxx/test/libcxx/transitive_includes/cxx11.csv (diff) |
 | libcxx/test/libcxx/transitive_includes/cxx14.csv (diff) |
 | libcxx/test/libcxx/transitive_includes/cxx03.csv (diff) |
 | libcxx/include/__format/buffer.h (diff) |
 | libcxx/test/libcxx/transitive_includes/cxx2b.csv (diff) |
 | libcxx/test/std/utilities/format/format.range/format.range.formatter/parse.pass.cpp |
 | libcxx/test/std/utilities/format/format.range/format.range.formatter/set_brackets.pass.cpp |
 | libcxx/test/libcxx/private_headers.verify.cpp (diff) |
 | libcxx/include/__format/format_context.h (diff) |
 | libcxx/test/std/utilities/format/format.range/format.range.formatter/underlying.pass.cpp |
 | libcxx/test/std/utilities/format/format.range/format.range.formatter/format.pass.cpp |
 | libcxx/include/format (diff) |
 | libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp (diff) |
 | libcxx/test/support/format.functions.common.h (diff) |
 | libcxx/test/libcxx/transitive_includes/cxx20.csv (diff) |
 | libcxx/test/std/utilities/format/format.tuple/format.functions.tests.h (diff) |
 | libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.format.pass.cpp |
 | libcxx/docs/Status/FormatPaper.csv (diff) |
 | libcxx/include/__memory/allocate_at_least.h (diff) |
 | libcxx/test/std/utilities/format/format.tuple/format.functions.format.pass.cpp (diff) |
 | libcxx/include/CMakeLists.txt (diff) |
 | libcxx/test/std/utilities/format/format.range/format.range.formatter/set_separator.pass.cpp |
 | libcxx/include/__format/formatter_output.h (diff) |
 | libcxx/test/libcxx/transitive_includes/cxx17.csv (diff) |
 | libcxx/include/__format/range_default_formatter.h (diff) |
 | libcxx/include/module.modulemap.in (diff) |
 | libcxx/include/__format/parser_std_format_spec.h (diff) |
 | libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.tests.h |
 | libcxx/test/std/utilities/format/format.range/format.range.formatter/format.functions.vformat.pass.cpp |
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn (diff) |
Commit
a459a2485b54fbd9e1f8a48061e79cdcd12b12a5
by clementval[flang] Fix SELECT TYPE lowering when CLASS DEFAULT is not the last type guard
CLASS DEFAULT needs to be the last attribute when fir.select_type op is created. It needs to be at its actual position in the Fortran code when the TypeGuardStmt are processed. The current lowering was crashing when CLASS DEFAULT was not at the last position. This patch fixes the issue by tracking the actual position of the CLASS DEFAULT type guard and set it at the correct position after the fir.select_type op is created.
Reviewed By: jeanPerier, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D142091
|
 | flang/lib/Lower/Bridge.cpp (diff) |
 | flang/test/Lower/select-type.f90 (diff) |
Commit
e315b872b291ad268bf0ae6e276a07de6f29992b
by clementval[flang] Support polymorphic source in RESHAPE intrinsic
Result must carry the polymorphic type information from the source.
Reviewed By: jeanPerier, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D142095
|
 | flang/lib/Lower/IntrinsicCall.cpp (diff) |
 | flang/test/Lower/polymorphic-temp.f90 (diff) |
Commit
fd26eee486ed81a2477e28d069fb68072fd7b2a2
by clementval[flang] Allow pointer association between derived-type pointer and unlimited polymorphic target
Pointer association to unlimited polymorphic target is allowed for unlimited polymorphic pointer and non-extensible derived-type. This is checked by the semantic and this patch allows it in the fir.rebox operation.
Reviewed By: jeanPerier, PeteSteinfeld
Differential Revision: https://reviews.llvm.org/D142104
|
 | flang/test/Lower/polymorphic.f90 (diff) |
 | flang/lib/Optimizer/Dialect/FIROps.cpp (diff) |
Commit
a0f8bdbb18a82ec150515d24f6eefb3519d4459a
by paul.robinson[lit] Stop supporting triple substrings in UNSUPPORTED and XFAIL
AFAICT all in-tree lit tests have been converted to use `target=...` and so there is no longer any need for triples being special. Some project config files still define their own features based on the triple, but those are normal feature words (although now are redundant with target= checks).
Downstream tests that use triple substrings will need to convert. For example: UNSUPPORTED: -aix XFAIL: arm becomes UNSUPPORTED: target={{.*}}-aix{{.*}} XFAIL: target=arm{{.*}}
You can do git log --grep "special handling for triples" to find many examples of updates to the upstream tests.
https://discourse.llvm.org/t/rfc-lits-requires-and-triples/66041
Differential Revision: https://reviews.llvm.org/D141007
|
 | llvm/docs/ReleaseNotes.rst (diff) |
 | llvm/utils/lit/lit/Test.py (diff) |
 | llvm/utils/lit/lit/BooleanExpression.py (diff) |
|
 | utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel (diff) |
|
 | utils/bazel/llvm-project-overlay/mlir/python/BUILD.bazel (diff) |
Commit
a9c5a98f810d380919d25c3073c61725d73d3c41
by paulsson[SystemZ] Improvement in tryRxSBG().
Only allow replacements of nodes that have a single user. This is better as simple instructions (e.g. XGRK) are one cycle faster, and it helps in cases where both inputs share a common node.
Review: Ulrich Weigand
|
 | llvm/test/CodeGen/SystemZ/rnsbg-01.ll (diff) |
 | llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp (diff) |
 | llvm/test/CodeGen/SystemZ/store_nonbytesized_vecs.ll (diff) |
 | llvm/test/CodeGen/SystemZ/flt-rounds.ll (diff) |
Commit
04d4f4b3d4e4fd608a3bc3fe387006435f04b61d
by koraq[libc++][format] Adds container adaptor formatters.
Implements parts of - P2286R8 Formatting Ranges
Depends on D140653
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D141290
|
 | libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.functions.format.pass.cpp |
 | libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.pass.cpp |
 | libcxx/test/libcxx/transitive_includes/cxx03.csv (diff) |
 | libcxx/test/libcxx/transitive_includes/cxx17.csv (diff) |
 | libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.functions.vformat.pass.cpp |
 | libcxx/include/CMakeLists.txt (diff) |
 | libcxx/include/__format/container_adaptor.h |
 | libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp (diff) |
 | libcxx/test/libcxx/transitive_includes/cxx14.csv (diff) |
 | libcxx/test/std/containers/container.adaptors/container.adaptors.format/parse.pass.cpp |
 | libcxx/include/format (diff) |
 | libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.functions.tests.h |
 | libcxx/include/module.modulemap.in (diff) |
 | libcxx/test/libcxx/private_headers.verify.cpp (diff) |
 | libcxx/test/libcxx/transitive_includes/cxx2b.csv (diff) |
 | libcxx/include/__format/range_default_formatter.h (diff) |
 | libcxx/include/queue (diff) |
 | libcxx/docs/Status/FormatPaper.csv (diff) |
 | libcxx/test/libcxx/transitive_includes/cxx20.csv (diff) |
 | libcxx/include/stack (diff) |
 | libcxx/test/libcxx/transitive_includes/cxx11.csv (diff) |
|
 | llvm/test/Analysis/CostModel/AArch64/insert-extract.ll (diff) |
Commit
68f45796edbdc4331a6be0b6e9d58f01d8b1fba0
by smeijer[AARCH64][SVE] Do not optimize vector conversions
shuffle_vector instructions are serialized targeting SVE fixed vectors, see https://reviews.llvm.org/D139111. This patch disables optimizeExtendOrTruncateConversion peepholes that generates shuffle_vector.
Differential Revision: https://reviews.llvm.org/D141439
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 | llvm/test/CodeGen/AArch64/sve-fixed-vector-zext.ll |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff) |
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn (diff) |
Commit
a09b1dc1f2c534cc8b870b5b7c9bc7f7682a1ed5
by koraq[libc++][format] Adds formatter std::vector<bool>.
Implements parts of - P2286R8 Formatting Ranges
Depends on D140653
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D141761
|
 | libcxx/test/std/containers/sequences/vector.bool/vector.bool.fmt/format.functions.vformat.pass.cpp |
 | libcxx/test/std/containers/sequences/vector.bool/vector.bool.fmt/parse.pass.cpp |
 | libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp (diff) |
 | libcxx/docs/Status/FormatPaper.csv (diff) |
 | libcxx/test/std/containers/sequences/vector.bool/vector.bool.fmt/format.functions.tests.h |
 | libcxx/include/vector (diff) |
 | libcxx/include/__bit_reference (diff) |
 | libcxx/test/std/containers/sequences/vector.bool/vector.bool.fmt/format.functions.format.pass.cpp |
 | libcxx/test/std/containers/sequences/vector.bool/vector.bool.fmt/format.pass.cpp |
Commit
eef0210706bc16ffde17d5b574799d8aae705790
by kiran.chandramohan[Flang][Debug] Modifications for getting pathname
-> Use file pathname from the Flang frontend. It is the frontend that is in-charge of finding the files and is hence the canonical source for paths. -> Convert pathname to absolute pathname while creating the moduleOp.
Co-authored-by: Peter Klausler <pklausler@nvidia.com>
Reviewed By: PeteSteinfeld, vzakhari, jeanPerier, awarzynski
Differential Revision: https://reviews.llvm.org/D141674
|
 | flang/lib/Frontend/FrontendActions.cpp (diff) |
 | flang/tools/bbc/bbc.cpp (diff) |
 | flang/test/Lower/module-debug-file-loc-linux.f90 |
 | flang/lib/Lower/Bridge.cpp (diff) |
 | flang/include/flang/Lower/Bridge.h (diff) |
Commit
176c853d1da5c344194952659eeb74f063e13010
by michaelrj[libc] add internal string class
The scanf implementation needs a dynamically resizing string class. This patch adds a minimal version of that class along with tests to check the current functionality.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D141162
|
 | libc/test/src/__support/CMakeLists.txt (diff) |
 | libc/src/__support/CMakeLists.txt (diff) |
 | libc/src/__support/char_vector.h |
 | libc/test/src/__support/char_vector_test.cpp |
 | libc/test/src/__support/CPP/stringview_test.cpp (diff) |
Commit
9a32e53941ccb6ccd55d5ecd305ecd16b90bfd58
by michaelrj[libc] add scanf float converter
This patch adds the %f/F/e/E/g/G/a/A conversions for scanf, as well as accompanying tests. This implementation matches the definition set forth in the standard, which may conflict with some other implementations.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D141091
|
 | libc/src/stdio/scanf_core/float_converter.cpp |
 | libc/src/stdio/scanf_core/float_converter.h |
 | libc/test/src/stdio/CMakeLists.txt (diff) |
 | libc/src/stdio/scanf_core/converter.cpp (diff) |
 | libc/test/src/stdio/sscanf_test.cpp (diff) |
 | libc/src/stdio/scanf_core/CMakeLists.txt (diff) |
 | libc/src/stdio/scanf_core/int_converter.cpp (diff) |
 | libc/src/stdio/scanf_core/core_structs.h (diff) |
Commit
bc94a9b2eceba7effa032a5ce48419da2e69c8e9
by aaronSilence some sign comparison warnings; NFC
The std::optional implementation in MSVC causes this code to produce a sign comparison warning. This ensures the types are the same sign.
|
 | clang/lib/Basic/Targets/AArch64.cpp (diff) |
|
 | flang/lib/Optimizer/CodeGen/TBAABuilder.cpp (diff) |
 | flang/lib/Optimizer/CodeGen/TBAABuilder.h (diff) |
Commit
2f8b920f95aa1e308193cf5803df7912025e8400
by paul.robinsonRevert "[lit] Stop supporting triple substrings in UNSUPPORTED and XFAIL"
This reverts commit a0f8bdbb18a82ec150515d24f6eefb3519d4459a.
Several bots are failing in shtest-format.py, likely because of this.
|
 | llvm/docs/ReleaseNotes.rst (diff) |
 | llvm/utils/lit/lit/BooleanExpression.py (diff) |
 | llvm/utils/lit/lit/Test.py (diff) |
Commit
b3faa1a87ac37e3825a67368dfb8dcfef95f4c53
by aaronFix zero-initialization fix-it for variable template
Current version there is a fix-it for
template <class> constexpr int x = 0; template <> constexpr int x<int>; // fix-it here but it will cause
template <> constexpr int x = 0<int>;
Differential Revision: https://reviews.llvm.org/D139705
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 | clang/include/clang/AST/DeclTemplate.h (diff) |
 | clang/docs/ReleaseNotes.rst (diff) |
 | clang/test/FixIt/fixit-const-var-init.cpp |
Commit
b05fa4faf64d6c6811bbecead13dc7c23ac43aca
by xingxue[clang][driver][AIX] Add OpenMP runtime if -fopenmp specified
Summary: This patch adds OpenMP runtime to the linker command line if -fopenmp is specifed for AIX.
Reviewed by: daltenty
Differential Revision: https://reviews.llvm.org/D141862
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 | clang/lib/Driver/ToolChains/AIX.cpp (diff) |
 | clang/test/Driver/aix-ld.c (diff) |
Commit
455305624884cf9237143e2ba0635fcc5ba5206a
by Krzysztof.Drewniak[mlir][Index] Implement InferIntRangeInterface
Implement InferIntRangeInterface for all operations in the Index dialect. The inference implementation, unlike the one for Arith, accounts for the fact that Index can be either 64 or 32 bits long by evaluating both cases. Bounds are stored as if index were i64, but when inferring new bounds, we compute both f(...) and f(trunc(...)). We then compare trunc(f(...)) to f(trunc(...)). If they are equal in the relevant range components, we use the 64-bit range computation, otherwise we give the range ext(f(trunc(...))) union f(...).
Note that this can cause surprising behavior as seen in the tests, where, for example, the order of min and max operations impacts the behavior of the inference. The inference could perhaps be made more precise in the future (ex. by tracking 32 and 64-bit results separately and having them influence each other somehow) butt, since my project targets an index=i32 platform and doesn't see index-valued values > uint32_max, I'm not too concerned about it.
Depends on https://reviews.llvm.org/D141299
Depends on https://reviews.llvm.org/D141296
Reviewed By: Mogball
Differential Revision: https://reviews.llvm.org/D140899
|
 | mlir/include/mlir/Interfaces/Utils/InferIntRangeCommon.h |
 | mlir/lib/Dialect/Arith/IR/CMakeLists.txt (diff) |
 | mlir/lib/Dialect/Index/IR/CMakeLists.txt (diff) |
 | mlir/lib/Dialect/Index/IR/InferIntRangeInterfaceImpls.cpp |
 | mlir/test/Dialect/Index/int-range-inference.mlir |
 | mlir/lib/Interfaces/Utils/CMakeLists.txt |
 | mlir/lib/Dialect/Arith/IR/InferIntRangeInterfaceImpls.cpp (diff) |
 | mlir/lib/Interfaces/CMakeLists.txt (diff) |
 | mlir/include/mlir/Dialect/Index/IR/IndexOps.h (diff) |
 | mlir/include/mlir/Dialect/Index/IR/IndexOps.td (diff) |
 | mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp |
|
 | compiler-rt/lib/sanitizer_common/sanitizer_procmaps_bsd.cpp (diff) |
 | compiler-rt/lib/sanitizer_common/sanitizer_procmaps_common.cpp (diff) |
|
 | mlir/test/Dialect/SCF/for-loop-peeling.mlir (diff) |
 | mlir/lib/Dialect/SCF/Utils/AffineCanonicalizationUtils.cpp (diff) |
Commit
d0907ce7ed9f159562ca3f4cfd8d87e89e93febe
by flo[LoopUnroll] Directly update DT instead of DTU.
The scope of DT updates are very limited when unrolling loops: the DT should only need updating for * new blocks added * exiting blocks we simplified branches
This can be done manually without too much extra work. MergeBlockIntoPredecessor also needs to be updated to support direct DT updates.
This fixes excessive time spent in DTU for same cases. In an internal example, time spent in LoopUnroll with this patch goes from ~200s to 2s.
It also is slightly positive for CTMark: * NewPM-O3: -0.13% * NewPM-ReleaseThinLTO: -0.11% * NewPM-ReleaseLTO-g: -0.13%
Notable improvements are mafft (~ -0.50%) and lencod (~ -0.30%), with no workload regressed.
https://llvm-compile-time-tracker.com/compare.php?from=78a9ee7834331fb4360457cc565fa36f5452f7e0&to=687e08d011b0dc6d3edd223612761e44225c7537&stat=instructions:u
Reviewed By: kuhar
Differential Revision: https://reviews.llvm.org/D141487
|
 | llvm/lib/Transforms/Utils/BasicBlockUtils.cpp (diff) |
 | llvm/lib/Transforms/Utils/LoopUnroll.cpp (diff) |
 | llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h (diff) |
Commit
b5d9f00b2096290653fcb6e8de38d5c352af63a0
by erich.keaneForbid implicit conversion of constraint expression to bool
As reported in https://github.com/llvm/llvm-project/issues/54524, and later in https://github.com/llvm/llvm-project/issues/60038, we were not properly implmenting temp.constr.atomic P3. This patch stops implicitly converting constraints to bool, and ensures the Rvalue conversion takes place as needed.
Differential Revision: https://reviews.llvm.org/D141954
|
 | clang/docs/ReleaseNotes.rst (diff) |
 | clang/lib/Sema/SemaConcept.cpp (diff) |
 | clang/test/CXX/temp/temp.constr/temp.constr.atomic/constrant-satisfaction-conversions.cpp |
|
 | mlir/lib/Dialect/SCF/IR/SCF.cpp (diff) |
 | mlir/include/mlir/Dialect/SCF/IR/SCF.h (diff) |
 | utils/bazel/llvm-project-overlay/mlir/BUILD.bazel (diff) |
 | mlir/include/mlir/Dialect/SCF/IR/SCFOps.td (diff) |
Commit
1f3f3c0ea724335e7eb518a8fe30990c9245875b
by aeubanksRevert "Reland [pgo] Avoid introducing relocations by using private alias"
This reverts commit da5a8d14b8cc6cea16ee0929413c0672b47c93d9.
Causes more duplicate symbol errors, see https://bugs.chromium.org/p/chromium/issues/detail?id=1408161.
|
 | llvm/test/Transforms/PGOProfile/profdata_priv_alias.ll |
 | compiler-rt/test/profile/instrprof-discarded-comdat.cpp |
 | llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp (diff) |
 | llvm/test/Transforms/PGOProfile/comdat.ll (diff) |
Commit
117ecdd5789e6efd28505a8b84680020fd935cd1
by gulfem[IRLinker] Replace CallInstr with CallBase
This patch replaces CallInstr with CallBase to cover InvokeInstr besides CallInstr while removing nocallback attribute on a call site. It also extends drop-attribute.ll test to include a case for an invoke instruction.
Differential Revision: https://reviews.llvm.org/D141740
|
 | llvm/lib/Linker/IRMover.cpp (diff) |
 | llvm/test/Linker/drop-attribute.ll (diff) |
Commit
9f59affa244c1b15d9980c9abcaff433514a9d85
by Krzysztof.DrewniakRevert "[mlir][Index] Implement InferIntRangeInterface"
This reverts commit 455305624884cf9237143e2ba0635fcc5ba5206a.
Linker error, unbreak build while I work out how to fix it.
Differential Revision: https://reviews.llvm.org/D142142
|
 | mlir/lib/Dialect/Arith/IR/CMakeLists.txt (diff) |
 | mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp |
 | mlir/lib/Dialect/Index/IR/CMakeLists.txt (diff) |
 | mlir/include/mlir/Dialect/Index/IR/IndexOps.h (diff) |
 | mlir/test/Dialect/Index/int-range-inference.mlir |
 | mlir/lib/Dialect/Index/IR/InferIntRangeInterfaceImpls.cpp |
 | mlir/include/mlir/Interfaces/Utils/InferIntRangeCommon.h |
 | mlir/lib/Interfaces/Utils/CMakeLists.txt |
 | mlir/lib/Dialect/Arith/IR/InferIntRangeInterfaceImpls.cpp (diff) |
 | mlir/include/mlir/Dialect/Index/IR/IndexOps.td (diff) |
 | mlir/lib/Interfaces/CMakeLists.txt (diff) |
Commit
bec49b1d803ced901e14aca154ffc106939100e5
by jhuber6[LinkerWrapper] Use `clang` to perform the device linking
Right now in the linker wrapper we manually invoke a lot of the toolchain programs. This reproduces a lot of logic that is already handled in clang. Since D140158 we can now target all supported toolchains directly via cross-compilation.
This patch changes the linker wrapper to consolidate all the alternate linking and assembler steps into a generic call to `clang` and let clang handle the argument handling. This heavily simplifies the interface.
Reviewed By: tra, JonChesterfield
Differential Revision: https://reviews.llvm.org/D142133
|
 | clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp (diff) |
 | clang/test/Driver/linker-wrapper.c (diff) |
|
 | clang/tools/amdgpu-arch/AMDGPUArch.cpp (diff) |
 | clang/tools/nvptx-arch/NVPTXArch.cpp (diff) |
Commit
e7f080b3598d7d73456954554d173146b2744953
by Stanislav.Mekhanoshin[AMDGPU] Introduce separate register limit bias in scheduler
Current implementation abuses ErrorMargin to apply an additional bias to VGPR and SGPR limits under a high register pressure. The ErrorMargin exists to account for inaccuracies of the RP tracker and not to tackle an excess pressure. Introduce separate bias for this purpose and also make it different for SGPRs and VGPRs as we may want to use different values in the future.
This is supposed to be NFC, however there is a subtle difference when subtracting a margin overflows the limit. Doing two subtractions makes it less probable, although manifests only in mir tests with an artificially small register budget.
Differential Revision: https://reviews.llvm.org/D142051
|
 | llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll (diff) |
 | llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp (diff) |
 | llvm/lib/Target/AMDGPU/GCNSchedStrategy.h (diff) |
 | llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll (diff) |
|
 | llvm/lib/Target/AMDGPU/SIInstrInfo.h (diff) |
 | llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp (diff) |
 | llvm/include/llvm/IR/IntrinsicsAMDGPU.td (diff) |
 | llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx11.ll |
Commit
c90801457f7cbbaee97821a06a893f4146ab1b2e
by nikolasklauser[libc++] Refactor deque::iterator algorithm optimizations
This has multiple benefits: - The optimizations are also performed for the `ranges::` versions of the algorithms - Code duplication is reduced - it is simpler to add this optimization for other segmented iterators, like `ranges::join_view::iterator` - Algorithm code is removed from `<deque>`
Reviewed By: ldionne, huixie90, #libc
Spies: mstorsjo, sstefan1, EricWF, libcxx-commits, mgorny
Differential Revision: https://reviews.llvm.org/D132505
|
 | libcxx/docs/ReleaseNotes.rst (diff) |
 | libcxx/include/CMakeLists.txt (diff) |
 | libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/ranges.copy.segmented.pass.cpp |
 | libcxx/benchmarks/CMakeLists.txt (diff) |
 | libcxx/include/__algorithm/move_backward.h (diff) |
 | libcxx/test/libcxx/private_headers.verify.cpp (diff) |
 | libcxx/include/__algorithm/copy_backward.h (diff) |
 | libcxx/include/__iterator/reverse_iterator.h (diff) |
 | libcxx/test/libcxx/algorithms/specialized.algorithms/special.mem.concepts/nothrow_forward_range.compile.pass.cpp (diff) |
 | libcxx/include/module.modulemap.in (diff) |
 | libcxx/benchmarks/deque_iterator.bench.cpp |
 | libcxx/include/deque (diff) |
 | libcxx/test/std/algorithms/alg.modifying.operations/alg.move/ranges.move_backward.pass.cpp (diff) |
 | libcxx/include/__algorithm/move.h (diff) |
 | libcxx/include/__algorithm/copy.h (diff) |
 | libcxx/include/__iterator/segmented_iterator.h |
 | libcxx/test/support/test_iterators.h (diff) |
 | libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/ranges.copy.pass.cpp (diff) |
 | libcxx/test/libcxx/algorithms/specialized.algorithms/special.mem.concepts/nothrow_forward_iterator.compile.pass.cpp (diff) |
 | libcxx/test/std/algorithms/alg.modifying.operations/alg.move/ranges.move.pass.cpp (diff) |
 | libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/ranges.copy_backward.pass.cpp (diff) |
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn (diff) |
|
 | utils/bazel/llvm-project-overlay/mlir/BUILD.bazel (diff) |
|
 | llvm/test/Transforms/InstSimplify/ctpop-pow2.ll |
Commit
78f29acae6dc159660753ac91faefa390e2bad93
by goldstein.w.nAdd transform ctpop(X) -> 1 iff X is non-zero power of 2
Definitionally a non-zero power of 2 will only have 1 bit set so this is a freebee.
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D141990
|
 | llvm/test/Transforms/InstSimplify/ctpop-pow2.ll (diff) |
 | llvm/lib/Analysis/InstructionSimplify.cpp (diff) |
|
 | llvm/lib/Target/X86/X86.td (diff) |
Commit
176a0827de42f123436c8ab850ef009f9339b7b6
by aeubanks[opt] Fix static code analysis concerns
This is an issue reported inside the NewPMDriver module. Static analyzer reported that Null pointer 'P' may be dereferenced at line 371 and two more sites. Proposed change guards this use.
Reviewed By: aeubanks
Differential Revision: https://reviews.llvm.org/D142047
|
 | llvm/tools/opt/NewPMDriver.cpp (diff) |
|
 | mlir/lib/Dialect/SCF/IR/SCF.cpp (diff) |
Commit
af5fc4b4d827ab00e20323b6025b458edca46906
by koraq[libc++][format] range-default-formatter for map
Implements the range-default-formatter specialization range_format::map.
Implements parts of - P2286R8 Formatting Ranges - P2585R0 Improving default container formatting
Depends on D140653
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D140801
|
 | libcxx/docs/Status/FormatPaper.csv (diff) |
 | libcxx/test/std/utilities/format/format.tuple/parse.pass.cpp (diff) |
 | libcxx/test/std/utilities/format/format.tuple/set_brackets.pass.cpp (diff) |
 | libcxx/test/std/utilities/format/format.range/format.range.fmtmap/parse.pass.cpp |
 | libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.format.pass.cpp |
 | libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.tests.h |
 | libcxx/test/std/containers/container.adaptors/container.adaptors.format/parse.pass.cpp (diff) |
 | libcxx/test/std/containers/sequences/vector.bool/vector.bool.fmt/format.pass.cpp (diff) |
 | libcxx/test/std/containers/sequences/vector.bool/vector.bool.fmt/parse.pass.cpp (diff) |
 | libcxx/test/std/utilities/format/format.tuple/set_separator.pass.cpp (diff) |
 | libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp (diff) |
 | libcxx/include/__format/range_formatter.h (diff) |
 | libcxx/test/support/format.functions.common.h (diff) |
 | libcxx/include/__format/range_default_formatter.h (diff) |
 | libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.pass.cpp |
 | libcxx/test/std/containers/container.adaptors/container.adaptors.format/format.pass.cpp (diff) |
 | libcxx/test/std/utilities/format/format.range/format.range.fmtmap/format.functions.vformat.pass.cpp |
 | libcxx/test/std/utilities/format/format.tuple/format.pass.cpp (diff) |
Commit
887240faf769395511d1568b4e50aafc6fe3b696
by jinghamRemove the undocumented `help` subcommand.
This is processed by hand in CommandObjectMultiword, and is undiscoverable, it doesn't work in all cases. Because it is a bare word, it can't really be extended w/o introducing the possibility of collisions as well. If we did want to do something like this we should add a --help flag to CommandObject. That way the feature would be consistent and documented.
Differential Revision: https://reviews.llvm.org/D142067
|
 | lldb/source/Commands/CommandObjectMultiword.cpp (diff) |
 | lldb/test/API/functionalities/multiword-commands/TestMultiWordCommands.py (diff) |
Commit
af9a452e57554c2c5e876986e33c2a75314259e8
by paulkirth[llvm][codegen] Fix non-determinism in StackFrameLayoutAnalysisPass output
We were iterating over a SmallPtrSet when outputting slot variables. This is still correct but made the test fail under reverse iteration. This patch replaces the SmallPtrSet with a SmallVector.
Also remove the "Stack Frame Layout" lines from arm64-opt-remarks-lazy-bfi test, since those also break under reverse iteration.
Reviewed By: nickdesaulniers
Differential Revision: https://reviews.llvm.org/D142127
|
 | llvm/lib/CodeGen/StackFrameLayoutAnalysisPass.cpp (diff) |
 | llvm/test/CodeGen/AArch64/arm64-opt-remarks-lazy-bfi.ll (diff) |
|
 | utils/bazel/llvm-project-overlay/mlir/BUILD.bazel (diff) |
|
 | mlir/test/Conversion/VectorToGPU/vector-to-mma-ops-mma-sync.mlir (diff) |
 | mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp (diff) |
Commit
3a362a9f38b95978160377ee408dbc7d14af9aad
by jonathan.l.peyton[OpenMP][libomp] Insert correct HWLOC version guards
Put needed HWLOC version guards around relevant HWLOC API. Tested OpenMP host runtime build with HWLOC 1.11.13, 2.0-2.9.
Differential Revision: https://reviews.llvm.org/D142152 Fix #54951
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 | openmp/runtime/src/kmp_affinity.cpp (diff) |
Commit
e2c43a547b311725067e7b56ae935e940e6fc1c3
by flo[VPlan] Add vp_depth_first_deep (NFC)
Similar to vp_depth_first_shallow (D140512) add vp_depth_first_deep to make existing code clearer and more compact.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D142055
|
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp (diff) |
 | llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp (diff) |
 | llvm/lib/Transforms/Vectorize/VPlan.cpp (diff) |
 | llvm/lib/Transforms/Vectorize/VPlanCFG.h (diff) |
 | llvm/unittests/Transforms/Vectorize/VPlanTest.cpp (diff) |
 | llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp (diff) |
Commit
31b0be4eba9e8e9244799f0ebcb18175faff69ab
by ashaposhnikov[Clang] Add lifetimebound attribute to std::move/std::forward
Clang now automatically adds [[clang::lifetimebound]] to the parameters of std::move, std::forward et al, this enables Clang to diagnose more cases where the returned reference outlives the object. Associated GitHub issue: https://github.com/llvm/llvm-project/issues/60020
Test plan: ninja check-clang check-all
Differential revision: https://reviews.llvm.org/D141744
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 | clang/test/SemaCXX/builtin-std-move.cpp (diff) |
 | clang/docs/LanguageExtensions.rst (diff) |
 | clang/docs/ReleaseNotes.rst (diff) |
 | clang/lib/Sema/SemaDecl.cpp (diff) |
 | clang/test/SemaCXX/attr-lifetimebound.cpp (diff) |
 | clang/test/SemaCXX/builtins.cpp (diff) |
|
 | llvm/utils/lit/tests/Inputs/shtest-format/unsupported-expr-true.txt (diff) |
 | llvm/utils/lit/tests/Inputs/shtest-format/xpass.txt (diff) |
 | llvm/utils/lit/tests/Inputs/shtest-format/xfail-expr-false.txt (diff) |
 | llvm/utils/lit/lit/Test.py (diff) |
 | llvm/utils/lit/lit/BooleanExpression.py (diff) |
 | llvm/utils/lit/tests/Inputs/shtest-format/xfail-expr-true.txt (diff) |
 | llvm/docs/ReleaseNotes.rst (diff) |
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 | openmp/libomptarget/DeviceRTL/CMakeLists.txt (diff) |
Commit
9bdcf8778a5c6f57e6d05308e9dde655bba97698
by a.bataev[SLP]Improve isGatherShuffledEntry by looking deeper through the reused scalars.
The compiler may produce better results if it does not look for constants, uses an extra analysis of phi nodes, looks through all tree nodes without skipping the cases, where the very first set of nodes is empty. Also, it tries to reshufle the nodes if it is profitable for sure, i.e. at least 2 scalars are used for single node permutation and at least 3 scalars are used for the permutation of 2 nodes.
Part of D110978
Differential Revision: https://reviews.llvm.org/D141512
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 | llvm/test/Transforms/SLPVectorizer/X86/crash_netbsd_decompress.ll (diff) |
 | llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll (diff) |
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp (diff) |
 | llvm/test/Transforms/SLPVectorizer/AArch64/horizontal.ll (diff) |
Commit
160bc160b9b114069a8cb9b4cc887aa86e5ca7c4
by vsapsai[ODRHash] Hash `RecordDecl` and diagnose discovered mismatches.
When two modules contain struct/union with the same name, check the definitions are equivalent and diagnose if they are not. This is similar to `CXXRecordDecl` where we already discover and diagnose mismatches.
rdar://problem/56764293
Differential Revision: https://reviews.llvm.org/D71734
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 | clang/include/clang/Serialization/ASTReader.h (diff) |
 | clang/include/clang/AST/ODRDiagsEmitter.h (diff) |
 | clang/include/clang/AST/Decl.h (diff) |
 | clang/include/clang/AST/ODRHash.h (diff) |
 | clang/lib/AST/Decl.cpp (diff) |
 | clang/lib/Serialization/ASTReaderDecl.cpp (diff) |
 | clang/lib/AST/ODRHash.cpp (diff) |
 | clang/include/clang/AST/DeclBase.h (diff) |
 | clang/lib/AST/ODRDiagsEmitter.cpp (diff) |
 | clang/lib/Serialization/ASTReader.cpp (diff) |
 | clang/docs/ReleaseNotes.rst (diff) |
 | clang/test/Modules/compare-record.c |
 | clang/lib/Serialization/ASTWriterDecl.cpp (diff) |
Commit
f33b5b1bf703ee5ff73126fefe2a9bcbd54db457
by vsapsai[ODRHash] Detect mismatches in anonymous `RecordDecl`.
Allow completing a redeclaration check for anonymous structs/unions inside `RecordDecl`, so we deserialize and compare anonymous entities from different modules.
Completing the redeclaration chain for `RecordDecl` in `ASTContext::getASTRecordLayout` mimics the behavior in `CXXRecordDecl::dataPtr`. Instead of completing the redeclaration chain every time we request a definition, do that right before we need a complete definition in `ASTContext::getASTRecordLayout`.
Such code is required only for anonymous `RecordDecl` because we deserialize named decls when we look them up by name. But it doesn't work for anonymous decls as they don't have a name. That's why need to force deserialization of anonymous decls in a different way.
rdar://81864186
Differential Revision: https://reviews.llvm.org/D140055
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 | clang/test/Modules/compare-record.c (diff) |
 | clang/lib/Serialization/ASTReader.cpp (diff) |
 | clang/lib/AST/RecordLayoutBuilder.cpp (diff) |
Commit
cf12709222a4699ff5a4bb257cb891b55b5f6fba
by Fred RissRevert "[Clang] Give Clang the ability to use a shared stat cache"
This reverts commit c5abe893120b115907376359a5809229a9f9608a. This reverts commit a033dbbe5c43247b60869b008e67ed86ed230eaa.
This broke the build with -DLLVM_LINK_LLVM_DYLIB=ON. Reverting while I investigate.
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 | clang/test/Driver/vfsstatcache.c |
 | clang/lib/Frontend/CompilerInvocation.cpp (diff) |
 | llvm/include/llvm/Support/StatCacheFileSystem.h |
 | llvm/lib/Support/CMakeLists.txt (diff) |
 | llvm/lib/Support/StatCacheFileSystem.cpp |
 | clang/include/clang/Driver/Options.td (diff) |
 | clang/test/clang-stat-cache/errors.test |
 | clang/tools/clang-stat-cache/CMakeLists.txt |
 | clang/include/clang/Frontend/CompilerInvocation.h (diff) |
 | clang/test/CMakeLists.txt (diff) |
 | clang/include/clang/Lex/HeaderSearchOptions.h (diff) |
 | clang/tools/CMakeLists.txt (diff) |
 | clang/lib/Frontend/ASTUnit.cpp (diff) |
 | clang/test/clang-stat-cache/cache-effects.c |
 | clang/include/clang/Basic/DiagnosticFrontendKinds.td (diff) |
 | llvm/unittests/Support/VirtualFileSystemTest.cpp (diff) |
 | clang/tools/clang-stat-cache/clang-stat-cache.cpp |
Commit
bd3ee371e9f0b09d2315701399e48be27844feec
by eugenisRevert "[AArch64][v8.3A] Avoid inserting implicit landing pads (PACI*SP)"
Linux kernel sets SCTRL_EL1.BT0 and BT1 to 1 unconditionally, which makes PACIASP equivalent to BTI C + PACIA LR,SP.
Use the shorter instruction sequence by default.
I'm not aware of anyone who needs the opposite. They are welcome to revert to the current behavior under a subtarget feature or an environment check.
This reverts commit 571c8c5263a79293aaadae07b11feb36726eaf53.
Differential Revision: https://reviews.llvm.org/D141978
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 | llvm/test/CodeGen/AArch64/sign-return-address.ll (diff) |
 | llvm/test/CodeGen/AArch64/aarch64-signedreturnaddress.ll (diff) |
 | llvm/test/CodeGen/AArch64/pacbti-module-attrs.ll (diff) |
 | llvm/lib/Target/AArch64/AArch64InstrInfo.cpp (diff) |
 | llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.ll (diff) |
 | llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll (diff) |
 | llvm/test/CodeGen/AArch64/wineh-pac.ll (diff) |
 | llvm/lib/Target/AArch64/AArch64FrameLowering.cpp (diff) |
 | llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-v8-3.ll (diff) |
 | llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll (diff) |
 | llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll (diff) |
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 | llvm/lib/Option/OptTable.cpp (diff) |
 | llvm/include/llvm/Option/OptTable.h (diff) |
Commit
6b43568ff83f70cee9fd920f1781526f5b595de5
by gcmn[Bazel] Fix layering issues
These are caught by clang-16, which we're using in our project.
Reviewed By: rupprecht
Differential Revision: https://reviews.llvm.org/D142158
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 | utils/bazel/llvm-project-overlay/lld/BUILD.bazel (diff) |
 | utils/bazel/llvm-project-overlay/llvm/BUILD.bazel (diff) |
Commit
1f08d3bc3a9a018534e52a47027dfb05cb4f55b3
by jeffrey.byrnes[AMDGPU] Further reduce attaching of implicit operands to spills
Extension of https://reviews.llvm.org/D141101 to even further reduce the amount of implicit operands we attach. The main benefit is to improve cability of post-ra scheduler, and reduce unneeded dependency resolution (e.g. inserting snops).
Unfortunately, we run into regressions if we completely minimize the amount implicit operands (naively), we run into some regressions (e.g. dual_movs are replaced with multiple calls to v_mov). This is even more reason to switch to LiveRegUnits.
Nonetheless, this patch removes the operands which we can for free (more or less).
Change-Id: Ib4f409202b36bdbc59eed615bc2d19fa8bd8c057
Differential Revision: https://reviews.llvm.org/D141557
Change-Id: I8b039e3c0d39436b384083f8beb947ee1b1730b2
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 | llvm/test/CodeGen/AMDGPU/spill352.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/pei-build-spill.mir (diff) |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp (diff) |
 | llvm/test/CodeGen/AMDGPU/spill192.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/spill384.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/spill224.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/sgpr-spill.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/vgpr-spill.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll (diff) |
 | llvm/test/CodeGen/AMDGPU/spill288.mir (diff) |
 | llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp (diff) |
 | llvm/test/CodeGen/AMDGPU/spill320.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll (diff) |
Commit
32c26e27b6fcd12703dcd00adf178330d0ad8449
by dcastagnaCUDA/HIP: Use kernel name to map to symbol
Currently CGCUDANV uses an llvm::Function as a key to map kernels to a symbol in host code. HIP adds one level of indirection and uses the llvm::Function to map to a global variable that will be initialized to the kernel stub ptr.
Unfortunately there is no garantee that the llvm::Function created by GetOrCreateLLVMFunction will be the same. In fact, the first time we encounter GetOrCrateLLVMFunction for a kernel, the type might not be completed yet, and the type of llvm::Function will be a generic {}, since the complete type is not required to get a symbol to a function. In this case we end up creating two global variables, one for the llvm::Function with the incomplete type and one for the function with the complete type. The first global variable will be declared by not defined, resulting in a linking error.
This change uses the mangled name of the llvm::Function as key in the KernelHandles map, in this way the same llvm::Function will be associated to the same kernel handle even if they types are different.
Reviewed By: yaxunl
Differential Revision: https://reviews.llvm.org/D140663
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 | clang/lib/CodeGen/CGCUDANV.cpp (diff) |
 | clang/test/CodeGenCUDA/incomplete-func-ptr-type.cu |
Commit
4626bd0b91102af234125f7f8ff0daaffb7a1fa4
by diegocaballero[mlir][vector] Disable folding for masked reductions
Reductions can't be folded into plain arith ops until we can mask those arith ops.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D141645
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 | mlir/test/Dialect/Vector/canonicalize.mlir (diff) |
 | mlir/lib/Dialect/Vector/IR/VectorOps.cpp (diff) |
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 | clang/lib/Lex/Lexer.cpp (diff) |
 | clang/test/ClangScanDeps/depscan-lex-has-include.c |
Commit
d5cbaa047004335a29dc3bcaf6aaa1c26fc27f36
by benny.kra[Linalg] Don't create complex vectors when vectorizing copies
vector<complex<...>> is currently not valid. This is a reduced version of https://reviews.llvm.org/D141578
Differential Revision: https://reviews.llvm.org/D142131
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 | mlir/test/Dialect/Linalg/vectorization.mlir (diff) |
 | mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp (diff) |
Commit
c5ea42bcf48c8f3d3e35a6bff620b06d2a499108
by aeubanksRevert "[LoopUnroll] Directly update DT instead of DTU."
This reverts commit d0907ce7ed9f159562ca3f4cfd8d87e89e93febe.
Causes `opt -passes=loop-unroll-full` to crash on
``` define void @foo() { bb: br label %bb1
bb1: ; preds = %bb1, %bb1, %bb switch i1 true, label %bb1 [ i1 true, label %bb2 i1 false, label %bb1 ]
bb2: ; preds = %bb1 ret void } ```
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 | llvm/lib/Transforms/Utils/LoopUnroll.cpp (diff) |
 | llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h (diff) |
 | llvm/lib/Transforms/Utils/BasicBlockUtils.cpp (diff) |
Commit
a5f446bc4bb1ac78d6852cc8e251a1229899b783
by thakisRevert "[clang][Darwin] Try to guess the SDK root with xcrun when unspecified"
This reverts commit ecade80d93960ad01d8665db02c23841e055a80f. Breaks tests on macOS and tries to run xcrun on non-mac platforms, see comments on https://reviews.llvm.org/D136315
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 | clang/test/Driver/darwin-sdk-detect.c |
 | clang/lib/Driver/ToolChains/Darwin.cpp (diff) |
 | clang/docs/UsersManual.rst (diff) |
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 | llvm/utils/gn/secondary/clang/test/BUILD.gn (diff) |
 | llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn (diff) |
 | llvm/utils/gn/secondary/clang/tools/clang-stat-cache/BUILD.gn |
|
 | lldb/test/Shell/Register/x86-64-zmm-write.test (diff) |
 | lldb/test/Shell/Register/x86-64-ymm-write.test (diff) |
|
 | llvm/tools/llvm-reduce/deltas/ReduceDIMetadata.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceGlobalVars.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceFunctionBodies.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceInstructions.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceOperandsToArgs.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/RunIRPasses.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceAliases.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceModuleData.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceAttributes.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceInvokes.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceBasicBlocks.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceGlobalVarInitializers.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceUsingSimplifyCFG.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceOperands.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceArguments.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceSpecialGlobals.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceInstructionFlags.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/StripDebugInfo.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceFunctions.cpp (diff) |
 | llvm/tools/llvm-reduce/TestRunner.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceMemoryOperations.cpp (diff) |
 | llvm/tools/llvm-reduce/ReducerWorkItem.h (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceOperandBundles.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceOperandsSkip.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceMetadata.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/SimplifyInstructions.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceGlobalValues.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceGlobalObjects.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceOpcodes.cpp (diff) |
|
 | llvm/tools/llvm-reduce/ReducerWorkItem.cpp (diff) |
|
 | llvm/tools/llvm-reduce/ReducerWorkItem.cpp (diff) |
|
 | llvm/tools/llvm-reduce/TestRunner.cpp (diff) |
|
 | llvm/tools/llvm-reduce/deltas/Delta.cpp (diff) |
|
 | mlir/lib/Target/LLVMIR/DebugTranslation.h (diff) |
 | mlir/lib/Target/LLVMIR/DebugTranslation.cpp (diff) |
 | mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp (diff) |
 | mlir/include/mlir/Dialect/LLVMIR/LLVMAttrs.h (diff) |
Commit
c919ea5b486041021a48b487145120fe0bcb70a8
by powerman1st[AVR] Fix incorrectly printed global symbol operands in inline-asm
Fixes https://github.com/llvm/llvm-project/issues/58879
Reviewed By: aykevl
Differential Revision: https://reviews.llvm.org/D142096
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 | llvm/lib/Target/AVR/AVRAsmPrinter.cpp (diff) |
 | llvm/test/CodeGen/AVR/inline-asm/inline-asm3.ll (diff) |
|
 | llvm/tools/llvm-reduce/deltas/ReduceDIMetadata.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceRegisterMasks.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceRegisterUses.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceInstructionsMIR.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceMemoryOperations.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceRegisterDefs.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceInstructionFlags.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceInvokes.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceInstructionFlagsMIR.cpp (diff) |
 | llvm/tools/llvm-reduce/DeltaManager.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceOpcodes.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceIRReferences.cpp (diff) |
 | llvm/tools/llvm-reduce/ReducerWorkItem.cpp (diff) |
 | llvm/tools/llvm-reduce/deltas/ReduceVirtualRegisters.cpp (diff) |
 | llvm/tools/llvm-reduce/llvm-reduce.cpp (diff) |
 | llvm/tools/llvm-reduce/ReducerWorkItem.h (diff) |
Commit
3ac4299d3798eb7078905d5fc8f23781556c90a1
by cmagahern[clang] Don't short-circuit constant evaluation for array or record types
FastEvaluateAsRValue returns `true` without setting a result value for when a given constant expression is an array or record type.
Clang attributes must be able to support constant expressions that are array or record types, so proceed with the slower path for evaluation in the case where `FastEvaluateAsRValue` does not yield an evaluation result.
Differential Revision: https://reviews.llvm.org/D141745
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 | clang/lib/AST/ExprConstant.cpp (diff) |
 | clang/test/CodeGen/2007-06-15-AnnotateAttribute.c (diff) |
|
 | clang/test/Driver/clang-offload-bundler.c (diff) |
 | clang/lib/Driver/OffloadBundler.cpp (diff) |
Commit
9c2cfaaada66f323d10e25ac961ce1524d7b5f1f
by i[Clang][OpenMP] Allow `f16` literal suffix when compiling OpenMP target offloading for NVPTX
Fix #58087.
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D142075
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 | clang/lib/Lex/LiteralSupport.cpp (diff) |
 | clang/test/OpenMP/float16_sema.cpp |
Commit
6c485409de521565aeac427cf614158b86cc7fea
by Vitaly BukaAdding missing colon
Simple typo fix. The absence of this colon may be confusing and result in misinterpretation of the result.
In normal libfuzzer mode, that colon is present.
You can compare with: https://github.com/llvm/llvm-project/blob/aa0e9046c16bf27a8affbd903e2e3cad924a5217/compiler-rt/lib/fuzzer/FuzzerLoop.cpp#L356
Reviewed By: #sanitizers, vitalybuka
Differential Revision: https://reviews.llvm.org/D142171
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 | compiler-rt/lib/fuzzer/FuzzerFork.cpp (diff) |
|
 | libcxx/test/std/ranges/range.adaptors/range.as.rvalue/begin.pass.cpp |
 | libcxx/include/__iterator/move_sentinel.h (diff) |
 | libcxx/test/std/ranges/range.adaptors/range.as.rvalue/ctor.pass.cpp |
 | libcxx/test/std/ranges/range.adaptors/range.as.rvalue/adaptor.pass.cpp |
 | libcxx/test/libcxx/diagnostics/view_adaptors.nodiscard_extensions.verify.cpp |
 | libcxx/test/std/ranges/range.adaptors/range.as.rvalue/enable_borrowed_range.compile.pass.cpp |
 | libcxx/test/std/ranges/range.adaptors/range.as.rvalue/end.pass.cpp |
 | libcxx/include/__ranges/as_rvalue_view.h |
 | libcxx/include/ranges (diff) |
 | libcxx/test/support/test_iterators.h (diff) |
 | libcxx/docs/Status/Cxx2bPapers.csv (diff) |
 | libcxx/test/std/ranges/range.adaptors/range.as.rvalue/base.pass.cpp |
 | libcxx/docs/Status/RangesViews.csv (diff) |
 | libcxx/include/module.modulemap.in (diff) |
 | libcxx/test/std/ranges/range.adaptors/range.as.rvalue/size.pass.cpp |
 | libcxx/include/CMakeLists.txt (diff) |
 | libcxx/test/std/iterators/predef.iterators/move.iterators/move.sentinel/ctad.compile.pass.cpp |
 | libcxx/test/libcxx/private_headers.verify.cpp (diff) |
 | libcxx/test/std/ranges/range.adaptors/range.as.rvalue/ctad.compile.pass.cpp |
 | libcxx/docs/ReleaseNotes.rst (diff) |
Commit
e52ce7f554491d3bb7c997ffe7da3265a9569a59
by nikolasklauser[libc++] Remove old CI configurations and update the supported compiler versions
`_LIBCPP_REMOVE_TRANSITIVE_INCLUDES` doesn't do anything anymore in C++23 mode, so it's now just a duplicate of the C++23 configuration. Also add new steps to the post-release checklist for updating the supported compilers.
Reviewed By: ldionne, #libc
Spies: arichardson, libcxx-commits, arphaman
Differential Revision: https://reviews.llvm.org/D133364
|
 | libcxx/cmake/caches/Generic-no-transitive-includes.cmake |
 | libcxx/docs/Contributing.rst (diff) |
 | libcxx/utils/ci/run-buildbot (diff) |
 | libcxx/docs/index.rst (diff) |
 | libcxx/utils/ci/buildkite-pipeline.yml (diff) |
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn (diff) |
Commit
f37614b25ccaa9c0710cc8a4fc2ba2fb0fcb9159
by kazu[llvm] Move bit counting functions to bit.h (NFC)
This patch provides C++20-style countl_zero, countr_zero, countl_one, and countr_one in bit.h. Existing functions like countLeadingZeros become wrappers around the new functions.
Note that I cannot quite declare countLeadingZeros as:
template <class T> using countLeadingZeros = countl_zero<T>;
because countl_zero returns int, whereas countLeadingZeros returns unsigned.
Differential Revision: https://reviews.llvm.org/D142078
|
 | llvm/include/llvm/ADT/bit.h (diff) |
 | llvm/include/llvm/Support/MathExtras.h (diff) |
 | llvm/unittests/ADT/BitTest.cpp (diff) |
Commit
1692dff0b33c840447446064d56ad06ba694665e
by craig.topperRevert "[X86] Avoid converting u64 to f32 using x87 on Windows"
This reverts commit a6e3027db7ebe6863e44bafcfeaacc16bdc88a3f.
Chrome and Halide are both reporting issues with importing builtins.
Maybe the better direction is to manually adjust FPCW for the inline sequence on Windows.
|
 | llvm/lib/Target/X86/X86ISelLowering.cpp (diff) |
 | llvm/test/CodeGen/X86/uint64-to-float.ll (diff) |
|
 | libcxx/docs/Status/Cxx20Issues.csv (diff) |
Commit
3507df9c20a4e117a27c005d7ceb5d1468378aa2
by Lang Hames[ORC][ORC-RT] Add support for callback-based lookup of JIT'd MachO unwind info.
In LLVM the MachOPlatform class is modified to identify unwind info sections and the address ranges of the functions these sections cover. These address ranges are then communicated to the ORC runtime by attaching them to the register-object-platform-sections allocation action.
In the ORC runtime the unwind-info section addresses are recorded and used to support lookup of unwind info via the new `findDynamicUnwindSections` function. At bootstrap time the ORC runtime checks for the presence of new unwind-info-lookup-registration functions in libunwind (see https://reviews.llvm.org/D142176), and if available uses them to register the `findDynamicUnwindSections` function with libunwind to enable callback-based lookup. If the new unwind-info-lookup-registration functions are not available then the ORC runtime falls back to using the existing libunwind registration APIs.
The callback-based scheme is intended to address three shortcomings in the current registration scheme for JIT'd unwind info on Darwin: (1) Lack of compact-unwind support, (2) inability to describe the subarchitecture of JIT'd frames, and (3) lack of efficient address-based lookup data structures in libunwind.
For more details see the proposed libunwind changes in https://reviews.llvm.org/D142176.
|
 | compiler-rt/lib/orc/macho_platform.cpp (diff) |
 | llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h (diff) |
 | llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp (diff) |
|
 | llvm/include/llvm/Support/MathExtras.h (diff) |
 | llvm/include/llvm/ADT/bit.h (diff) |
|
 | libcxx/benchmarks/join_view.bench.cpp |
 | libcxx/docs/ReleaseNotes.rst (diff) |
 | libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/ranges.copy_backward.pass.cpp (diff) |
 | libcxx/include/__ranges/join_view.h (diff) |
 | libcxx/test/libcxx/iterators/iterator_with_data.pass.cpp |
 | libcxx/benchmarks/CMakeLists.txt (diff) |
 | libcxx/include/CMakeLists.txt (diff) |
 | libcxx/include/__iterator/iterator_with_data.h |
 | libcxx/test/libcxx/private_headers.verify.cpp (diff) |
 | libcxx/include/module.modulemap.in (diff) |
 | libcxx/test/std/algorithms/alg.modifying.operations/alg.copy/ranges.copy.segmented.pass.cpp (diff) |
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn (diff) |
|
 | mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp (diff) |
Commit
6b2e29c5080e3e9870d8a2151a0feaf64eb480d0
by udayNFC. Refactor affine fusion code for readability
Replace a couple of check instances with llvm::any_of (clang-tidy warnings). Factor out "canCreatePrivateMemRef" and "performFusionsIntoDest" into separate methods to reduce the length/indent of the containing methods. Add doc comments and debug messages.
Mark some of the methods that should have been const const.
NFC.
Reviewed By: vinayaka-polymage
Differential Revision: https://reviews.llvm.org/D142076
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 | mlir/lib/Dialect/Affine/Transforms/LoopFusion.cpp (diff) |
|
 | clang-tools-extra/clangd/fuzzer/CMakeLists.txt (diff) |
 | clang-tools-extra/clangd/CMakeLists.txt (diff) |
 | clang-tools-extra/clangd/unittests/CMakeLists.txt (diff) |
|
 | mlir/test/Dialect/Linalg/standard.mlir (diff) |
|
 | mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp (diff) |
 | mlir/test/Dialect/Linalg/standard.mlir (diff) |
Commit
790f237012259186ed4a767e29e85f5ba6720b59
by nicolas.vasilache[mlir][Linalg] Add a structured.pack_transpose transform op
This transform is complementary to the `structured.pack` op which allows packing a whole op but does not allow transposes on the individual operands.
`structured.pack_transpose` allows transposing single operands connected to pack or unpack ops after the fact.
This makes the system overall more composable than e.g. a giant transform op with all permutation specified at once.
Differential Revision: https://reviews.llvm.org/D142053
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 | mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp (diff) |
 | mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp (diff) |
 | mlir/lib/Dialect/Tensor/IR/TensorOps.cpp (diff) |
 | mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td (diff) |
 | mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td (diff) |
 | mlir/test/Dialect/Linalg/transform-op-pack.mlir (diff) |
 | mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td (diff) |
Commit
928a1764d6bdf84073c9d85875f45c1716d6ff12
by craig.topper[X86][WIP] Change precision control to FP80 during u64->fp32 conversion on Windows.
This is an alternative to D141074 to fix the problem by adjusting the precision control dynamically.
This isn't quite complete yet. I want to support fadd with an load folded into it too. That's the code we will usually generate.
Posting for early review so we can do some testing of this solution.
Differential Revision: https://reviews.llvm.org/D142178
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 | llvm/lib/Target/X86/X86InstrFPStack.td (diff) |
 | llvm/lib/Target/X86/X86ISelLowering.h (diff) |
 | llvm/test/CodeGen/X86/uint64-to-float.ll (diff) |
 | llvm/lib/Target/X86/X86ISelLowering.cpp (diff) |
|
 | llvm/utils/TableGen/RISCVTargetDefEmitter.cpp (diff) |
|
 | llvm/lib/Target/X86/X86ISelLowering.cpp (diff) |
 | llvm/lib/Target/X86/X86ISelLowering.h (diff) |
 | llvm/lib/Target/X86/X86InstrFPStack.td (diff) |
 | llvm/test/CodeGen/X86/uint64-to-float.ll (diff) |
|
 | llvm/docs/SecurityTransparencyReports.rst (diff) |
|
 | clang/tools/include-mapping/gen_std.py (diff) |
Commit
e1a702db2fcd1dfbfe175efe334135d184234970
by sergey.kachkov[GVN] Refactor findDominatingLoad function
Improve findDominatingLoad implementation: 1. Result is saved into gvn::AvailableValue struct 2. Search is done in extended BB (while there is a single predecessor or limit is reached)
Differential Revision: https://reviews.llvm.org/D141680
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 | llvm/test/Transforms/GVN/PRE/pre-load-through-select.ll (diff) |
 | llvm/lib/Transforms/Scalar/GVN.cpp (diff) |
Commit
08ce89d3088dc0a6dd9d3b7455222aa35894c1d5
by npopov[Flang] Explicitly include cstdint (NFC)
This header uses std::int8_t, but does not include cstdint.
This fixes the build against libstc++ 13, where some indirect header includes have been removed.
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 | flang/include/flang/Parser/characters.h (diff) |
|
 | clang/lib/AST/Interp/InterpFrame.cpp (diff) |
 | clang/lib/AST/Interp/EvalEmitter.cpp (diff) |
Commit
87e345b1bdb76867cc6e9ae59b6dd2633a480d38
by springerm[mlir] GreedyPatternRewriteDriver: Add new strict mode option
There are now three options: * `AnyOp` (previously `false`) * `ExistingAndNewOps` (previously `true`) * `ExistingOps`: this one is new.
The last option corresponds to what the `applyOpPatternsAndFold(Operation*, ...)` overload is doing. It is now also supported on the `applyOpPatternsAndFold(ArrayRef<Operation *>, ...)` overload.
Differential Revision: https://reviews.llvm.org/D141904
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 | mlir/include/mlir/Transforms/GreedyPatternRewriteDriver.h (diff) |
 | mlir/lib/Dialect/Affine/Transforms/AffineDataCopyGeneration.cpp (diff) |
 | mlir/test/lib/Dialect/Affine/TestAffineDataCopy.cpp (diff) |
 | mlir/lib/Transforms/Utils/GreedyPatternRewriteDriver.cpp (diff) |
 | mlir/lib/Dialect/Affine/Transforms/SimplifyAffineStructures.cpp (diff) |
 | mlir/test/lib/Dialect/Test/TestPatterns.cpp (diff) |
 | mlir/lib/Dialect/Affine/TransformOps/AffineTransformOps.cpp (diff) |
 | mlir/test/Transforms/test-strict-pattern-driver.mlir (diff) |
Commit
ea4fd668c2cd88d13b36a5d64e3dedb1106340bc
by v1nh1shungry[clang] fix crash on generic lambda with lambda in decltype
Relevant issue: https://github.com/llvm/llvm-project/issues/59771
During the instantiation of a generic lambda, a non-generic lambda in the trailing `decltype` is a `DeclContext` but not a dependent context, so we shouldn't call `PerformDependentDiagnostics` on it.
Differential Revision: https://reviews.llvm.org/D140838
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 | clang/lib/Sema/SemaTemplateInstantiate.cpp (diff) |
 | clang/test/SemaCXX/lambda-unevaluated.cpp (diff) |
|
 | openmp/libomptarget/include/Debug.h (diff) |
|
 | llvm/unittests/Transforms/Vectorize/CMakeLists.txt (diff) |
 | llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp |
|
 | llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/BUILD.gn (diff) |
|
 | utils/bazel/llvm-project-overlay/mlir/BUILD.bazel (diff) |
Commit
b3bb4dd3481bac6f6b0df706db2150dd260d0737
by jperier[flang][hlfir] Lower pointer and allocatable sub-part references
The previous patches dealt with allocatable and pointer symbol and component whole references. This one deals with the remaining sub-part case where a dereference must be created before applying the sub-part reference on the target.
With this patch the support to designate allocatable and pointer in HLFIR is complete, but some use points will need to be updated to use HLFIR designator lowering (at least allocate/deallocate statement and whole allocatable assignment).
The partInfo.base had to be turned into an std::optional<hlfir::Entity> because loads of allocatable/pointers do create a fir::FortranVariableOpInterface (there is no need to). The optional part comes from the fact that the partInfo.base is not set when creating the partInfo, but later when visiting the designator parts.
They are three cases when dereferences must be inserted: - The pointer/allocatable is a symbol followed by a sub-part that is not a component ref. This is done in visit(Symbol). - The pointer/allocatable is a component followed by a sub-part that is not another component ref. This is done in visit(Component). - The pointer/allocatable is followed by a component ref. This case is special since it does not call the above "visit" but instead calls "gen" to break the visit and generate an hlfir.designate for the component base (since one hlfir.designate can only represent one Fortran part-ref, and must be chained to implement a Fortran designator with several part refs). This is done in visitComponentImpl().
Differential Revision: https://reviews.llvm.org/D142124
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 | flang/lib/Lower/ConvertExprToHLFIR.cpp (diff) |
 | flang/include/flang/Optimizer/Builder/HLFIRTools.h (diff) |
 | flang/test/Lower/HLFIR/allocatable-and-pointer-subparts.f90 |
Commit
ed9ef9b4f248c62022bb1bebe5e2597cb4f9d209
by elvertsan: Consider SI_TIMER signals always asynchronous
POSIX timer can be configured to send any kind of signal, however, it fundamentally does not make sense to consider a timer a synchronous signal. Teach TSan that timers are never synchronous.
The tricky bit here is correctly defining compiler-rt's siginfo replacement, which is a rather complex struct. Extend it in a limited way that is mostly cross-platform compatible and add offset tests in sanitizer_platform_limits_posix.cpp.
Reviewed By: dvyukov
Differential Revision: https://reviews.llvm.org/D142117
|
 | compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp (diff) |
 | compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp (diff) |
 | compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h (diff) |
|
 | llvm/test/Transforms/InstCombine/replace-alloca-phi.ll |
 | llvm/test/Transforms/InstCombine/ptr-replace-alloca.ll |
|
 | llvm/docs/ReleaseNotes.rst (diff) |
Commit
36663626ee336905745cb1c259b3b65c9ff656bf
by guray.ozen[mlir][nvvm] Introduce redux op
Ptx model has `redux.sync` that performs reduction operation on the data from each predicated active thread in the thread group. It only is available sm80+.
This revision adds redux as on op to nvvm dialect.
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D142088
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 | mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp (diff) |
 | mlir/test/Dialect/LLVMIR/nvvm.mlir (diff) |
 | mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td (diff) |
Commit
cfd3a0e04ad60c72dda79d407a78f4fff0bdad6d
by kerry.mclaughlin[AArch64][SME2] Add multi-vector fused multiply-add/subtract intrinsics
Adds intrinsics for the following: - fmla (single, multi & indexed) - fmls (single, multi & indexed)
NOTE: These intrinsics are still in development and are subject to future changes.
Reviewed By: CarolineConcatto
Differential Revision: https://reviews.llvm.org/D141946
|
 | llvm/include/llvm/IR/IntrinsicsAArch64.td (diff) |
 | llvm/test/CodeGen/AArch64/sme2-intrinsics-fmlas.ll |
 | llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td (diff) |
 | llvm/lib/Target/AArch64/SMEInstrFormats.td (diff) |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.h (diff) |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff) |
Commit
bf23b4031eeabfccd46a25ce68414d45ae761304
by npopov[ValueTracking] Take poison-generating metadata into account (PR59888)
In canCreateUndefOrPoison(), take not only poison-generating flags, but also poison-generating metadata into account. The helpers are written generically, but I believe the only case that can actually matter is !range on calls -- !nonnull and !align are only valid on loads, and those can create undef/poison anyway.
Unfortunately, this negatively impacts logical to bitwise and/or conversion: For ctpop/ctlz/cttz we always attach !range metadata, which will now block the transform, because it might introduce poison. It would be possible to recover this regression by supporting a ConsiderFlagsAndMetadata=false mode in impliesPoison() and clearing flags/metadata on visited instructions.
Fixes https://github.com/llvm/llvm-project/issues/59888.
Differential Revision: https://reviews.llvm.org/D142115
|
 | llvm/lib/IR/Instruction.cpp (diff) |
 | llvm/lib/Transforms/InstCombine/InstructionCombining.cpp (diff) |
 | llvm/test/Transforms/InstCombine/freeze.ll (diff) |
 | llvm/lib/Analysis/ValueTracking.cpp (diff) |
 | llvm/include/llvm/IR/Instruction.h (diff) |
 | llvm/include/llvm/IR/Operator.h (diff) |
 | llvm/lib/IR/Operator.cpp (diff) |
 | llvm/include/llvm/Analysis/ValueTracking.h (diff) |
 | llvm/test/Transforms/InstCombine/ispow2.ll (diff) |
Commit
2e35d684d798f8e330e5a18b524cef32ede9be89
by kerry.mclaughlin[AArch64][SME2] Add multi-vector multiply-add long intrinsics.
Adds (single, multi & indexed) intrinsics for the following: - bfmlal/bfmlsl - fmlal/fmlsl - smlal/smlsl - umlal/umlsl
This patch also extends SelectSMETileSlice to handle scaled vector select offsets.
NOTE: These intrinsics are still in development and are subject to future changes.
Reviewed By: CarolineConcatto
Differential Revision: https://reviews.llvm.org/D142004
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 | llvm/test/CodeGen/AArch64/sme2-intrinsics-mlals.ll |
 | llvm/lib/Target/AArch64/SMEInstrFormats.td (diff) |
 | llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp (diff) |
 | llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td (diff) |
 | llvm/include/llvm/IR/IntrinsicsAArch64.td (diff) |
|
 | llvm/test/Transforms/InstCombine/getelementptr.ll (diff) |
Commit
1495210914997bcd0ca6937be0ae3cd6809b5ef5
by sven.vanhaastregt[OpenCL] Always add nounwind attribute for OpenCL
Neither OpenCL nor C++ for OpenCL support exceptions, so add the `nounwind` attribute unconditionally for those languages.
Differential Revision: https://reviews.llvm.org/D142033
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 | clang/lib/CodeGen/CGCall.cpp (diff) |
 | clang/test/CodeGenOpenCL/convergent.cl (diff) |
 | clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl (diff) |
Commit
d148f8d7dd4aea1270a329c79313feadf9bbb414
by tobias.gysi[mlir][llvm] Drop cyclic dependencies during debug metadata import.
This revision fixes the import of LLVM IR to handle debug metadata with cyclic dependencies. It deletes the elements list of the composite type if a cyclic dependency is detected. The revision is meant as a band aid to avoid infinite recursion during the import of cyclic debug metadata. Long term solutions are currently discussed here: https://discourse.llvm.org/t/handling-cyclic-dependencies-in-debug-info/67526/4
Reviewed By: Dinistro
Differential Revision: https://reviews.llvm.org/D142086
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 | mlir/lib/Target/LLVMIR/DebugImporter.cpp (diff) |
 | mlir/test/Target/LLVMIR/Import/debug-info.ll (diff) |
 | mlir/lib/Target/LLVMIR/DebugImporter.h (diff) |
Commit
097f42602d83926a9d5e7fbe3d0bb8ef5c733183
by kevin.sala[OpenMP][libomptarget] Fix deinit of NextGen AMDGPU plugin
This patch fixes a segfault that was appearing when the plugin fails to initialize and then is deinitialized. Also, do not call hsa_shut_down if the hsa_init failed.
Differential Revision: https://reviews.llvm.org/D142145
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 | openmp/libomptarget/plugins-nextgen/amdgpu/src/rtl.cpp (diff) |
Commit
b0d575310f2ee660dadfdaf1e06bac148a575754
by nicolas.vasilache[mlir][Linalg] Fix ignoring nodiscard return value
ff94419a287c changed the return value of appendMangledType() to LogicalResult, which is marked as nodiscard. Ignoring the result generates a warning when building with clang.
Reviewed By: nicolasvasilache, chelini
Differential Revision: https://reviews.llvm.org/D142202
|
 | mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp (diff) |
Commit
a3388f3e2a30eaca4123f14a6444fd5aa03b24c5
by guray.ozen[mlir] Introduce a pattern to lower `gpu.subgroup_reduce` to `nvvm.redux_op`
This revision introduces a pattern to lower `gpu.subgroup_reduce` op into to the `nvvm.redux_sync` op. The op must be run by the entire subgroup, otherwise it is undefined behaviour.
It also adds a flag and populate function, because the op is not avaiable for every gpu (sm80+), so it can be used when it is desired.
Depends on D142088
Reviewed By: nicolasvasilache
Differential Revision: https://reviews.llvm.org/D142103
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 | mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir (diff) |
 | mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp (diff) |
 | mlir/include/mlir/Conversion/Passes.td (diff) |
 | mlir/include/mlir/Conversion/GPUToNVVM/GPUToNVVMPass.h (diff) |
Commit
37f8ffc64cc4a92aec993b19b13f9182d88a0af8
by david.sherwood[AArch64][SME2] Add LLVM IR intrinsics for the vertical dot products
Adds intrinsics for the following SME2 instructions:
* BFVDOT (32-bit) * FVDOT (32-bit) * SVDOT (2-way) (32-bit) * SVDOT (4-way) (32-bit and 64-bit) * UVDOT (2-way) (32-bit) * UVDOT (4-way) (32-bit and 64-bit) * SUVDOT (32-bit) * USVDOT (32-bit)
NOTE: These intrinsics are still in development and are subject to future changes.
Differential Revision: https://reviews.llvm.org/D142000
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 | llvm/include/llvm/IR/IntrinsicsAArch64.td (diff) |
 | llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td (diff) |
 | llvm/test/CodeGen/AArch64/sme2-intrinsics-vdot.ll |
Commit
7531c87183822cf8931496a757a09779e24aeac0
by jperier[flang][hlfir] Enable allocate, deallocate, pointer assignment lowering
The previous patches allowed lowering allocatable/and pointer designator expressions with HLFIR. This patch updates the bridge genExprMutableBox to use HLFIR lowering when HLFIR flag is set. For allocate and deallocate lowering that use genExprMutableBox, no other change is needed.
For pointer assignments, the code doing the pointer assignments in the bridge can be reused and is simply moved so that it can be shared, and the "explicit context" special cases of the previous lowering are by-passed.
The code doing pointer assignment revealed that convertExprToAddress did not match the previous genExprAddr behavior (that actually does not create temps for "x" where x is not contiguous). Instead of trying to copy the old behavior that is a bit weird (was dictated by the implementation rather than design). Update convertExprToAddress to do something sensible and that works with the current genExprAddr usages (if anything, it should saves bogus array section temps).
Differential Revision: https://reviews.llvm.org/D142197
|
 | flang/lib/Lower/ConvertExprToHLFIR.cpp (diff) |
 | flang/include/flang/Lower/ConvertExprToHLFIR.h (diff) |
 | flang/lib/Lower/Allocatable.cpp (diff) |
 | flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90 |
 | flang/lib/Lower/ConvertCall.cpp (diff) |
 | flang/lib/Lower/Bridge.cpp (diff) |
|
 | llvm/test/Transforms/InstCombine/trunc-fp-to-int.ll |
|
 | llvm/test/DebugInfo/Generic/assignment-tracking/track-assignments.ll (diff) |
|
 | clang/docs/ClangFormatStyleOptions.rst (diff) |
 | clang/unittests/Format/UsingDeclarationsSorterTest.cpp (diff) |
 | clang/lib/Format/Format.cpp (diff) |
 | clang/include/clang/Format/Format.h (diff) |
 | clang/unittests/Format/ConfigParseTest.cpp (diff) |
 | clang/lib/Format/UsingDeclarationsSorter.cpp (diff) |
|
 | clang/lib/CodeGen/CGExprScalar.cpp (diff) |
 | clang/test/CodeGen/aarch64-v8.2a-neon-intrinsics-constrained.c (diff) |
 | clang/test/CodeGen/X86/avx512dq-builtins-constrained.c (diff) |
|
 | llvm/test/Transforms/SROA/preserve-nonnull.ll |
 | llvm/test/Transforms/SROA/preserve-metadata.ll |
Commit
ebd9a2477e69ed35b83256ae93cc7e069f5a37c4
by kadircet[clang] Fix typos in member initializers
This was regressed in ca619613801233ef2def8c3cc7d311d5ed0033cb. As we attached InitExprs as-is to the AST, without performing transformations.
Differential Revision: https://reviews.llvm.org/D142187
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 | clang/lib/Sema/SemaDeclCXX.cpp (diff) |
 | clang/test/PCH/typo3.cpp |
|
 | mlir/include/mlir/Dialect/Arith/IR/ArithOps.td (diff) |
 | mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir (diff) |
Commit
d49b842ea2b466ead10a140037c90901438ba9d3
by npopov[SROA] Use copyMetadataForLoad() helper
Instead of copying just nonnull metadata, use the generic helper to copy metadata to the new load. This helper is specifically designed for the case where the load type may change, so it's safe to use in this context.
|
 | llvm/lib/Transforms/Scalar/SROA.cpp (diff) |
 | llvm/test/Transforms/SROA/preserve-metadata.ll (diff) |
Commit
4ece50737d5385fb80cfa23f5297d1111f8eed39
by orlando.hyams[Assignment Tracking][NFC] Replace LLVM command line option with a module flag
Remove LLVM flag -experimental-assignment-tracking. Assignment tracking is still enabled from Clang with the command line -Xclang -fexperimental-assignment-tracking which tells Clang to ask LLVM to run the pass declare-to-assign. That pass converts conventional debug intrinsics to assignment tracking metadata. With this patch it now also sets a module flag debug-info-assignment-tracking with the value `i1 true` (using the flag conflict rule `Max` since enabling assignment tracking on IR that contains only conventional debug intrinsics should cause no issues).
Update the docs and tests too.
Reviewed By: CarlosAlbertoEnciso
Differential Revision: https://reviews.llvm.org/D142027
|
 | llvm/test/DebugInfo/assignment-tracking/X86/diamond-2.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/diamond-1.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/inline/id.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/sdag-transfer-dbgassign.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/untagged-store-frag.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/memcpy.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/remove-redundant-fwd-scan-linked.ll (diff) |
 | clang/test/Driver/assignment-tracking-opts.c |
 | llvm/test/DebugInfo/Generic/assignment-tracking/track-assignments.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/loop-sink.ll (diff) |
 | llvm/docs/AssignmentTracking.md (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/loop-unroll.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/salvage-value.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/alloca-single-slice.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/mem-loc-frag-fill-cfg.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/rewrite.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/mldst-motion/diamond.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/inline/use-before-def.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/unspecified-var-size.ll (diff) |
 | llvm/lib/Transforms/Utils/BasicBlockUtils.cpp (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/operands.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/verify.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/single-memory-location.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/remove-undef-fragment.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/single-memory-location-2.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/use-known-value-at-early-mem-def-2.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten.ll (diff) |
 | llvm/include/llvm/IR/DebugInfo.h (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/storemerge.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/store.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/dse/dse-after-memcpyopt-merge.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/complex.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-1.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/vec-2.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/lower-offset-expression.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/loop-deletion/dead-loop.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/diamond-3.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/memmove-to-from-same-alloca.ll (diff) |
 | llvm/lib/Transforms/InstCombine/InstructionCombining.cpp (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/codegenprepare/sunk-addr.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/no-redundant-def-after-alloca.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/speculated-store.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/memset.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/licm/multi-exit.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/nested-loop-frags.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/adce/no-delete.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-block-alloca.ll (diff) |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp (diff) |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (diff) |
 | llvm/lib/IR/DebugInfo.cpp (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/phi.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/slp-vectorizer/merge-scalars.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/remove-redundant-dbg.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/DSE.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/dbg-phi-produces-undef.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/inline/inline-stores.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/instruction-type.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/loop-hoist.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/after-inlining.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/sdag-dangling-dbgassign.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/user-memcpy.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/mem-loc-frag-fill.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/memcpyopt/merge-stores.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/lower-to-value.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/sink-store.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/roundtrip.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/split-alloca.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/remove-redundant-defs-to-prevent-reordering.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/mem2reg/single-store-alloca.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/parse-and-verify/distinct.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/instcombine/alloca-bitcast.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/id.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/sroa/frag-2.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/use-known-value-at-early-mem-def.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/simplifycfg/empty-block.ll (diff) |
 | llvm/lib/Transforms/Utils/InlineFunction.cpp (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/nested-loop.ll (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/remove-redundant.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/nested-loop-sroa.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/sdag-ir-salvage-assign.ll (diff) |
 | clang/lib/Driver/ToolChains/Clang.cpp (diff) |
 | llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp (diff) |
 | llvm/test/DebugInfo/Generic/assignment-tracking/licm/merge.ll (diff) |
 | llvm/test/DebugInfo/assignment-tracking/X86/order-of-defs.ll (diff) |
Commit
a4898b437dbd76bf62c6fc2c5f015c327aa19190
by npopov[Local] Preserve range metadata if the type did not change
In copyRangeMetadata() and by extension copyLoadMetadata(), handle the trivial case where the type did not change, in which case we can simply preserve the range metadata as is.
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 | llvm/test/Transforms/SROA/preserve-metadata.ll (diff) |
 | llvm/lib/Transforms/Utils/Local.cpp (diff) |
Commit
e3a00d51864e05b6755601543c5e2a2df44081d1
by orlando.hyams[Assignment Tracking] Fix invalidated iterator usage
The iterator `FirstOverlap` is invalidated after the call to `insert` - avoid dereferencing the iterator after the call to `insert`.
Reviewed By: CarlosAlbertoEnciso
Differential Revision: https://reviews.llvm.org/D141854
|
 | llvm/lib/CodeGen/AssignmentTrackingAnalysis.cpp (diff) |
|
 | llvm/lib/Target/ARM/ARMInstrThumb2.td (diff) |
 | llvm/test/CodeGen/Thumb2/csel-andor-onebit.ll (diff) |
 | llvm/test/CodeGen/Thumb2/mve-vcmpf.ll (diff) |
 | llvm/test/CodeGen/Thumb2/mve-vcmpfz.ll (diff) |
 | llvm/test/CodeGen/Thumb2/mve-pred-or.ll (diff) |
 | llvm/test/CodeGen/Thumb2/mve-vcmpfr.ll (diff) |
Commit
0a996c82a75f330f3d01541381569c8cd2cd6190
by orlando.hyams[Assignment Tracking] Fix -fexperimental-assignment-tracking cc1 flag
This change allows `-fexperimental-assignment-tracking` to be negated using the negative equivalent `-fno-experimental-assignment-tracking`, and fixes the flag so that the default behaviour can be changed (currently the default is still false / disabled).
Reviewed By: StephenTozer
Differential Revision: https://reviews.llvm.org/D142029
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 | clang/include/clang/Driver/Options.td (diff) |
 | clang/test/CodeGen/assignment-tracking/flag.cpp (diff) |
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 | llvm/test/Transforms/Mem2Reg/preserve-nonnull-load-metadata.ll (diff) |
Commit
bdf30603f28f5a97a63350e575e1b5cef052e7d0
by i[LLVM][OpenMP] Correct the function signature of `__kmpc_parallel_level`
`__kmpc_parallel_level` used to be a function w/o any argument, but in the new device runtime, it accepts two. This patch simply corrects it in `OMPKinds.def`. ``` uint16_t __kmpc_parallel_level(IdentTy *Loc, uint32_t); ```
Reviewed By: jhuber6
Differential Revision: https://reviews.llvm.org/D141655
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 | llvm/include/llvm/Frontend/OpenMP/OMPKinds.def (diff) |
 | llvm/test/Transforms/OpenMP/parallel_level_fold.ll (diff) |
Commit
9f8544713ad8e57fb74cbfce3fbc7fff523e549f
by jeremy.morse[DebugInfo] Store instr-ref mode of MachineFunction in member
Add a flag state (and a MIR key) to MachineFunctions indicating whether they contain instruction referencing debug-info or not. Whether DBG_VALUEs or DBG_INSTR_REFs are used needs to be determined by LiveDebugValues at least, and using the current optimisation level as a proxy is proving unreliable.
Test updates are purely adding the flag to tests, in a couple of cases it involves separating out VarLocBasedLDV/InstrRefBasedLDV tests into separate files, as they can no longer share the same input.
Differential Revision: https://reviews.llvm.org/D141387
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 | llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_stackslot_subregs.mir (diff) |
 | llvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir (diff) |
 | llvm/include/llvm/CodeGen/MachineFunction.h (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/spill-slot-limits.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-indir-value.mir (diff) |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (diff) |
 | llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir (diff) |
 | llvm/include/llvm/CodeGen/MIRYamlMapping.h (diff) |
 | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp (diff) |
 | llvm/lib/CodeGen/MIRParser/MIRParser.cpp (diff) |
 | llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_instrref_tolocs.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/out-of-scope-blocks.mir (diff) |
 | llvm/test/DebugInfo/MIR/X86/live-debug-values-stack-clobber.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/memory-operand-load-folding.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_subreg_substitutions.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/memory-operand-folding-tieddef.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir (diff) |
 | llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir (diff) |
 | llvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param2.mir |
 | llvm/include/llvm/CodeGen/SelectionDAG.h (diff) |
 | llvm/lib/CodeGen/SelectionDAG/FastISel.cpp (diff) |
 | llvm/test/DebugInfo/MIR/X86/live-debug-values-reg-copy.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/no-duplicates.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/twoaddr-to-threeaddr-sub.mir (diff) |
 | llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_recover_clobbers.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/instr-ref-roundtrip.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/phi-coalescing.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/survives-livedebugvars.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/no-metainstrs.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir (diff) |
 | llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir (diff) |
 | llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/restore-to-rsp-crash.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/follow-spill-of-live-value.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues_illegal_locs.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced2.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/single-assign-propagation.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/livedebugvalues-transfer-variadic-instr-ref.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/phi-coalesce-subreg.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/dbg-phi-subregister-location.mir (diff) |
 | llvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir (diff) |
 | llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer2.mir |
 | llvm/lib/CodeGen/MIRPrinter.cpp (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/memory-operand-tracking.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir (diff) |
 | llvm/include/llvm/CodeGen/SelectionDAGISel.h (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/pick-vphi-in-shifting-loop.mir (diff) |
 | llvm/test/DebugInfo/MIR/X86/live-debug-values-bad-transfer.mir (diff) |
 | llvm/test/DebugInfo/MIR/X86/livedebugvalues_load_in_loop.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/accept-nonlive-reg-phis.mir (diff) |
 | llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv2.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/phi-on-stack-coalesced.mir (diff) |
 | llvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs2.mir |
 | llvm/test/DebugInfo/MIR/InstrRef/deref-spills-with-size.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/x86-drop-compare-inst.mir (diff) |
 | llvm/test/DebugInfo/X86/instr-ref-track-clobbers.mir (diff) |
 | llvm/lib/CodeGen/MachineFunction.cpp (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir (diff) |
 | llvm/test/DebugInfo/X86/instr-ref-flag.ll (diff) |
 | llvm/include/llvm/CodeGen/FastISel.h (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/x86-fp-stackifier-drop-locations.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/stack-coloring-dbg-phi.mir (diff) |
 | llvm/test/DebugInfo/MIR/InstrRef/substitusions-roundtrip.mir (diff) |
|
 | llvm/docs/ReleaseNotes.rst (diff) |
Commit
f287c1d3153e996502368f4be4f367dca65b03c7
by jannik.silvanus[polly] Fix i8 alignment in datalayout of lit test
Two lit test used overaligned i8, without the test case actually depending on i8 alignment. Change the datalayout string to use naturally aligned i8, preparing for the upcoming requirement of naturally aligned i8.
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 | polly/test/ScopInfo/wraping_signed_expr_4.ll (diff) |
 | polly/test/ScopInfo/wraping_signed_expr_0.ll (diff) |
Commit
76677173ec81fcb6a7eeda4a0647d0ce931d5acb
by jannik.silvanus[X86] Fix i8 alignment in datalayout of lit test
A lit test used overaligned i8, apparently due to an old copy-paste error, intending to specify i32 alignment.
Change the datalayout string to use naturally aligned i8.
|
 | llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll (diff) |
Commit
986029c1640a5fa9ce2fa3becab0538168858741
by jannik.silvanus[Transforms] Fix i8 alignment in datalayout of lit test
A lit test used overaligned i8, apparently due to an old copy-paste error, intending to specify i16 alignment.
Change the datalayout string to use naturally aligned i8.
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 | llvm/test/Transforms/IndVarSimplify/dangling-use.ll (diff) |
Commit
3e4a6f57412c63bab3f386a2c8a044a88657bac1
by jannik.silvanus[DirectX] Fix i8 alignment in datalayout of lit test
An llc lit test used overaligned i8, apparently originating from the old DXIL data layout. The new DXIL data layout uses naturally aligned i8.
llc ignores the data layout of a module and instead sets the data layout based on the target. Change the data layout string in the test to match that target-derived data layout.
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 | llvm/test/tools/dxil-dis/opaque-value_as_metadata.ll (diff) |
Commit
3129bdce8dddefbf03ab3ef52170132eb4bcf929
by llvm-dev[DAG] visitINSERT_VECTOR_ELT - move mergeInsertEltWithShuffle / combineInsertEltToShuffle folds after canonicalization
Noticed while triaging D127115 regressions - there's no need to attempt these costly folds until after the easy canonicalization cases have been addressed
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 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff) |
Commit
6d11baf02b33c3ec89178f94627ecec5025dac7e
by mtrofin[mlgo] Stream the training data
This leverages the new logging format in that we don't need to buffer the training data, we can just write it out.
Differential Revision: https://reviews.llvm.org/D142168
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 | llvm/lib/Analysis/TrainingLogger.cpp (diff) |
 | llvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp (diff) |
 | llvm/include/llvm/Analysis/Utils/TrainingLogger.h (diff) |
 | llvm/test/CodeGen/MLRegalloc/dev-mode-logging.ll (diff) |
 | llvm/lib/CodeGen/MLRegallocPriorityAdvisor.cpp (diff) |
 | llvm/lib/CodeGen/MLRegallocEvictAdvisor.cpp (diff) |
Commit
d47a0ace5d39cb1abf71b9778c3cde003f0a2e37
by tom.eccles[mlir][Linalg] fix comparison of integers with different signs
Since https://reviews.llvm.org/D142053, building mlir with clang using -Werror fails reporting comparison of integers with different signs.
Fix this by using unsigned return types for RelayoutOp::getSourceRank,getDestRank
Differential Revision: https://reviews.llvm.org/D142201
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 | mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp (diff) |
 | mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td (diff) |
Commit
2ab1c6d375b97307ebadf8131589c3abb1b11eb0
by david.truby[flang] Add lowering of move_alloc to IntrinsicCall
This patch relies on D141286 for the runtime implementation of move_alloc.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D141616
|
 | flang/unittests/Optimizer/Builder/Runtime/Allocatable.cpp |
 | flang/unittests/Optimizer/CMakeLists.txt (diff) |
 | flang/lib/Optimizer/Builder/Runtime/Allocatable.cpp |
 | flang/lib/Lower/IntrinsicCall.cpp (diff) |
 | flang/unittests/Optimizer/Builder/Runtime/AllocatableTest.cpp |
 | flang/test/Lower/Intrinsics/move_alloc.f90 |
 | flang/lib/Optimizer/Builder/CMakeLists.txt (diff) |
 | flang/include/flang/Optimizer/Builder/Runtime/Allocatable.h |
Commit
3cbc72ef63c48979cd7b0d811e9ee5a66a65244e
by orlando.hyams[Assignment Tracking] Fix tests for buildbot failure
Follow-up for 4ece50737d5385fb80cfa23f5297d1111f8eed39 (D142027).
Assignment Tracking Analysis now always runs and is skipped internally if assignment tracking is disabled. Update these tests to expect to see the pass run.
Buildbot failure: https://lab.llvm.org/buildbot/#/builders/216/builds/16085
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 | llvm/test/CodeGen/X86/opt-pipeline.ll (diff) |
 | llvm/test/CodeGen/X86/O0-pipeline.ll (diff) |
Commit
9d4f1a9eff27716069dc6a2d991baa228c197b85
by dvyukovsanmd: refine selection of functions for UAR checking
There are no intrinsic functions that leak arguments. If the called function does not return, the current function does not return as well, so no possibility of use-after-return. Sanitizer function also don't leak or don't return. It's safe to both pass pointers to local variables to them and to tail-call them.
Reviewed By: melver
Differential Revision: https://reviews.llvm.org/D142190
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 | compiler-rt/test/metadata/CMakeLists.txt (diff) |
 | compiler-rt/test/metadata/uar.cpp (diff) |
 | llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp (diff) |
Commit
75fbb5d2238f1824f03d205b699061a115d5effc
by rhow[clang][nfc] refactor Module::Header to use OptionalFileEntryRef
Refactor the `Module::Header` class to use an `OptionalFileEntryRef` instead of a `FileEntry*`. This is preparation for refactoring the `TopHeaderNames` to use `FileEntryRef` so that we preserve the lookup path of the headers when serializing.
This is mostly based on https://reviews.llvm.org/D90497
Reviewed By: jansvoboda11
Differential Revision: https://reviews.llvm.org/D142113
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 | clang/lib/Sema/SemaModule.cpp (diff) |
 | clang/include/clang/Basic/Module.h (diff) |
 | clang/lib/Serialization/ASTReader.cpp (diff) |
 | clang/lib/Lex/ModuleMap.cpp (diff) |
 | clang/lib/Frontend/FrontendAction.cpp (diff) |
 | clang/include/clang/Lex/ModuleMap.h (diff) |
Commit
eef538f4e11c07ef52f5ac57f4500ac6b1cba31f
by christian.ulmann[MLIR][LLVM] Support inlining LLVM::CallOp to LLVM::FuncOp.
Extend `LLVMInlinerInterface` to handle calls from an `LLVM::CallOp` to an `LLVM::FuncOp` when there are no attributes present that require special handling.
Depends on D141676
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D141682
|
 | mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp (diff) |
 | mlir/test/Dialect/LLVMIR/inlining.mlir (diff) |
Commit
3d36df3ee3fc95c7e6afd074d9ae6ffe7a69b04e
by christian.ulmann[mlir][LLVM] Add passthrough import support
This commit extends the LLVMIR import to support function attributes by adding them to the passthrough array attribute.
Depends on D142013
Reviewed By: gysit
Differential Revision: https://reviews.llvm.org/D142098
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 | mlir/lib/Target/LLVMIR/ModuleImport.cpp (diff) |
 | mlir/test/Target/LLVMIR/Import/basic.ll (diff) |
 | mlir/test/Target/LLVMIR/Import/function-attributes.ll (diff) |
Commit
a920ae3b8d1e998317052cd4fad7a78289235af9
by a.v.lapshin[DWARF][dsymutil][llvm-dwarfutil] Create a placeholder library DWARFLinkerParallel.
This patch is extracted from D96035. It creates an empty library DWARFLinkerParallel.
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D140787
|
 | llvm/lib/DWARFLinkerParallel/DWARFLinker.cpp |
 | llvm/unittests/CMakeLists.txt (diff) |
 | llvm/include/llvm/DWARFLinkerParallel/DWARFLinker.h |
 | llvm/lib/DWARFLinkerParallel/CMakeLists.txt |
 | llvm/unittests/DWARFLinkerParallel/DWARFLinkerTest.cpp |
 | llvm/unittests/DWARFLinkerParallel/CMakeLists.txt |
 | llvm/tools/llvm-dwarfutil/CMakeLists.txt (diff) |
 | llvm/lib/CMakeLists.txt (diff) |
 | llvm/tools/dsymutil/CMakeLists.txt (diff) |
|
 | mlir/lib/Dialect/SCF/IR/SCF.cpp (diff) |
Commit
e6241cbdcbf3cc9beb49460578466e18936ef220
by npopov[Mem2Reg] Only convert !nonnull to assume if !noundef present
After D141386 !nonnull violation returns poison rather than resulting in immediate undefined behavior. However, converting it into an assume would result in IUB. As such, we can only perform this transform if !noundef is also present.
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 | llvm/test/Transforms/Mem2Reg/preserve-nonnull-load-metadata.ll (diff) |
 | llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp (diff) |
 | llvm/test/Transforms/ArgumentPromotion/metadata.ll (diff) |
 | llvm/test/Transforms/SROA/preserve-metadata.ll (diff) |
Commit
1125c5c0b2cf13aa112a7531eb89fd1b771aa13b
by frgossen[MLIR] Remove scf.if builder with explicit result types and callbacks
Instead, use the builder and infer the return type based on the inner `yield` ops. Also, fix uses that do not create the terminator as required for the callback builders.
Differential Revision: https://reviews.llvm.org/D142056
|
 | mlir/include/mlir/Dialect/SCF/IR/SCFOps.td (diff) |
 | mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp (diff) |
 | mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp (diff) |
 | mlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp (diff) |
 | mlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp (diff) |
 | mlir/lib/Dialect/SCF/IR/SCF.cpp (diff) |
 | mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp (diff) |
 | mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp (diff) |
 | mlir/lib/Dialect/Tensor/Transforms/SplitPaddingPatterns.cpp (diff) |
Commit
50d2a193a7399ce99e321b93d6ee85184d3be4de
by i[OpenMP] Only test kmp_atomic_float10_max_min.c on X86
The test `openmp/runtime/test/atomic/kmp_atomic_float10_max_min.c` uses a compiler flag `-mlong-double-80` that might not be supported by all targets. Currently it requires `x86-registered-target`, but that requirement can be true when LLVM supports X86 while the actual `libomp` arch is not X86. For example, when LLVM is built on AArch64 with all targets enabled, `x86-registered-target` can be met. If `libomp` is built with native target, aka. AArch64, the test will still be enabled, causing test failure.
This patch only enables the test if the actual target is X86. The actual target is determined by `LIBOMP_ARCH`.
Fix #53696.
Reviewed By: jlpeyton
Differential Revision: https://reviews.llvm.org/D142172
|
 | openmp/runtime/test/lit.site.cfg.in (diff) |
 | openmp/runtime/test/lit.cfg (diff) |
 | openmp/runtime/test/atomic/kmp_atomic_float10_max_min.c (diff) |
Commit
cd4180dbf90b04014b65ff69c33002806680ced9
by davelee.com[lldb][test] Skip TestRerunAndExprDylib on Ubuntu 18.04
Disable this test on Ubuntu 18.04, where it fails for yet to be determined reasons.
Differential Revision: https://reviews.llvm.org/D142141
|
 | lldb/test/API/functionalities/rerun_and_expr_dylib/TestRerunAndExprDylib.py (diff) |
|
 | llvm/test/Transforms/InstCombine/loadstore-metadata.ll (diff) |
Commit
99c12afeb4a1afa608d487351eebe79ebf058b8d
by orlando.hyams[Assignment Tracking] Fix tests for buildbot failure (2)
Follow-up for 4ece50737d5385fb80cfa23f5297d1111f8eed39 (D142027).
Assignment Tracking Analysis now always runs and is skipped internally if assignment tracking is disabled. Update these tests to expect to see the pass run.
Buildbot failure: https://lab.llvm.org/buildbot/#/builders/57/builds/24094
|
 | llvm/test/CodeGen/RISCV/O3-pipeline.ll (diff) |
 | llvm/test/CodeGen/ARM/O3-pipeline.ll (diff) |
 | llvm/test/CodeGen/AMDGPU/llc-pipeline.ll (diff) |
 | llvm/test/CodeGen/PowerPC/O3-pipeline.ll (diff) |
 | llvm/test/CodeGen/AArch64/O0-pipeline.ll (diff) |
 | llvm/test/CodeGen/RISCV/O0-pipeline.ll (diff) |
 | llvm/test/CodeGen/LoongArch/O0-pipeline.ll (diff) |
 | llvm/test/CodeGen/AArch64/O3-pipeline.ll (diff) |
 | llvm/test/CodeGen/LoongArch/opt-pipeline.ll (diff) |
 | llvm/test/CodeGen/PowerPC/O0-pipeline.ll (diff) |
|
 | mlir/python/mlir/dialects/_structured_transform_ops_ext.py (diff) |
|
 | llvm/test/Transforms/LoopUnroll/verify-dominators.ll (diff) |
|
 | llvm/test/Transforms/InstCombine/loadstore-metadata.ll (diff) |
Commit
5f6812748e25f5240cc8b4ffee658cbd52e46bf4
by nikolasklauser[libc++] Enable clang-tidy from the buildkite pipeline instead of hard-coding it in run-buildbot
Reviewed By: ldionne, #libc, Mordante, emaste
Spies: emaste, Mordante, libcxx-commits, arichardson
Differential Revision: https://reviews.llvm.org/D141294
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 | libcxx/utils/ci/run-buildbot (diff) |
 | libcxx/utils/ci/buildkite-pipeline.yml (diff) |
Commit
e4e0288f5bb191128f4c1b66baa3fd6f8e3bd26a
by nikolasklauser[libc++] Move iota_view::iterator and sentinel out of iota_view
This makes it a lot easier to specialize traits types for it, like __segmented_iterator_traits.
Reviewed By: var-const, #libc
Spies: libcxx-commits
Differential Revision: https://reviews.llvm.org/D141454
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 | libcxx/include/__ranges/iota_view.h (diff) |
 | libcxx/test/std/ranges/range.factories/range.iota.view/iterator/star.pass.cpp (diff) |
|
 | llvm/test/Bitcode/compatibility.ll (diff) |
Commit
6ba4afb4d6f2f8f293ad704a37de4139c5c8c0f0
by vsapsai[ODRHash] Hash `ObjCInterfaceDecl` and diagnose discovered mismatches.
When two modules contain interfaces with the same name, check the definitions are equivalent and diagnose if they are not.
Differential Revision: https://reviews.llvm.org/D140073
|
 | clang/lib/AST/ODRHash.cpp (diff) |
 | clang/lib/AST/ODRDiagsEmitter.cpp (diff) |
 | clang/lib/Serialization/ASTReaderDecl.cpp (diff) |
 | clang/include/clang/Serialization/ASTReader.h (diff) |
 | clang/lib/Serialization/ASTWriterDecl.cpp (diff) |
 | clang/lib/Serialization/ASTWriter.cpp (diff) |
 | clang/lib/AST/DeclObjC.cpp (diff) |
 | clang/include/clang/AST/ODRDiagsEmitter.h (diff) |
 | clang/test/Modules/interface-diagnose-missing-import.m (diff) |
 | clang/include/clang/AST/DeclObjC.h (diff) |
 | clang/include/clang/Basic/DiagnosticASTKinds.td (diff) |
 | clang/test/Modules/method_pool.m (diff) |
 | clang/include/clang/AST/ODRHash.h (diff) |
 | clang/lib/Serialization/ASTReader.cpp (diff) |
 | clang/test/Modules/compare-objc-interface.m |
Commit
ed7a46a8de77087447936965044e2faf734102e5
by vsapsai[modules] Allow parsing a duplicate Obj-C interface if a previous one comes from a hidden [sub]module.
Instead of emitting a redefinition error, check that definitions are equivalent and allow such scenario.
A few non-obvious implementation details: * to avoid multiple definitions in the redeclaration chain we just drop the new definition after checking for equivalence; * for checking definition equivalence use ODR hash instead of ASTStructuralEquivalence because it avoids excessive recursive deserialization. Though after detecting a mismatch we do deserialize multiple entities to provide a better error message.
rdar://82908223
Differential Revision: https://reviews.llvm.org/D124286
|
 | clang/lib/AST/DeclObjC.cpp (diff) |
 | clang/lib/Parse/ParseObjc.cpp (diff) |
 | clang/test/Modules/hidden-duplicates.m (diff) |
 | clang/include/clang/Sema/Sema.h (diff) |
 | clang/include/clang/AST/ODRDiagsEmitter.h (diff) |
 | clang/include/clang/AST/DeclObjC.h (diff) |
 | clang/test/Modules/compare-objc-interface.m (diff) |
 | clang/lib/AST/ODRDiagsEmitter.cpp (diff) |
 | clang/lib/Sema/SemaDeclObjC.cpp (diff) |
 | clang/include/clang/Basic/DiagnosticASTKinds.td (diff) |
|
 | clang/lib/Basic/Builtins.cpp (diff) |
|
 | mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp (diff) |
|
 | llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll |
|
 | clang/include/clang/Driver/Options.td (diff) |
 | clang/test/Driver/fexcess-precision.c (diff) |
Commit
ee3c6de722e77a7966764133b1b8a5cd1a1f562f
by python3kgae[mlir] use stable_sort for OperationLegalizer::computeOpLegalizationDepth
For https://github.com/llvm/llvm-project/issues/60070. llvm::array_pod_sort will cause non-determinism when select pattern. It is exposed by difference between windows build and linux build.
Differential Revision: https://reviews.llvm.org/D142110
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 | mlir/lib/Transforms/Utils/DialectConversion.cpp (diff) |
Commit
12dd3a7b54cd19524fc29edba374d26972246744
by floRecommit "[LoopUnroll] Directly update DT instead of DTU."
This reverts commit c5ea42bcf48c8f3d3e35a6bff620b06d2a499108.
Recommit the patch with a fix for loops where the exiting terminator is not a branch instruction. In that case, ExitInfos may be empty. In addition to checking if there's a single exiting block also check if there's a single ExitInfo.
A test case has been added in f92b35392ed8e4631.
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 | llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h (diff) |
 | llvm/lib/Transforms/Utils/LoopUnroll.cpp (diff) |
 | llvm/lib/Transforms/Utils/BasicBlockUtils.cpp (diff) |
Commit
857cbb9276e55d817e8b3b052db9dffc29b7ebd6
by koraq[libc++][format] range-default-formatter for set.
Implements the range-default-formatter specialization range_format::set.
Implements parts of - P2286R8 Formatting Ranges - P2585R0 Improving default container formatting
Depends on D140801
Reviewed By: ldionne, #libc
Differential Revision: https://reviews.llvm.org/D141195
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 | libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.pass.cpp |
 | libcxx/test/std/utilities/format/format.formattable/concept.formattable.compile.pass.cpp (diff) |
 | libcxx/docs/Status/FormatPaper.csv (diff) |
 | libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.tests.h |
 | libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.vformat.pass.cpp |
 | libcxx/test/std/utilities/format/format.range/format.range.fmtset/format.functions.format.pass.cpp |
 | libcxx/test/std/utilities/format/format.range/format.range.fmtset/parse.pass.cpp |
 | libcxx/include/__format/range_default_formatter.h (diff) |
|
 | clang/CodeOwners.rst (diff) |
Commit
fa2a03dc7acd0ba551a3328a2d9d5d313e9043d1
by a.v.lapshin[NFC][DWARFLinker] Refactor address emitting code.
As a preparation for implementing DWARFv5 address ranges generation, this patch refactors existing address ranges generation code: Split emitUnitRangesEntries into two functions emitDwarfDebugArangesTable and emitDwarfDebugRangesTableFragment. Use AddressRanges to prepare linked address ranges. Refactor Unit.getLowPc(), to use std::nullopt as undefined value.
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D141943
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 | llvm/lib/DWARFLinker/DWARFLinkerCompileUnit.cpp (diff) |
 | llvm/include/llvm/DWARFLinker/DWARFLinkerCompileUnit.h (diff) |
 | llvm/include/llvm/DWARFLinker/DWARFStreamer.h (diff) |
 | llvm/lib/DWARFLinker/DWARFStreamer.cpp (diff) |
 | llvm/lib/DWARFLinker/DWARFLinker.cpp (diff) |
 | llvm/include/llvm/DWARFLinker/DWARFLinker.h (diff) |
Commit
b3154d08e948c37872bf053f90b6728e7d39039b
by listmail[ARM][AArch64] Switch to generic MEMBARRIER node
This change switches both targets from using target specific CompilerBarrier nodes to the recently introduced generic MEMBARRIER instruction.
A couple things to call out.
First, this changes the assembly comment printed. I'm not sure this matters, but if it does, we can simply drop this patch. This is a minor clean up at best.
Second, the ordering operand on the target instruction appears to be unused. We could easily add ordering to the generic instruction, but since we don't seem to have a motivating case in tree, I simply dropped the ordering when selecting to the generic instruction.
Differential Revision: https://reviews.llvm.org/D141513
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 | llvm/lib/Target/ARM/ARMScheduleA57.td (diff) |
 | llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp (diff) |
 | llvm/test/CodeGen/AArch64/fence-singlethread.ll (diff) |
 | llvm/test/CodeGen/ARM/fence-singlethread.ll (diff) |
 | llvm/lib/Target/AArch64/AArch64InstrAtomics.td (diff) |
 | llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp (diff) |
 | llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp (diff) |
 | llvm/lib/Target/ARM/ARMInstrInfo.td (diff) |
Commit
1eecf03919cdded5853b4aace67650e8c03a271b
by lebedev.ri[X86] `LowerBUILD_VECTOR()`: fix all-UNDEF detection
The original check was trying to avoid checking UndefMask itself, and deduce it via simpler means, but checking `NonZeroMask` does not, e.g., check `ZeroMask`.
Fixes https://github.com/llvm/llvm-project/issues/60168
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 | llvm/lib/Target/X86/X86ISelLowering.cpp (diff) |
 | llvm/test/CodeGen/X86/build-vector-128.ll (diff) |
Commit
86eff6be686a1e41e13c08ebfc2db4dd4d58e7c6
by listmail[MachineCombiner] Use default latency model when no detailed model available
This change adjusts the cost modeling used when the target does not have a schedule model with individual instruction latencies. After this change, we use the default latency information available from TargetSchedule. The default latency information essentially ends up treating most instructions as latency 1, with a few "expensive" ones getting a higher cost.
Previously, we unconditionally applied the first legal pattern - without any consideration of profitability. As a result, this change both prevents some patterns being applied, and changes which patterns are exercised. (i.e. previously the first pattern was applied, afterwards, maybe the second one is because the first wasn't profitable.)
The motivation here is two fold.
First, this brings the default behavior in line with the behavior when -mcpu or -mtune is specified. This improves test coverage, and generally makes it less likely we will have bad surprises when providing more information to the compiler.
Second, this enables some reassociation for ILP by default. Despite being unconditionally enabled, the prior code tended to "reassociate" repeatedly through an entire chain and simply moving the first operand to the end. The result was still a serial chain, just a different one. With this change, one of the intermediate transforms is unprofitable and we end up with a partially flattened tree.
Note that the resulting code diffs show significant room for improvement in the basic algorithm. I am intentionally excluding those from this patch.
For the test diffs, I don't seen any concerning regressions. I took a fairly close look at the RISCV ones, but only skimmed the x86 (particularly vector x86) changes.
Differential Revision: https://reviews.llvm.org/D141017
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 | llvm/test/CodeGen/X86/shift-combine.ll (diff) |
 | llvm/test/CodeGen/RISCV/ssub_sat.ll (diff) |
 | llvm/test/CodeGen/X86/v8i1-masks.ll (diff) |
 | llvm/test/CodeGen/X86/divmod128.ll (diff) |
 | llvm/test/CodeGen/X86/memcmp-more-load-pairs.ll (diff) |
 | llvm/test/CodeGen/RISCV/srem-lkk.ll (diff) |
 | llvm/test/CodeGen/X86/horizontal-reduce-smax.ll (diff) |
 | llvm/test/CodeGen/X86/x86-32-vector-calling-conv.ll (diff) |
 | llvm/test/CodeGen/RISCV/div-by-constant.ll (diff) |
 | llvm/test/CodeGen/RISCV/srem-vector-lkk.ll (diff) |
 | llvm/test/CodeGen/RISCV/iabs.ll (diff) |
 | llvm/test/CodeGen/X86/avx512fp16-mov.ll (diff) |
 | llvm/test/CodeGen/X86/mul-constant-result.ll (diff) |
 | llvm/test/CodeGen/X86/smul-with-overflow.ll (diff) |
 | llvm/test/CodeGen/X86/movmsk-cmp.ll (diff) |
 | llvm/test/CodeGen/X86/icmp-shift-opt.ll (diff) |
 | llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll (diff) |
 | llvm/test/CodeGen/RISCV/select-binop-identity.ll (diff) |
 | llvm/test/CodeGen/X86/add-sub-bool.ll (diff) |
 | llvm/test/CodeGen/RISCV/rvv/expand-no-v.ll (diff) |
 | llvm/test/CodeGen/X86/alias-static-alloca.ll (diff) |
 | llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll (diff) |
 | llvm/test/CodeGen/X86/smul_fix.ll (diff) |
 | llvm/test/CodeGen/X86/vector-pcmp.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-and-bool.ll (diff) |
 | llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll (diff) |
 | llvm/test/CodeGen/RISCV/rotl-rotr.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-or.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-smin.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-umin.ll (diff) |
 | llvm/test/CodeGen/RISCV/rv32zbb.ll (diff) |
 | llvm/test/CodeGen/X86/vector-fshr-128.ll (diff) |
 | llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll (diff) |
 | llvm/test/CodeGen/RISCV/rv64zbb.ll (diff) |
 | llvm/test/CodeGen/X86/urem-seteq-nonzero.ll (diff) |
 | llvm/test/CodeGen/RISCV/shifts.ll (diff) |
 | llvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll (diff) |
 | llvm/test/CodeGen/X86/horizontal-reduce-smin.ll (diff) |
 | llvm/test/CodeGen/RISCV/uadd_sat_plus.ll (diff) |
 | llvm/test/CodeGen/X86/rotate-multi.ll (diff) |
 | llvm/test/CodeGen/X86/statepoint-regs.ll (diff) |
 | llvm/test/CodeGen/X86/sse-regcall.ll (diff) |
 | llvm/test/CodeGen/X86/imul.ll (diff) |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-mask-vp.ll (diff) |
 | llvm/test/CodeGen/RISCV/ssub_sat_plus.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-and.ll (diff) |
 | llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll (diff) |
 | llvm/test/CodeGen/RISCV/addimm-mulimm.ll (diff) |
 | llvm/test/CodeGen/X86/horizontal-reduce-umin.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-add.ll (diff) |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll (diff) |
 | llvm/test/CodeGen/X86/vec_smulo.ll (diff) |
 | llvm/test/CodeGen/X86/fold-tied-op.ll (diff) |
 | llvm/test/CodeGen/X86/machine-cp.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-add-sext.ll (diff) |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll (diff) |
 | llvm/test/CodeGen/RISCV/xaluo.ll (diff) |
 | llvm/test/CodeGen/X86/setcc-wide-types.ll (diff) |
 | llvm/test/CodeGen/RISCV/copysign-casts.ll (diff) |
 | llvm/test/CodeGen/RISCV/fpclamptosat.ll (diff) |
 | llvm/test/CodeGen/RISCV/urem-lkk.ll (diff) |
 | llvm/test/CodeGen/X86/midpoint-int.ll (diff) |
 | llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-add-mask.ll (diff) |
 | llvm/test/CodeGen/X86/logic-shift.ll (diff) |
 | llvm/test/CodeGen/X86/avx512-intrinsics-x86_64.ll (diff) |
 | llvm/test/CodeGen/RISCV/addcarry.ll (diff) |
 | llvm/test/CodeGen/X86/midpoint-int-vec-128.ll (diff) |
 | llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll (diff) |
 | llvm/test/CodeGen/X86/smul_fix_sat.ll (diff) |
 | llvm/test/CodeGen/X86/mul-i1024.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-add-zext.ll (diff) |
 | llvm/test/CodeGen/X86/umul_fix_sat.ll (diff) |
 | llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-umax.ll (diff) |
 | llvm/test/CodeGen/X86/win-smallparams.ll (diff) |
 | llvm/test/CodeGen/X86/avx512-mask-op.ll (diff) |
 | llvm/test/CodeGen/X86/umul_fix.ll (diff) |
 | llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll (diff) |
 | llvm/test/CodeGen/X86/optimize-max-0.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-smax.ll (diff) |
 | llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll (diff) |
 | llvm/test/CodeGen/X86/avx512fp16-mscatter.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-xor.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-and-cmp.ll (diff) |
 | llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll (diff) |
 | llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll (diff) |
 | llvm/test/CodeGen/X86/umulo-64-legalisation-lowering.ll (diff) |
 | llvm/test/CodeGen/X86/umul-with-overflow.ll (diff) |
 | llvm/test/CodeGen/X86/vec_umulo.ll (diff) |
 | llvm/test/CodeGen/RISCV/bswap-bitreverse.ll (diff) |
 | llvm/test/CodeGen/X86/popcnt.ll (diff) |
 | llvm/test/CodeGen/RISCV/neg-abs.ll (diff) |
 | llvm/test/CodeGen/RISCV/usub_sat_plus.ll (diff) |
 | llvm/test/CodeGen/X86/swift-return.ll (diff) |
 | llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll (diff) |
 | llvm/test/CodeGen/X86/horizontal-reduce-fadd.ll (diff) |
 | llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll (diff) |
 | llvm/test/CodeGen/X86/mul-i512.ll (diff) |
 | llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll (diff) |
 | llvm/test/CodeGen/X86/divide-by-constant.ll (diff) |
 | llvm/test/CodeGen/RISCV/shadowcallstack.ll (diff) |
 | llvm/test/CodeGen/X86/avx512-intrinsics.ll (diff) |
 | llvm/test/CodeGen/X86/vector-trunc-math.ll (diff) |
 | llvm/test/CodeGen/RISCV/sadd_sat_plus.ll (diff) |
 | llvm/test/CodeGen/RISCV/uadd_sat.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll (diff) |
 | llvm/test/CodeGen/X86/hipe-cc64.ll (diff) |
 | llvm/test/CodeGen/X86/horizontal-reduce-add.ll (diff) |
 | llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll (diff) |
 | llvm/test/CodeGen/X86/mul-i256.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-or-bool.ll (diff) |
 | llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll (diff) |
 | llvm/test/CodeGen/X86/avx512-regcall-Mask.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll (diff) |
 | llvm/test/CodeGen/X86/vector-reduce-mul.ll (diff) |
 | llvm/test/CodeGen/X86/avx512vl-intrinsics.ll (diff) |
 | llvm/test/CodeGen/X86/horizontal-sum.ll (diff) |
 | llvm/test/CodeGen/X86/ptest.ll (diff) |
 | llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll (diff) |
 | llvm/test/CodeGen/X86/x86-interleaved-access.ll (diff) |
 | llvm/test/CodeGen/X86/hipe-cc.ll (diff) |
 | llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll (diff) |
 | llvm/test/CodeGen/X86/rev16.ll (diff) |
 | llvm/test/CodeGen/RISCV/sadd_sat.ll (diff) |
 | llvm/test/CodeGen/X86/masked_gather.ll (diff) |
 | llvm/test/CodeGen/X86/madd.ll (diff) |
 | llvm/test/CodeGen/X86/sad.ll (diff) |
 | llvm/test/CodeGen/X86/statepoint-live-in.ll (diff) |
 | llvm/test/CodeGen/X86/bmi-out-of-order.ll (diff) |
 | llvm/test/CodeGen/X86/abdu-vector-128.ll (diff) |
 | llvm/test/CodeGen/X86/horizontal-reduce-umax.ll (diff) |
 | llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll (diff) |
 | llvm/test/CodeGen/RISCV/usub_sat.ll (diff) |
 | llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll (diff) |
 | llvm/test/CodeGen/X86/xmulo.ll (diff) |
 | llvm/test/CodeGen/RISCV/addc-adde-sube-subc.ll (diff) |
 | llvm/test/CodeGen/RISCV/div-pow2.ll (diff) |
 | llvm/test/CodeGen/RISCV/urem-vector-lkk.ll (diff) |
 | llvm/test/CodeGen/RISCV/div.ll (diff) |
 | llvm/test/CodeGen/X86/memcmp-more-load-pairs-x32.ll (diff) |
 | llvm/test/CodeGen/X86/h-registers-1.ll (diff) |
 | llvm/test/CodeGen/X86/mul128.ll (diff) |
 | llvm/test/CodeGen/X86/muloti.ll (diff) |
 | llvm/test/CodeGen/X86/pr34080-2.ll (diff) |
 | llvm/test/CodeGen/RISCV/fpclamptosat_vec.ll (diff) |
 | llvm/test/CodeGen/X86/fold-masked-merge.ll (diff) |
 | llvm/test/CodeGen/X86/lea-opt2.ll (diff) |
 | llvm/test/CodeGen/RISCV/unaligned-load-store.ll (diff) |
 | llvm/test/CodeGen/X86/combine-add.ll (diff) |
 | llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll (diff) |
 | llvm/test/CodeGen/X86/midpoint-int-vec-256.ll (diff) |
 | llvm/test/CodeGen/X86/mul-constant-i64.ll (diff) |
 | llvm/test/CodeGen/X86/fold-add.ll (diff) |
 | llvm/test/CodeGen/X86/stack-clash-large.ll (diff) |
 | llvm/test/CodeGen/X86/vector-trunc-packus.ll (diff) |
 | llvm/test/CodeGen/RISCV/vararg.ll (diff) |
 | llvm/test/CodeGen/X86/mul64.ll (diff) |
 | llvm/test/CodeGen/X86/masked_gather_scatter.ll (diff) |
 | llvm/lib/CodeGen/MachineCombiner.cpp (diff) |
 | llvm/test/CodeGen/RISCV/mul.ll (diff) |
 | llvm/test/CodeGen/X86/lea-opt-cse4.ll (diff) |
 | llvm/test/CodeGen/RISCV/alu64.ll (diff) |
 | llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll (diff) |
 | llvm/test/CodeGen/X86/avx-vinsertf128.ll (diff) |
Commit
88fd2e4cb59cdea37cf572e8eb79fbaf73a47178
by caroline.concatto[AArch64][SME2] Add multi-vector FP convert from Float to interleave Half/BFloat intrinsic
Add the following intrinsic: FCVTN BFCVTN
NOTE: These intrinsics are still in development and are subject to future changes.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D142025
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 | llvm/include/llvm/IR/IntrinsicsAArch64.td (diff) |
 | llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td (diff) |
 | llvm/lib/Target/AArch64/SMEInstrFormats.td (diff) |
 | llvm/test/CodeGen/AArch64/sme2-intrinsics-cvtn.ll |
Commit
c4fa504f797f68297c252dc91a24c7d37c1de4df
by daniel.kiss[AArch64] Enable libm vectorized functions via SLEEF
It enables trigonometry functions vectorization via SLEEF: http://sleef.org/.
- A new vectorization library enum is added to TargetLibraryInfo.h: SLEEF. - A new option is added to TargetLibraryInfoImpl - ClVectorLibrary: SLEEF. - A comprehensive test case is included in this changeset. - A new vectorization library argument is added to -fveclib: -fveclib=SLEEF.
Trigonometry functions that are vectorized by sleef: acos asin atan atanh cos cosh exp exp2 exp10 lgamma log10 log2 log sin sinh sqrt tan tanh tgamma
Co-authored-by: Stefan Teleman
Reviewed By: paulwalker-arm
Differential Revision: https://reviews.llvm.org/D134719
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 | clang/lib/CodeGen/BackendUtil.cpp (diff) |
 | clang/test/Driver/autocomplete.c (diff) |
 | clang/lib/Driver/ToolChains/Clang.cpp (diff) |
 | llvm/include/llvm/Analysis/VecFuncs.def (diff) |
 | clang/test/Driver/fveclib.c (diff) |
 | clang/include/clang/Driver/Options.td (diff) |
 | llvm/lib/Analysis/TargetLibraryInfo.cpp (diff) |
 | llvm/include/llvm/Analysis/TargetLibraryInfo.h (diff) |
 | clang/include/clang/Basic/CodeGenOptions.h (diff) |
 | llvm/test/Transforms/LoopVectorize/AArch64/sleef-calls-aarch64.ll |
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 | llvm/utils/gn/secondary/llvm/lib/DWARFLinkerParallel/BUILD.gn |
 | llvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn (diff) |
 | llvm/utils/gn/secondary/llvm/tools/llvm-dwarfutil/BUILD.gn (diff) |
 | llvm/utils/gn/secondary/llvm/unittests/BUILD.gn (diff) |
 | llvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel/BUILD.gn |
|
 | compiler-rt/test/sanitizer_common/TestCases/FreeBSD/hexdump.cc |
 | compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc (diff) |
 | compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h (diff) |
Commit
0ccbf911668786fbde7e1107c08c3eeef0f1eb4b
by craig.topper[RISCV] Remove Features from CPUInfo in RISCVTargetParser.
Instead of having separate feature bits, get information from march. Invalid is now implied by empty march. 64-bit is now implied by march starting with "rv64".
Reviewed By: fpetrogalli
Differential Revision: https://reviews.llvm.org/D142230
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 | llvm/lib/TargetParser/RISCVTargetParser.cpp (diff) |
 | llvm/include/llvm/TargetParser/RISCVTargetParser.h (diff) |
 | llvm/utils/TableGen/RISCVTargetDefEmitter.cpp (diff) |
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 | llvm/test/Transforms/InstCombine/sign-test-and-or.ll (diff) |
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 | llvm/utils/TableGen/RISCVTargetDefEmitter.cpp (diff) |
Commit
259fa70885e9e0e9e396b198829769276a6a6069
by ellis.sparky.hoag[PGO] incorrect classof in InstrProfIncrementInst
Class InstrProfIncrementInstStep inherits from InstrProfIncrementInst but cannot cast to InstrProfIncrementInst, because InstrProfIncrementInst::classof does not cover such circumstance。
Function InstrProfiling::run traverse all instruction in a module and try to cast them to InstrProfIncrementInst using dyn_cast, but it will return nullptr if the instruction is InstrProfIncrementInstStep(subclass of InstrProfIncrementInst).
Reviewed By: tejohnson, ellis
Differential Revision: https://reviews.llvm.org/D141579
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 | llvm/include/llvm/IR/IntrinsicInst.h (diff) |
 | llvm/test/Instrumentation/InstrProfiling/before-value-profile-lowering.ll |
|
 | llvm/utils/TableGen/RISCVTargetDefEmitter.cpp (diff) |
Commit
95914abd13ef0e447392f9f5e38487d8471a92b7
by thakisRevert "[llvm] Move bit counting functions to bit.h (NFC)"
This reverts commit f37614b25ccaa9c0710cc8a4fc2ba2fb0fcb9159. Doesn't build on Windows: https://reviews.llvm.org/D142078#4068417
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 | llvm/include/llvm/Support/MathExtras.h (diff) |
 | llvm/include/llvm/ADT/bit.h (diff) |
 | llvm/unittests/ADT/BitTest.cpp (diff) |
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 | llvm/test/Transforms/CorrelatedValuePropagation/udiv-expansion.ll |
Commit
43a59be45d24497dce4795742aacf19987ce3a5c
by lebedev.ri[CVP] Expand bound `udiv`'s, symmetrically with `urem`'s
Symmetrical with the `urem` case, added in 66efb986322b206834e7c9e1eb777fa053912c39.
Simple case: https://alive2.llvm.org/ce/z/gRumLd / https://alive2.llvm.org/ce/z/rxEeC5 Second variant of precondition: https://alive2.llvm.org/ce/z/cAm9TD
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 | llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp (diff) |
 | llvm/test/Transforms/CorrelatedValuePropagation/udiv-expansion.ll (diff) |
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 | clang/lib/Serialization/ASTReader.cpp (diff) |
 | clang/test/OpenMP/declare_mapper_messages.c (diff) |
 | clang/include/clang/Basic/DiagnosticParseKinds.td (diff) |
 | clang/include/clang/Basic/OpenMPKinds.def (diff) |
 |