Changes

Summary

  1. Walk back an overly-aggressive unXFAIL. (details)
  2. [MachineOutliner] NFC: Add debug output to overlap pruning code (details)
  3. Reland "[mlgo] Hook up the interactive runner to the mlgo-ed passes" (details)
  4. [mlir][gpu] Allow distributing to different level of IDs without failing (details)
  5. [mlgo] Fix type annotation in log_reader, for older python3 versions (details)
  6. [mlgo] fixes for old python versions (details)
  7. [Sanitizers] Fix read buffer overrun in scanning loader commands (details)
  8. [UpdateTestChecks][NFC] Share the code to get CHECK prefix between all scripts (details)
  9. [AArch64] fix bug #55005 handle DW_CFA_GNU_NegateRAState (details)
  10. [mlgo] Disable mlgo tests when python version is 6 (details)
  11. [mlgo] only enable interactive mode tests on linux (details)
  12. Revert "[mlir][linalg] Fix crash in vectorizer when expanding affine apply" (details)
  13. Revert "[mlir][linalg] Make Linalg vectorizer lower affine.apply" (details)
  14. [MachineOutliner] NFC: Add debug output to populateMapper (details)
  15. [Driver] Remove deprecated -fsanitize-system-blacklist= (details)
  16. [MachineOutliner] Improve mapper statistics (details)
  17. [RISCV] Don't use constantpool for floating-point value if the value can be easily constructed by integer sequence and a floating-point move. (details)
  18. Update test to be the correct version (details)
  19. [X86][FP16] Lower half->i16 into vcvttph2[u]w directly (details)
  20. [PowerPC] aix32-cc-abi-vaarg.ll - improve DAG checks (details)
  21. llvm/test/CodeGen/MLRegalloc: Exclude python<=3.8 (D143218) (details)
  22. [X86] Add basic vector handling for ISD::ABDS/ABDU (absolute difference) nodes (details)
  23. Revert "[AArch64] Unconditionally use DW_EH_PE_indirect|DW_EH_PE_pcrel personality/lsda/ttype encodings" (details)
  24. [SVE][CodeGen] Relax all true isel requirement for predicated operations that have no side effects. (details)
  25. AMDGPU: Add some regression tests that infinite looped combiner (details)
  26. [AArch64] Add tests for inefficient generation of ST2s. NFC (details)
  27. [Libomptarget] Fix disabling amdgpu on non-Linux. (details)
  28. [Libomptarget] Add the same to the other AMD plugin (details)
  29. [X86] Swap bool reduction predicates in v2i64/v4i32 tests (details)
  30. [GlobalISel] Enable patterns with multiple output operands for the GlobalISelEmitter (details)
  31. [mlir][SCF] Disallow multiple blocks in scf.if "else" region (details)
  32. [X86] pr53419.ll - add missing v2i8/v4i8/v8i8 coverage to reduction tests (details)
  33. [X86] combinePredicateReduction - fold any_of(setcc(x,y,ne)) -> pmovmskb(not(pcmpeqb())) (details)
  34. [AArch64][GlobalISel] Selection for i8 buildvectors (details)
  35. [ADT] STLFunctionalExtras.h - fix llvm-include-order clang-tidy warning (details)
  36. [TableGen] Error.h - remove quotes to silence clang-tidy llvm-namespace-comment warning (details)
  37. [compiler-rt] Disable default config files for tests (details)
  38. [compiler-rt] Fix FORTIFY_SOURCE -> _FORTIFY_SOURCE reference (NFC) (details)
  39. [LV] Add initial tests for sinking loads past other instructions. (details)
  40. Revert "[Sanitizers] Fix read buffer overrun in scanning loader commands" (details)
  41. [X86] combinePredicateReduction - pull out repeated DAG.getContext() calls. NFC. (details)
Commit e07452d9316a4f445a2a018c7e6b96bd5b5fb03d by Adrian Prantl
Walk back an overly-aggressive unXFAIL.
The file was modifiedcross-project-tests/debuginfo-tests/llgdb-tests/static-member-2.cpp (diff)
Commit 51fa03200f7e7e456ccd9b62d522d29429b2d4e6 by Jessica Paquette
[MachineOutliner] NFC: Add debug output to overlap pruning code

This had no debug output. Since it was committed as NFC, it had no testcase.

The me of today was nerdsniped by the me of 6 years ago and decided that this
ought to have a testcase and some debug output.
The file was modifiedllvm/lib/CodeGen/MachineOutliner.cpp (diff)
The file was addedllvm/test/CodeGen/AArch64/machine-outliner-overlap.mir
Commit 5fd51fcba6a5d675e60a59b4ed6c449efe70f41b by mtrofin
Reland "[mlgo] Hook up the interactive runner to the mlgo-ed passes"

This reverts commit a772f0bb920a4957fb94dd8dbe45943809fd0ec3.

The main problem was related to how we handled `dbgs()` from the hosted
compiler. Using explicit `subprocess.communicate`, and not relying on
dbgs() being flushed until the end appears to address the problem.

Also some fixes due to some bots running older pythons, so we can't have
nice things like `int | float` and such.
The file was modifiedllvm/include/llvm/Analysis/ReleaseModeModelRunner.h (diff)
The file was addedllvm/test/Transforms/Inline/ML/interactive-mode.ll
The file was modifiedllvm/include/llvm/Analysis/InteractiveModelRunner.h (diff)
The file was modifiedllvm/lib/CodeGen/RegAllocPriorityAdvisor.cpp (diff)
The file was addedllvm/test/Transforms/Inline/ML/Inputs/interactive_main.py
The file was modifiedllvm/include/llvm/Analysis/InlineModelFeatureMaps.h (diff)
The file was addedllvm/test/CodeGen/MLRegalloc/interactive-mode.ll
The file was modifiedllvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp (diff)
The file was modifiedllvm/lib/CodeGen/MLRegallocPriorityAdvisor.cpp (diff)
The file was modifiedllvm/lib/CodeGen/MLRegallocEvictAdvisor.cpp (diff)
The file was addedllvm/lib/Analysis/models/interactive_host.py
The file was modifiedllvm/lib/Analysis/MLInlineAdvisor.cpp (diff)
The file was modifiedllvm/lib/CodeGen/RegAllocEvictionAdvisor.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/MLModelRunner.h (diff)
The file was addedllvm/test/CodeGen/MLRegalloc/Inputs/interactive_main.py
The file was modifiedllvm/lib/Analysis/InlineAdvisor.cpp (diff)
Commit a7686db801ff6a96da4b6245362c87a627fdafbe by thomasraoux
[mlir][gpu] Allow distributing to different level of IDs without failing

Change map_nested_foreach_to_threads to ignore foreach_thread not
mapping to threads, this will allow us to call
mapNestedForeachToThreadsImpl with different set of ids to lower
multiple levels. Also adds warpIds attributes.

Differential Revision: https://reviews.llvm.org/D143298
The file was modifiedmlir/include/mlir/Dialect/GPU/TransformOps/GPUDeviceMappingAttr.td (diff)
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp (diff)
The file was modifiedmlir/test/Dialect/GPU/transform-gpu-failing.mlir (diff)
The file was modifiedmlir/test/Dialect/GPU/transform-gpu.mlir (diff)
The file was modifiedmlir/include/mlir/Dialect/GPU/TransformOps/GPUTransformOps.td (diff)
The file was modifiedmlir/lib/Dialect/GPU/TransformOps/GPUTransformOps.cpp (diff)
Commit b72e893d1d8e198f8f1674c393d27e07423c377e by mtrofin
[mlgo] Fix type annotation in log_reader, for older python3 versions
The file was modifiedllvm/lib/Analysis/models/log_reader.py (diff)
Commit d62cdfadc05436cc4ea0bb6e1875a4c621f33a14 by mtrofin
[mlgo] fixes for old python versions
The file was modifiedllvm/lib/Analysis/models/interactive_host.py (diff)
The file was modifiedllvm/lib/Analysis/models/log_reader.py (diff)
Commit abbd4da2043856f443e3d1c8d2c7627cac93a6ac by m_borsa
[Sanitizers] Fix read buffer overrun in scanning loader commands

The fix only affects Darwin, but to write the test I had to modify
the MemoryMappingLayout class which is used by all OSes,
to allow for mocking of image header (this change should be NFC). Hence no [Darwin] in the subject
so I can get more eyes on it.

While looking for a memory gap to put the shadow area into, the sanitizer code
scans through the loaded images, and for each image it scans through its
loader command to determine the occupied memory ranges.

While doing so, if the 'segment load' (kLCSegment) loader comand is encountered, the command scanning function
returns success (true), but does not decrement the command list iterator counter.
The result is that the function is called again and again, with the iterator counter
now being too high. The command scanner keeps updating the loader command pointer,
by using the command size field.

If the loop counter is too high, the command pointer
lands into unintended area ( beyond <header addr>+sizeof(mac_header64)+header->sizeofcmds ),
and result depends on the random content found there.

The random content interpreted as loader command might contain a large integer value in the
cmdsize field - this value is added to the current loader command pointer,
which might now point to an inaccessible memory address. It can occasionally result
in a crash if it happens to run beyond the mapped memory segment.

Note that when the area after the loader command list
contains zeros or small integers only, the loop will end normally and the problem
will go unnoticed. So it happened until now since having a some big value
after the header area, falling into command size field is a pretty rare situation.

The fix makes sure that the iterator counter gets updated when the segment load (kLCSegment)
loader command is found too, and in the same code location so the updates will always go together.

Undo the changes in the sanitizer_procmaps_mac.cpp to see the test failing.

rdar://101161047
rdar://102819707

Differential Revision: https://reviews.llvm.org/D142164
The file was addedcompiler-rt/lib/sanitizer_common/tests/sanitizer_procmaps_mac_test.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_procmaps_mac.cpp (diff)
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_procmaps.h (diff)
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/CMakeLists.txt (diff)
Commit ae691c381261311c4ae2697fc5b1ae2e2113ca6c by shengchen.kan
[UpdateTestChecks][NFC] Share the code to get CHECK prefix between all scripts

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D143307
The file was modifiedllvm/utils/update_mca_test_checks.py (diff)
The file was modifiedllvm/utils/update_mir_test_checks.py (diff)
The file was modifiedllvm/utils/update_test_checks.py (diff)
The file was modifiedllvm/utils/update_analyze_test_checks.py (diff)
The file was modifiedllvm/utils/update_cc_test_checks.py (diff)
The file was modifiedllvm/utils/update_llc_test_checks.py (diff)
The file was modifiedllvm/utils/UpdateTestChecks/common.py (diff)
Commit 9921197920fc3e9ad9605bd8fe0e835ca2dd41a5 by spop
[AArch64] fix bug #55005 handle DW_CFA_GNU_NegateRAState

GCC on AArch64 uses DW_CFA_GNU_NegateRAState for return address signing.

Differential Revision: https://reviews.llvm.org/D142572
The file was addedbolt/test/AArch64/Inputs/dw_cfa_gnu_window_save.yaml
The file was modifiedbolt/lib/Core/Exceptions.cpp (diff)
The file was addedbolt/test/AArch64/dw_cfa_gnu_window_save.test
Commit 79f7a5e02bf6612af9da4f96c47d60d370dd84d0 by mtrofin
[mlgo] Disable mlgo tests when python version is 6

Supporting 3.6 requires a bit too much of a change in the mlgo test python scripts.
The file was modifiedllvm/lib/Analysis/models/interactive_host.py (diff)
The file was addedllvm/test/Transforms/Inline/ML/lit.local.cfg
The file was addedllvm/test/CodeGen/MLRegalloc/lit.local.cfg
Commit 445ea1e77751246c0b53d78e531500c3d281c1d0 by mtrofin
[mlgo] only enable interactive mode tests on linux

`os.mkfifo` may not be supported everywhere (e.g. windows).
The file was modifiedllvm/test/CodeGen/MLRegalloc/interactive-mode.ll (diff)
The file was modifiedllvm/test/Transforms/Inline/ML/interactive-mode.ll (diff)
Commit efae6c9f37862a0f9e946ef2b1103cfbd36a07c6 by diegocaballero
Revert "[mlir][linalg] Fix crash in vectorizer when expanding affine apply"

This reverts commit 62570b722fa36fddde0d24bf06a245efadda66f5.
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp (diff)
The file was modifiedmlir/test/Dialect/Linalg/vectorization.mlir (diff)
Commit f453589039129d90c46930245129d313f0b38714 by diegocaballero
Revert "[mlir][linalg] Make Linalg vectorizer lower affine.apply"

This reverts commit c7b1176e9afbfcc3da9482abbf7c1eb8793ff254.
The file was modifiedmlir/test/Dialect/Linalg/vectorization.mlir (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp (diff)
Commit d1359acb9a4adba2dc872be017eab09a6a88058c by Jessica Paquette
[MachineOutliner] NFC: Add debug output to populateMapper

Adding debug output to improve outliner debuggability + testability.

Move `nooutline` attribute test into the new debug output test.
The file was modifiedllvm/lib/CodeGen/MachineOutliner.cpp (diff)
The file was addedllvm/test/CodeGen/AArch64/machine-outliner-mapper-debug-output.mir
The file was removedllvm/test/CodeGen/AArch64/machine-outliner-nooutline-attribute.mir
Commit 16749d28cc56b441dc252f7017fbf532ea41f8c4 by i
[Driver] Remove deprecated -fsanitize-system-blacklist=

Unused in the wild.
The file was modifiedclang/include/clang/Driver/Options.td (diff)
Commit 92d3672452db260f431b9219faf57c5f8c7b876b by Jessica Paquette
[MachineOutliner] Improve mapper statistics

Add a test for statistics as well.

The mapper size stats were nested in a loop unnecessarily. Move them out.

Give existing stats better names, and add one which also tracks the number of
sentinels added.
The file was modifiedllvm/lib/CodeGen/MachineOutliner.cpp (diff)
The file was addedllvm/test/CodeGen/AArch64/machine-outliner-mapper-stats.mir
Commit d02b9869b2422a7995505e3ef0900da7ef822497 by hankuan.chen
[RISCV] Don't use constantpool for floating-point value if the value can be easily constructed by integer sequence and a floating-point move.

In addition, this commit does the following combine

vfmv.v.f + fmv.[dhw].x -> vmv.v.x
vfmv.s.f + fmv.[dhw].x -> vmv.s.x
vfmerge.vfm + fmv.[dhw].x -> vmerge.vxm

Differential Revision: https://reviews.llvm.org/D142953
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/float-intrinsics.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/half-imm.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fround-sdnode.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/ceil-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/round-vp.ll (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp (diff)
The file was modifiedllvm/test/CodeGen/RISCV/float-select-verify.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/half-intrinsics.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rint-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/half-convert.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/float-round-conv.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/half-round-conv.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extractelt-fp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/select-const.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/zfhmin-imm.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/float-round-conv-sat.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/froundeven-sdnode.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/zfh-imm.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/float-round-conv.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/codemodel-lowering.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/select-optimize-multiple.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/fp-imm.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/float-convert.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/float-imm.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/floor-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-half.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/half-round-conv-sat.ll (diff)
Commit b514b45d7baa7f9b35bc2cd9eb95662b130af80d by Jessica Paquette
Update test to be the correct version

machine-outliner-mapping-stats.mir
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir (diff)
Commit 7f12efa88e17548d98f3e7425687f4afe0df34ed by phoebe.wang
[X86][FP16] Lower half->i16 into vcvttph2[u]w directly

Reviewed By: LuoYuanke, RKSimon

Differential Revision: https://reviews.llvm.org/D143170
The file was modifiedllvm/test/CodeGen/X86/avx512-cvt.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vec-strict-fptoint-256-fp16.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vec-strict-fptoint-512.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-vl-intrinsics.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
Commit 9ffe58dc273f1a29207893444b0b12291efb47bf by llvm-dev
[PowerPC] aix32-cc-abi-vaarg.ll - improve DAG checks

More closely match the actual output and should make the merge with D127115 easier.
The file was modifiedllvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll (diff)
Commit e006c7dfa79a245bd3ada7620e72e97c028b7645 by geek4civic
llvm/test/CodeGen/MLRegalloc: Exclude python<=3.8 (D143218)

Type hint `list[foo]` isn't accepted by python-3.8
(Seems requires `typing.List`)
The file was modifiedllvm/test/CodeGen/MLRegalloc/lit.local.cfg (diff)
Commit 8f25e382c5b1bbaafd738f44de856c85ce845bbe by llvm-dev
[X86] Add basic vector handling for ISD::ABDS/ABDU (absolute difference) nodes

I'm intending to add generic legalization in the future, but for now I've added basic support to targets that have the necessary MIN/MAX support to expand to SUB(MAX(X,Y),MIN(X,Y)).

This exposed a couple of issues with the DAG combines - in particular we need to catch trunc(abs(sub(ext(x),ext(y)))) patterns earlier before the SSE/AVX vector trunc expansion folds trigger.

Differential Revision: https://reviews.llvm.org/D142288
The file was modifiedllvm/test/CodeGen/X86/abdu-vector-512.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/abdu-vector-128.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/midpoint-int-vec-512.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/abds-vector-256.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/abds-vector-512.ll (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/abdu-vector-256.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/midpoint-int-vec-256.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/abds-vector-128.ll (diff)
Commit 5b2549b0d2834a653be60b52885bdc9f21abc2ee by geek4civic
Revert "[AArch64] Unconditionally use DW_EH_PE_indirect|DW_EH_PE_pcrel personality/lsda/ttype encodings"

It causes failurs in clang-interpreter.

This reverts commit 565a1fb1334b8cf510af1338cae3f50815a99f90, aka llvmorg-17-init-1048-g565a1fb1334b
The file was modifiedllvm/test/CodeGen/AArch64/pic-eh-stubs.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/arm64-big-endian-eh.ll (diff)
The file was modifiedllvm/test/DebugInfo/AArch64/eh_frame_personality.ll (diff)
The file was modifiedllvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll (diff)
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp (diff)
Commit 4b051b4248bb6f9971dd1cf87fe311ebe9be917e by paul.walker
[SVE][CodeGen] Relax all true isel requirement for predicated operations that have no side effects.

We have isel patterns to allow predicated operations to emit
unpredicated instructions when the predicate is all true. However,
the predicated operations named #_PRED have no requirement for the
result of the inactive lanes and so when those operations have no
side effects, floating point exceptions for example, we can also
safely emit unpredicated instructions. Doing this allows better
register allocation, instruction scheduling and also enables more
usage of instructions that take immediate operands.

NOTE: This patch does not convert all possible instances but
instead focuses on the cases that are testable once D141937 lands.

Depends on D141937

Differential Revision: https://reviews.llvm.org/D141938
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-extends.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve2-sra.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-undef.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-div.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-rem.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-to-fp.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-arith.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-store.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-vselect.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-load.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-immediates.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-mulh.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-shifts.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-shifts-undef.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-immediates.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-vselect.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-extends.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-sdiv-pow2.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-rev.ll (diff)
Commit d53699cc4570b18e41dbda4a2ee643a8db5ef66f by arsenm2
AMDGPU: Add some regression tests that infinite looped combiner

Prevent a future patch from introducing an infinite combine loop.
The file was modifiedllvm/test/CodeGen/AMDGPU/fneg-combines.new.ll (diff)
Commit ef30e57469f1ee53ba44dab86d1975decd8da852 by david.green
[AArch64] Add tests for inefficient generation of ST2s. NFC
The file was modifiedllvm/test/CodeGen/AArch64/vldn_shuffle.ll (diff)
Commit 71fb11ff34691ab08cdb0d174ea058e44ad2fea6 by jhuber6
[Libomptarget] Fix disabling amdgpu on non-Linux.

Previously, on non-Linux, amdgpu would get enabled whatever the CPU architecture.

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D143017
The file was modifiedopenmp/libomptarget/plugins/cuda/CMakeLists.txt (diff)
The file was modifiedopenmp/libomptarget/plugins-nextgen/cuda/CMakeLists.txt (diff)
The file was modifiedopenmp/libomptarget/plugins-nextgen/amdgpu/CMakeLists.txt (diff)
Commit cc72df2b7bf091d1c7109460e1ad6656d782eb23 by jhuber6
[Libomptarget] Add the same to the other AMD plugin

Summary:
The previous patch also needed to apply this to the other AMDGPU plugin,
this will be removed soon but it should be correct while it's here at
least.
The file was modifiedopenmp/libomptarget/plugins/amdgpu/CMakeLists.txt (diff)
Commit c72aeaad28e1206dac007be9bc27e2c266906645 by llvm-dev
[X86] Swap bool reduction predicates in v2i64/v4i32 tests

The v2i64 case has more scope for optimization with ne than ugt cases, and we already have very similar icmp sgt coverage via the v4i64 tests
The file was modifiedllvm/test/CodeGen/X86/vector-compare-any_of.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-compare-all_of.ll (diff)
Commit cfba328183f56765721b59e7fe8eb2a261bff340 by arsenm2
[GlobalISel] Enable patterns with multiple output operands for the GlobalISelEmitter

This enables writing patterns with mutliple output operands in the input pattern for GlobalISel
The file was addedllvm/test/TableGen/GlobalISelEmitter-multiple-output-discard.td
The file was addedllvm/test/TableGen/GlobalISelEmitter-multiple-output.td
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp (diff)
Commit d0a7bb9b1ad768dfd9b08f66a0e744584b49181f by springerm
[mlir][SCF] Disallow multiple blocks in scf.if "else" region

The "then" region allows only a single block. The same should be the case for the "else" region.

Differential Revision: https://reviews.llvm.org/D143253
The file was modifiedmlir/include/mlir/IR/OpBase.td (diff)
The file was modifiedmlir/include/mlir/Dialect/SCF/IR/SCFOps.td (diff)
Commit 3f42cc1e56152fed04d558e72e17fd5026e075c7 by llvm-dev
[X86] pr53419.ll - add missing v2i8/v4i8/v8i8 coverage to reduction tests
The file was modifiedllvm/test/CodeGen/X86/pr53419.ll (diff)
Commit 29c3a2c6dbce4b8232ea21944abc18a3e165d26a by llvm-dev
[X86] combinePredicateReduction - fold any_of(setcc(x,y,ne)) -> pmovmskb(not(pcmpeqb()))

Improves codegen for v2i64 cases, similar to what we already do for all_of(setcc(x,y,eq))
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-compare-any_of.ll (diff)
Commit d4a8a59441052165ccdd6ca493ce124be5e80d9e by david.green
[AArch64][GlobalISel] Selection for i8 buildvectors

Legalization for i8 buildvectors is available (as in
615695de27e417d6b444cd983e6f636373afc8c9), but selection
would fail due to i8 types not being handled. This adds
basic support like other type sizes.

Differential Revision: https://reviews.llvm.org/D143002
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-unmerge.mir (diff)
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp (diff)
Commit 810fdfd08439bbbe33f17a00c045f054a91e0be3 by llvm-dev
[ADT] STLFunctionalExtras.h - fix llvm-include-order clang-tidy warning
The file was modifiedllvm/include/llvm/ADT/STLFunctionalExtras.h (diff)
Commit 5404ee392410f7754b0a1d81b3d33a88c9d1882e by llvm-dev
[TableGen] Error.h - remove quotes to silence clang-tidy llvm-namespace-comment warning
The file was modifiedllvm/include/llvm/TableGen/Error.h (diff)
Commit 8ab762557fb057af1a3015211ee116a975027e78 by sam
[compiler-rt] Disable default config files for tests

Without this, if hardening measures like FORTIFY_SOURCE are are in
/etc/clang/*.cfg, many sanitizer tests will die before the sanitizer
can trap the problem being tested, because e.g. the _chk variants
of common functions will abort first.

This gets the number of failing tests down from 42->3 for me (and the
remaining 3 are unrelated).

See: 52ce6776cf98e993c6ec04ae54b52e1354fff917
See: 136f77805fd89cd30e69b3d1204fbf7efedd9a12
Closes: https://github.com/llvm/llvm-project/issues/60394

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D143322
The file was modifiedcompiler-rt/test/lit.common.cfg.py (diff)
Commit ca50897a763c7dd0ec7c9b3ec003eeca802c5525 by sam
[compiler-rt] Fix FORTIFY_SOURCE -> _FORTIFY_SOURCE reference (NFC)

As pointed out by maskray.

Fixes: 8ab762557fb057af1a3015211ee116a975027e78
The file was modifiedcompiler-rt/test/lit.common.cfg.py (diff)
Commit fd5bccb8b15a58232d4ffb81cb801a32ef1a2716 by flo
[LV] Add initial tests for sinking loads past other instructions.

Extend test coverage for sinking loads that use fixed order recurrences.
The file was addedllvm/test/Transforms/LoopVectorize/fixed-order-recurrences-memory-instructions.ll
Commit 056769cdbc60569b01c2f1ff67507f64ad83771f by douglas.yung
Revert "[Sanitizers] Fix read buffer overrun in scanning loader commands"

This reverts commit abbd4da2043856f443e3d1c8d2c7627cac93a6ac.

This change is breaking many bots including:
- http://45.33.8.238/linux/98629/step_10.txt
- https://buildkite.com/llvm-project/llvm-main/builds/6461#01861c4f-9d9c-4781-88f7-d6ccddcb4b06/919-8848
- https://lab.llvm.org/buildbot/#/builders/94/builds/13196
- https://lab.llvm.org/buildbot/#/builders/45/builds/10633
- https://lab.llvm.org/buildbot/#/builders/247/builds/1238
- https://lab.llvm.org/buildbot/#/builders/70/builds/33424
- https://lab.llvm.org/buildbot/#/builders/168/builds/11693
- https://lab.llvm.org/buildbot/#/builders/74/builds/17006
- https://lab.llvm.org/buildbot/#/builders/85/builds/14120
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/CMakeLists.txt (diff)
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_procmaps.h (diff)
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_procmaps_mac.cpp (diff)
The file was removedcompiler-rt/lib/sanitizer_common/tests/sanitizer_procmaps_mac_test.cpp
Commit 12ef0d31e0c815e74efa3f9ab57594cc0b22dd3c by llvm-dev
[X86] combinePredicateReduction - pull out repeated DAG.getContext() calls. NFC.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)