SuccessChanges

Summary

  1. [RISCV] Remove unused RISCV::VLEFF and VLEFF_MASK. NFC (details)
  2. [PowerPC][LLD] Make sure that the correct Thunks are used. (details)
  3. [WebAssembly] Fix argument types in SIMD narrowing intrinsics (details)
  4. [mlir][linalg][NFC] Make reshape folding control more fine grain (details)
  5. [mlir][vector] Fix typo (details)
  6. [gn build] Support compiler-rt/profile on Windows (details)
  7. [flang] Runtime must defer formatted/unformatted determination (details)
  8. Allow llvm-dis to disassemble multiple files (details)
  9. [flang] Fix race condition in runtime (details)
  10. [AArch64] Fix namespace issue. NFC (details)
  11. [flang] Implement NAMELIST I/O in the runtime (details)
  12. [RISCV] Minor vector instruction tablegen cleanup. NFC (details)
  13. [libunwind] NFC: Use macros to accommodate differences in representation of PowerPC assemblers (details)
  14. [Fuchsia][CMake] Update OSX deployment target (details)
  15. [flang][OpenMP] Add semantic check for occurrence of constructs nested inside a SIMD region (details)
Commit 6660319cef6edf114a4cc30013039fa5553ba408 by craig.topper
[RISCV] Remove unused RISCV::VLEFF and VLEFF_MASK. NFC

Looks like these got left behind when vleff isel was moved to
X86ISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit f0adf3a24cdedb4c48e49a8792c5cfbd40ba3345 by stefanp
[PowerPC][LLD] Make sure that the correct Thunks are used.

This fixes an issue where mixed TOC / NOTOC calls can call the incorrect
thunks if a previous thunk already exists. The issue appears when a TOC
funciton calls a NOTOC callee and then a different NOTOC function calls the same
NOTOC callee. In this case the linker would sometimes incorrectly call the
same thunk for both cases.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D101837
The file was addedlld/test/ELF/ppc64-pcrel-cross-link.s
The file was modifiedlld/ELF/Thunks.cpp
Commit b198b9b8974b19c9e8493f8d70c85ac54182597a by tlively
[WebAssembly] Fix argument types in SIMD narrowing intrinsics

The builtins were updated to take signed parameters in 627a52695537, but the
intrinsics that use those builtins were not updated as well. The intrinsic test
did not catch this sign mismatch because it is only reported as an error under
-fno-lax-vector-conversions.

This commit fixes the type mismatch and adds -fno-lax-vector-conversions to the
test to catch similar problems in the future.

Differential Revision: https://reviews.llvm.org/D101979
The file was modifiedclang/lib/Headers/wasm_simd128.h
The file was modifiedclang/test/Headers/wasm.c
Commit 52525cb20ff300d634453fdb3986adf4801f205c by thomasraoux
[mlir][linalg][NFC] Make reshape folding control more fine grain

This expose a lambda control instead of just a boolean to control unit
dimension folding.
This however gives more control to user to pick a good heuristic.
Folding reshapes helps fusion opportunities but may generate sub-optimal
generic ops.

Differential Revision: https://reviews.llvm.org/D101917
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
Commit 71eb32d97ea0c8ccac36287f6c46e582f93dc1f3 by thomasraoux
[mlir][vector] Fix typo
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
Commit 642df18f1437b1fffea2343fa471aebfff128c6e by aeubanks
[gn build] Support compiler-rt/profile on Windows

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D101961
The file was modifiedllvm/utils/gn/secondary/compiler-rt/target.gni
The file was modifiedllvm/utils/gn/secondary/compiler-rt/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/BUILD.gn
The file was modifiedllvm/utils/gn/build/toolchain/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/BUILD.gn
Commit 199a623ebf808a01e920ebd9904c99e633c33a1f by pklausler
[flang] Runtime must defer formatted/unformatted determination

What the Fortran standard calls "preconnected" external I/O units
might not be known to be connected to unformatted or formatted files
until the first I/O data transfer statement is executed.
Support this deferred determination by representing the flag as
a tri-state Boolean and adapting its points of use.

Differential Revision: https://reviews.llvm.org/D101929
The file was modifiedflang/runtime/connection.h
The file was modifiedflang/runtime/io-api.cpp
The file was modifiedflang/runtime/io-stmt.cpp
The file was modifiedflang/runtime/unit.h
The file was modifiedflang/runtime/unit.cpp
Commit 22aece57beb6eab43f4f88d565d5cec1934fe36e by matthew.voss
Allow llvm-dis to disassemble multiple files

Differential Revision: https://reviews.llvm.org/D101110
The file was modifiedllvm/tools/llvm-dis/llvm-dis.cpp
The file was addedllvm/test/tools/llvm-dis/multiple-files.ll
Commit 4f41994c13741b8ffe0c0cc9f6474eabc1293d89 by pklausler
[flang] Fix race condition in runtime

The code that initializes the default units 5 & 6 had
a race condition that would allow threads access to the
unit map before it had been populated.

Also add some missing calls to va_end() that will never
be called (they're in program abort situations) but might
elicit warnings if absent.

Differential Revision: https://reviews.llvm.org/D101928
The file was modifiedflang/runtime/io-error.cpp
The file was modifiedflang/runtime/terminator.cpp
The file was modifiedflang/runtime/unit.cpp
Commit 306370be0bf2257124c262ae5c8a7a7180eb42a0 by i
[AArch64] Fix namespace issue. NFC
The file was modifiedllvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
Commit 6a1c3efa051e012aaf102b7d9e7e428a58ea8ad9 by pklausler
[flang] Implement NAMELIST I/O in the runtime

Add InputNamelist and OutputNamelist as I/O data transfer APIs
to be used with internal & external list-directed I/O; delete the
needless original namelist-specific Begin... calls.
Implement NAMELIST output and input; add basic tests.

Differential Revision: https://reviews.llvm.org/D101931
The file was addedflang/runtime/namelist.cpp
The file was modifiedflang/runtime/format.h
The file was modifiedflang/unittests/RuntimeGTest/tools.h
The file was modifiedflang/runtime/edit-output.cpp
The file was modifiedflang/runtime/io-api.h
The file was modifiedflang/runtime/connection.h
The file was modifiedflang/unittests/RuntimeGTest/NumericalFormatTest.cpp
The file was modifiedflang/runtime/CMakeLists.txt
The file was modifiedflang/include/flang/ISO_Fortran_binding.h
The file was modifiedflang/runtime/edit-input.cpp
The file was modifiedflang/runtime/io-stmt.cpp
The file was modifiedflang/unittests/RuntimeGTest/CMakeLists.txt
The file was modifiedflang/runtime/connection.cpp
The file was addedflang/runtime/namelist.h
The file was addedflang/unittests/RuntimeGTest/Namelist.cpp
The file was modifiedflang/lib/Lower/RTBuilder.h
The file was modifiedflang/runtime/descriptor.h
The file was modifiedflang/lib/Lower/IO.cpp
The file was modifiedflang/runtime/io-api.cpp
The file was modifiedflang/runtime/unit.cpp
The file was modifiedflang/runtime/io-stmt.h
The file was modifiedflang/runtime/descriptor.cpp
The file was modifiedflang/runtime/descriptor-io.h
Commit a577d59db243c1be038f331e0057a37b777a4407 by craig.topper
[RISCV] Minor vector instruction tablegen cleanup. NFC

Use result_type for the IMPLICIT_DEF in masked vector patterns.
This doesn't matter today because result_type and op_type are
always the same.

Use multiclass inheritance to reduce repeated code.
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
Commit 8408d3f2d814b19da450ff162f47981b55a9703a by xingxue
[libunwind] NFC: Use macros to accommodate differences in representation of PowerPC assemblers

Summary:
This NFC patch replaces the representation of registers and the left shift operator in the PowerPC assembly code to allow it to be consumed by the GNU flavored assembler and the AIX assembler.

* Registers - change the representation of PowperPC registers from %rn, %fn, %vsn, and %vrn to the register number alone, e.g., n. The GNU flavored assembler and the AIX assembler are able to determine the register kind based on the context of the instruction in which the register is used.

* Left shift operator - use macro PPC_LEFT_SHIFT to represent the left shift operator. The left shift operator in the AIX assembly language is < instead of <<

Reviewed by: sfertile, MaskRay, compnerd

Differential Revision: https://reviews.llvm.org/D101179
The file was modifiedlibunwind/src/assembly.h
The file was modifiedlibunwind/src/UnwindRegistersSave.S
The file was modifiedlibunwind/src/UnwindRegistersRestore.S
Commit 8cb191b724b734a7432a63eb49f54cb9f4333d51 by phosek
[Fuchsia][CMake] Update OSX deployment target

Use correct spelling of CMAKE_OSX_DEPLOYMENT_TARGET and bump the
minimum version to 10.13 which matches what we use for host tools
in Fuchsia.

Differential Revision: https://reviews.llvm.org/D102013
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
The file was modifiedclang/cmake/caches/Fuchsia.cmake
Commit a40b609958828960ce55a5e266c157491772a67e by arnamoy.bhattacharyya
[flang][OpenMP] Add semantic check for occurrence of constructs nested inside a SIMD region

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D99757
The file was modifiedflang/lib/Semantics/check-omp-structure.h
The file was modifiedflang/test/Semantics/omp-do05.f90
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
The file was modifiedflang/test/Semantics/omp-ordered-simd.f90
The file was addedflang/test/Semantics/omp-nested-simd.f90
The file was modifiedflang/lib/Semantics/check-directive-structure.h