FailedChanges

Summary

  1. [AArch64][SVE] Improve sve.convert.to.svbool lowering (details)
  2. [LoopVectorize] Fix scalarisation crash in widenPHIInstruction for scalable vectors (details)
  3. [llvm-symbolizer] Place Mach-O options into the Mach-O option group. (details)
  4. [llvm-readelf] Unhide short options to match the command guide (details)
  5. [X86][AVX] canonicalizeShuffleMaskWithHorizOp - improve support for 256/512-bit vectors (details)
Commit 6e6f9a636b1917f366821fb0a5c37cde19634c7a by peter.waller
[AArch64][SVE] Improve sve.convert.to.svbool lowering

The sve.convert.to.svbool lowering has the effect of widening a logical
<M x i1> vector representing lanes into a physical <16 x i1> vector
representing bits in a predicate register.

In general, if converting to svbool, the contents of lanes in the
physical register might not be known. For sve.convert.to.svbool the new
lanes are specified to be zeroed, requiring 'and' instructions to mask
off the new lanes. For lanes coming from a ptrue or a comparison,
however, they are known to be zero.

CodeGen Before:
  ptrue p0.s, vl16
  ptrue p1.s
  ptrue p2.b
  and   p0.b, p2/z, p0.b, p1.b
  ret

After:
  ptrue p0.s, vl16
  ret

Differential Revision: https://reviews.llvm.org/D101544
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit b7a11274f90f07537e2151fa4424db257ff9a950 by david.sherwood
[LoopVectorize] Fix scalarisation crash in widenPHIInstruction for scalable vectors

In InnerLoopVectorizer::widenPHIInstruction there are cases where we have
to scalarise a pointer induction variable after vectorisation. For scalable
vectors we already deal with the case where the pointer induction variable
is uniform, but we currently crash if not uniform. For fixed width vectors
we calculate every lane of the scalarised pointer induction variable for a
given VF, however this cannot work for scalable vectors. In this case I
have added support for caching the whole vector value for each unrolled
part so that we can always extract an arbitrary element. Additionally, we
still continue to cache the known minimum number of lanes too in order
to improve code quality by avoiding an extractelement operation.

I have adapted an existing test `pointer_iv_mixed` from the file:

  Transforms/LoopVectorize/consecutive-ptr-uniforms.ll

and added it here for scalable vectors instead:

  Transforms/LoopVectorize/AArch64/sve-widen-phi.ll

Differential Revision: https://reviews.llvm.org/D101294
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 725bc3eb0d5cdce1952e2848c1f170c808d0acde by gbreynoo
[llvm-symbolizer] Place Mach-O options into the Mach-O option group.

In the help output of other tools and in the symbolizer command guide,
Mach-O specific options are in their own section. This change fixes the
symbolizer help output to be consistent.

Differential Revision: https://reviews.llvm.org/D102178
The file was modifiedllvm/tools/llvm-symbolizer/Opts.td
Commit 81900dc4982dc03da859a75c927e1bba95837c30 by gbreynoo
[llvm-readelf] Unhide short options to match the command guide

The readelf command guide shows the short options used as aliases but
these are not found in the help text unless --show-hidden is used, other
tools show aliases with --help. This change fixes the help output to be
consistent with the command guide.

Differential Revision: https://reviews.llvm.org/D102173
The file was modifiedllvm/tools/llvm-readobj/llvm-readobj.cpp
Commit 72e242a286be1c821c521fdc8a778517b193a59e by llvm-dev
[X86][AVX] canonicalizeShuffleMaskWithHorizOp - improve support for 256/512-bit vectors

Extend the HOP(HOP(X,Y),HOP(Z,W)) and SHUFFLE(HOP(X,Y),HOP(Z,W)) folds to handle repeating 256/512-bit vector cases.

This allows us to drop the UNPACK(HOP(),HOP()) custom fold in combineTargetShuffle.

This required isRepeatedTargetShuffleMask to be tweaked to support target shuffle masks taking more than 2 inputs.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/horizontal-shuffle.ll