SuccessChanges

Summary

  1. [MemDep] Use BatchAA in more places (NFCI) (details)
  2. [CSSPGO] Fix return value of getProbeWeight (details)
  3. [Polly] Run polly-update-format. NFC. (details)
  4. [NFC] Directly get GV type (details)
  5. Revert "[X86] Try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies. NFCI." (details)
  6. [mlir][Linalg] Add support for subtensor_insert comprehensive bufferization (3/n) (details)
  7. [msan] [NFC] Add newline to EOF in test. (details)
  8. [AMDGPU] Update SCC defs to VCC when uses are changed to VCC (details)
  9. [mlir][Linalg] NFC - More gracefully degrade lookup into failure during comprehensive bufferization (4/n) (details)
Commit c4fb2a1fc2d8009cd67e69c8db0db7120389a757 by nikita.ppv
[MemDep] Use BatchAA in more places (NFCI)

Previously, we already used BatchAA for individual simple pointer
dependency queries. This extends BatchAA usage for the non-local
case, so that only one BatchAA instance is used for all blocks,
instead of one instance per block.

Use of BatchAA is safe as IR cannot be modified during a MemDep
query.
The file was modifiedllvm/include/llvm/Analysis/MemoryDependenceAnalysis.h
The file was modifiedllvm/lib/Analysis/MemoryDependenceAnalysis.cpp
Commit e475d4d69f04597c3f6c34c8ff1899bf44502a94 by wlei
[CSSPGO] Fix return value of getProbeWeight

Currently we didn't support multiple return type, we work around to use error_code to represent:

1)  The dangling probe.
2)  Ignore the weight of non-probe instruction

While merging the instructions' weight for the whole BB, it will filter out the error code. But If all instructions of the BB give error_code, the outside logic will mark it as a BB requiring the inference algorithm to infer its weight. This is different from the zero value which will be treated as a cold block.

Fix one place that if we can't find the FunctionSamples in the profile data which indicates the BB is cold, we choose to return zero.

Also refine the comments.

Reviewed By: hoy, wenlei

Differential Revision: https://reviews.llvm.org/D102007
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
Commit fb01b1461ad9dbdb5a12a069a11eecb7fcaa458c by llvm-project
[Polly] Run polly-update-format. NFC.

Thanks to Leonard Chan for reporting.
The file was modifiedpolly/include/polly/RewriteByReferenceParameters.h
Commit e8448a598560a7a8546ddb74ec5979974b47ed41 by aeubanks
[NFC] Directly get GV type
The file was modifiedclang/lib/CodeGen/MicrosoftCXXABI.cpp
Commit 7aa89c4a22fd188d9534ccc556892d4f99941697 by 31459023+hctim
Revert "[X86] Try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies. NFCI."

This reverts commit 5ed56a821c0622869739a3ae752eea97a1ee1f48.

Reason: Broke the MSan buildbots. See Phabricator for more info
(https://reviews.llvm.org/rG5ed56a821c0622869739a3ae752eea97a1ee1f48).
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86CmovConversion.cpp
The file was modifiedllvm/lib/Target/X86/X86OptimizeLEAs.cpp
The file was modifiedllvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
The file was modifiedllvm/lib/Target/X86/X86WinAllocaExpander.cpp
The file was modifiedllvm/lib/Target/X86/X86CallFrameOptimization.cpp
The file was modifiedllvm/lib/Target/X86/X86FloatingPoint.cpp
The file was modifiedllvm/lib/Target/X86/X86PadShortFunction.cpp
Commit 6f90955f6949397e20d359e4b914c2d46b35f863 by nicolas.vasilache
[mlir][Linalg] Add support for subtensor_insert comprehensive bufferization (3/n)

Differential revision: https://reviews.llvm.org/D102417
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-func-bufferize.mlir
Commit 597ecf9fb71611ce7c78096cfb0753209d0b05ee by 31459023+hctim
[msan] [NFC] Add newline to EOF in test.
The file was modifiedcompiler-rt/test/tsan/compare_exchange.cpp
Commit 3f7b7e7393f802da480c2e24463a5722da0016e7 by brendon.cahoon
[AMDGPU] Update SCC defs to VCC when uses are changed to VCC

The FixSGPRCopies pass converts instructions to VALU when
removing illegal VGPR to SGPR copies. Instructions that use SCC
are changed to use VCC instead. When that happens, the pass must
also change instructions that define SCC to define VCC.

The pass was not changing the SCC definition when an ADDC is
converted due to a input that is a VGPR to SGPR copy. But, the
initial ADD insruction, which define SCC, is not converted.
This causes a compilation failure due to a use of an undefined
physical register.

This patch adds code that inserts the SCC definition in the
MoveToVALU worklist when a SCC use is converted to a VCC use.

Differential Revision: https://reviews.llvm.org/D102111
The file was addedllvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/udiv64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sdiv64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/srem64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/urem64.ll
Commit dd65f420cd2b983ea1e71ed685c811f00110bafb by nicolas.vasilache
[mlir][Linalg] NFC - More gracefully degrade lookup into failure during comprehensive bufferization (4/n)

Differential revsion: https://reviews.llvm.org/D102420
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp