AbortedChanges

Summary

  1. [Demangle][Rust] Parse char constants (details)
  2. [CaptureTracking] Clean up same instruction check (NFC) (details)
  3. [CFG] Use comesBefore() (NFC) (details)
  4. [clang-format]  PR50326 AlignAfterOpenBracket AlwaysBreak does not keep to the ColumnLimit (details)
  5. [IR] Add BasicBlock::isEntryBlock() (NFC) (details)
  6. [GlobalOpt] add test checks; NFC (details)
  7. [GlobalOpt] add tests for store alignment (PR50253); NFC (details)
  8. [Local] collectBitParts - early-out from binops. NFCI. (details)
  9. [X86] Try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies (REAPPLIED). NFCI. (details)
  10. [InstCombine] InstCombinerImpl::visitOr - enable bitreverse matching (details)
  11. [Local] collectBitParts - bail out if we find more than one root input value. (details)
  12. [X86][Atom] Fix vector integer multiplication resource/throughputs (details)
  13. [CFG] Move reachable from entry checks into basic block variant (details)
  14. IfConverter::MeetIfcvtSizeLimit - Fix uninitialized variable warnings. NFCI. (details)
  15. SampleProfileLoader::inlineHotFunctionsWithPriority - Fix uninitialized variable warning. NFCI. (details)
  16. X86SpeculativeLoadHardeningPass::hardenValueInRegister - assert that we have a i8/i16/i32/i64 sized register. NFCI. (details)
  17. [TableGen] TreePatternNode::isIsomorphicTo - early out for matching leafs. NFCI. (details)
  18. Revert rG632668c1c0e7dcf97154d2e377491cdc8cb6963c : "[TableGen] TreePatternNode::isIsomorphicTo - early out for matching leafs. NFCI." (details)
  19. [X86] X86CmovConverterPass::convertCmovInstsToBranches - take a copy of the DebugLoc not a reference as it may be deleted. (details)
  20. [X86] X86OptimizeLEAPass::replaceDebugValue - take a copy of the DebugLoc not a reference as it may be deleted. (details)
Commit 2ba49f6ae611b1dfd1dd64fe0fc4c0143bedc271 by tomasz.miasko
[Demangle][Rust] Parse char constants

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D102524
The file was modifiedllvm/test/Demangle/rust.test
The file was modifiedllvm/include/llvm/Demangle/RustDemangle.h
The file was modifiedllvm/lib/Demangle/RustDemangle.cpp
Commit f765e54db2f1bafeed4cf62fa0d03d66ff13e548 by nikita.ppv
[CaptureTracking] Clean up same instruction check (NFC)

Check the BeforeHere == I case once in shouldExplore, instead of
handling it in four different places.
The file was modifiedllvm/lib/Analysis/CaptureTracking.cpp
Commit 6418bab6f8827960b9d161f5c9c2b8f9702c80e0 by nikita.ppv
[CFG] Use comesBefore() (NFC)

Use comesBefore() instead of performing an instruction walk. In
line with the previous implementation, instructions are considered
to reach themselves.
The file was modifiedllvm/lib/Analysis/CFG.cpp
Commit eae445f65d077304703e3290ddb4ff28f6d65ff4 by mydeveloperday
[clang-format]  PR50326 AlignAfterOpenBracket AlwaysBreak does not keep to the ColumnLimit

https://bugs.llvm.org/show_bug.cgi?id=50326

{D93626} caused a regression in terms of formatting a function ptr, incorrectly thinking it was a C-Style cast.

This cased a formatter regression between clang-format-11 and clang-format-12

```
void bar()
{
    size_t foo = function(Foooo, Barrrrr, Foooo, Barrrr, FoooooooooLooooong);

    size_t foo = function(
        Foooo, Barrrrr, Foooo, Barrrr, FoooooooooLooooong, BarrrrrrrrrrrrLong,
        FoooooooooLooooong);

    size_t foo = (*(function))(Foooo, Barrrrr, Foooo, FoooooooooLooooong);

    size_t foo = (*(
        function))(Foooo, Barrrrr, Foooo, Barrrr, FoooooooooLooooong,
        BarrrrrrrrrrrrLong, FoooooooooLooooong);
}
```

became

```
void bar()
{
    size_t foo1 = function(Foooo, Barrrrr, Foooo, Barrrr, FoooooooooLooooong);

    size_t foo2 = function(
        Foooo, Barrrrr, Foooo, Barrrr, FoooooooooLooooong, BarrrrrrrrrrrrLong,
        FoooooooooLooooong);

    size_t foo3 = (*(function))(Foooo, Barrrrr, Foooo, FoooooooooLooooong);

    size_t foo4 = (*(
        function))(Foooo, Barrrrr, Foooo, Barrrr, FoooooooooLooooong, BarrrrrrrrrrrrLong, FoooooooooLooooong);
}
```

This fixes this issue by simplify the clause to be specific about what is wanted rather than what is not.

Reviewed By: curdeius, HazardyKnusperkeks

Differential Revision: https://reviews.llvm.org/D102392
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
Commit fb9ed1979a712a86c246dc136f8134e8e97a883c by nikita.ppv
[IR] Add BasicBlock::isEntryBlock() (NFC)

This is a recurring and somewhat awkward pattern. Add a helper
method for it.
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/lib/Passes/StandardInstrumentations.cpp
The file was modifiedllvm/lib/Analysis/MemorySSA.cpp
The file was modifiedllvm/lib/Transforms/Scalar/MergeICmps.cpp
The file was modifiedllvm/lib/Transforms/Utils/BasicBlockUtils.cpp
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was modifiedllvm/lib/IR/BasicBlock.cpp
The file was modifiedllvm/lib/Analysis/CFG.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was modifiedllvm/include/llvm/IR/BasicBlock.h
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was modifiedllvm/lib/Analysis/LazyValueInfo.cpp
The file was modifiedllvm/lib/Analysis/CaptureTracking.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
Commit 6e1a6f65371057224e1c5c79ba51a9916812021e by spatel
[GlobalOpt] add test checks; NFC

I'm also adding an explicit data layout, so we can
confirm that alignment requirements/prefs are met.

I tried to use complete/scripted CHECK lines here,
but that fails with 1 of the globals, and not sure why.
The file was modifiedllvm/test/Transforms/GlobalOpt/externally-initialized-global-ctr.ll
Commit 23f7d651b682ea387eaae99f0888e6ca916039cb by spatel
[GlobalOpt] add tests for store alignment (PR50253); NFC
The file was addedllvm/test/Transforms/GlobalOpt/globalsra-align.ll
Commit 28aa7d378abd97cad8e591dd9e9687cda22b0f37 by llvm-dev
[Local] collectBitParts - early-out from binops. NFCI.

Minor speedup by not bothering to attempt to collect the second operand's bit parts if we already know its failed in the first operand.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit 9ca2c50b3601bbc0f62bc57e00c960f7c10ae54b by llvm-dev
[X86] Try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies (REAPPLIED). NFCI.

Reapply rG5ed56a821c06 (after reverted by rG7aa89c4a22fd) - don't take reference from struct that will be erased in X86FrameLowering::eliminateCallFramePseudoInstr
The file was modifiedllvm/lib/Target/X86/X86PadShortFunction.cpp
The file was modifiedllvm/lib/Target/X86/X86CallFrameOptimization.cpp
The file was modifiedllvm/lib/Target/X86/X86CmovConversion.cpp
The file was modifiedllvm/lib/Target/X86/X86FloatingPoint.cpp
The file was modifiedllvm/lib/Target/X86/X86OptimizeLEAs.cpp
The file was modifiedllvm/lib/Target/X86/X86WinAllocaExpander.cpp
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
Commit 401d6685c0aa20ba97f8311a88004beedf92f3c0 by llvm-dev
[InstCombine] InstCombinerImpl::visitOr - enable bitreverse matching

Currently we only match bswap intrinsics from or(shl(),lshr()) style patterns when we could often match bitreverse intrinsics almost as cheaply.

Differential Revision: https://reviews.llvm.org/D90170
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
The file was modifiedllvm/test/Transforms/InstCombine/bitreverse.ll
Commit f0660a977e6822ae68e4c88641d1909b555f0e05 by llvm-dev
[Local] collectBitParts - bail out if we find more than one root input value.

All the uses that we have for collectBitParts revolve around us matching down to an operation with a single root value - I don't think we're intending to change that (and a lot of collectBitParts assumes it).

The binops cases (OR/FSHL/FSHR) already check if the providers are the same, but that would still mean we waste time collecting through unaryops before getting to them.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit f9b1208681f650eed536648e26b0f9266134b628 by llvm-dev
[X86][Atom] Fix vector integer multiplication resource/throughputs

Match whats documented in the Intel AOM (and Agner/instlatx64 agree) - vector integer multiplies are pipelined - all Port0, throughput = 2 @ 128bits, 1 @ 64bits.

Noticed while checking reduction costs - now that we can use in-order models in llvm-mca, the atom model is the "worst case scenario" we have in x86.
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-ssse3.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-mmx.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
Commit f9e9b0cdb4f499aa8443c21430fdb09a5a74490f by nikita.ppv
[CFG] Move reachable from entry checks into basic block variant

These checks are not specific to the instruction based variant of
isPotentiallyReachable(), they are equally valid for the basic
block based variant. Move them there, to make sure that switching
between the instruction and basic block variants cannot introduce
regressions.
The file was modifiedllvm/include/llvm/Analysis/CFG.h
The file was modifiedllvm/lib/Analysis/CFG.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Commit c5fe3839905fe466966d124fb6fc62365ea97636 by llvm-dev
IfConverter::MeetIfcvtSizeLimit - Fix uninitialized variable warnings. NFCI.

Ensure the duplication instruction counts are initialized to zero (even though they aren't used) to silence static analysis warnings.
The file was modifiedllvm/lib/CodeGen/IfConversion.cpp
Commit e30540a603ebc9ac4f1cd0c1e94a0755b10ec25f by llvm-dev
SampleProfileLoader::inlineHotFunctionsWithPriority - Fix uninitialized variable warning. NFCI.

findIndirectCallFunctionSamples will leave Sum uninitialized if it returns an empty vector, we don't really use Sum in this case (but we do make a copy that isn't used either) - so ensure we initialize the value to zero to at least silence the static analysis warning.
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
Commit 73635adb86bc51612a55440d8b53d828374c83fc by llvm-dev
X86SpeculativeLoadHardeningPass::hardenValueInRegister - assert that we have a i8/i16/i32/i64 sized register. NFCI.

Silence static analyzer warning for out-of-range access to the SubRegImms[] array.
The file was modifiedllvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
Commit 632668c1c0e7dcf97154d2e377491cdc8cb6963c by llvm-dev
[TableGen] TreePatternNode::isIsomorphicTo - early out for matching leafs. NFCI.

If the leafs are the same then no need to perform DefInit matching.
The file was modifiedllvm/utils/TableGen/CodeGenDAGPatterns.cpp
Commit bd7b7ca3eeb6dc530426c19130aa246b96116831 by llvm-dev
Revert rG632668c1c0e7dcf97154d2e377491cdc8cb6963c : "[TableGen] TreePatternNode::isIsomorphicTo - early out for matching leafs. NFCI."

Revert premature (and very broken....) experimental commit.
The file was modifiedllvm/utils/TableGen/CodeGenDAGPatterns.cpp
Commit 2ed89001e14692b52ad728388268e8369e10e05a by llvm-dev
[X86] X86CmovConverterPass::convertCmovInstsToBranches - take a copy of the DebugLoc not a reference as it may be deleted.

Fixes msan warning due to rG9ca2c50b3601
The file was modifiedllvm/lib/Target/X86/X86CmovConversion.cpp
Commit 8cb04d891fba6ee81c385519510cb89e37acea0c by llvm-dev
[X86] X86OptimizeLEAPass::replaceDebugValue - take a copy of the DebugLoc not a reference as it may be deleted.

Fixes msan warning due to rG9ca2c50b3601
The file was modifiedllvm/lib/Target/X86/X86OptimizeLEAs.cpp