SuccessChanges

Summary

  1. [clangd] Update gRPC dependency for remote index tests (details)
Commit cf3881f300f973e6dcc12d2c25dff626290642aa by kbobyrev
[clangd] Update gRPC dependency for remote index tests

Context https://github.com/clangd/clangd/pull/783
The file was modifiedbuildbot/google/docker/buildbot-clangd-ubuntu-clang/Dockerfile (diff)

Summary

  1. [llvm][sve] Lowering for VLS MLOAD/MSTORE (details)
  2. [CostModel][X86][AVX2] Improve 256-bit vector non-uniform shifts costs (details)
  3. [mlir] Add EqualOp and NotEqualOp to complex dialect. (details)
  4. [CodeGen] Add support for widening the result of EXTRACT_SUBVECTOR (details)
  5. [mlir] Add conversion from complex to standard dialect for EqualOp. (details)
  6. [ARM] Extra tests for MVE vhadd and vmulh. NFC (details)
  7. [SPARCv9] allow stw as alias for st (details)
  8. [clang] Invalidate a non-dependent-type RecordDecl when it has any dependent-type base class specifier. (details)
  9. Fix LIT failure on native aix (details)
  10. [TableGen] [Clang] Clean up arm_mve.td file. (details)
  11. [Debugify][Original DI] Test dbg var loc preservation (details)
  12. Revert "libsanitizer: Guard cyclades inclusion in sanitizer" (details)
  13. [test] Fix pre-ra-sched.c to check for error message from stderr (details)
  14. Revert "[Debugify][Original DI] Test dbg var loc preservation" (details)
  15. [AST] Store regular ValueDecl* in BindingDecl (NFC) (details)
  16. [flang][docs] Update driver sync-up call link (details)
Commit bf3b6cf9208166cc5a2980f56265d8123f0e09bf by david.truby
[llvm][sve] Lowering for VLS MLOAD/MSTORE

This adds custom lowering for the MLOAD and MSTORE ISD nodes when
passed fixed length vectors in SVE. This is done by converting the
vectors to VLA vectors and using the VLA code generation.

Fixed length extending loads and truncating stores currently produce
correct code, but do not use the built in extend/truncate in the
load and store instructions. This will be fixed in a future patch.

Differential Revision: https://reviews.llvm.org/D101834
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was addedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
The file was addedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
Commit 62fca69a704cc4883736698b781f63f59e7fa7b2 by llvm-dev
[CostModel][X86][AVX2] Improve 256-bit vector non-uniform shifts costs

Haswell, Excavator and early Ryzen all have slower 256-bit non-uniform vector shifts (confirmed on AMDSoG/Agner/instlatx64 and llvm models) - so bump the worst case costs accordingly.

Noticed while investigating PR50364
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/div.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/fshl.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/fshr.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/rem.ll
Commit a28fe17d7315f72b802b4ac4b4bc1603ffe7a23b by akuegel
[mlir] Add EqualOp and NotEqualOp to complex dialect.
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
The file was modifiedmlir/lib/Dialect/Complex/IR/ComplexOps.cpp
The file was modifiedmlir/test/Dialect/Complex/ops.mlir
Commit a21bff0673a1d593588c69e2ed2f557af40faa2d by david.sherwood
[CodeGen] Add support for widening the result of EXTRACT_SUBVECTOR

When trying to return a type such as <vscale x 1 x i32> from a
function we crash in DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR
when attempting to get the fixed number of elements in the vector.

For the simple case we are dealing with, i.e. extracting
<vscale x 1 x i32> from index 0 of input vector <vscale x 4 x i32>
we can simply rely upon existing code that just returns the input.

Differential Revision: https://reviews.llvm.org/D102605
The file was modifiedllvm/test/CodeGen/AArch64/sve-extract-vector.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-int-arith.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Commit ac00cb0d2ad58914dd1cf52087ed29cd9834601a by akuegel
[mlir] Add conversion from complex to standard dialect for EqualOp.

This adds the straightforward conversion for EqualOp
(two complex numbers are equal if both the real and the imaginary part are equal).

Differential Revision: https://reviews.llvm.org/D102840
The file was modifiedmlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
The file was modifiedmlir/test/Conversion/ComplexToStandard/full-conversion.mlir
The file was modifiedmlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
Commit bdd82c3f51c2c3a75840a3579a29b641b325a364 by david.green
[ARM] Extra tests for MVE vhadd and vmulh. NFC
The file was addedllvm/test/CodeGen/Thumb2/mve-vhadd.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmulh.ll
Commit 80836ee519eb79ac263a84891511c23a416c8565 by joerg
[SPARCv9] allow stw as alias for st

Strictly speaking, the architecture manual no longer uses the st
mnemonic, but that's a much more intrusive change for little gain.

Differential Revision: https://reviews.llvm.org/D96313
The file was modifiedllvm/lib/Target/Sparc/SparcInstrAliases.td
The file was modifiedllvm/test/MC/Sparc/sparcv9-instructions.s
Commit 80c1adfd18b5308422827f8372c28cc2ecfaa015 by hokein.wu
[clang] Invalidate a non-dependent-type RecordDecl when it has any dependent-type base class specifier.

This happens during the error-recovery, and it would esacpe all
dependent-type check guards in getTypeInfo/constexpr-evaluator code
paths, which lead to crashes.

Differential Revision: https://reviews.llvm.org/D102773
The file was modifiedclang/test/SemaTemplate/temp_class_spec.cpp
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
Commit d74b6635ef38d123793f025a2ea1ef28153d803a by Xiangling.Liao
Fix LIT failure on native aix

On AIX, char bitfields have the same alignment as unsigned int.
Reference: https://reviews.llvm.org/D87029

Differential Revision: https://reviews.llvm.org/D102715
The file was modifiedclang/test/Sema/struct-packed-align.c
Commit fa6e87cc5a21f885a4f6d0c7a51ad0f40022f5c8 by Paul C. Anagnostopoulos
[TableGen] [Clang] Clean up arm_mve.td file.

Differential Revision: https://reviews.llvm.org/D102238
The file was modifiedclang/include/clang/Basic/arm_mve.td
Commit 76f375f3d9d6902820ffc21200e454926748c678 by djtodoro
[Debugify][Original DI] Test dbg var loc preservation

This is an improvement of [0]. This adds checking of
original llvm.dbg.values()/declares() instructions in
optimizations.

We have picked a real issue that has been found with
this (actually, picked one variable location missing
from [1] and resolved the issue), and the result is
the fix for that -- D100844.

Before applying the D100844, using the options from [0]
(but with this patch applied) on the compilation of GDB 7.11,
the final HTML report for the debug-info issues can be found
at [1] (please scroll down, and look for
"Summary of Variable Location Bugs"). After applying
the D100844, the numbers has improved a bit -- please take
a look into [2].

[0] https://llvm.org/docs/HowToUpdateDebugInfo.html\
[1] https://djolertrk.github.io/di-check-before-adce-fix/
[2] https://djolertrk.github.io/di-check-after-adce-fix/

Differential Revision: https://reviews.llvm.org/D100845
The file was modifiedllvm/include/llvm/Transforms/Utils/Debugify.h
The file was modifiedllvm/test/tools/llvm-original-di-preservation/Inputs/expected-sample.html
The file was modifiedllvm/unittests/Transforms/Utils/DebugifyTest.cpp
The file was modifiedllvm/lib/Transforms/Utils/Debugify.cpp
The file was modifiedllvm/docs/HowToUpdateDebugInfo.rst
The file was modifiedllvm/utils/llvm-original-di-preservation.py
Commit 0d3619864c6fb7402e323597e6f946bb74b76c7d by tamar.christina
Revert "libsanitizer: Guard cyclades inclusion in sanitizer"

This reverts commit f7c5351552387bd43f6ca3631016d7f0dfe0f135.

To investigate a test failure.
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
Commit 603818b97c795114f66a6fc13e8a5f0e54b49a13 by hubert.reinterpretcast
[test] Fix pre-ra-sched.c to check for error message from stderr

The test previous accidentally passed because it was looking for a lack
of specific input from the binary(!) output being sent to stdout.
The file was modifiedclang/test/CodeGen/pre-ra-sched.c
Commit 0ae3c1d4d7c32fd4c14f1b584b18904ecfab5b14 by djtodoro
Revert "[Debugify][Original DI] Test dbg var loc preservation"

This reverts commit 76f375f3d9d6902820ffc21200e454926748c678.

This will be pushed again, after investigating a test failure:
https://lab.llvm.org/buildbot/#/builders/16/builds/11254
The file was modifiedllvm/docs/HowToUpdateDebugInfo.rst
The file was modifiedllvm/lib/Transforms/Utils/Debugify.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/Debugify.h
The file was modifiedllvm/test/tools/llvm-original-di-preservation/Inputs/expected-sample.html
The file was modifiedllvm/unittests/Transforms/Utils/DebugifyTest.cpp
The file was modifiedllvm/utils/llvm-original-di-preservation.py
Commit a5c2ec96e5f9f14b31b705e40bcb267257612316 by aaronpuchert
[AST] Store regular ValueDecl* in BindingDecl (NFC)

We were always storing a regular ValueDecl* as decomposition declaration
and haven't been using the opportunity to initialize it lazily.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D99455
The file was modifiedclang/lib/AST/DeclCXX.cpp
The file was modifiedclang/include/clang/AST/DeclCXX.h
Commit 941269133e77498693a584aab0ecaad4695904cc by andrzej.warzynski
[flang][docs] Update driver sync-up call link

The old invitation has expired, so I've created a new one and update the
link in the docs accordingly.
The file was modifiedflang/docs/GettingInvolved.md

Summary

  1. [clangd] Update gRPC dependency for remote index tests (details)
Commit cf3881f300f973e6dcc12d2c25dff626290642aa by kbobyrev
[clangd] Update gRPC dependency for remote index tests

Context https://github.com/clangd/clangd/pull/783
The file was modifiedbuildbot/google/docker/buildbot-clangd-ubuntu-clang/Dockerfile