1. [libc++] Switch a few CI jobs to the minimal Lit configuration (details)
  2. [libomptarget] Disable test bug49334 on amdgpu (details)
  3. [libc++] Remove workaround for PR28391 (ODR violations with ASAN) (details)
  4. [libc++] Fix documentation build failure (details)
  5. [ARM][AArch64] SLSHardening: make non-comdat thunks possible (details)
  6. [lldb][NFC] Add more Float16 unit tests (details)
  7. [libomptarget][amdgpu] Remove majority of fatal errors (details)
  8. Correct some thread safety analysis diagnostics; NFC. (details)
  9. [mlir][Linalg] NFC - Drop Linalg EDSC usage (details)
  10. [SLP]Try to vectorize tiny trees with shuffled gathers of extractelements. (details)
  11. [lldb] Adjust DumpDataExtractorTest.Formats for Windows (details)
  12. [GlobalOpt] adjust test to show load problems; NFC (details)
  13. [GlobalOpt] recompute alignments for loads and stores of updated globals (details)
  14. [CodeGen][AArch64][SVE] Canonicalize intrinsic rdffr{ => _z} (details)
  15. [flang] simplify derived type info table format (details)
  16. [DebugInfo] Handle DIArgList in FastISel or GlobalIsel (details)
  17. When vector is found as a type or non-type id, check if it is really the altivec vector token. (details)
  18. [IR][AutoUpgrade] Drop alignment from non-pointer parameters and returns (details)
  19. [WebAssembly] Fix PIC/GOT codegen for wasm64 (details)
  20. [RISCV] Ensure shuffle splat operands are type-legal (details)
Commit b274728b1a6fdd8a31988e593c2a59a6ff3f9a0a by Louis Dionne
[libc++] Switch a few CI jobs to the minimal Lit configuration

Eventually, this should become the default way of running the tests.
For now, only move a few CI nodes to it, and keep a node that runs the
legacy configuration.

Differential Revision: https://reviews.llvm.org/D97565
The file was modifiedlibcxx/test/CMakeLists.txt
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
The file was modifiedlibcxx/cmake/caches/Generic-static.cmake
The file was modifiedlibcxx/test/configs/libcxx-trunk-static.cfg.in
The file was modifiedlibcxx/utils/ci/run-buildbot
The file was modifiedlibcxx/test/configs/libcxx-trunk-shared.cfg.in
Commit ea68ad6e269587d6675c955a8df0161b9d4d63f1 by jonathanchesterfield
[libomptarget] Disable test bug49334 on amdgpu

[libomptarget] Disable test bug49334 on amdgpu

Hangs on amdgpu, do not know why. Disable to unblock build.

Reviewed By: ye-luo

Differential Revision: https://reviews.llvm.org/D102017
The file was modifiedopenmp/libomptarget/test/offloading/bug49334.cpp
Commit cb82e8ea33e3546414b5ef15335c57611d1e04f2 by Louis Dionne
[libc++] Remove workaround for PR28391 (ODR violations with ASAN)

This is not an issue anymore since we don't build the libc++ dylib with
C++14 anymore (see https://llvm.org/PR28391) for details.

Differential Revision: https://reviews.llvm.org/D102106
The file was modifiedlibcxx/utils/libcxx/test/config.py
Commit 5c26f895b66263803074870f82965e71cfc0444f by Louis Dionne
[libc++] Fix documentation build failure
The file was modifiedlibcxx/docs/OneRangesProposalStatus.csv
Commit 801ab71032e157eb7bcd38efeb6486742a7c53bb by daniel.kiss
[ARM][AArch64] SLSHardening: make non-comdat thunks possible

Linker scripts might not handle COMDAT sections. SLSHardeing adds
new section for each __llvm_slsblr_thunk_xN. This new option allows
the generation of the thunks into the normal text section to handle these
exceptional cases.
,comdat or ,noncomdat can be added to harden-sls to control the codegen.

Reviewed By: kristof.beyls

Differential Revision: https://reviews.llvm.org/D100546
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.h
The file was modifiedllvm/include/llvm/CodeGen/IndirectThunks.h
The file was modifiedllvm/test/CodeGen/AArch64/speculation-hardening-sls.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was modifiedllvm/test/CodeGen/ARM/speculation-hardening-sls.ll
The file was modifiedllvm/lib/Target/ARM/ARMSLSHardening.cpp
The file was modifiedllvm/lib/Target/ARM/ARM.td
The file was modifiedclang/lib/Driver/ToolChains/Arch/AArch64.cpp
The file was modifiedclang/test/Driver/sls-hardening-options.c
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
The file was modifiedllvm/lib/Target/AArch64/AArch64SLSHardening.cpp
The file was modifiedclang/lib/Driver/ToolChains/Arch/ARM.cpp
Commit 48780527dd6820698f3537f5ebf76499030ee349 by Raphael Isemann
[lldb][NFC] Add more Float16 unit tests
The file was modifiedlldb/unittests/Core/DumpDataExtractorTest.cpp
Commit d18fb09c693970d1fad09e1ca4b595524af0c842 by jonathanchesterfield
[libomptarget][amdgpu] Remove majority of fatal errors

[libomptarget][amdgpu] Remove majority of fatal errors

Replaces most calls to exit() with returning an error to the library entry
point. Minor changes to error handling for clear bugs, remove some dead code.

Each exit() call site replaced is either in a library entry point or a
function that already returns error codes on some paths. The existing handling
is not well tested but replacing exit() with a fallback path should be a strict

Remaining two early exit points are an abort() from a callback and exit() from
within msgpack. Fixes for those are less obvious and left for a later patch.

Reviewed By: pdhaliwal

Differential Revision: https://reviews.llvm.org/D102346
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/data.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/utils.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/internal.h
Commit beb5a3a298a1bb2687b421cb960d36a5e9b3ad43 by aaron
Correct some thread safety analysis diagnostics; NFC.

The diagnostics were not following the usual style rules.
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/test/SemaCXX/warn-thread-safety-verbose.cpp
Commit 4519ca3d2e56fee3d9b83a8228db5d5605680d4a by nicolas.vasilache
[mlir][Linalg] NFC - Drop Linalg EDSC usage

Drop the Linalg dialect EDSC subdirectory and update all uses.

Differential Revision: https://reviews.llvm.org/D102848
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
The file was modifiedmlir/lib/CAPI/Dialect/Linalg.cpp
The file was removedmlir/lib/Dialect/Linalg/EDSC/CMakeLists.txt
The file was removedmlir/include/mlir/Dialect/Linalg/EDSC/Intrinsics.h
The file was modifiedmlir/lib/Dialect/Linalg/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
The file was modifiedmlir/lib/Dialect/Linalg/Utils/CMakeLists.txt
The file was modifiedmlir/test/mlir-linalg-ods-gen/test-linalg-ods-yaml-gen.yaml
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTypes.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
The file was removedmlir/include/mlir/Dialect/Linalg/EDSC/Builders.h
The file was modifiedmlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOpsSpec.tc
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/EDSC/FoldedIntrinsics.h
The file was modifiedmlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was removedmlir/lib/Dialect/Linalg/EDSC/Builders.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
Commit 182162b61629f039e7aafc3f7eaab9cc64a81c83 by a.bataev
[SLP]Try to vectorize tiny trees with shuffled gathers of extractelements.

If we gather extract elements and they actually are just shuffles, it
might be profitable to vectorize them even if the tree is tiny.

Differential Revision: https://reviews.llvm.org/D101460
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/ext-trunc.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 8ebaa195015dfd56f8413c43aa8f6d78ea7e6b30 by Raphael Isemann
[lldb] Adjust DumpDataExtractorTest.Formats for Windows

Not sure if that's the ostringstream or our conversion code, but this is
returning the wrong results on Windows.
The file was modifiedlldb/unittests/Core/DumpDataExtractorTest.cpp
Commit ee4055cf23e7c7c5e2b91aefbbf10aa23754ade9 by spatel
[GlobalOpt] adjust test to show load problems; NFC

Goes with D102552
The file was modifiedllvm/test/Transforms/GlobalOpt/globalsra-align.ll
Commit f34311c4024d07246128352241ff360173c68f87 by spatel
[GlobalOpt] recompute alignments for loads and stores of updated globals

GlobalOpt can slice structs/arrays and change GEPs in the process,
but it was not updating alignments for load/store users. This
eventually causes the crashing seen in:

On x86, this required SLP+codegen to create an aligned vector
store on an invalid address. The bugs would be easier to
demonstrate on a target with stricter alignment requirements.

I'm not sure if this is a complete solution. The alignment
updating code is adapted from InstCombine, so I assume that
part is tested and good.

Differential Revision: https://reviews.llvm.org/D102552
The file was modifiedllvm/test/Transforms/GlobalOpt/externally-initialized-global-ctr.ll
The file was modifiedllvm/test/Transforms/GlobalOpt/globalsra-align.ll
The file was modifiedllvm/lib/Transforms/IPO/GlobalOpt.cpp
Commit 2d574a110440597eefe1b2a8b6144e4e89c21d05 by peter.waller
[CodeGen][AArch64][SVE] Canonicalize intrinsic rdffr{ => _z}

Follow up to D101357 / 3fa6510f6.
Supersedes D102330.

Goal: Use flags setting rdffrs instead of rdffr + ptest.

Problem: RDFFR_P doesn't have have a flags setting equivalent.

Solution: in instcombine, canonicalize to RDFFR_PP at the IR level, and
rely on RDFFR_PP+PTEST => RDFFRS_PP optimization in

While here:

* Test that rdffr.z+ptest generates a rdffrs.
* Use update_{test,llc}_checks.py on the tests.
* Use sve attribute on functions.

Differential Revision: https://reviews.llvm.org/D102623
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was addedllvm/test/Transforms/InstCombine/AArch64/sve-intrinsics-rdffr-predication.ll
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-ffr-manipulation.ll
Commit 943839870a0be356c40629c75d4583976cb9e812 by jperier
[flang] simplify derived type info table format

- Replace class(*) member by a c_ptr member to avoid having to handle
  polymorphic components in the type info table generation. Polymorphic
  entity handling will require these very tables to be lowered properly.
  Note: keep the init as NullPointer/Designators. This is technically
  invalid Fortran, the init should have c_ptr type. But wrapping this
  in a C_LOC intrinsic call would make runtime generation and lowering
  more complex with no real benefits.

- ComponentIterator is crashing when used on the generated derived
  types in GetScope. This patch makes GetScope more robust, but it
  is not entirely clear to me why this is only happening with the
  generated derived types.

- The type of generated character globals was incorrect because
  Scope::FindType was matching character types with different
  length. Add a CharacterTypeSpec == operator to fix this.

Differential Revision: https://reviews.llvm.org/D102768
The file was modifiedflang/module/__fortran_type_info.f90
The file was modifiedflang/include/flang/Semantics/type.h
The file was modifiedflang/test/Semantics/typeinfo01.f90
The file was modifiedflang/include/flang/Semantics/tools.h
Commit cf725dde9cb7379496f896f465f3faad511c331b by stephen.tozer
[DebugInfo] Handle DIArgList in FastISel or GlobalIsel

Currently, variadic dbg.values (i.e. those using a DIArgList as part of
their location) are not handled properly by FastISel or GlobalISel, and
will produce invalid DBG_VALUE instructions if they encounter them. This
patch fixes this issue by emitting undef DBG_VALUE instructions for
variadic dbg.values, so that no incorrect instruction is produced and
any prior variable location is terminated.

This is simply a quick-fix to prevent errors; a correct implementation
should come later for these ISel pipelines to ensure that we do not drop
debug information unnecessarily.

Differential Revision: https://reviews.llvm.org/D102500
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/test/DebugInfo/X86/debug_value_list_selectiondag.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FastISel.cpp
Commit 136ced498ba84f6b6126051626e319f18ba740f5 by schmeise
When vector is found as a type or non-type id, check if it is really the altivec vector token.

Call TryAltiVecVectorToken when an identifier is seen in the parser before
annotating the token.  This checks the next token where necessary to ensure
that vector is properly handled as the altivec token.

Author: Jamie Schmeiser <schmeise@ca.ibm.com>
Reviewed By: ZarkoCA (Zarko Todorovski)
Differential Revision: https://reviews.llvm.org/D100991
The file was addedclang/test/Parser/altivec-non-type-vector.c
The file was addedclang/test/Parser/altivec-template-vector.cpp
The file was addedclang/test/Parser/altivec-typedef-vector.c
The file was modifiedclang/lib/Parse/Parser.cpp
Commit 5b6cae5524905bc43cfc21a515f828528d1f2e68 by Steven Wu
[IR][AutoUpgrade] Drop alignment from non-pointer parameters and returns

This is a follow-up of D102201. After some discussion, it is a better idea
to upgrade all invalid uses of alignment attributes on function return
values and parameters, not just limited to void function return types.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D102726
The file was modifiedllvm/include/llvm/IR/Argument.h
The file was modifiedllvm/include/llvm/IR/InstrTypes.h
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
The file was addedllvm/test/Bitcode/upgrade-incompatible-func-attr-11.0.ll
The file was modifiedllvm/lib/IR/Function.cpp
The file was modifiedllvm/lib/IR/AutoUpgrade.cpp
The file was addedllvm/test/Bitcode/upgrade-incompatible-func-attr-11.0.ll.bc
Commit 3a293cbf13a2b6ddb2c1f6d27077ee922f32c404 by aardappel
[WebAssembly] Fix PIC/GOT codegen for wasm64

__table_base is know 64-bit, since in LLVM it represents a function pointer offset
__table_base32 is a copy in wasm32 for use in elem init expr, since no truncation may be used there.

Differential Revision: https://reviews.llvm.org/D101784
The file was modifiedlld/wasm/Symbols.h
The file was modifiedlld/wasm/OutputSections.cpp
The file was modifiedlld/wasm/SyntheticSections.cpp
The file was modifiedlld/wasm/Driver.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was modifiedllvm/include/llvm/BinaryFormat/WasmRelocs.def
The file was modifiedlld/wasm/Relocations.cpp
The file was modifiedlld/test/wasm/data-layout.s
The file was modifiedlld/wasm/InputChunks.cpp
The file was modifiedllvm/lib/Object/WasmObjectFile.cpp
The file was addedllvm/test/MC/WebAssembly/reloc-pic64.s
The file was addedlld/test/wasm/shared64.s
The file was modifiedlld/wasm/InputElement.h
The file was modifiedlld/wasm/InputFiles.cpp
The file was modifiedlld/wasm/Symbols.cpp
The file was modifiedlld/wasm/Writer.cpp
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp
Commit 26bd2250c1870f1983fd3439becfbb39e369b8a3 by fraser
[RISCV] Ensure shuffle splat operands are type-legal

The use of `SelectionDAG::getSplatValue` isn't guaranteed to return a
type-legal splat value as it may implicitly extract a vector element
from another shuffle. It is not permitted to introduce an illegal type
when lowering shuffles.

This patch addresses the crash by adding a boolean flag to
`getSplatValue`, defaulting to false, which when set will ensure a
type-legal return value. If it is unable to do that it will fail to
return a splat value.

I've been through the existing uses of `getSplatValue` in other targets
and was unable to find a need or test cases showing a need to update
their uses. In some cases, the call is made during `LegalizeVectorOps`
which may still produce illegal scalar types. In other situations, the
illegally-typed splat value may be quickly patched up to a legal type
(such as any-extending the returned `extract_vector_elt` up to a legal
type) before `LegalizeDAG` notices.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D102687
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll