FailedChanges

Summary

  1. [Polly] Avoid compiler warning. NFC. (details)
  2. [ConstantFolding] Use APFloat for constant folding. NFC (details)
  3. [SelectionDAG] Fix argument copy elision with irregular types (details)
  4. Reland [X86][CostModel] X86TTIImpl::getMemoryOpCost(): rewrite vector handling again (details)
  5. Reland [X86] X86TTIImpl::getInterleavedMemoryOpCostAVX2(): use getMemoryOpCost() (details)
  6. [CVP] Add test for PR50399 (NFC) (details)
  7. [Demangle][Rust] Parse raw pointers (details)
  8. [Demangle][Rust] Parse references (details)
  9. [Demangle][Rust] Parse function signatures (details)
  10. [mlir] ConvertStandardToLLVM: make AllocLikeOpLowering public (details)
  11. [CostModel][X86] Improve v8i32 MUL costs on AVX1 targets to account for slower btver2 (details)
  12. [CostModel][X86] Add test coverage for sub-64bit vXi8 multiplication costs (details)
  13. [Matrix] Bail out early if there are no matrix intrinsics. (details)
  14. [MLIR] Drop stale reference to mlir-edsc-builder-api-test (details)
  15. [MLIR][GPU] Add CUDA Tensor core WMMA test (details)
  16. [CostModel][X86] vXi8 MUL is always promoted to vXi16 (details)
  17. [mlir][SCF] Canonicalize nested ParallelOp's (details)
Commit 86008477a4eb9ecac27f469539c4ac5e0fce44dc by llvm-project
[Polly] Avoid compiler warning. NFC.

Avoid the warning

    /polly/lib/Support/RegisterPasses.cpp:833:3: warning: default label in switch which covers all enumeration values [-Wcovered-switch-default]
      default:
      ^

since all cases are now handled.

Thanks to Luke Benes for reporting.
The file was modifiedpolly/lib/Support/RegisterPasses.cpp
Commit c9c05a91c4843c243d508c39bdfbc5e26f311af2 by sepavloff
[ConstantFolding] Use APFloat for constant folding. NFC

Replace use of host floating types with operations on APFloat when it is
possible. Use of APFloat makes analysis more convenient and facilitates
constant folding in the case of non-default FP environment.

Differential Revision: https://reviews.llvm.org/D102672
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
Commit fd5cc418186ab0fc0650ec373fdf016101eba21d by thatlemon
[SelectionDAG] Fix argument copy elision with irregular types

D29668 enabled to avoid a useless copy of the argument value into an alloca if the caller places it in memory (as it often happens on x86) by directly forwarding the pointer to it. This optimization is illegal if the type contains padding bytes: if a truncating store into the alloca is replaced the upper bits are filled with garbage and produce code misbehaving at runtime.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D102153
The file was modifiedllvm/test/CodeGen/X86/arg-copy-elide.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit 05a4e4a89c6b6dc6e3edfb5efb9ddc950ae47469 by lebedev.ri
Reland [X86][CostModel] X86TTIImpl::getMemoryOpCost(): rewrite vector handling again

Instead of handling power-of-two sized vector chunks,
try handling the large vector in a stream mode,
decreasing the operational vector size
once it no longer works for the elements left to process.

Notably, this improves costs for overaligned loads - loading padding is fine.
This more directly tracks when we need to insert/extract the YMM/XMM subvector,
some costs fluctuate because of that.

This was initially landed in c02476f3158f2908ef0a6f628210b5380bd33695,
but reverted in 5fddc3312bad7e62493f1605385fad5e589e6450,
because the code made some very optimistic assumptions about invariants
that didn't hold in practice.

Reviewed By: RKSimon, ABataev

Differential Revision: https://reviews.llvm.org/D100684
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/load_store.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 8ed0864fd76ded2646b33de8fc610519dd7f1eb5 by lebedev.ri
Reland [X86] X86TTIImpl::getInterleavedMemoryOpCostAVX2(): use getMemoryOpCost()

Now that getMemoryOpCost() correctly handles all the vector variants,
we should no longer hand-roll our own version of it, but use it directly.

The AVX512 variant probably needs a similar change,
but there it is less obvious.

This was initially landed in 69ed93a4355123a45c1d7216aea7cd53d07a361b,
but was reverted in 6b95fd199d96e3ba5c28a23b17b74203522bdaa8
because the patch it depends on was reverted.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i8.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i8.ll
Commit 069174a6349b18a05b7d48b09a8f8b113b402aae by nikita.ppv
[CVP] Add test for PR50399 (NFC)
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/phi-common-val.ll
Commit 6aac56336d49fe27c8b8d6c1554a73065a10453b by tomasz.miasko
[Demangle][Rust] Parse raw pointers

Reviewed By: dblaikie

Part of https://reviews.llvm.org/D102580
The file was modifiedllvm/lib/Demangle/RustDemangle.cpp
The file was modifiedllvm/test/Demangle/rust.test
Commit e4fa6c95aca1555167f867a0205cbc99caa2ce09 by tomasz.miasko
[Demangle][Rust] Parse references

Reviewed By: dblaikie

Part of https://reviews.llvm.org/D102580
The file was modifiedllvm/lib/Demangle/RustDemangle.cpp
The file was modifiedllvm/test/Demangle/rust.test
Commit 75cc1cf0181a78d1e79c96b5d318f58a72050939 by tomasz.miasko
[Demangle][Rust] Parse function signatures

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D102581
The file was modifiedllvm/test/Demangle/rust.test
The file was modifiedllvm/lib/Demangle/RustDemangle.cpp
The file was modifiedllvm/include/llvm/Demangle/RustDemangle.h
Commit 9afbca746b6c93e5359e5723e5f39c21bca2f4ac by ivan.butygin
[mlir] ConvertStandardToLLVM: make AllocLikeOpLowering public

It is useful for someone who wants to implement custom AllocOp LLVM lowering

Differential Revision: https://reviews.llvm.org/D102932
The file was modifiedmlir/include/mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
Commit 9bd0dc83b55b53cbe4ae9544b5917e1d9d14dbfb by llvm-dev
[CostModel][X86] Improve v8i32 MUL costs on AVX1 targets to account for slower btver2

BTVER2 has a 2 cycle throughput for v4i32 multiplies (same as SSE41 targets), which is only partially hidden by the subvector extracts/insert when splitting v8i32.
The file was modifiedllvm/test/Analysis/CostModel/X86/reduce-mul.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/fshl.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/fshr.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/rem.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-fix.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-overflow.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vectorized-loop.ll
Commit 02918f1079432ae46792d2d2f4542a0fce1ba08b by llvm-dev
[CostModel][X86] Add test coverage for sub-64bit vXi8 multiplication costs

These can be cheaply promoted to a single v8i16 vector for multiplication
The file was modifiedllvm/test/Analysis/CostModel/X86/arith.ll
Commit a6de8d95db484e07c7b1e2d86dfaeacf0d95e656 by flo
[Matrix] Bail out early if there are no matrix intrinsics.

If there are no matrix intrinsics in a function, we can directly bail
out, as there's nothing left to do.

Reviewed By: anemet

Differential Revision: https://reviews.llvm.org/D102931
The file was modifiedllvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
Commit 3597b2c37dd61eac680d7442234d05a29dc04d95 by uday
[MLIR] Drop stale reference to mlir-edsc-builder-api-test

Drop stale reference to mlir-edsc-builder-api-test.

Differential Revision: https://reviews.llvm.org/D102967
The file was modifiedmlir/test/lit.cfg.py
Commit e552fa28da286f20f963d51dd05bd3ec278553b7 by uday
[MLIR][GPU] Add CUDA Tensor core WMMA test

Add a test case to test the complete execution of WMMA ops on a Nvidia
GPU with tensor cores. These tests are enabled under
MLIR_RUN_CUDA_TENSOR_CORE_TESTS.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D95334
The file was modifiedmlir/test/lit.site.cfg.py.in
The file was addedmlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f16.mlir
The file was addedmlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32.mlir
The file was modifiedmlir/test/CMakeLists.txt
The file was addedmlir/test/Integration/GPU/CUDA/TensorCore/lit.local.cfg
Commit 7a898477bbd4e06113f9aa67c9c53904889c7cbf by llvm-dev
[CostModel][X86] vXi8 MUL is always promoted to vXi16
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/extract-shuffle.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/slm-arith-costs.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/blending-shuffle-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/blending-shuffle.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/rem.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/extract-shuffle-inseltpoison.ll
Commit 4184018253e720b0f2449b2b83ce27fc682f8579 by ivan.butygin
[mlir][SCF] Canonicalize nested ParallelOp's

Differential Revision: https://reviews.llvm.org/D102799
The file was modifiedmlir/lib/Dialect/SCF/SCF.cpp
The file was modifiedmlir/test/Dialect/SCF/canonicalize.mlir