Changes

Summary

  1. [RISCV][NFC] Fix build error (details)
  2. [gn build] Port ff13189c5d0d (details)
  3. tsan: refactor trace tests (details)
  4. [llvm][AArch64][SVE] Fold literals into math instructions (details)
  5. Lex arguments for __has_cpp_attribute and friends as expanded tokens (details)
  6. [InstCombine] Add some extra tests for truncated saturates. NFC (details)
  7. Bump the value of __STDC_VERSION__ in -std=c2x mode (details)
  8. This patch supports the following checks for THREADPRIVATE Directive: (details)
  9. [X86][Costmodel] Load/store i16 Stride=6 VF=32 interleaving costs (details)
  10. [X86][Costmodel] Load/store i32 Stride=3 VF=32 interleaving costs (details)
  11. [X86][Costmodel] Load/store i32 Stride=4 VF=32 interleaving costs (details)
  12. [X86][Costmodel] Load/store i64 Stride=2 VF=32 interleaving costs (details)
  13. [X86][Costmodel] Load/store i64 Stride=4 VF=16 interleaving costs (details)
  14. [ConstantRange] Add fast signed multiply (details)
  15. [X86][SLM] +1uop for PSHUFBrm xmm (details)
  16. [X86][SLM] Fix uops for PCLMULQDQ (details)
  17. [X86][SLM] Fix uops for PCMPISTR/PCMPISTR instructions (details)
  18. [X86][SLM] Fix BitTest+Set uops + port usage (details)
  19. [CostModel][X86] Add div/rem by negative power-of-2 constants (details)
  20. [fir] Add IfBuilder and utility functions (details)
  21. [CostModel][X86] Add mul by positive/negative power-of-2 constants tests (details)
  22. [clang] Use llvm::erase_if (NFC) (details)
  23. [lldb] Skip target variable test on AS (details)
  24. [NFC] [LoopPeel] Change the way DT is updated for loop exits (details)
  25. [JITLink] Add comments, rename types for visitExistingEdges utility. (details)
  26. [PowerPC] Implement scheduling model for Power10 (details)
  27. [MachineSink] Compile time improvement for large testcases which has many kill flags (details)
  28. [AArch64] Fixed a bug on AArch64MIPeepholeOpt (details)
  29. [Parse] Improve diagnostic and recovery when there is an extra override in the outline method definition. (details)
  30. Fix cyclic header dependency between Support<->Option due to RISCVISAInfo (details)
  31. [lldb] Return StringRef from PluginInterface::GetPluginName (details)
  32. Fix bazel build. (details)
  33. [AMDGPU] Divergence driven selection for fused bitlogic (details)
  34. [AArch64][GISel] Add 8/16 bit uaddo lowering tests. (details)
  35. [lldb] [Utility] Remove Status::WasInterrupted() along with its only use (details)
  36. [X86] Prefer VEX encoding in X86 assembler. (details)
  37. [SelectionDAG] Fix illegal widening of scalable-vector loads (details)
  38. [AIX][cmake] Set atomics related macros when build with xlclang (details)
  39. [AMDGPU] Add patterns for i8/i16 local atomic load/store (details)
  40. Add new MachineFunction property FailsVerification (details)
  41. Remove the verifyAfter mechanism that was replaced by D111397 (details)
  42. Fix signed/unsigned comparison after b5426ced71280 (details)
  43. [AMDGPU] Add link to bug (details)
  44. [clang][modules] Delay creating `IdentifierInfo` for names of explicit modules (details)
  45. [lldb] Fix SymbolFilePDBTests for a3939e1 (details)
  46. [lldb][NFC] clang format change (details)
  47. [NFC] Remove Block-ABI-Apple.txt (details)
  48. Revert "[NFC] [LoopPeel] Change the way DT is updated for loop exits" (details)
  49. [lldb] [lldb-server] Refactor ConnectToRemote() (details)
  50. [DebugInfo][InstrRef] Avoid a crash during DBG_PHI maintenence (details)
  51. [AMDGPU] Remove unused VirtRegMap analysis. NFC. (details)
  52. [InstCombine][DebugInfo] Remove superflous assertion, add test (details)
  53. [AArch64][SVE][CodeGen] Add tests for RSHRN{T,B} instructions (details)
  54. [DebugInfo] Correctly handle arrays with 0-width elements in GEP salvaging (details)
  55. [Sema] haveSameParameterTypes - replace repeated isNull() test with assertions (details)
  56. [OpenMP][Tests][NFC] Flagging OMPT tests as XFAIL for Intel compilers (details)
  57. [OpenMP][Tests][NFC] Work around ICC bug (details)
  58. [OpenMP][OMPT] thread_num determination for programs with explicit tasks (details)
  59. [lldb] Fix PDB/compilands.test for a3939e1 (details)
Commit 8efa6512e0662b813ab783ed937768cef28e5a8b by kito.cheng
[RISCV][NFC] Fix build error
The file was modifiedclang/lib/Driver/ToolChains/Arch/RISCV.cpp
Commit 1d7aadb4c48a696a8501126357295fdcc3c98380 by llvmgnsyncbot
[gn build] Port ff13189c5d0d
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Commit 27969c4e00bb3fcfc8cc149864e1b1f7e87a6753 by dvyukov
tsan: refactor trace tests

Instead of creating real threads for trace tests
create a new ThreadState in the main thread.
This makes the tests more unit-testy and will also
help with future trace tests that will need
more than 1 thread. Creating more than 1 real thread and
dispatching test actions across multiple threads in the
required deterministic order is painful.

This is resubmit of reverted D110546 with 2 changes:
1. The previous version patched ImitateTlsWrite to not
expect ThreadState to be allocated in TLS (the CHECK
failed for the fake test threads).
This added an ugly hack into production code and was still
logically wrong because we imitated write to the main
thread TLS/stack when we started the fake test thread
(which has nothing to do with the main thread TLS/stack).
This version uses ThreadType::Fiber instead of ThreadType::Regular
for the fake threads. This naturally makes ThreadStart skip
obtaining stack/tls and imitating writes to them.

2. This version still skips the tests on Darwin and PowerPC
to be on the safer side. Build bots reported failures for PowerPC
for the previous version.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D111156
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_trace_test.cpp
Commit 2e0fb007d63cf4d7979c6f6f577e6906145c7b95 by david.truby
[llvm][AArch64][SVE] Fold literals into math instructions

SVE has predicated literal forms of some instructions for specific
literals, which currently are generated correctly when using ACLE
but not when those instructions are generated directly.

This adds the patterns to generate those instructions when
generating from standard LLVM IR instructions.

Differential Revision: https://reviews.llvm.org/D99074
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
The file was addedllvm/test/CodeGen/AArch64/sve-fp-immediates-merging.ll
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-imm.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Commit 2edb89c746848c52964537268bf03e7906bf2542 by aaron
Lex arguments for __has_cpp_attribute and friends as expanded tokens

The C and C++ standards require the argument to __has_cpp_attribute and
__has_c_attribute to be expanded ([cpp.cond]p5). It would make little sense
to expand the argument to those operators but not expand the argument to
__has_attribute and __has_declspec, so those were both also changed in this
patch.

Note that it might make sense for the other builtins to also expand their
argument, but it wasn't as clear to me whether the behavior would be correct
there, and so they were left for a future revision.
The file was modifiedclang/lib/Lex/PPMacroExpansion.cpp
The file was addedclang/test/Preprocessor/has_attribute_errors.cpp
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/test/Preprocessor/has_attribute.c
The file was modifiedclang/test/Preprocessor/has_c_attribute.c
The file was modifiedclang/test/Preprocessor/has_attribute.cpp
Commit 052b77e49f50e5796ee84a55c8a409b3ee41af22 by david.green
[InstCombine] Add some extra tests for truncated saturates. NFC
The file was addedllvm/test/Transforms/InstCombine/truncating-saturate.ll
Commit c8be7743acc7e8ea32ba9985c1d57c38f0eab010 by aaron
Bump the value of __STDC_VERSION__ in -std=c2x mode

Previously, we reported the same value as for C17, now we report 202000L, which
is the same value currently used by GCC.

Once C23 ships, this value will be bumped to the correct date.
The file was addedclang/test/Preprocessor/c2x.c
The file was modifiedclang/lib/Frontend/InitPreprocessor.cpp
The file was modifiedclang/docs/ReleaseNotes.rst
Commit dd8c8d4b7cee7cb58b40e0456d656d68a31ef3b4 by qiaopeixin
This patch supports the following checks for THREADPRIVATE Directive:
```
[5.1] 2.21.2 THREADPRIVATE Directive
A variable that appears in a threadprivate directive must be declared in
the scope of a module or have the SAVE attribute, either explicitly or
implicitly.
A variable that appears in a threadprivate directive must not be an
element of a common block or appear in an EQUIVALENCE statement.
```

This patch supports the following checks for DECLARE TARGET Directive:
```
[5.1] 2.14.7 Declare Target Directive
A variable that is part of another variable (as an array, structure
element or type parameter inquiry) cannot appear in a declare
target directive.
A variable that appears in a declare target directive must be declared
in the scope of a module or have the SAVE attribute, either explicitly
or implicitly.
A variable that appears in a declare target directive must not be an
element of a common block or appear in an EQUIVALENCE statement.
```

As Fortran 2018 standard [8.5.16] states, a variable, common block, or
procedure pointer declared in the scoping unit of a main program,
module, or submodule implicitly has the SAVE attribute, which may be
confirmed by explicit specification.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D109864
The file was addedflang/test/Semantics/omp-declare-target02.f90
The file was modifiedflang/test/Semantics/omp-declarative-directive.f90
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
The file was modifiedflang/lib/Semantics/check-omp-structure.h
The file was addedflang/test/Semantics/omp-declare-target01.f90
The file was addedflang/test/Semantics/omp-threadprivate02.f90
Commit 887acf6842cb48e7c51728ed8d81fc5ab0425403 by lebedev.ri
[X86][Costmodel] Load/store i16 Stride=6 VF=32 interleaving costs

A few more tuples are being queried after D111546. Might be good to model them,
They all require a lot of manual assembly surgery.

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/YTeT9M7fW - for intels `Block RThroughput: <=212.0`; for ryzens, `Block RThroughput: <=64.0`
So could pick cost of `212`

For store we have:
https://godbolt.org/z/vc954KEGP - for intels `Block RThroughput: <=90.0`; for ryzens, `Block RThroughput: <=24.0`
So we could pick cost of `90`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111940
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
Commit 4b76a74b4283362f69748c4d0a5bc22b1237ced0 by lebedev.ri
[X86][Costmodel] Load/store i32 Stride=3 VF=32 interleaving costs

A few more tuples are being queried after D111546. Might be good to model them,
They all require a lot of manual assembly surgery.

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/s5b6E6jsP - for intels `Block RThroughput: <=32.0`; for ryzens, `Block RThroughput: <=24.0`
So could pick cost of `32`

For store we have:
https://godbolt.org/z/efh99d93b - for intels `Block RThroughput: <=48.0`; for ryzens, `Block RThroughput: <=32.0`
So we could pick cost of `48`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111942
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-0uu.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-01u.ll
Commit 3a6a9f74d3a59beb359a9968ac27dcf97d072b3a by lebedev.ri
[X86][Costmodel] Load/store i32 Stride=4 VF=32 interleaving costs

A few more tuples are being queried after D111546. Might be good to model them,
They all require a lot of manual assembly surgery.

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/11rcvdreP - for intels `Block RThroughput: <=68.0`; for ryzens, `Block RThroughput: <=48.0`
So could pick cost of `68`

For store we have:
https://godbolt.org/z/6aM11fWcP - for intels `Block RThroughput: <=64.0`; for ryzens, `Block RThroughput: <=32.0`
So we could pick cost of `64`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111943
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-01uu.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-012u.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-0uuu.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 3274ce3a287dcd4d02b4d2c7a2bf60e942836e06 by lebedev.ri
[X86][Costmodel] Load/store i64 Stride=2 VF=32 interleaving costs

A few more tuples are being queried after D111546. Might be good to model them,
They all require a lot of manual assembly surgery.

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/MTaKboejM - for intels `Block RThroughput: =32.0`; for ryzens, `Block RThroughput: <=16.0`
So could pick cost of `32`

For store we have:
https://godbolt.org/z/v7xPj3Wd4 - for intels `Block RThroughput: =32.0`; for ryzens, `Block RThroughput: <=32.0`
So we could pick cost of `32`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111944
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 91373bf12ec66591addf56b9f447ec9befd6ddae by lebedev.ri
[X86][Costmodel] Load/store i64 Stride=4 VF=16 interleaving costs

A few more tuples are being queried after D111546. Might be good to model them,
They all require a lot of manual assembly surgery.

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/9bnKrefcG - for intels `Block RThroughput: =40.0`; for ryzens, `Block RThroughput: =16.0`
So could pick cost of `40`

For store we have:
https://godbolt.org/z/5s3s14dEY - for intels `Block RThroughput: =40.0`; for ryzens, `Block RThroughput: =16.0`
So we could pick cost of `40`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111945
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 274b2439f8392796e04e366ce5ff47434bd077e1 by nikita.ppv
[ConstantRange] Add fast signed multiply

The multiply() implementation is very slow -- it performs six
multiplications in double the bitwidth, which means that it will
typically work on allocated APInts and bypass fast-path
implementations. Add an additional implementation that doesn't
try to produce anything better than a full range if overflow is
possible. At least for the BasicAA use-case, we really don't care
about more precise modeling of overflow behavior. The current
use of multiply() is fine while the implementation is limited to
a single index, but extending it to the multiple-index case makes
the compile-time impact untenable.
The file was modifiedllvm/include/llvm/IR/ConstantRange.h
The file was modifiedllvm/lib/IR/ConstantRange.cpp
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
The file was modifiedllvm/unittests/IR/ConstantRangeTest.cpp
Commit 498c7236bc763cdee7e7a26e4e411b05b32735c5 by llvm-dev
[X86][SLM] +1uop for PSHUFBrm xmm

Extra 1uop for folded pshufb ops, based off a recent llvm-exegesis capture and what Intel AoM / Agner reports as well.
The file was modifiedllvm/lib/Target/X86/X86ScheduleSLM.td
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-ssse3.s
Commit 680afaaa5d922781f3ec379328853398890d403c by llvm-dev
[X86][SLM] Fix uops for PCLMULQDQ

Based off a recent llvm-exegesis capture and what Intel AoM / Agner reports as well.
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-pclmul.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleSLM.td
Commit 5ed5df480257d24f480f01d784ed7cfd6dd25858 by llvm-dev
[X86][SLM] Fix uops for PCMPISTR/PCMPISTR instructions

Based off a recent llvm-exegesis capture and what Intel AoM / Agner reports as well.
The file was modifiedllvm/lib/Target/X86/X86ScheduleSLM.td
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-sse42.s
Commit 0bb32b1b2121ed9fb07e8e2af8333a58e0a487a3 by llvm-dev
[X86][SLM] Fix BitTest+Set uops + port usage

Both ports are required for BitTest ops. Update the uops counts + port usage based off the most recent llvm-exegesis captures and what Intel AoM / Agner reports as well.
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-x86_64.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleSLM.td
Commit dbf5dc89306964bb613463cbec1637c6f720fbed by llvm-dev
[CostModel][X86] Add div/rem by negative power-of-2 constants

We have backend optimizations for these (like we do for power-of-2 divisions), but currently the costmodel doesn't match them
The file was modifiedllvm/test/Analysis/CostModel/X86/rem.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/div.ll
Commit f17f694a0fcf8eae7de4e051678e47f15d7855ff by clementval
[fir] Add IfBuilder and utility functions

In order to reduct the size of D111337. The IfBuilder and the two
utility functions genIsNotNull and genIsNull have been extracted in
a separate patch with dedicated unittests.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: Leporacanthicus

Differential Revision: https://reviews.llvm.org/D111796

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
The file was modifiedflang/unittests/Optimizer/CMakeLists.txt
The file was modifiedflang/lib/Optimizer/Builder/FIRBuilder.cpp
The file was addedflang/unittests/Optimizer/Builder/FIRBuilderTest.cpp
The file was modifiedflang/include/flang/Optimizer/Builder/FIRBuilder.h
Commit dc3382dc2c12bd48227361e7f32a37df418f9f5a by llvm-dev
[CostModel][X86] Add mul by positive/negative power-of-2 constants tests

We have backend optimizations for these, but currently the costmodel doesn't match them
The file was addedllvm/test/Analysis/CostModel/X86/mul.ll
Commit d245f2e8597bfb52c34810a328d42b990e4af1a4 by kazu
[clang] Use llvm::erase_if (NFC)
The file was modifiedclang/include/clang/Analysis/CloneDetection.h
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/lib/Driver/Multilib.cpp
The file was modifiedclang/lib/AST/DeclCXX.cpp
The file was modifiedclang/lib/AST/ExternalASTMerger.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchersInternal.h
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/lib/Frontend/ASTUnit.cpp
The file was modifiedclang/lib/Lex/PPMacroExpansion.cpp
The file was modifiedclang/lib/AST/CommentSema.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MallocOverflowSecurityChecker.cpp
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedclang/lib/AST/CXXInheritance.cpp
The file was modifiedclang/lib/Serialization/ModuleManager.cpp
Commit c900b0a6d5f7aba7d71c3f0d02eb27a2bc9c9448 by Jonas Devlieghere
[lldb] Skip target variable test on AS
The file was modifiedlldb/test/API/commands/target/basic/TestTargetCommand.py
Commit fa16329ae0721023376f24c7577b9020d438df1a by mkazantsev
[NFC] [LoopPeel] Change the way DT is updated for loop exits

When peeling a loop, we assume that the latch has a `br` terminator and
that all loop exits are either terminated with an `unreachable` or have
a terminating deoptimize call. So when we peel off the 1st iteration, we
change the IDom of all loop exits to the peeled copy of
`NCD(IDom(Exit), Latch)`. This works now, but if we add logic to support
loops with exits that are followed by a block with an `unreachable` or a
terminating deoptimize call, changing the exit's idom wouldn't be enough
and DT would be broken.

For example, let `Exit1` and `Exit2` are loop exits, and each of them
unconditionally branches to the same `unreachable` terminated block. So
neither of the exits dominates this unreachable block. If we change the
IDoms of the exits to some peeled loop block, we don't update the
dominators of the unreachable block. Currently we just don't get to the
peeling logic, saying that we can't peel such loops.

With this NFC we just insert edges from cloned exiting blocks to their
exits after peeling each iteration (we accumulate the insertion updates
and then after peeling apply the updates to DT).

This patch was a part of D110922.

Patch by Dmitry Makogon!

Differential Revision: https://reviews.llvm.org/D111611
Reviewed By: mkazantsev
The file was modifiedllvm/lib/Transforms/Utils/LoopPeel.cpp
Commit 8b7cc93e9dc7e4e3b3a5cb014fa8d047c47f4818 by Lang Hames
[JITLink] Add comments, rename types for visitExistingEdges utility.

The "Fixers" name was a hangover from an earlier draft of the patch. "Visitors"
fits the function name(s).
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
Commit 67c64d83378e7e84e30801420ebba453987e2546 by qiucofan
[PowerPC] Implement scheduling model for Power10

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D110855
The file was modifiedllvm/test/CodeGen/PowerPC/scalar-double-ldst.ll
The file was modifiedllvm/test/CodeGen/PowerPC/constant-pool.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCSchedule.td
The file was modifiedllvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll
The file was modifiedllvm/test/CodeGen/PowerPC/p10-fi-elim.ll
The file was modifiedllvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll
The file was modifiedllvm/test/CodeGen/PowerPC/int128_ldst.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
The file was modifiedllvm/test/CodeGen/PowerPC/scalar-float-ldst.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
The file was modifiedllvm/test/CodeGen/PowerPC/testComparesi32gtu.ll
The file was addedllvm/lib/Target/PowerPC/PPCSchedPredicates.td
The file was modifiedllvm/test/CodeGen/PowerPC/p10-spill-crun.ll
The file was modifiedllvm/test/CodeGen/PowerPC/p10-spill-creq.ll
The file was modifiedllvm/test/CodeGen/PowerPC/testComparesi32ltu.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mma-acc-spill.ll
The file was modifiedllvm/test/CodeGen/PowerPC/p10-spill-crgt.ll
The file was addedllvm/lib/Target/PowerPC/PPCScheduleP10.td
The file was modifiedllvm/test/CodeGen/PowerPC/mma-intrinsics.ll
The file was modifiedllvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
The file was modifiedllvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
The file was addedllvm/lib/Target/PowerPC/P10InstrResources.td
The file was modifiedllvm/test/CodeGen/PowerPC/more-dq-form-prepare.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mma-outer-product.ll
The file was modifiedllvm/test/CodeGen/PowerPC/spill-vec-pair.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mma-phi-accs.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-acc-regalloc.ll
The file was modifiedllvm/test/CodeGen/PowerPC/p10-spill-crlt.ll
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedllvm/test/CodeGen/PowerPC/pcrel-call-linkage-with-calls.ll
The file was modifiedllvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCScheduleP9.td
Commit f383c533110664d41df51b08637df7243c4d6bf7 by bing1.yu
[MachineSink] Compile time improvement for large testcases which has many kill flags

We did a experiment and observed dramatic decrease on compilation time which spent on clearing kill flags.
Before:
Number of BasicBlocks:33357
Number of Instructions:162067
Number of Cleared Kill Flags:32869
Time of handling kill flags(ms):1.607509e+05

After:
Number of BasicBlocks:33357
Number of Instructions:162067
Number of Cleared Kill Flags:32869
Time of handling kill flags:3.987371e+03

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D111688
The file was modifiedllvm/lib/CodeGen/MachineSink.cpp
Commit 3f0b178de21ee82791a6ebe198314f14c0287a44 by jingu.kang
[AArch64] Fixed a bug on AArch64MIPeepholeOpt

Create new virtual register for the definition of new AND instruction and
replace old register by the new one to keep SSA form.

Differential Revision: https://reviews.llvm.org/D109963
The file was modifiedllvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
Commit 6e63f96e11ee9af300b166c994980d3b80cea0c7 by hokein.wu
[Parse] Improve diagnostic and recovery when there is an extra override in the outline method definition.

The clang behavior was poor before this patch:

```
void B::foo() override {}
// Before: clang emited "expcted function body after function
// declarator", and skiped all contents until it hits a ";", the
// following function f() is discarded.

// VS

// Now "override is not allowed" with a remove fixit, and following f()
// is retained.
void f();
```

Differential Revision: https://reviews.llvm.org/D111883
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td
The file was modifiedclang/lib/Parse/ParseDecl.cpp
The file was addedclang/test/Parser/cxx-extra-virtual-specifiers.cpp
Commit de4d2f80b75e2a1e4b0ac5c25e20f20839633688 by Raphael Isemann
Fix cyclic header dependency between Support<->Option due to RISCVISAInfo

This was introduced in D105168 which added RISCVISAInfo.h.
The file was modifiedllvm/include/llvm/Support/RISCVISAInfo.h
The file was modifiedllvm/lib/Support/RISCVISAInfo.cpp
Commit a3939e159fc9528b097672794035a1cdfda520e8 by pavel
[lldb] Return StringRef from PluginInterface::GetPluginName

There is no reason why this function should be returning a ConstString.

While modifying these files, I also fixed several instances where
GetPluginName and GetPluginNameStatic were returning different strings.

I am not changing the return type of GetPluginNameStatic in this patch, as that
would necessitate additional changes, and this patch is big enough as it is.

Differential Revision: https://reviews.llvm.org/D111877
The file was modifiedlldb/source/Plugins/Platform/Android/PlatformAndroid.cpp
The file was modifiedlldb/source/Plugins/InstrumentationRuntime/ASan/InstrumentationRuntimeASan.h
The file was modifiedlldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp
The file was modifiedlldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
The file was modifiedlldb/source/Target/Process.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/Hexagon-DYLD/DynamicLoaderHexagonDYLD.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
The file was modifiedlldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
The file was modifiedlldb/source/Plugins/Language/ObjCPlusPlus/ObjCPlusPlusLanguage.h
The file was modifiedlldb/source/Plugins/OperatingSystem/Python/OperatingSystemPython.cpp
The file was modifiedlldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
The file was modifiedlldb/source/Plugins/ABI/Mips/ABISysV_mips.cpp
The file was modifiedlldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.h
The file was modifiedlldb/source/Plugins/ScriptInterpreter/None/ScriptInterpreterNone.cpp
The file was modifiedlldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.h
The file was modifiedlldb/source/Plugins/Process/elf-core/ProcessElfCore.h
The file was modifiedlldb/source/Target/ProcessTrace.cpp
The file was modifiedlldb/source/Plugins/ABI/ARM/ABIMacOSX_arm.h
The file was modifiedlldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
The file was modifiedlldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.cpp
The file was modifiedlldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.h
The file was modifiedlldb/unittests/Expression/DWARFExpressionTest.cpp
The file was modifiedlldb/unittests/SymbolFile/DWARF/SymbolFileDWARFTests.cpp
The file was modifiedlldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h
The file was modifiedlldb/include/lldb/Symbol/SymbolVendor.h
The file was modifiedlldb/source/Plugins/Platform/OpenBSD/PlatformOpenBSD.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.h
The file was modifiedlldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.h
The file was modifiedlldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.h
The file was modifiedlldb/source/Core/Debugger.cpp
The file was modifiedlldb/source/Plugins/Process/minidump/ProcessMinidump.h
The file was modifiedlldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
The file was modifiedlldb/source/Plugins/ABI/ARC/ABISysV_arc.h
The file was modifiedlldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
The file was modifiedlldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.cpp
The file was modifiedlldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
The file was modifiedlldb/source/Plugins/ABI/AArch64/ABISysV_arm64.h
The file was modifiedlldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.h
The file was modifiedlldb/source/Plugins/ABI/AArch64/ABISysV_arm64.cpp
The file was modifiedlldb/source/API/SBProcess.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
The file was modifiedlldb/source/Plugins/SystemRuntime/MacOSX/SystemRuntimeMacOSX.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleBridge.h
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp
The file was modifiedlldb/source/Plugins/Language/ObjCPlusPlus/ObjCPlusPlusLanguage.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
The file was modifiedlldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.h
The file was modifiedlldb/source/Plugins/Architecture/AArch64/ArchitectureAArch64.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleTV.h
The file was modifiedlldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.cpp
The file was modifiedlldb/source/Plugins/SymbolVendor/MacOSX/SymbolVendorMacOSX.h
The file was modifiedlldb/source/Plugins/Platform/Linux/PlatformLinux.h
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformRemoteiOS.h
The file was modifiedlldb/source/Plugins/ABI/Hexagon/ABISysV_hexagon.h
The file was modifiedlldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.cpp
The file was modifiedlldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp
The file was modifiedlldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.h
The file was modifiedlldb/source/Plugins/ABI/ARM/ABISysV_arm.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.h
The file was modifiedlldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.cpp
The file was modifiedlldb/source/Plugins/Platform/Android/PlatformAndroid.h
The file was modifiedlldb/source/Target/Platform.cpp
The file was modifiedlldb/source/Plugins/ABI/ARM/ABISysV_arm.h
The file was modifiedlldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
The file was modifiedlldb/source/Plugins/ABI/X86/ABISysV_i386.cpp
The file was modifiedlldb/source/Commands/CommandObjectTrace.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.cpp
The file was modifiedlldb/source/Plugins/Architecture/Arm/ArchitectureArm.h
The file was modifiedlldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/PDB/ObjectFilePDB.h
The file was modifiedlldb/source/Plugins/Process/mach-core/ProcessMachCore.h
The file was modifiedlldb/source/Plugins/ObjectFile/JIT/ObjectFileJIT.h
The file was modifiedlldb/source/Plugins/SymbolFile/Symtab/SymbolFileSymtab.h
The file was modifiedlldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.h
The file was modifiedlldb/include/lldb/Core/PluginInterface.h
The file was modifiedlldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Commands/CommandObjectPlatform.cpp
The file was modifiedlldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp
The file was modifiedlldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.h
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformRemoteDarwinDevice.cpp
The file was modifiedlldb/unittests/Language/CLanguages/CLanguagesTest.cpp
The file was modifiedlldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.h
The file was modifiedlldb/source/Plugins/DynamicLoader/Static/DynamicLoaderStatic.h
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.h
The file was modifiedlldb/source/Plugins/SymbolVendor/MacOSX/SymbolVendorMacOSX.cpp
The file was modifiedlldb/source/Plugins/ABI/Mips/ABISysV_mips64.cpp
The file was modifiedlldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
The file was modifiedlldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABI/ItaniumABILanguageRuntime.h
The file was modifiedlldb/source/Plugins/Platform/gdb-server/PlatformRemoteGDBServer.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/None/ScriptInterpreterNone.h
The file was modifiedlldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptRuntime.cpp
The file was modifiedlldb/unittests/Process/ProcessEventDataTest.cpp
The file was modifiedlldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
The file was modifiedlldb/source/Plugins/ABI/X86/ABISysV_x86_64.h
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
The file was modifiedlldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
The file was modifiedlldb/source/Plugins/ABI/X86/ABIMacOSX_i386.cpp
The file was modifiedlldb/source/Plugins/SystemRuntime/MacOSX/SystemRuntimeMacOSX.h
The file was modifiedlldb/source/Plugins/Platform/NetBSD/PlatformNetBSD.h
The file was modifiedlldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h
The file was modifiedlldb/unittests/Target/RemoteAwarePlatformTest.cpp
The file was modifiedlldb/source/Plugins/Architecture/Mips/ArchitectureMips.h
The file was modifiedlldb/source/Target/Trace.cpp
The file was modifiedlldb/source/Target/RemoteAwarePlatform.cpp
The file was modifiedlldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.h
The file was modifiedlldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.h
The file was modifiedlldb/source/Plugins/ABI/PowerPC/ABISysV_ppc.cpp
The file was modifiedlldb/source/Plugins/Architecture/PPC64/ArchitecturePPC64.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABI/ItaniumABILanguageRuntime.cpp
The file was modifiedlldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp
The file was modifiedlldb/source/Plugins/InstrumentationRuntime/MainThreadChecker/InstrumentationRuntimeMainThreadChecker.h
The file was modifiedlldb/source/Plugins/ABI/AArch64/ABIMacOSX_arm64.h
The file was modifiedlldb/source/Plugins/ABI/Mips/ABISysV_mips64.h
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.h
The file was modifiedlldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.h
The file was modifiedlldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformRemoteMacOSX.h
The file was modifiedlldb/test/Shell/SymbolFile/NativePDB/locate-pdb.cpp
The file was modifiedlldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformAppleSimulator.h
The file was modifiedlldb/source/Plugins/Architecture/AArch64/ArchitectureAArch64.h
The file was modifiedlldb/source/Plugins/DynamicLoader/wasm-DYLD/DynamicLoaderWasmDYLD.h
The file was modifiedlldb/source/Plugins/ObjectFile/JIT/ObjectFileJIT.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformAppleSimulator.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.h
The file was modifiedlldb/source/Plugins/TraceExporter/ctf/TraceExporterCTF.h
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.h
The file was modifiedlldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.h
The file was modifiedlldb/source/Plugins/ABI/PowerPC/ABISysV_ppc64.h
The file was modifiedlldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.h
The file was modifiedlldb/unittests/Target/ExecutionContextTest.cpp
The file was modifiedlldb/include/lldb/Target/ProcessTrace.h
The file was modifiedlldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.h
The file was modifiedlldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
The file was modifiedlldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.h
The file was modifiedlldb/source/Plugins/MemoryHistory/asan/MemoryHistoryASan.h
The file was modifiedlldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
The file was modifiedlldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.h
The file was modifiedlldb/include/lldb/Target/Process.h
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
The file was modifiedlldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.h
The file was modifiedlldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h
The file was modifiedlldb/source/Plugins/ABI/Mips/ABISysV_mips.h
The file was modifiedlldb/source/Plugins/ABI/X86/ABIMacOSX_i386.h
The file was modifiedlldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.h
The file was modifiedlldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.h
The file was modifiedlldb/source/Plugins/TraceExporter/ctf/TraceExporterCTF.cpp
The file was modifiedlldb/source/Plugins/Platform/OpenBSD/PlatformOpenBSD.h
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/Breakpad/ObjectFileBreakpad.h
The file was modifiedlldb/source/Plugins/Language/ObjC/ObjCLanguage.h
The file was modifiedlldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.h
The file was modifiedlldb/source/Plugins/Process/scripted/ScriptedProcess.h
The file was modifiedlldb/unittests/Thread/ThreadTest.cpp
The file was modifiedlldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
The file was modifiedlldb/source/Plugins/Architecture/Mips/ArchitectureMips.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/Hexagon-DYLD/DynamicLoaderHexagonDYLD.h
The file was modifiedlldb/source/Plugins/ABI/X86/ABIWindows_x86_64.h
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleWatch.h
The file was modifiedlldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.h
The file was modifiedlldb/source/API/SBDebugger.cpp
The file was modifiedlldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
The file was modifiedlldb/source/Plugins/InstrumentationRuntime/TSan/InstrumentationRuntimeTSan.h
The file was modifiedlldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Lua/ScriptInterpreterLua.h
The file was modifiedlldb/source/Plugins/ABI/X86/ABISysV_i386.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionSourceCode.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.h
The file was modifiedlldb/source/Symbol/SymbolVendor.cpp
The file was modifiedlldb/source/Commands/CommandObjectThread.cpp
The file was modifiedlldb/source/Plugins/Platform/Linux/PlatformLinux.cpp
The file was modifiedlldb/include/lldb/Target/TraceExporter.h
The file was modifiedlldb/source/Plugins/Platform/NetBSD/PlatformNetBSD.cpp
The file was modifiedlldb/source/Plugins/Platform/Windows/PlatformWindows.h
The file was modifiedlldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
The file was modifiedlldb/source/Plugins/OperatingSystem/Python/OperatingSystemPython.h
The file was modifiedlldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
The file was modifiedlldb/source/Plugins/Architecture/PPC64/ArchitecturePPC64.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformDarwinKernel.h
The file was modifiedlldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
The file was modifiedlldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp
The file was modifiedlldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
The file was modifiedlldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
The file was modifiedlldb/source/Plugins/Architecture/Arm/ArchitectureArm.cpp
The file was modifiedlldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptRuntime.h
The file was modifiedlldb/source/Plugins/InstrumentationRuntime/UBSan/InstrumentationRuntimeUBSan.h
Commit 605efd5dd5bf5f174df7cbd6be9d4e06d6e6249d by akuegel
Fix bazel build.

This is a temporary fix, better would be to avoid including
llvm/Option/ArgList.h from a Support source file.

Differential Revision: https://reviews.llvm.org/D111974
The file was modifiedutils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Commit 7cdb1df8c70425b30905418636f9008cf8d3a844 by Stanislav.Mekhanoshin
[AMDGPU] Divergence driven selection for fused bitlogic

The change adds divergence predicates for fused logical operations.
The problem with selecting a scalar fused op such as S_NOR_B32 is
that it does not have a VALU counterpart and will be split in
moveToVALU. At the same time it prevents selection of a better
opcode on the VALU side (such as V_OR3_B32) which does not have a
counterpart on SALU side.

XNOR opcodes are left as is and selected as scalar to get advantage
of the SIInstrInfo::lowerScalarXnor() code which can commute
operations to keep one of two opcodes on SALU if possible. See
xnor.ll test for this.

Differential Revision: https://reviews.llvm.org/D111907
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/fused-bitlogic.ll
Commit e9ff7d250e4763e266d35841ebecf53a2b7d2113 by flo
[AArch64][GISel] Add 8/16 bit uaddo lowering tests.

Precommit tests for D111888.
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir
Commit 239b4d62b6c07f27b1763a090f82c9f92ce06b8c by mgorny
[lldb] [Utility] Remove Status::WasInterrupted() along with its only use

Remove Status::WasInterrupted() that checks whether the underlying error
code matches EINTR.  ProcessGDBRemote::ConnectToDebugserver() is its
only call site, and it does not seem correct there.  After all, EINTR
is precisely when we want to retry, not stop retrying.  Furthermore,
it should not really matter since we should be catching EINTR
immediately via llvm::sys::RetryAfterSignal() but that's another story.

Differential Revision: https://reviews.llvm.org/D111908
The file was modifiedlldb/include/lldb/Utility/Status.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Utility/Status.cpp
Commit 942536ac084c2e12271140831be0c97da39cde2e by yuanke.luo
[X86] Prefer VEX encoding in X86 assembler.

This patch is to order the AVX instructions ahead of AVX512 instructions
in the matching table so that the AVX instructions can be matched first.
Thanks Craig and Shengchen for the idea.

Differential Revision: https://reviews.llvm.org/D111538
The file was modifiedllvm/include/llvm/Target/Target.td
The file was modifiedllvm/utils/TableGen/AsmMatcherEmitter.cpp
The file was modifiedllvm/lib/Target/X86/X86InstrFormats.td
The file was modifiedllvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
Commit 3d850d03ae4d167f929c4469f858446d4a866c01 by fraser
[SelectionDAG] Fix illegal widening of scalable-vector loads

The process of widening simple vector loads attempts to use a load of a
wider vector type if the original load is sufficiently aligned to avoid
memory faults.

However this optimization is only legal when performed on fixed-length
vector types. For scalable vector types this is invalid (unless vscale
happens to be 1).

This patch does increase the likelihood of compiler crashes (from
`FindMemType` failing to find a suitable type) but this now better
matches how widening non-simple loads, insufficiently-aligned loads, and
scalable-vector stores are handled.

Patches will be introduced later by which loads and stores can be
widened on targets with support for masked or predicated operations.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D111885
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/legalize-store-sdnode.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll
Commit 96351680833e99f0b7161a93ade0a23d7e7e8ba5 by lkail
[AIX][cmake] Set atomics related macros when build with xlclang

Set `HAVE_CXX_ATOMICS_WITHOUT_LIB` or `HAVE_LIBATOMIC` when build LLVM with xlclang. With these macros set, libraries like libLLVMSupport are able to know whether it's necessary to add `-latomic` to dependent system libs. If `HAVE_LIBATOMIC` is set, `llvm-config --system-libs` appends `-latomic` to its output.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D111782
The file was modifiedllvm/cmake/modules/CheckAtomic.cmake
Commit d869921004526e804f344936d671a994852ab4d2 by Piotr Sobczak
[AMDGPU] Add patterns for i8/i16 local atomic load/store

Add patterns for i8/i16 local atomic load/store.

Added tests for new patterns.

Copied atomic_[store/load]_local.ll to GlobalISel directory.

Differential Revision: https://reviews.llvm.org/D111869
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_store_local.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/atomic_load_local.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_load_local.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/atomic_store_local.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/DSInstructions.td
Commit 36deb9a670d06fc254df2f357ae595fb8f817d07 by jay.foad
Add new MachineFunction property FailsVerification

TargetPassConfig::addPass takes a "bool verifyAfter" argument which lets
you skip machine verification after a particular pass. Unfortunately
this is used in generic code in TargetPassConfig itself to skip
verification after a generic pass, only because some previous target-
specific pass damaged the MIR on that specific target. This is bad
because problems in one target cause lack of verification for all
targets.

This patch replaces that mechanism with a new MachineFunction property
called "FailsVerification" which can be set by (usually target-specific)
passes that are known to introduce problems. Later passes can reset it
again if they are known to clean up the previous problems.

Differential Revision: https://reviews.llvm.org/D111397
The file was modifiedllvm/include/llvm/CodeGen/MachineFunction.h
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/include/llvm/CodeGen/MIRYamlMapping.h
The file was modifiedllvm/lib/CodeGen/MIRPrinter.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
The file was modifiedllvm/lib/CodeGen/MIRParser/MIRParser.cpp
The file was modifiedllvm/lib/CodeGen/MachineFunction.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
Commit 012248b0bc8e638d96db22dd091adca2ef9549db by jay.foad
Remove the verifyAfter mechanism that was replaced by D111397

Differential Revision: https://reviews.llvm.org/D111872
The file was modifiedllvm/lib/Target/AMDGPU/R600TargetMachine.cpp
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp
The file was modifiedllvm/lib/Target/MSP430/MSP430TargetMachine.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
The file was modifiedllvm/lib/Target/XCore/XCoreTargetMachine.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetPassConfig.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Commit ea970661dc74505da6c45f6c83579aabb115ecc5 by jeremy.morse
Fix signed/unsigned comparison after b5426ced71280

gcc11 warns that this counter causes a signed/unsigned comaprison when it's
later compared with a SmallVector::difference_type. gcc appears to be
correct, clang does not warn one way or the other.
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
Commit a129932b0d45949a884cee90726bf90217c2e737 by jay.foad
[AMDGPU] Add link to bug
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
Commit a2d805c020a1658b04ed7e606ee67e234a9d5b56 by Jan Svoboda
[clang][modules] Delay creating `IdentifierInfo` for names of explicit modules

When using explicit Clang modules, some declarations might unexpectedly become invisible.

This is caused by the mechanism that loads PCM files passed via `-fmodule-file=<path>` and creates an `IdentifierInfo` for the module name. The `IdentifierInfo` creation takes place when the `ASTReader` is in a weird state, with modules that are loaded but not yet set up properly. This patch delays the creation of `IdentifierInfo` until the `ASTReader` is done with reading the PCM.

Note that the `-fmodule-file=<name>=<path>` form of the argument doesn't suffer from this issue, since it doesn't create `IdentifierInfo` for the module name.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D111543
The file was addedclang/test/Modules/Inputs/module-name-used-by-objc-bridge/module.modulemap
The file was addedclang/test/Modules/Inputs/module-name-used-by-objc-bridge/InterfaceBridge.h
The file was addedclang/test/Modules/module-name-used-by-objc-bridge.m
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was addedclang/test/Modules/Inputs/module-name-used-by-objc-bridge/Interface.h
Commit d914aa4ead2aabda2c9e2cf343d30ba8171e4ce2 by pavel
[lldb] Fix SymbolFilePDBTests for a3939e1
The file was modifiedlldb/unittests/SymbolFile/PDB/SymbolFilePDBTests.cpp
Commit ee691fbc3de36ca0c720e1699565be34f192e058 by werat
[lldb][NFC] clang format change

clang format on some demangling files

Reviewed By: teemperor

Differential Revision: https://reviews.llvm.org/D111934
The file was modifiedlldb/source/Core/Mangled.cpp
The file was modifiedllvm/include/llvm/Demangle/Demangle.h
Commit c773f6501dba6975660ce16ab73e6d86a10e6b71 by shivam98.tkg
[NFC] Remove Block-ABI-Apple.txt

This file was rewritten in rst format in clang/docs/Block-ABI-Apple.rst
The file was removedclang/docs/Block-ABI-Apple.txt
Commit baad10c09e44bb243d95821f6ea44641cfa94419 by mkazantsev
Revert "[NFC] [LoopPeel] Change the way DT is updated for loop exits"

This reverts commit fa16329ae0721023376f24c7577b9020d438df1a.

See comments in discussion. Merged by mistake, not entirely getting what
the problem was.
The file was modifiedllvm/lib/Transforms/Utils/LoopPeel.cpp
Commit d8bc7e40ce1cdd8c1a3fac7937ce1ea85c262728 by mgorny
[lldb] [lldb-server] Refactor ConnectToRemote()

Refactor ConnectToRemote() to improve readability and make future
changes easier:

1. Replace static buffers with std::string.
2. When handling errors, prefer reporting the actual error over dumb
   'connection status is not success'.
3. Move host/port parsing directly into reverse_connection condition
   that is its only user, and simplify it to make its purpose (verifying
   that a valid port is provided) clear.
4. Use llvm::errs() and llvm::outs() instead of fprintf().

Differential Revision: https://reviews.llvm.org/D11196
The file was modifiedlldb/tools/lldb-server/lldb-gdbserver.cpp
Commit c4ede6d60892a5101d159b4876ad76fc8eefc837 by jeremy.morse
[DebugInfo][InstrRef] Avoid a crash during DBG_PHI maintenence

With D110105, the isDebug flag for register uses is now a proxy for whether
the instruction is a debug instruction; that causes DBG_PHIs to have their
operands updated by calls to updateDbgUsersToReg, which is the correct
behaviour. However: that function only expects to receive DBG_VALUE
instructions and asserts such.

This patch splits the updating-action into a lambda, and applies it to the
appropriate operands for each kind of debug instruction. Tested with an
ARM test that stimulates this function: I've added some DBG_PHI
instructions that should be updated in the same way as DBG_VALUEs.

Differential Revision: https://reviews.llvm.org/D108641
The file was modifiedllvm/include/llvm/CodeGen/MachineRegisterInfo.h
The file was modifiedllvm/test/DebugInfo/ARM/machine-cp-updates-dbg-reg.mir
Commit d55db4b033f037d60489a145ab3fdd0a0ce3a389 by jay.foad
[AMDGPU] Remove unused VirtRegMap analysis. NFC.
The file was modifiedllvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
Commit c4603a8a4384d36d23fd284689b453b9927541be by peter.waller
[InstCombine][DebugInfo] Remove superflous assertion, add test

When this code was added, an unnecessary assertion slipped in which we
now hit in real code.

Add a test to defend against it firing again.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was modifiedllvm/test/Transforms/InstCombine/debuginfo-scalable-typesize.ll
Commit c0782ba898ffd4ae8b171d100d8d83afdea038d9 by peter.waller
[AArch64][SVE][CodeGen] Add tests for RSHRN{T,B} instructions

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D111735
The file was modifiedllvm/test/CodeGen/AArch64/sve2-intrinsics-binary-narrowing-shr.ll
Commit b9ca73e1a8fd0c018b0b3eb313163da2b4ca4e09 by stephen.tozer
[DebugInfo] Correctly handle arrays with 0-width elements in GEP salvaging

Fixes an issue where GEP salvaging did not properly account for GEP
instructions which stepped over array elements of width 0 (effectively a
no-op). This unnecessarily produced long expressions by appending
`... + (x * 0)` and potentially extended the number of SSA values used
in the dbg.value. This also erroneously triggered an assert in the
salvage function that the element width would be strictly positive.
These issues are resolved by simply ignoring these useless operands.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D111809
The file was modifiedllvm/lib/IR/Operator.cpp
The file was modifiedllvm/test/DebugInfo/salvage-gep.ll
Commit 3b3509b3cba272c98d2235a8664ae9625ac729f8 by llvm-dev
[Sema] haveSameParameterTypes - replace repeated isNull() test with assertions

As reported on https://pvs-studio.com/en/blog/posts/cpp/0771/ (Snippet 2) - (and mentioned on rGdc4259d5a38409) we are repeating the T1.isNull() check instead of checking T2.isNull() as well, and at this point neither should be null - so we're better off with an assertion.

Differential Revision: https://reviews.llvm.org/D107347
The file was modifiedclang/lib/Sema/SemaOverload.cpp
Commit 5918688248fa103c46da3a6ff86e7fab0e63fb45 by protze
[OpenMP][Tests][NFC] Flagging OMPT tests as XFAIL for Intel compilers

With Intel 19 compiler the teams tests fail to link while trying to link
liboffload.
The file was modifiedopenmp/runtime/test/ompt/tasks/taskwait-depend.c
The file was modifiedopenmp/runtime/test/ompt/teams/team.c
The file was modifiedopenmp/runtime/test/ompt/teams/parallel_team.c
The file was modifiedopenmp/runtime/test/ompt/teams/serial_teams.c
The file was modifiedopenmp/runtime/test/ompt/tasks/dependences_mutexinoutset.c
The file was modifiedopenmp/runtime/test/ompt/teams/serialized.c
Commit c93fb143b98ea2035c6fca95241bc5ba40faf97e by protze
[OpenMP][Tests][NFC] Work around ICC bug
Older intel compilers miss the privatization of nested loop variables for
doacross loops. Declaring the variable in the loop makes the test more
robust.
The file was modifiedopenmp/runtime/test/ompt/synchronization/ordered_dependences.c
Commit 59a994e8daeef94976841a11bc92ca3a2b6a10b3 by protze
[OpenMP][OMPT] thread_num determination for programs with explicit tasks

__ompt_get_task_info_internal is now able to determine the right value of the
“thread_num” argument during the execution of an explicit task.

During the execution of a while loop that iterates over the ancestor tasks
hierarchy, the “prev_team” variable was always set to “team” variable at the
beginning of each loop iteration.

Assume that the program contains a parallel region which encloses an explicit
task executed by the worker thread of the region. Also assume that the tool
inquires the “thread_num” of a worker thread for the implicit task that
corresponds to the region (task at “ancestor_level == 1”) and expects to
receive the value of “thread_num > 0”.
After the loop finishes, both “team” and “prev_team” variables are equal and
point to the team information of the parallel region.
The “thread_num” is set to “prev_team->t.t_master_tid”, that is equal to
“team->t.t_master_tid”. In this case, “team->t.t_master_tid” is 0, since
the master thread of the region is the initial master thread of the program.
This leads to a contradiction.

To prevent this, “prev_team” variable is set to “team” variable only at the
time when the loop that has already encountered the implicit task (“taskdata”
variable contains the information about an implicit task) continues iterating
over the implicit task’s ancestors, if any.

After the mentioned loop finishes, the “prev_team” variable might be equal to
NULL. This means that the task at requested “ancestor_level” belongs to the
innermost parallel region, so the “thread_num” will be determined by calling
the “__kmp_get_tid”.

To prove that this patch works, the test case “explicit_task_thread_num.c” is
provided.
It contains the example of the program explained earlier in the summary.

Differential Revision: https://reviews.llvm.org/D110473
The file was addedopenmp/runtime/test/ompt/tasks/explicit_task_thread_num.c
The file was modifiedopenmp/runtime/src/ompt-specific.cpp
Commit b37efed957ed0a0193d80020aefd55cb587dfc1f by pavel
[lldb] Fix PDB/compilands.test for a3939e1
The file was modifiedlldb/test/Shell/SymbolFile/PDB/compilands.test