Changes

Summary

  1. Revert "[VE] notify and build as official target" (details)
Commit 5db9389c3afd04a46c62bfdcb9590f4714975a69 by simon.moll
Revert "[VE] notify and build as official target"

This reverts commit feb754795a1d21d4644351b360f805e8e449026b.
The file was modifiedzorg/buildbot/builders/annotated/ve-linux-steps.make (diff)
The file was modifiedbuildbot/osuosl/master/config/status.py (diff)

Summary

  1. [tests] Precommit tests for writeonly argument attribute inference (details)
  2. [lldb] Fix DYLD_INSERT_LIBRARIES on AS (details)
  3. [NFC][sanitizer] Fix "not used" warning in test (details)
  4. [libc++] Implement P1989R2: range constructor for string_view (details)
  5. [AMDGPU] Add a regclass flag for scalar registers (details)
  6. [mlir][drr] Simple heuristic to reduce chance of accidental nullptr dereference (details)
  7. [ELF] Prevent internalizing used comdat symbol (details)
  8. [lldb] Skip test_launch_scripted_process_stack_frames with ASan (details)
  9. [X86] Insert FMUL for estimated non reciprocal SQRT when `RefinementSteps` = 0 (details)
  10. [X86][FP16] Only generate approximate rsqrt when Reciprocal is true for half type (details)
  11. [AMDGPU][clang] Fix  __builtin_nontemporal_store() failure on AMDGPU (details)
  12. [AMDGPU] Set most sched model resource's BufferSize to one (details)
  13. [ORC] Hold ResourceTracker in MaterializationResponsibility. (details)
  14. [ORC] Only use JITDylib::GeneratorsMutex while running generators. (details)
  15. [ORC] Add support for removing JITDylibs. (details)
  16. [ARM] Teach getIntImmCostInst about the cost of saturating fp converts (details)
  17. [openmp][amdgpu] Disable three tests in preparation for new runtime (details)
  18. [NFC][sanitizer] Check &real_pthread_join (details)
Commit 3dfa76b695f8812e70b2b46bb12dfc2a76ab296a by listmail
[tests] Precommit tests for writeonly argument attribute inference
The file was modifiedllvm/test/Transforms/FunctionAttrs/writeonly.ll
Commit 8176768b46b7839a8495d58341198dffad11bc14 by Jonas Devlieghere
[lldb] Fix DYLD_INSERT_LIBRARIES on AS

Don't make DYLD_INSERT_LIBRARIES conditional on the host triple
containing x86.
The file was modifiedlldb/test/API/lit.cfg.py
Commit ae234a7545db8b73297f56508d95a4f85cfd7c1f by Vitaly Buka
[NFC][sanitizer] Fix "not used" warning in test
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_common_test.cpp
Commit c16b13ebf97753a84cb7062c4c1ac984851de4b9 by joeloser93
[libc++] Implement P1989R2: range constructor for string_view

Implement P1989R2 which adds a range constructor for `string_view`.

Adjust `operator/=` in `path` to avoid atomic constraints caching issue
getting provoked from this PR.

Add defaulted template argument to `string_view`'s "sufficient
overloads" to avoid mangling issues in `clang-cl` builds. It is a
MSVC mangling bug that this works around.

Differential Revision: https://reviews.llvm.org/D113161
The file was modifiedlibcxx/include/filesystem
The file was removedlibcxx/test/std/strings/string.view/string.view.cons/deduct.pass.cpp
The file was addedlibcxx/test/std/strings/string.view/string.view.deduct/iterator_sentinel.pass.cpp
The file was modifiedlibcxx/docs/Status/Cxx2bPapers.csv
The file was modifiedlibcxx/include/string_view
The file was addedlibcxx/test/std/strings/string.view/string.view.deduct/range.pass.cpp
The file was addedlibcxx/test/std/strings/string.view/string.view.cons/from_range.pass.cpp
Commit 399b7de0ea34cdf2d54ee874a2d0f6e595b960d4 by Christudasan.Devadasan
[AMDGPU] Add a regclass flag for scalar registers

Along with vector RC flags, this scalar flag will
make various regclass queries like `isVGPR` more
accurate.

Regclasses other than vectors are currently set
with the new flag even though certain unallocatable
classes aren't truly scalars. It would be ok as long
as they remain unallocatable.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D110053
The file was modifiedllvm/lib/Target/AMDGPU/SIDefines.h
The file was modifiedllvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.h
Commit 86eb57b728c85bd1658f542d6ce8340efa63b4df by jpienaar
[mlir][drr] Simple heuristic to reduce chance of accidental nullptr dereference

When an attribute is optional & is given an additional constraint in
rewrite pattern that could lead to dereferencing null Attribute. Avoid
cases where the constraints checks attribute but has no check if null.

This should be improved to be more uniformly guarded.
The file was modifiedmlir/tools/mlir-tblgen/RewriterGen.cpp
Commit b0ac68ccb72909e047c86e6ee7e036d278be28ff by ikudrin
[ELF] Prevent internalizing used comdat symbol

When a comdat symbol is defined in both bitcode and regular object
files, which are contained in the same archive, the linker could lose
the flag that the symbol is used in the regular object file and allow
LTO to internalize it, which led to "error: undefined symbol".

The issue was introduced in D79300.

Differential Revision: https://reviews.llvm.org/D114801
The file was addedlld/test/ELF/lto/comdat-mixed-archive.test
The file was modifiedlld/ELF/InputFiles.cpp
Commit fcd2d85cc9438ffe8e4a4948898077dfc253fe9d by Jonas Devlieghere
[lldb] Skip test_launch_scripted_process_stack_frames with ASan

This test is failing on the sanitized bot because of a
heap-use-after-free. Disabling the test to turn the bot
green again.

rdar://85954489.
The file was modifiedlldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
Commit 4756a2f1575cd78197f00ffdaa1491f9ec78c576 by phoebe.wang
[X86] Insert FMUL for estimated non reciprocal SQRT when `RefinementSteps` = 0

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D114843
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/sqrt-fastmath.ll
Commit f13b43d5702bed381bb1717e2336f7f23ae722b4 by phoebe.wang
[X86][FP16] Only generate approximate rsqrt when Reciprocal is true for half type

We have reasonable fast sqrt and accurate rsqrt for half type due to the
limited fractions. So neither do we need multi steps refinement for
rsqrt nor replace sqrt by rsqrt.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D114844
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll
The file was modifiedllvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
Commit 16b781e6d16dead414a7036c8b59f1700ea49251 by Krishna.Sankisa
[AMDGPU][clang] Fix  __builtin_nontemporal_store() failure on AMDGPU

Reviewed By: yaxunl, sameerds

Differential Revision: https://reviews.llvm.org/D114849
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was addedclang/test/CodeGenOpenCL/amdgcn-non-temporal-store.cl
Commit da067ed569e0525d55c6ec6242f8cd5a73dd9e6f by Austin.Kerbow
[AMDGPU] Set most sched model resource's BufferSize to one

Using a BufferSize of one for memory ProcResources will result in better
ILP since it more accurately models the dependencies between memory ops
and their consumers on an in-order processor. After this change, the
scheduler will treat the data edges from loads as blocking so that
stalls are guaranteed when waiting for data to be retreaved from memory.
Since we don't actually track waitcnt here, this should do a better job
at modeling their behavior.

Practically, this means that the scheduler will trigger the 'STALL'
heuristic more often.

This type of change needs to be evaluated experimentally. Preliminary
results are positive.

Fixes: SWDEV-282962

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D114777
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/code-object-v3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/add.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-argument-types.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sign_extend.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/min.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot4u.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_int24.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sra.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/urem64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-global-i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fminnum.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx10.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/operand-spacing.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/saddo.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fshl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fabs.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory_clause.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-constant-i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/and.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-hi16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/copy_to_scc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/anyext.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/srl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/extract_vector_elt-i8.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/v_madak_f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sub.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/udiv64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/bitreverse.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/kernel-args.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot4s.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/commute-shifts.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ctlz.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-non-entry-func.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fp-min-max-atomics.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vector-extract-insert.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/move-addr64-rsrc-dead-subreg-writes.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sub.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-value.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_read2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/srem64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fp_to_uint.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/extract_vector_elt-i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/select64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shift-and-i128-ubfe.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ctpop64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot8s.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/imm16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-local.128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shift-i128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sext-divergence-driven-isel.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fp_to_sint.ll
The file was addedllvm/test/CodeGen/AMDGPU/schedule-ilp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ctpop16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/bswap.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-lo16.ll
The file was modifiedllvm/lib/Target/AMDGPU/SISchedule.td
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/udivrem.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uniform-cfg.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds-alignment.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fshr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/select.f16.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/cttz.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/idot8u.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
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The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
Commit 9355d115975c78bb992fd1e79ba0124d67ce59c5 by Lang Hames
[ORC] Hold ResourceTracker in MaterializationResponsibility.

This keeps the tracker alive for the lifetime of the MR. This is needed so that
we can check whether the tracker has become defunct before posting results (or
failure) for the MR.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Core.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Core.cpp
Commit 9eb591f0ace7275ce8c3be190975e10aaa142171 by Lang Hames
[ORC] Only use JITDylib::GeneratorsMutex while running generators.

GeneratorsMutex should prevent lookups from proceeding through the
generators of a single JITDylib concurrently (since this could
result in redundant attempts to generate definitions). Mutation of
the generators list itself should be done under the session lock.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Core.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Core.cpp
Commit 758d54b462ffc480d6cb860984b8aa062925a396 by Lang Hames
[ORC] Add support for removing JITDylibs.

This allows JITDylibs to be removed from the ExecutionSession. Calling
ExecutionSession::removeJITDylib will disconnect the JITDylib from the
ExecutionSession and clear it (removing all trackers associated with it). The
JITDylib object will then be destroyed as soon as the last JITDylibSP pointing
at it is destroyed.
The file was modifiedllvm/unittests/ExecutionEngine/Orc/CoreAPIsTest.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Core.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Core.cpp
Commit 646c872f9d74f12b46f6a5e7332188dfa7e251b1 by david.green
[ARM] Teach getIntImmCostInst about the cost of saturating fp converts

Given a min(max(fptosi, INT_MIN), INT_MAX) with the correct constants,
we can now generate a fptosi.sat. But in the arm backend, the constant
can be treated as high cost, pulling it out of the basic block in a way
that the DAG combine can no longer see it. This teaches it again that it
is a low cost constant, not worth hoisting out.

Recommitted from 0e98659ea1193c with a fix for APInt comparison.

Differential Revision: https://reviews.llvm.org/D114380
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/test/CodeGen/ARM/fpclamptosat.ll
Commit fb9fc3c9512c9664b0228ed9b5f560164080cbcb by jonathanchesterfield
[openmp][amdgpu] Disable three tests in preparation for new runtime
The file was modifiedopenmp/libomptarget/test/unified_shared_memory/close_modifier.c
The file was modifiedopenmp/libomptarget/test/unified_shared_memory/shared_update.c
The file was modifiedopenmp/libomptarget/test/mapping/lambda_mapping.cpp
Commit 8aabde5a4b4872767dbd75e517f1a93adf097bc0 by Vitaly Buka
[NFC][sanitizer] Check &real_pthread_join

It's a weak function which may be undefined.
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_linux.cpp

Summary

  1. Revert "[VE] notify and build as official target" (details)
Commit 5db9389c3afd04a46c62bfdcb9590f4714975a69 by simon.moll
Revert "[VE] notify and build as official target"

This reverts commit feb754795a1d21d4644351b360f805e8e449026b.
The file was modifiedbuildbot/osuosl/master/config/status.py
The file was modifiedzorg/buildbot/builders/annotated/ve-linux-steps.make