Changes

Summary

  1. [mlir,win] Enable python bindings on the Windows mlir bot (details)
  2. [libc] Extend libc's linux script to handle runtimes build. (details)
  3. [libc] Add "clang" as one of the enabled projects under fullbuild. (details)
  4. Make standalone-build-x86_64 a standalone builder (details)
Commit 024b5581d445cf30694e2b5a808edb8e380b2ab1 by stilis
[mlir,win] Enable python bindings on the Windows mlir bot

This enables the build of the python bindings on the Windows mlir bot. This change depends on https://reviews.llvm.org/D125122

Differential Revision: https://reviews.llvm.org/D125134
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)
Commit fb050a65824cb6ecd5e8b357885c6890d55b0989 by sivachandra
[libc] Extend libc's linux script to handle runtimes build.

Differential Revision: https://reviews.llvm.org/D124706
The file was modifiedzorg/buildbot/builders/annotated/libc-linux.py (diff)
Commit 30c0c9b6e396ba364d0575c9a47d3d584ea1a967 by sivachandra
[libc] Add "clang" as one of the enabled projects under fullbuild.
The file was modifiedzorg/buildbot/builders/annotated/libc-linux.py (diff)
Commit 2b96a257f15dce470fe5b63d8ec46947d03e4e36 by kkleine
Make standalone-build-x86_64 a standalone builder

I've written an annotated bash script that will be used when running
builds of the standalone-build-x86_64 builder.

The bash script builds LLVM and installs it into a directory for later
consumption when building Clang independently.

Differential Revision: https://reviews.llvm.org/D125005
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)
The file was addedzorg/buildbot/builders/annotated/standalone-build.sh

Summary

  1. [RS4GC] Add support for 'freeze' instruction to findBaseDefiningValue (details)
  2. [compiler-rt][builtins] Fix wrong ABI of AVR __mulqi3 & __mulhi3 (details)
  3. [clang][X86] Rename some intrinsics tests to use the *-builtins.c naming convention (details)
  4. [SLP][X86] Add test coverage for Issue #51088 (details)
  5. [Support] Fix asan AllocatorTest after ba0d50ad7ec66 (details)
  6. [libc++][P0943] Add stdatomic.h header. (details)
  7. Revert "[HWASan] Clean up hwasan_symbolize." (details)
  8. Revert "[HWASan] Allow to linkify symbolizer output." (details)
  9. [gn build] Port 37ba1b9d1ac7 (details)
  10. [gn build] Port 586efd52b93f (details)
  11. [InstCombine] Add additional icmp of select tests (NFC) (details)
  12. [InstCombine] Fold icmp of select with non-constant operand (details)
  13. [flang] Fix AllocaOp/AllocMemOp type conversion (details)
  14. [clangd] Add parsing for IgnoreHeaders config option (details)
  15. [flang] Support external procedure passed as actual argument with implicit character type (details)
  16. [flang] Add one semantic check for masked array assignment (details)
  17. [clang] createInvocationFromCommandLine -> createInvocation, delete former. NFC (details)
  18. Fix lifetime of DiagnosticsEngine in diagtool. (details)
  19. [clangd] Speed up an unfortunate timer-based test. (details)
  20. [clangd] Eliminate direct usage of isAvailable() matcher. NFC (details)
  21. [DAG] visitREM - merge buildOptimizedSREM into if(). NFCI. (details)
  22. [MC][X86] Add vcmpps disassembler tests for Issue #41491 (details)
  23. [ELF] Change (NOLOAD) type mismatch to use SHT_NOBITS instead of SHT_PROGBITS (details)
  24. [libc++][NFC] Slight refactoring of some std::vector tests (details)
  25. [libc++][NFC] Move swap_noexcept test to .compile.pass.cpp (details)
  26. [Frontend] Fix broken createInvocation test due to bad merge (details)
  27. Fix LLDB test broken by 499d0b96cb52c828e7fc4d58825b5e8b3f9931c5 (details)
  28. [InstCombine] Add icmp of select with implied condition tests (NFC) (details)
  29. [InstCombine] Fold icmp of select with implied condition (details)
  30. [libc++][NFC] Add release note for constexpr std::string (details)
  31. Revert "[clangd] Speed up an unfortunate timer-based test." (details)
  32. [OpenMP] Add basic support for properly handling static libraries (details)
  33. [flang] Fix internal error with DATA-statement style initializers (details)
  34. Automatically generate CodeGen/X86/sse-align-*.ll test cases. NFC (details)
  35. Automatically generates several X86/sse tests cases. NFC (details)
  36. [SelectionDAG] Clear promoted bits before UREM on shift amount in PromoteIntRes_FunnelShift. (details)
  37. [clang-tidy][NFC] Add createChecks method that also checks for LangaugeOptions (details)
  38. [SelectionDAG] Improve asserts in SelectionDAG::getSelect. (details)
  39. [SimplifyLibcalls] Tests for libcall folding of subobjects [NFC] (details)
  40. [libc++][NFC] Fix formatting that was incorrectly changed by D124695 (details)
  41. [InstCombine] Add tests for combining AArch64 neon min/max intrinsics. (details)
  42. [AArch64] Add extra reverse costs. (details)
  43. [riscv] Add strict asserts for VSETVLI insertion algorithm to help catch bugs (details)
  44. [mlir][sparse] integration test for zero preserving math op (details)
  45. [DAGCombine] Make combineShuffleOfBitcast LittleEndian specific (details)
  46. [AArch64] Fix sub with carry (details)
  47. [clangd] Speed up a slow sleeping testcase. (details)
  48. [libc] Update windows entrypoint list (details)
  49. [HLSL] add -fcgl option flag. (details)
  50. [clang-tidy] New check for safe usage of `std::optional` and like types. (details)
  51. [libc][NFC] add index mode to printf parser (details)
  52. [clang-tidy][NFC] Fix doc typo for bugprone-unchecked-optional-access (details)
  53. Apply clang-tidy fixes for llvm-prefer-isa-or-dyn-cast-in-conditionals in OpenMPDialect.cpp (NFC) (details)
  54. Apply clang-tidy fixes for llvm-else-after-return in Merger.cpp (NFC) (details)
  55. Enable the use of ThreadPoolTaskGroup in MLIR threading helper to enable nested parallelism (details)
  56. [runtimes] Always configure libc++abi before libc++ (details)
  57. Added the brief discription about the new CSA checker. (details)
  58. update the doc for the static analyzer checker (details)
  59. Update ReleaseNotes.rst (details)
  60. [gn build] (semi-manually) port 7e63a0d479dd (details)
  61. Revert "[DAGCombine] Make combineShuffleOfBitcast LittleEndian specific" (details)
  62. [riscv] Add some minimal tracing output to InsertVSETVLI (details)
  63. [riscv] Add early return to InsertVSETLI fixed point step [nfc] (details)
  64. [riscv] Use early return to reduce nesting for InsertVSETVLI [nfc] (details)
  65. Apply clang-tidy fixes for llvm-include-order in Merger.cpp (NFC) (details)
  66. Apply clang-tidy fixes for readability-identifier-naming in SparseTensorUtils.cpp (NFC) (details)
  67. Apply clang-tidy fixes for bugprone-copy-constructor-init in TestPassManager.cpp (NFC) (details)
  68. Fix build with shared libs: add missing CMake dep to MLIR sparse pipeline (details)
  69. [Driver] Pass --fix-cortex-a53-843419 automatically on Fuchsia (details)
  70. Revert "Automatically generates several X86/sse tests cases. NFC" (details)
  71. [InstCombine] add tests for shuffle with fneg operand(s); NFC (details)
  72. [InstCombine] canonicalize fneg after shuffle (details)
  73. [mlir] Remove special case parsing/printing of `func` operations (details)
  74. [OpenMP] Allow compiling multiple target architectures with OpenMP (details)
  75. [OpenMP] Try to Infer target triples using the offloading architecture (details)
  76. [ORC-RT][ORC] Handle dynamic unwind registration for libunwind (details)
  77. [CMake][libcxx] Use target_include_directories for libc++ headers (details)
  78. Fix check-clang-tools target after 7cc8377f2c572a919ecb (details)
  79. [libc++][ranges] Implement `views::take`. (details)
  80. [gn build] Port 9924d8d66ae1 (details)
  81. [AArch64] Add llvm/test/CodeGen/AArch64/i256-math.ll (details)
  82. [libc++][ranges] Implement `views::single`. (details)
  83. [compiler-rt] Fix issue with compiler-rt tests mixing <atomic> and <stdatomic.h> (details)
  84. Revert "[SimpleLoopUnswitch] Collect either logical ANDs/ORs but not both." (details)
  85. [clang-format][NFC] Make all TokenAnnotator member functions const (details)
  86. [HWASan] Allow to linkify symbolizer output. (details)
  87. [HWASan] Clean up hwasan_symbolize. (details)
  88. [Scalar][NFC] Minor cleanups in CallSiteSplitting.cpp (details)
  89. [CMake] Include llvm-debuginfod-find in Fuchsia toolchain (details)
  90. [runtime] Build compiler-rt with --unwindlib=none (details)
  91. Revert "[runtime] Build compiler-rt with --unwindlib=none" (details)
  92. [runtime] Build compiler-rt with --unwindlib=none (details)
  93. Upstream support for POINTER assignment in FORALL. (details)
  94. Revert "[runtime] Build compiler-rt with --unwindlib=none" (details)
  95. [test][ORC-RT] Disable elfnix_platform tests on non-x86_64 platforms (details)
  96. [libcxx] random_device, use arc4random() on Solaris (details)
  97. [libcxx] Remove static inline and make use of _LIBCPP_HIDE_FROM_ABI in __support headers (details)
  98. Revert "[CMake][libcxx] Use target_include_directories for libc++ headers" (details)
  99. [InstCombine] add casts from splat-a-bit pattern if necessary (details)
  100. [InstCombine] precommit some tests for reassociate add (details)
  101. Fix MLIR integration test after a8308020 (`func.` prefix is required bythe parser now) (details)
  102. [InstCombine] sub(add(X,Y),umin(Y,Z)) --> add(X,usub.sat(Y,Z)) (details)
  103. [SLP] Add tests for awkward laod orders from SLP. NFC (details)
  104. [X86] Add description comments to SandyBridge for COPY/WriteZero/WriteVecMaskedGatherWriteback cases. NFC. (details)
  105. [FuzzMutate] Move LLVM module (de)serialization from FuzzerCLI -> IRMutator. NFC (details)
  106. [FuzzMutate] Split out FuzzerCLI library that doesn't depend on IR. (details)
  107. [ISD::IndexType] Helper functions for common queries. (details)
  108. Fix underlining in docs to fix the sphinx build (details)
  109. Revert "[FuzzMutate] Split out FuzzerCLI library that doesn't depend on IR." (details)
  110. Reland "[FuzzMutate] Split out FuzzerCLI library that doesn't depend on IR." (details)
  111. [InstCombine] Remove side effect of replaced constrained intrinsics (details)
  112. [X86] Remove unused 'hint' argument from prefetch tests (details)
  113. [InstCombine] fix miscompile when casting int->FP->int (details)
  114. Automatically generate aix32-cc-abi-vaarg.ll . NFC (details)
  115. [X86] rdrand-builtins.c - add 32-bit target coverage and enable -Wall/-Werror (details)
  116. [SLP] Cluster ordering for loads (details)
  117. [X86] Add 32-bit target test coverage to clean header tests (details)
  118. const char* for LLVMTargetMachineEmitToFile's argument (details)
  119. [Bitstream] Only consider flushing to file on block boundaries (details)
  120. [Headers][X86] amxintrin.h - fixed unknown parameter Wdocumentation warning. NFC (details)
  121. [ARM] Update ror.ll test to canonicalized IR (details)
  122. [DAGCombine] Add node in the worklist in topological order in CombineTo (details)
  123. [LegalizeTypes] Don't assume fshl/fshr shift amount type matches the other operands. (details)
  124. [LegalizeTypes] Make use of SelectionDAG::getShiftAmountConstant. NFC (details)
  125. [AMDGPU] lowerEXTRACT_VECTOR_ELT - fold from a SCALAR_TO_VECTOR source (details)
  126. [AArch64] Add missing NVCAST patterns. (details)
  127. [RISCV] Regenerate rv32zbp-zbkb.ll (details)
  128. [IROutliner] Accomodate blocks containing PHINodes with one entry outside the region and others inside the region. (details)
  129. Regenerate avx512-regcall-NoMask.ll . NFC (details)
  130. Generate sse-intel-ocl.ll automatically. NFC (details)
  131. [Frontend] Move, don't copy the predefines buffer into PP. NFC. (details)
  132. Make BinaryStreamWriter::padToAlignment write blocks vs bytes. (details)
  133. [test][msa] Add more sse,avx intrinsics tests (details)
  134. [test][msan] Relax order of param shadow (details)
  135. [X86] Fix some signedness errors in x86 headers (details)
  136. [VectorCombine] Attempt to fold select shuffles from reductions (details)
  137. [Headers][X86] Replace \operation with \code{.operation} (details)
  138. [Headers][X86] Enable basic Wdocumentation testing on X86 headers (details)
  139. [InstCombine] Add test coverage for PR43261 / Issue #42606 (details)
  140. [SLP][X86] Add test coverage for PR47491 / Issue #46835 (details)
  141. [SLP][X86] Add test coverage for PR49934 / Issue #49278 (details)
  142. [SLP][X86] Add test coverage for PR41892 / Issue #41237 (details)
  143. [SLP][X86] Add test coverage for PR42652 / Issue #41997 (details)
  144. [X86][AMX] Simplify AMX test case. (details)
  145. [X86] combine-add.ll - add test case for PR52039 / Issue #51381 (details)
  146. [DAG] Only perform the fold (A-B)+(C-D) --> (A+C)-(B+D) when both inner subs have one use (details)
  147. [X86] Set some more plausible latencies for horizontal add/subs on znver1 (details)
  148. [docs] Add Office Hours for Tobias Grosser (details)
  149. [X86] Add test coverage for PR26515 / Issue #26889 (details)
  150. [libc] Add LINK_LIBRARIES option to add_fp_unittest and add_libc_unittest. (details)
  151. [libc][Obvious] Fix cmake usage of list PREPEND (unavailable pre-3.15). (details)
  152. [SLP][X86] Add test coverage for PR50392 / Issue #49736 (details)
  153. [BOLT][DWARF] Fix assert for split dwarf. (details)
  154. [lld] Fix typo for processAux; NFC (details)
  155. [flang] Enforce a program not including more than one main program (details)
  156. [mlir][NvGpu] Fix nvgpu.mma.sync lowering to NVVM for f32, tf32 types (details)
  157. [CSSPGO][Preinliner] Use linear threshold to drive inline decision. (details)
  158. [flang] retain binding label of entry subprograms (details)
  159. [AMDGPU] Regenerate checks in a mir test (details)
  160. [AVR] Add PrintMethod for operand memspi (details)
  161. [DAG] Prevent infinite loop combining bitcast shuffle (details)
  162. [clang-format] Fix WhitespaceSensitiveMacros not being honoured when macro closing parenthesis is followed by a newline. (details)
  163. [ConstraintElimination] Add initial ssub.with.overflow tests. (details)
  164. Revert "[lldb] parallelize calling of Module::PreloadSymbols()" (details)
  165. [AArch64] Generate AND in place of CSEL for predicated CTTZ (details)
  166. [AArch64] Ampere1 does not support MTE (details)
  167. [clang-format] Correctly handle SpaceBeforeParens for builtins. (details)
  168. [libcxx] [test] Fix the nasty_macros test on Windows on ARM/ARM64 (details)
  169. [lldb/DWARF] Fix linking direction in CopyUniqueClassMethodTypes (details)
  170. [mlir][math] Promote (b)f16 to f32 when lowering to libm calls (details)
  171. [SVE] Optimize new cases for lowerConvertToSVBool (details)
  172. Filter non-external static members from SBType::GetFieldAtIndex. (details)
  173. [clang-tidy][NFC] Replace many instances of std::string where a StringRef would suffice. (details)
  174. [Clang] Add integer mul reduction builtin (details)
  175. [demangler] Buffer peeking needs buffer (details)
  176. [NFC][LoopVectorize] Add SVE test for tail-folding combined with interleaving (details)
  177. [clangd] Disable predefined macros in tests. NFC (details)
  178. [clangd] Skip extra round-trip in parsing args in debug builds. NFC (details)
  179. [SimpleLoopUnswitch] Add test case for crash with db7a87ed4fa7. (details)
  180. Recommit "[SimpleLoopUnswitch] Collect either logical ANDs/ORs but not both." (details)
  181. [clangd] Rewrite TweakTesting helpers to avoid reparsing the same code. NFC (details)
  182. [AArch64][SVE] Improve codegen when extracting first lane of active lane mask (details)
  183. [ScalarEvolution] Add tests for umin_seq with non-zero operand (NFC) (details)
  184. [X86] Replace avx512f integer mul reduction builtins with generic builtin (details)
  185. [ScalarEvolution] Fold %x umin_seq %y if %x cannot be zero (details)
  186. [DAG] Use isAnyConstantBuildVector. NFC (details)
  187. [demangler] No need to space adjacent template closings (details)
  188. [riscv] Fix state tracking bug on vsetvli (phi of vsetvli) peephole (details)
  189. [flang] Fix windows bot after D125140 (details)
  190. "Re-apply 4b6c2cd642 "Deferred Concept Instantiation Implementation"""" (details)
  191. [clangd] Skip (most) predefined macros when scanning for preamble patching. (details)
  192. Thread safety analysis: Handle compound assignment and ->* overloads (details)
  193. [riscv, InsertVSETVLI] Rename InstrInfo to Require to more clearly indicate purpose [nfc] (details)
  194. [analyzer] Inline operator delete when MayInlineCXXAllocator is set. (details)
  195. [Frontend] when attaching a preamble, don't generate the long predefines buffer. (details)
  196. [clang] Recognize scope of thread local variables in CFGBuilder (details)
  197. Enum conversion warning when one signed and other unsigned. (details)
  198. [SCEV] Add more tests for umin_seq with known predicate (NFC) (details)
  199. [SCEV] Fold umin_seq using known predicate (details)
  200. [SLP]Fix a crash when preparing a mask for external scalars. (details)
  201. [X86] insertps-combine.ll - show address math in checks (details)
  202. [ELF] Support -plugin-opt=stats-file= (details)
  203. [LLVM][sancov] Inclusive language: Add -ignorelist option (details)
  204. [lldb/test] Fix TestCppIncompleteTypeMembers.py (details)
  205. [mlir] Add translation from tensor.reshape to memref.reshape (details)
  206. [mlir][linalg] Fix padding size calculation for Conv2d ops. (details)
  207. [RISCV] Remove two unmasked RVV patterns (details)
  208. [riscv] Add a few more vsetvli insertion tests (details)
  209. Revert ""Re-apply 4b6c2cd642 "Deferred Concept Instantiation Implementation""""" (details)
  210. [clang-fuzzer] Add a tiny tool to generate a fuzzing dictionary for clang (details)
  211. [mlir] Refactoring dialect and test code to use parseCommaSeparatedList (details)
  212. [Docs] Added my office hours. (details)
  213. [SLP]Try partial store vectorization if supported by target. (details)
  214. [opt] Error on `opt -O# --foo-pass` (details)
  215. [SystemZ] Fix argument type of tdc instruction. (details)
  216. [CodeGen] Clarify the semantics of ADDCARRY/SUBCARRY (details)
  217. [lldb/test] Append CXXFLAGS_EXTRAS last in Makefile.rules (details)
  218. [lldb/test] Remove superfluous -std=c++11 from tests (details)
  219. [mlir] Fix build & test of mlir python bindings on Windows (details)
  220. Make lsan TestCases more consistent (details)
  221. Modify DXILPrepare to emit no-op bitcasts (details)
  222. [PassManager] Implement DOTGraphTraitsViewer under NPM (details)
  223. [polly] migrate -polly-show to the new pass manager (details)
  224. [polly] Fix compiler warning. NFC. (details)
  225. Revert "Recommit "[VPlan] Remove uneeded needsVectorIV check."" (details)
  226. [mlir][nvvm] Add attribute to nvvm.cpAsyncOp to control l1 bypass (details)
  227. [flang][runtime] Fix input of NAN(...) on non-fast path (details)
  228. [flang][runtime] Don't pad CHARACTER input at end of record unless PAD='YES' (details)
  229. [flang][runtime] Enforce restrictions on unlimited format repetition (details)
  230. [flang][runtime] (G0) for CHARACTER means (A), not (A0) (details)
  231. [flang][runtime] BACKSPACE after non-advancing I/O (details)
  232. [SLP]Adjust assertion check for scalars in several insertelements. (details)
  233. [flang] Fold intrinsic inquiry functions SAME_TYPE_AS() and EXTENDS_TYPE_OF() (details)
  234. Revert "[SLP]Further improvement of the cost model for scalars used in buildvectors." (details)
  235. [flang] Fold intrinsic functions SPACING() and RRSPACING() (details)
  236. [polly] Load NPM pass plugin for NPM test. (details)
  237. [HWASan] deflake hwasan_symbolize test (details)
  238. [flang] Operands of SIGN() need not have same kind (details)
  239. [Inliner] Preserve !prof metadata when converting call to invoke. (details)
  240. [flang] Correct folding of SPREAD() for higher ranks (details)
  241. [mlir-LSP] Ensure existing documents are process synchronously (details)
  242. [gn build] (manually) port a2f2dfde48ac (clang-fuzzer-dictionary) (details)
  243. [flang] Refine handling of short character actual arguments (details)
  244. [mlir][doc] Move documentation of extensible dialects (details)
  245. [trace][intelpt] Support system-wide tracing [2] - Add a dummy --per-core-tracing option (details)
  246. [trace][intelpt] Support system-wide tracing [3] - Refactor IntelPTThreadTrace (details)
  247. [gn build] Port 7b73de9ec2b1 (details)
  248. Add the ability to debug through an exec into ld (details)
  249. [flang] Ensure that structure constructors fold parameter references (details)
  250. [polly] Fix type in function name. NFC. (details)
  251. [flang] Fix to UnwrapConvertedExpr() (details)
  252. [flang] Correct actual/dummy procedure compatibility for ALLOCATABLE/POINTER functions (details)
  253. [AArch64] Remove ADDC, ADDE, SUBC, SUBE support, use the CARRY ops instead (details)
  254. [flang] Allow PDTs with LEN parameters in REDUCE() (details)
  255. [flang] Allow NULL() actual argument for optional dummy procedure (details)
  256. [AMDGPU] Generate checks in llvm.amdgcn.softwqm.ll (details)
  257. [AMDGPU] Pre-commit test for D124981. NFC. (details)
  258. [flang] Allow implicit declaration of DATA objects in inner procedures (details)
  259. [flang] Refine error checking in specification expressions (details)
  260. [flang] Reverse a reversed type compatibility check (details)
  261. [mlgo] Support exposing more features than those supported by models (details)
  262. Add x86 to REQUIRES line in test as suggested in https://reviews.llvm.org/D124105. (details)
  263. [gn build] Port 059e03476cbb (details)
  264. [flang] Accept POINTER followed by INTERFACE (details)
  265. [NFC] follow up code cleanup after D123837 (details)
  266. [flang] Allow ENTRY function result symbol usage before the ENTRY (details)
  267. [RISCV][NFC] Add 'rv32izvfh' invalid arch test (details)
  268. [clang][Driver] Add more tests for riscv (details)
  269. [NFC] Modify the comment to reflect the changes in decoder (details)
  270. [mlir] Fix python bindings build on Windows in Debug (details)
  271. [IRSim] Remove early check from similarity matching such that commutative instructions are checked correctly when using the same value. (details)
  272. [lldb] Fix 7b73de9ec2b19df040c919d3004dfbead9b6ac59 (details)
  273. [lldb] Fix 7b73de9ec2b19df040c919d3004dfbead9b6ac59 (details)
  274. [ELF] Move InputSectionBase::rawData member [NFC] (details)
  275. [lldb] Fix 7b73de9ec2b19df040c919d3004dfbead9b6ac59 (details)
  276. [IR][CostModel] A scalable vector shuffle can't be an identity or reverse shuffle. (details)
  277. [NFC][lldb][trace] Use uint64_t when decoding and enconding json (details)
  278. [flang][OpenMP] Lowering for task construct (details)
  279. [Coroutines] Use PassManager instead of Legacy PassManager internally (details)
  280. Revert "[NFC][lldb][trace] Use uint64_t when decoding and enconding json" (details)
  281. [Test] One more test to prevent crash in SLP vectorizer (details)
  282. Revert "[Test] One more test to prevent crash in SLP vectorizer" (details)
  283. Return "[Test] One more test to prevent crash in SLP vectorizer" (details)
  284. [libcxxabi] [cmake] Fix a mismatched variable name (details)
  285. [Docs] Clarify CLANG_ENABLE_OPAQUE_POINTERS behavior (NFC) (details)
  286. [analyzer] Indicate if a parent state is infeasible (details)
  287. [analyzer] Implement assume in terms of assumeDual (details)
  288. [analyzer] Replace adjacent assumeInBound calls to assumeInBoundDual (details)
  289. [MLIR] Split off MLIRExecutionEngineUtils to fix libMLIR.so build (PR54242) (details)
  290. [fuzzer] Reduce size of large.test (details)
  291. [RISCV] Add more tests for vector reduce mask operations (details)
  292. [RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation (details)
  293. [analyzer] Attempt to fix test infeasible-crash.c (details)
  294. Revert "[RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation" (details)
  295. [InstCombine] Handle GEP scalar/vector base mismatch (PR55363) (details)
  296. [NFC] [Coroutines] Remove EnableReuseStorageInFrame option (details)
  297. [InstSimplify] Handle unknown function context in pointer icmp fold (PR54615) (details)
  298. [LoopVectorize] Remove incorrect nuw flag from test (NFC) (details)
  299. [RISCV][NFC] Remove else after continue (details)
  300. [mlir] Remove unused using declaration (NFC) (details)
  301. [pseudo] Add benchmarks for pseudoparser. (details)
  302. [Sema][SVE] Move/simplify Sema testing for SVE ACLE builtins (details)
  303. [Sema][SVE2] Move/simplify Sema testing for SVE2 ACLE builtins (details)
  304. GlobalISel: Trivial documentation and comment fixes (details)
  305. [IndVarSimplify] Regenerate test checks (NFC) (details)
  306. [SLP][NFC]Add a test for improved shuffles in buildvector sequences, (details)
  307. [SCEVExpander] Remove handling for mixed int/pointer min/max (NFCI) (details)
  308. [libc++abi] Reword uncaught exception termination message (details)
  309. [GVNSink] Make GVNSink resistant against self referencing instructions (PR36954) (details)
  310. AMDGPU/SDAG: Refine the fold to v_mad_[iu]64_[iu]32 (details)
  311. [NFC][PowerPC] Add 32-bit AIX RUN lines to test cases. (details)
  312. [MLIR Parser] Improve QoI for "expected token" errors (details)
  313. [flang] Fold real-valued DIM() (details)
  314. [Frontend] Flip default of CreateInvocationOptions::ProbePrecompiled to false (details)
  315. [MLIR][AMDGPU] Add AMDGPU dialect, wrappers around raw buffer intrinsics (details)
  316. [CodeGen] Use ABI alignment for C++ new expressions (details)
  317. [mlir] Fail early if AnalysisState::getBuffer() returns failure (details)
  318. [libc++abi][NFC] Fix typo in comment (details)
  319. [flang] Fold real-valued MODULO() and MOD() (details)
  320. Diagnose unreachable generic selection associations (details)
  321. [AMDGPU][GFX10] Support base+soffset+offset SMEM loads. (details)
  322. [InstCombine] Add additional freeze tests (NFC) (details)
  323. [flang] Enforce limit on rank + corank (details)
  324. [SCCP] Preserve Name when converting SExt->ZExt. (details)
  325. [CVP] Preserve exact name when converting sext->zext and ashr->lshr. (details)
  326. Revert "[AArch64] Generate AND in place of CSEL for predicated CTTZ" (details)
  327. [libc++][ranges] Implement `views::drop`. (details)
  328. [mlir][AMDGPU] Add AMDGPU conversion patterns to ConvertGPUToROCDL (details)
  329. [RISCV] 'K'-extension ordering (details)
  330. [OpenMP] Add mangling support for linear modifiers (ref,uval,val) (details)
  331. [clangd] Support for standard inlayHint protocol (details)
  332. Use update_llc_test_checks for the switch.ll test; add new test (details)
  333. Avoid 8 and 16bit switch conditions on x86 (details)
  334. CodeGenPrepare: Replace constant PHI arguments with switch condition value (details)
  335. [utils] Avoid hardcoding metadata ids in update_cc_test_checks (details)
  336. [OpenMP] Fix embedding offload code when there is no offloading toolchain (details)
  337. [InstCombine] add tests for shuffles with FP<->int cast operands; NFC (details)
  338. [InstCombine] fold shuffles with FP<->Int cast operands (details)
  339. [CUDA][HIP] support __noinline__ as keyword (details)
  340. [llvm-ml] Implement support for MASM's extern directive (details)
  341. [mlir][SCF] Add utility method to add new yield values to a loop. (details)
  342. [mlir][SCF] Retire `cloneWithNewYields` helper function. (details)
  343. Fix indentation in ReleaseNotes.rst (details)
  344. [AArch64] Remove redundant f{min,max}nm intrinsics. (details)
  345. [BasicAA] Fix order in which we pass MemoryLocations to alias() (details)
  346. [NFC] Fix typo (details)
  347. [NFC]Add Missing Break in switch that we didn't notice because it was (details)
  348. Enhance peephole optimization. (details)
  349. [NFC] Add missing 'break' in a switch case (details)
  350. [AMDGPU] Allow for MFMA Inst Clustering (details)
  351. [clang-tidy] Fix unintended change left in 12cb540529e (details)
  352. Update test for changes in f0ea9c9cec7f7b632ef7894ff7b3859269de611b / D124552 (details)
  353. Add the "sent break" message to the "gdb-remote packets" channel (details)
  354. [NFC] Replace not-null and not-isa check with a not-isa_and_nonnull (details)
  355. [SLP][NFC] Precommit a lit test for a followup patch that improves tree reordering for external users. (details)
  356. Revert "Enhance peephole optimization." (details)
  357. Revert "[utils] Avoid hardcoding metadata ids in update_cc_test_checks" (details)
  358. Remove unused variable (fix -Werror build on MSVC) (details)
  359. [gn build] Port f822db7670d4 (details)
  360. [OpenMP] Fix mangling for linear modifiers with variable stride (details)
  361. [riscv] Minor style cleanup so that code more obviously matches comments [nfc] (details)
  362. [riscv] Consolidate logic for SEW/VL operand offset calculations [nfc] (details)
  363. [SLP] Make reordering aware of external vectorizable scalar stores. (details)
  364. [mlir][gpu] Move async copy ops to NVGPU and add caching hints (details)
  365. [mlir] Print some message for op-printing verification (details)
  366. [Peephole-opt][X86] Enhance peephole opt to see through SUBREG_TO_REG (details)
  367. [Bitcode] Include indirect users of BlockAddresses in bitcode (details)
  368. [BuildLibCalls] infer inreg param attrs from NumRegisterParameters (details)
  369. [flang] Allow local variables and function result inquiries in specification expressions (details)
  370. [HWASan] deflake hwasan_symbolize test more. (details)
  371. [HWASan symbolize] Write error to stderr. (details)
  372. [BPF] Mark FI_ri as isPseudo to avoid assertion during disassembly (details)
  373. [BPF] Add a test for making FI_ri as isPseudo (details)
  374. [PowerPC] Fix PPCISD::STBRX selection issue on A2 (details)
  375. [NFC] Run clang-format on llvm/lib/Target/X86/X86InstroInfo.cpp (details)
  376. [CodeGen] Fix ConvertNodeToLibcall for STRICT_FPOWI (details)
  377. [Transform][Utils][NFC] Clean up CtorUtils.cpp (details)
  378. Revert "[NFC] Run clang-format on llvm/lib/Target/X86/X86InstroInfo.cpp" (details)
  379. [X86] Fix 80 column violation in X86InstrInfo.cpp. NFC (details)
  380. [flang] Change "bad kind" messages in the runtime to "not yet implemented" (details)
  381. [RISCV] Add rvv codegen support for vp.fpext. (details)
  382. [RISCV] Make PseudoReadVL have the vtypes of the corresponding VLEFF/VLSEGFF. (details)
  383. [DirectX backend] Add pass to lower llvm intrinsic into dxil op function. (details)
  384. [ORC] Fix sorting of contructors by priority (details)
  385. [TypePromotion] Format Type Promotion. NFC (details)
  386. [AsmParser] Improve error recovery again. (details)
  387. [SelectionDAG][VP] Rename VP sext/zext/trunc ISD opcodes (details)
  388. [TypePromotion] Fix sext vs zext in promoted constant (details)
  389. [InstCombine] Add additional freeze tests (NFC) (details)
  390. [SCEVExpander] Deduplicate min/max expansion code (NFC) (details)
  391. [docs][pp-trace] Remove FileNotFound callback (details)
  392. [IndVarSimplify] Regenerate test checks (NFC) (details)
  393. [BOLT] Add icp-inline option (details)
  394. [LV] Add opaque pointer test for #55375. (details)
  395. [VPlan] VPInterleaveRecipe only uses first lane if op not stored. (details)
  396. [BOLT][TEST] Remove -gdwarf-4 override from %cflags (details)
  397. Add extension diagnostic for linemarker directives (details)
  398. Fix test; we now expect a pedantic warning (details)
  399. [CUDA] Create offloading entries when using the new driver (details)
  400. [Cuda] Add initial support for wrapping CUDA images in the new driver. (details)
  401. [CUDA] Add wrapper code generation for registering CUDA images (details)
  402. [RISCV][NFC] Move variable down closer to its first use (details)
  403. [RISCV][NFC] Rename variable to appease code style (details)
  404. [clang-format] fix nested angle brackets parse inside concept definition (details)
  405. [ASTMatchers][NFC] Fix name of matcher in docs and add a missing test (details)
  406. [InstCombine] improve auto-generated test checks by matching function signature; NFC (details)
  407. [SLP]Further improvement of the cost model for scalars used in buildvectors. (details)
  408. [AArch64][SVE] Add aarch64_sve_pcs attribute to Clang (details)
  409. [Clang] Introduce clang-offload-packager tool to bundle device files (details)
  410. [gn build] (manually) port 26eb04268f4c (clang-offload-packager) (details)
  411. [runtimes] Print the testing configuration in use in libunwind and libc++abi (details)
  412. [mlir][bufferize][NFC] Move helper functions to BufferizationOptions (details)
  413. [riscv] Prefer to use previous VL for scalar move instructionsK (details)
  414. [InstCombine] Freeze other uses of frozen value (details)
  415. [RISCV] Remove some TODOs in tests (details)
  416. [AMDGPU] gfx11 subtarget features & early tests (details)
  417. [ConstraintElimination] Add test where ssub result is not used. (details)
  418. [AMDGPU] gfx11 Decode wider instructions. NFC (details)
  419. [DirectX backend] Add pass to emit dxil metadata. (details)
  420. [NFC] Change comment number in aarch64 isel (details)
  421. Fix endless loop in optimizePhiConst with integer constant switch condition (details)
  422. Fix the Clang sphinx build (details)
  423. [Bazel] Add support for s390x build target (details)
  424. [OpenMP] Add a check for alignment in the offload packager (details)
  425. [BOLT][NFC] Add MCPlus::primeOperands iterator_range (details)
  426. [InstCombine] freeze operand in urem expansion (details)
  427. [flang] Fold complex component references (details)
  428. [mlgo] Fix test (details)
  429. [clang][AIX] Don't ignore XCOFF visibility by default (details)
  430. [riscv] Add tests for vsetvli reuse across iterations of a loop (details)
  431. [flang] Fix check for assumed-size arguments to SHAPE() & al. (details)
  432. [gn build] Use llvm-ar when clang_base_path is specified (details)
  433. [riscv] Canonicalize vsetvli (vsetvli avl, vtype1) vtype2 transitionsas reviewed (details)
  434. [RISCV] Add a DAG combine to pre-promote (i32 (and (srl X, Y), 1)) with Zbs on RV64. (details)
  435. [InstCombine] update auto-generated CHECK lines in test file; NFC (details)
  436. [InstCombine] freeze operand in sdiv expansion (details)
  437. [RISCV] Override TargetLowering::shouldProduceAndByConstByHoistingConstFromShiftsLHSOfAnd. (details)
  438. [RISCV] Move implementation of getVLOpNum and getSEWOpNum from RISCVInsertVSETVLI to RISCVBaseInfo.h. NFC (details)
  439. [HLSL] add -D option for dxc mode. (details)
  440. [clang] Fix KEYALL (details)
  441. [RISCV] Add caching to the gather/scatter to strided load/store conversion. (details)
  442. [clang][ppc] Creating Seperate Install Target for PPC htm Headers (details)
  443. [TableGen] Remove the use of global Record state (details)
  444. [TableGen] Refactor TableGenParseFile to no longer use a callback (details)
  445. [test, riscv] Add test illustrating missing handling for fallthrough blocks in 541c9ba (details)
  446. [CodeGenPrepare] Use const reference to avoid unnecessary APInt copy. NFC (details)
  447. [libc++] Add a few more debug wrapper functions (details)
  448. [libc++] Remove __invalidate_all_iterators and replace the uses with std::__debug_db_invalidate_all (details)
  449. [AsmParser] Adopt emitWrongTokenError more, improving QoI (details)
  450. [GVN] Add test case for memdep invalidation bug. (details)
  451. [RISCV] Fold addiw from (add X, (addiw (lui C1, C2))) into load/store address (details)
  452. [RISCV] Enable subregister liveness tracking for RVV. (details)
  453. [riscv] Add a bunch of tests exploring switch lowering (details)
  454. [ConstraintElimination] Add extra tests for different overflows. (details)
  455. [AMDGPU] Add llvm.amdgcn.sched.barrier intrinsic (details)
  456. [LinkerWrapper][Fix} Fix bad alignment from extracted archive members (details)
  457. Revert "[HLSL] add -D option for dxc mode." (details)
  458. [OpenMP] Fix mangling for linear parameters with negative stride (details)
  459. [clang] Add the flag -ffile-reproducible (details)
  460. [Driver][test] run one test in darwin-dsymutil.c for Darwin only (details)
  461. Explicitly add -target for Windows builds in file_test_windows.c (details)
  462. Revert "[SLP] Make reordering aware of external vectorizable scalar stores." (details)
  463. [MIPS] Remove an incorrect microMIPS instruction alias (details)
  464. Add "indexedVariables" to variables with lots of children. (details)
  465. [BOLT][NFC] Use BitVector::set_bits (details)
  466. Recommit "[SLP] Make reordering aware of external vectorizable scalar stores." (details)
  467. [lld/macho] Fixes the -ObjC flag (details)
  468. Revert "[NFC][tests][AIX] XFAIL test for lack of visibility support" (details)
  469. [LoongArch] Check msb is not less than lsb for the bstr{ins/pick}.{w/d} instructions (details)
  470. [mlir] Fix loop unrolling: properly replace the arguments of the epilogue loop. (details)
  471. [RISCV][NFC] Simplify tests by reorganizing check prefixes (details)
  472. [LegalizeVectorTypes] Enable WidenVecRes_SETCC work for scalable vector. (details)
  473. [BPF] Implement mod operation (details)
  474. [Bitcode] Simplify code after FUNC_CODE_BLOCKADDR_USERS changes (D124878) (details)
  475. [LLVM][Casting.h] Update dyn_cast machinery to provide more control over how the casting is performed. (details)
  476. [MLIR][Operation] Simplify Operation casting, NFC (details)
  477. [mlir] (NFC) Use assembly format for test.graph_region (details)
  478. [mlir][ods] (NFC) don't use std::function for map_range (details)
  479. [mlir][Linalg] Combine canonicalizers that deal with removing dead/redundant args. (details)
  480. [mlir:Parser] Emit a better diagnostic when a custom operation is unknown (details)
  481. silence new -Wunused-result warnings in test (details)
  482. Add an error message to the default SIGPIPE handler (details)
  483. [AMDGPU] Remove pre-committed test for D124981. NFC. (details)
  484. [mlir][bufferize] Add helpers for templatized DENY filters (details)
  485. Revert "Add an error message to the default SIGPIPE handler" (details)
  486. [mlir][bufferize] Fix op filter (details)
  487. [mlir][bufferize] Support alloc hoisting across function boundaries (details)
  488. [AMDGPU][GFX10] Support base+soffset+offset SMEM stores. (details)
  489. [MLIR] Fix build without native arch (details)
  490. [AMDGPU][NFC] Remove unused function. (details)
  491. [mlir][NFC] Fix `GpuKernelOutliningPass` copy constructor warnings (details)
  492. [Intrinsics] Fix `nvvm_prmt` intrinsic attributes (details)
  493. [Test] Regenerate checks using auto-update (work around PR55365) (details)
  494. [mlir][LLVM] Make the nested type restriction on complex constants less aggressive (details)
  495. [bazel] Add support for configuring the bazel build for PPC (details)
  496. [FastISel] Add some debug output (NFC) (details)
  497. [clang-format] Don't remove braces if a 1-statement body would wrap (details)
  498. [mlir][linalg] Add lowering of named ops on complex numbers (details)
  499. [MC] [Win64EH] Simplify code using WinEH::Instruction::operator!=. NFC. (details)
  500. [AArch64] Stop creating unnecessary label MCSymbols for each Windows unwind opcode. NFC. (details)
  501. Rename and fix ValueMap::resize to reserve (details)
  502. Warn if using `elifdef` & `elifndef` in not C2x & C++2b mode (details)
  503. [mlir][vector] Add lowering pattern for vector.warp_execute_on_lane_0 op (details)
  504. Reland "[analyzer] Canonicalize SymIntExpr so the RHS is positive when possible" (details)
  505. [AArch64] Preserve chain when lowering fixed length load to SVE (PR55281) (details)
  506. [openmp] Fix strict aliasing issue in cmpxchg routine (details)
  507. [clang] add -fmodule-file-home-is-cwd (details)
  508. [clang] serialize SUBMODULE_TOPHEADER relative to BaseDirectory (details)
  509. [clang] serialize ORIGINAL_PCH_DIR relative to BaseDirectory (details)
  510. [ArgPromotion] Make a non-byval promotion attempt first (details)
  511. [DebugInfo][InstrRef] Describe value sizes when spilt to stack (details)
  512. [CodeGen][NFC] Move some comments from the end of lines to above them (details)
  513. Fixes a performance problem with lowering of forall loops and creating (details)
  514. [DenseElementAttr] Simplify the public API for creating these. (details)
  515. Various improvements suggested by river NFC. (details)
  516. [DeadArgElim] Re-apply: Set unused arguments for internal functions (details)
  517. [DenseElementAttr] Silence warning in -DNDEBUG builds. NFC. (details)
  518. [libcxx] Switch __cxx_contention_t to int32_t on 32 bit AIX (details)
  519. [clang]Silence warning in MicrosoftCXXABI.cpp (details)
  520. [RISCV] Use tail agnostic policy when selecting riscv_fma_vl to instructions (details)
  521. [TypePromotion] Promote undef by converting to 0. (details)
  522. [CSSPGO][llvm-profgen] Do not duplicate context profiles into base profile when converting CS flat profile to nested. (details)
  523. [Headers][MSVC] Define wchar_t in stddef.h like MSVC if not using the builtin type (details)
  524. [CostModel][X86] Auto generate gather/scatter LV costs using UTC_ARGS --filter control (details)
  525. [CostModel][X86] Auto generate masked load/store LV costs using UTC_ARGS --filter control (details)
  526. [CostModel][X86] Auto generate partial interleaved load LV costs using UTC_ARGS --filter control (details)
  527. [libc++abi] Refactor exception type demangling into a separate function (details)
  528. Check for resource exhaustion when recursively parsing declarators (details)
  529. [libc++abi][NFC] Add comment on long reaching #if (details)
  530. [RISCV] Extend dataflow workaround from D119518 to fallthrough blocks (details)
  531. [InstCombine] freeze operand in div+mul fold (details)
  532. [Sanitizers][Darwin] Add READ/WRITE detection on arm64 for darwin. (details)
  533. [llvm-profgen] Filter out oversized LBR ranges. (details)
  534. [ELF] Align the end of PT_GNU_RELRO to max-page-size instead of common-page-size (details)
  535. [clang] Allow all string types for all attribute(format) styles (details)
  536. [libc] add uint128 implementation (details)
  537. [SLP][NFC] Added test to exercise the cause of a crash caused by reordering. (details)
  538. [LAA] Initial support for runtime checks with pointer selects. (details)
  539. [libc] fix uint includes and libc bazel (details)
  540. [libc++] Mark <stdatomic.h> as requiring C++23 (details)
  541. [mlir] translate memref.reshape ops that have static shapes (details)
  542. [runtimes] [cmake] Fix -Werror detection in common build configs (details)
  543. We don't require users to type out the full context of a function, for (details)
  544. [llvm-readobj] [COFF] Fix the printout for ARM64 packed homed parameters (details)
  545. [RISCV] Add extra space into error message about unsupported extension version. (details)
  546. [libc][docs] Add doc for libc stdio functions (details)
  547. [libc] add printf converter (details)
  548. [mlir:Pass] Add support for op-agnostic pass managers (details)
  549. [mlir] Fix pipeline-parsing.mlir on windows (details)
  550. [yaml2obj][COFF] Add missing RISCV constants (details)
  551. [AArch64] Replace `performANDSCombine` with `performFlagSettingCombine`. (details)
  552. [AArch64] Add `foldADCToCINC` DAG combine. (details)
  553. [runtimes] [CMake] Fix checks for -Werror when building with incomplete toolchains (details)
  554. Revision 3339000e0bda696c2e29173d15958c0a4978a143 caused the Language (details)
  555. [MIPS] Correct the implementation of the msub optimization (details)
  556. [LV] Add crashing test from #55096. (details)
  557. [MIPS} Address ISel failures for 64 bit fpus in microMIPS (details)
  558. [mlir] Significantly overhaul the textmate grammar (details)
  559. [mlir] Bump mlir-vscode to 0.0.7 (details)
  560. [mlir][sparse] add sparse sign integration test (details)
  561. [llvm][lldb] use FindLibEdit.cmake everywhere (details)
  562. [Lit] Add pushd and popd builtins (details)
  563. [clang-format] Handle comments below r_brace in RemoveBracesLLVM (details)
  564. [lldb/API] Add SBCompileUnit::GetIndexForLineEntry method to SB API (details)
  565. [lldb/test] Skip TestCppIncompleteTypeMembers.py on Darwin (NFC) (details)
Commit 5a08e81779d0c7968558a6aebb989240c98c93a7 by mkazantsev
[RS4GC] Add support for 'freeze' instruction to findBaseDefiningValue

Because this instruction is a noop, we can simply go through it in
search of the base.
The file was modifiedllvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
The file was addedllvm/test/Transforms/RewriteStatepointsForGC/pr55308.ll
Commit 3902ebdd5793763431264259dfdca871ef453017 by ben.shi
[compiler-rt][builtins] Fix wrong ABI of AVR __mulqi3 & __mulhi3

Reviewed By: aykevl, dylanmckay

Differential Revision: https://reviews.llvm.org/D125077
The file was modifiedclang/test/Preprocessor/avr-common.c
The file was modifiedcompiler-rt/lib/builtins/avr/mulhi3.S
The file was modifiedclang/lib/Basic/Targets/AVR.cpp
The file was modifiedcompiler-rt/lib/builtins/avr/mulqi3.S
Commit 102824f04893452b6d1602a8d57949844b07bef9 by llvm-dev
[clang][X86] Rename some intrinsics tests to use the *-builtins.c naming convention
The file was removedclang/test/CodeGen/X86/intel-avx512vp2intersect.c
The file was addedclang/test/CodeGen/X86/avx512cd-builtins.c
The file was addedclang/test/CodeGen/X86/avx512vp2intersect-builtins.c
The file was removedclang/test/CodeGen/X86/intel-avx512vlvp2intersect.c
The file was removedclang/test/CodeGen/X86/cldemote.c
The file was removedclang/test/CodeGen/X86/cetintrin.c
The file was addedclang/test/CodeGen/X86/avx512vlvp2intersect-builtins.c
The file was removedclang/test/CodeGen/X86/avx512cdintrin.c
The file was addedclang/test/CodeGen/X86/cldemote-builtins.c
The file was addedclang/test/CodeGen/X86/cet-builtins.c
Commit cbd300f62dded21ba9e417e58e0f65be05324db2 by llvm-dev
[SLP][X86] Add test coverage for Issue #51088
The file was addedllvm/test/Transforms/SLPVectorizer/X86/reduction-transpose.ll
Commit 56ee5d9337fac7fcf9e755e75d85563d84d1b89c by sam.mccall
[Support] Fix asan AllocatorTest after ba0d50ad7ec66

We were counting the number of bytes allocated, but under asan there's
extra redzone bytes by default. Disable this.
The file was modifiedllvm/unittests/Support/AllocatorTest.cpp
Commit 586efd52b93f083d095bf3319da7e42f221c3f4a by Louis Dionne
[libc++][P0943] Add stdatomic.h header.

* https://wg21.link/P0943
* https://eel.is/c++draft/stdatomic.h.syn

This is a re-application of 5d1c1a24, which was reverted in 987c7f407
because it broke the LLDB build.

Co-authored-by: Marek Kurdej <marek.kurdej@gmail.com>

Differential Revision: https://reviews.llvm.org/D97044
The file was modifiedlibcxx/include/module.modulemap
The file was modifiedlibcxx/test/libcxx/min_max_macros.compile.pass.cpp
The file was addedlibcxx/test/libcxx/atomics/stdatomic.h.syn/incompatible_with_atomic.verify.cpp
The file was modifiedlibcxx/test/libcxx/nasty_macros.compile.pass.cpp
The file was addedlibcxx/test/std/language.support/support.limits/support.limits.general/stdatomic.h.version.compile.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
The file was modifiedlibcxx/test/libcxx/clang_tidy.sh.cpp
The file was addedlibcxx/test/std/atomics/stdatomic.h.syn/types.compile.pass.cpp
The file was addedlibcxx/test/libcxx/atomics/stdatomic.h.syn/dont_hijack_header.compile.pass.cpp
The file was addedlibcxx/include/stdatomic.h
The file was modifiedlibcxx/docs/Status/Cxx2bPapers.csv
The file was modifiedlibcxx/include/atomic
The file was addedlibcxx/test/libcxx/atomics/atomics.syn/incompatible_with_stdatomic.verify.cpp
The file was modifiedlibcxx/test/libcxx/double_include.sh.cpp
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was modifiedlibcxx/utils/generate_header_tests.py
The file was modifiedlibcxx/include/version
The file was modifiedlibcxx/docs/FeatureTestMacroTable.rst
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/test/libcxx/no_assert_include.compile.pass.cpp
The file was modifiedlibcxx/test/libcxx/assertions/headers_declare_assertion_handler.sh.cpp
Commit f3d31c7f8173624ed436a5754ffeab5952136058 by thakis
Revert "[HWASan] Clean up hwasan_symbolize."

This reverts commit 6ca1df61d29c1c46d8d6f51a1091a7651c8b1ab1.
Prerequisite for reverting 4af9392e13a212fe295dc.
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize
Commit c9faea04b1f8ef658ee5367ba8f00266b2051263 by thakis
Revert "[HWASan] Allow to linkify symbolizer output."

This reverts commit 4af9392e13a212fe295dc33455bc591b2dc8f859.
The new test fails on several machines (including some bots),
see https://reviews.llvm.org/D124950
The file was removedcompiler-rt/test/hwasan/TestCases/hwasan_symbolize.cpp
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize
Commit 6d74721a0787af977319e66328788803a7d1dc07 by llvmgnsyncbot
[gn build] Port 37ba1b9d1ac7
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit 1df36d56163716c4827f975003bf10b4c306271f by llvmgnsyncbot
[gn build] Port 586efd52b93f
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit d7b6fd47b223c3b5243973188a8598b1eecb1046 by npopov
[InstCombine] Add additional icmp of select tests (NFC)
The file was addedllvm/test/Transforms/InstCombine/icmp-select.ll
Commit 0863abe3ac47c281fdd35dc87d83c495cf741da0 by npopov
[InstCombine] Fold icmp of select with non-constant operand

Try to push an icmp into a select even if the icmp operand isn't
constant - perform a generic SimplifyICmpInst instead.

This doesn't appear to impact compile-time much, and forming
logical and/or is generally profitable, as we have very good
support for them.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/test/Transforms/InstCombine/icmp-select.ll
The file was modifiedllvm/test/Transforms/InstCombine/shift.ll
Commit ac0f4c8f362e819316ca152315e930f4e6515e9d by qiaopeixin
[flang] Fix AllocaOp/AllocMemOp type conversion

For arrays without a constant interior or arrays of character with
dynamic length arrays, the data types are converted to a pointer to the
element type, so the scale size of the constant extents needs to be
counted. The previous AllocaOp conversion does not consider the arrays
of character with dynamic length arrays, and the previous AllocMemOp
conversion does not consider arrays without a constant interior. This
fixes them and refactors the code so that it can be shared. Also add
the test cases.

Reviewed By: Jean Perier

Differential Revision: https://reviews.llvm.org/D124766
The file was modifiedflang/test/Fir/alloc.fir
The file was modifiedflang/lib/Optimizer/CodeGen/CodeGen.cpp
The file was modifiedflang/test/Fir/convert-to-llvm.fir
Commit 9fe89a1f0fa6d88aa4786580b89e81dc906fcc52 by kadircet
[clangd] Add parsing for IgnoreHeaders config option
The file was modifiedclang-tools-extra/clangd/ConfigYAML.cpp
The file was modifiedclang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp
Commit ffc7f9d542370eb72ad1f4bf79f763ca685bab8b by qiaopeixin
[flang] Support external procedure passed as actual argument with implicit character type

As Fortran 2018 15.5.2.9 point 2, the actual argument and dummy argument
have the same type and type parameters and an external function with
assumed character length may be associated with a dummy argument with
explicit character length. As Fortran 2018 15.5.2.9 point 7, if an
external procedure is used as an actual argument, it can be explicitly
declared to have the EXTERNAL attribute. This supports the external
procedure passed as actual argument with implicit character type, either
explicit character length or assumed character length.

Reviewed By: Jean Perier, klausler

Differential Revision: https://reviews.llvm.org/D124345
The file was addedflang/test/Lower/ext-proc-as-actual-argument-2.f90
The file was modifiedflang/lib/Optimizer/Builder/Character.cpp
The file was addedflang/test/Lower/ext-proc-as-actual-argument-1.f90
The file was modifiedflang/include/flang/Optimizer/Builder/Character.h
Commit 2472b6869a6eeb198a4e982fd7c3ffc89dd4f6f5 by qiaopeixin
[flang] Add one semantic check for masked array assignment

As Fortran 2018 states, in each where-assignment-stmt, the mask-expr and
the variable being defined shall be arrays of the same shape. The
previous check does not consider checking if it is an array.

Reviewed By: klausler

Differential Revision: https://reviews.llvm.org/D125022
The file was modifiedflang/lib/Semantics/assignment.cpp
The file was modifiedflang/test/Semantics/assign04.f90
The file was modifiedflang/test/Semantics/assign01.f90
Commit 499d0b96cb52c828e7fc4d58825b5e8b3f9931c5 by sam.mccall
[clang] createInvocationFromCommandLine -> createInvocation, delete former. NFC

(Followup from 40c13720a4b977d4347bbde53c52a4d0703823c2)

Differential Revision: https://reviews.llvm.org/D125012
The file was modifiedclang/tools/libclang/Indexing.cpp
The file was modifiedclang/unittests/Frontend/ASTUnitTest.cpp
The file was modifiedclang/unittests/Frontend/CompilerInstanceTest.cpp
The file was modifiedclang/tools/diagtool/ShowEnabledWarnings.cpp
The file was modifiedclang/unittests/Serialization/ModuleCacheTest.cpp
The file was modifiedclang/unittests/Tooling/Syntax/TreeTestBase.cpp
The file was modifiedclang/lib/Frontend/ASTUnit.cpp
The file was modifiedclang/lib/Frontend/CreateInvocationFromCommandLine.cpp
The file was modifiedclang/unittests/Tooling/Syntax/TokensTest.cpp
The file was modifiedclang/include/clang/Frontend/Utils.h
The file was modifiedclang/tools/c-index-test/core_main.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
Commit d2405e1da5b6ee8d6568469610071d86414cdc93 by sam.mccall
Fix lifetime of DiagnosticsEngine in diagtool.
The file was modifiedclang/tools/diagtool/ShowEnabledWarnings.cpp
Commit 076dd0a763fd803897b0f806e0e350a27d2c087c by sam.mccall
[clangd] Speed up an unfortunate timer-based test.
The file was modifiedclang-tools-extra/clangd/unittests/TUSchedulerTests.cpp
Commit 4b76ba887c04458367c37eb3458cbd113475c27f by sam.mccall
[clangd] Eliminate direct usage of isAvailable() matcher. NFC

This prepares to replace the implementation of EXPECT_[UN]AVAILABLE with
something more efficient.
The file was modifiedclang-tools-extra/clangd/unittests/tweaks/SwapIfBranchesTests.cpp
The file was modifiedclang-tools-extra/clangd/unittests/tweaks/DumpRecordLayoutTests.cpp
Commit c0bebc12f06c3d96ab5c18cbc0d61b22cdc90d89 by llvm-dev
[DAG] visitREM - merge buildOptimizedSREM into if(). NFCI.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit c0840799e3f7638ffcb535485973655a5ab18632 by llvm-dev
[MC][X86] Add vcmpps disassembler tests for Issue #41491

We were missing coverage for vcmpps imm, vreg, vreg, mreg {mreg} patterns
The file was modifiedllvm/test/MC/Disassembler/X86/avx-512.txt
Commit b3d5bb3b308f9a41022cdd30542991840b826a6b by i
[ELF] Change (NOLOAD) type mismatch to use SHT_NOBITS instead of SHT_PROGBITS

Placing a non-SHT_NOBITS input section in an output section specified with
(NOLOAD) is fishy but used by some projects. D118840 changed the output type to
SHT_PROGBITS, but using the specified type seems to make more sense and improve
GNU ld compatibility: `(NOLOAD)` seems to change the output section type
regardless of input.

I think we should keep the current type mismatch warning as it does indicate an
error-prone usage.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D125074
The file was modifiedlld/test/ELF/linkerscript/custom-section-type.s
The file was modifiedlld/ELF/OutputSections.cpp
The file was modifiedlld/test/ELF/linkerscript/noload.s
Commit 3442ff17a560afdac6cf3bea2ab5b559589c3c15 by Louis Dionne
[libc++][NFC] Slight refactoring of some std::vector tests
The file was modifiedlibcxx/test/std/containers/sequences/vector/vector.cons/assign_iter_iter.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector/vector.cons/construct_size.pass.cpp
Commit 687ccba198301bd5998ea0307de23e9a662506aa by Louis Dionne
[libc++][NFC] Move swap_noexcept test to .compile.pass.cpp
The file was addedlibcxx/test/std/containers/sequences/vector/vector.special/swap_noexcept.compile.pass.cpp
The file was removedlibcxx/test/std/containers/sequences/vector/vector.special/swap_noexcept.pass.cpp
Commit f44552ab387b9087fb815251064782f8fb60e643 by sam.mccall
[Frontend] Fix broken createInvocation test due to bad merge
The file was modifiedclang/unittests/Frontend/UtilsTest.cpp
Commit 6ed81abec2531984e8068de80637bc9f5a041655 by sam.mccall
Fix LLDB test broken by 499d0b96cb52c828e7fc4d58825b5e8b3f9931c5
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
Commit a94589d52f0cc7b64284c4372ab55ec93e4fb1a5 by npopov
[InstCombine] Add icmp of select with implied condition tests (NFC)
The file was modifiedllvm/test/Transforms/InstCombine/icmp-select.ll
Commit 82190f917ac4813e22a334b805e84dba8ed4f47d by npopov
[InstCombine] Fold icmp of select with implied condition

When threading the icmp over the select, check whether the
condition can be folded when taking into account the select
condition.
The file was modifiedllvm/test/Transforms/InstCombine/icmp-select.ll
The file was modifiedllvm/test/Transforms/InstCombine/minmax-fold.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit ec3d22cd3a5fc6dfc8182611737fae9f18d527bf by Louis Dionne
[libc++][NFC] Add release note for constexpr std::string
The file was modifiedlibcxx/docs/ReleaseNotes.rst
Commit edaeab664cbd1dcbd7329efa553931efcfda5e50 by sam.mccall
Revert "[clangd] Speed up an unfortunate timer-based test."

This reverts commit 076dd0a763fd803897b0f806e0e350a27d2c087c.

http://45.33.8.238/macm1/34776/step_9.txt
The file was modifiedclang-tools-extra/clangd/unittests/TUSchedulerTests.cpp
Commit e12905b4d5f95952600515901b82da0a8eefcd73 by jhuber6
[OpenMP] Add basic support for properly handling static libraries

Currently we handle static libraries like any other object in the
linker wrapper. However, this does not preserve the sematnics that
dictate static libraries should be lazily loaded as the symbols are
needed. This allows us to ignore linking in architectures that are not
used by the main application being compiled. This patch adds the basic
support for detecting if a file came from a static library, and only
including it in the link job if it's used by other object files.

This patch only adds the basic support, to be more correct we should
check the symbols and only inclue the library if the link job contains
symbols that are needed. Ideally we could just put this on the linker
itself, but nvlink doesn't seem to support `.a` files.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D125092
The file was modifiedclang/test/Driver/linker-wrapper.c
The file was modifiedclang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Commit 2c27d5b36a55c75a33a2a97198d0f0cd1d3d42bf by d.dudkin
[flang] Fix internal error with DATA-statement style initializers

The code below causes flang to crash with an exception.
After fixing the crash flang with an internal error "no symbol found for 'bar'"
This change fixes all the issues.

  program name
    implicit none
    integer, parameter :: bar = 1
    integer foo(bar) /bar*2/
  end program name

Reviewed By: kiranchandramohan, klausler

Differential Revision: https://reviews.llvm.org/D124914
The file was modifiedflang/lib/Semantics/data-to-inits.cpp
The file was modifiedflang/lib/Semantics/resolve-names.cpp
The file was addedflang/test/Semantics/resolve111.f90
Commit d955010d8dfb371650450c4dc44d8543d2e206f5 by deadalnix
Automatically generate CodeGen/X86/sse-align-*.ll test cases. NFC
The file was modifiedllvm/test/CodeGen/X86/sse-align-7.ll
The file was modifiedllvm/test/CodeGen/X86/sse-align-2.ll
The file was modifiedllvm/test/CodeGen/X86/sse-align-9.ll
The file was modifiedllvm/test/CodeGen/X86/sse-align-1.ll
The file was modifiedllvm/test/CodeGen/X86/sse-align-4.ll
The file was modifiedllvm/test/CodeGen/X86/sse-align-3.ll
The file was modifiedllvm/test/CodeGen/X86/sse-align-10.ll
The file was modifiedllvm/test/CodeGen/X86/sse-align-0.ll
Commit 324d696c154aad42b2580d2f225a677c04fe0ab4 by deadalnix
Automatically generates several X86/sse tests cases. NFC
The file was modifiedllvm/test/CodeGen/X86/sse-commute.ll
The file was modifiedllvm/test/CodeGen/X86/sse-unaligned-mem-feature.ll
The file was modifiedllvm/test/CodeGen/X86/sse-regcall.ll
The file was modifiedllvm/test/CodeGen/X86/sse_reload_fold.ll
Commit 76f90a9d71ee0e6d7ad1f9d67a66d97112328f82 by craig.topper
[SelectionDAG] Clear promoted bits before UREM on shift amount in PromoteIntRes_FunnelShift.

Otherwise we have garbage in the upper bits that can affect the
results of the UREM.

Fixes PR55296.

Differential Revision: https://reviews.llvm.org/D125076
The file was modifiedllvm/test/CodeGen/AMDGPU/fshr.ll
The file was modifiedllvm/test/CodeGen/X86/funnel-shift.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/test/CodeGen/ARM/funnel-shift.ll
The file was modifiedllvm/test/CodeGen/PowerPC/funnel-shift.ll
The file was modifiedllvm/test/CodeGen/AArch64/funnel-shift.ll
The file was modifiedllvm/test/CodeGen/Mips/funnel-shift.ll
Commit dd87aceb514d1c2b9c3e48854100df8b036d718a by n.james93
[clang-tidy][NFC] Add createChecks method that also checks for LangaugeOptions

This method won't add a check if it isn't supported in the Contexts current LanguageOptions.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D124320
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyModule.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidy.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyModule.h
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp
Commit 2ca78d2bdfaf14e0cfd20dfa5ee53c6d12643e07 by craig.topper
[SelectionDAG] Improve asserts in SelectionDAG::getSelect.

The VT passed in must match the type of LHS and RHS.
Previously we only checked that the vectorness matched.
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h
Commit cc2ce81bd859ec5c3b698cf2039e273264bb6abe by msebor
[SimplifyLibcalls] Tests for libcall folding of subobjects [NFC]

Add tests exercising the future enancement of folding library function
calls with arguments involving subobjects such as elements of arrays
or struct members.
The file was addedllvm/test/Transforms/InstCombine/memcmp-3.ll
The file was addedllvm/test/Transforms/InstCombine/strlen-8.ll
The file was addedllvm/test/Transforms/InstCombine/memchr-5.ll
The file was addedllvm/test/Transforms/InstCombine/strcmp-4.ll
The file was addedllvm/test/Transforms/InstCombine/memcmp-4.ll
The file was addedllvm/test/Transforms/InstCombine/sprintf-2.ll
The file was addedllvm/test/Transforms/InstCombine/str-int-3.ll
The file was addedllvm/test/Transforms/InstCombine/strlen-7.ll
The file was addedllvm/test/Transforms/InstCombine/strncmp-4.ll
The file was addedllvm/test/Transforms/InstCombine/strlen-5.ll
The file was addedllvm/test/Transforms/InstCombine/strlen-6.ll
The file was addedllvm/test/Transforms/InstCombine/strcmp-3.ll
The file was addedllvm/test/Transforms/InstCombine/memrchr-5.ll
Commit 9fffca04448d34b62dff1207170bed0c5fd15e09 by Louis Dionne
[libc++][NFC] Fix formatting that was incorrectly changed by D124695
The file was modifiedlibcxx/include/__functional/bind_back.h
The file was modifiedlibcxx/include/__functional/perfect_forward.h
The file was modifiedlibcxx/include/__ranges/iota_view.h
Commit 1d042312f8daae28cbdb257328960c545e851a15 by flo
[InstCombine] Add tests for combining AArch64 neon min/max intrinsics.
The file was addedllvm/test/Transforms/InstCombine/AArch64/neon-min-max-intrinsics.ll
Commit dccc69a38d8d080f975d005d2ab12983e95d4eec by david.green
[AArch64] Add extra reverse costs.

This adds some extra costs for reverse shuffles under AArch64, filling
in the i16/f16/i8 gaps in the cost model.

Differential Revision: https://reviews.llvm.org/D124786
The file was modifiedllvm/test/Analysis/CostModel/AArch64/shuffle-reverse.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/AArch64/getIntrinsicInstrCost-vector-reverse.ll
Commit f486119ce94573793c1569f1542c09fae74a0d1d by preames
[riscv] Add strict asserts for VSETVLI insertion algorithm to help catch bugs

This assertion should hold for any reasonable data flow algorithm, but is known not to in several cases today. I'd like to go ahead and land this off-by-default, so that we can collaborate on fixes and have a common definition of success.

Differential: https://reviews.llvm.org/D125035
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Commit 5b122a7310e8899ae058ba86d28793b7ae903226 by ajcbik
[mlir][sparse] integration test for zero preserving math op

Also fixes omission in lowering math ops that require lib support

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D125104
The file was modifiedmlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tanh.mlir
Commit 891c3cf99e100e8871aff9a0747c887a5d0a8b0f by david.green
[DAGCombine] Make combineShuffleOfBitcast LittleEndian specific

Something is going wrong with the BigEndian PowerPC bot. It is hard to
tell what is wrong from here, but attempt to fix it by disabling the
combineShuffleOfBitcast combine for bigendian.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
The file was modifiedllvm/test/CodeGen/PowerPC/load-and-splat.ll
Commit fffb6e6afdbaba563189c1f715058ed401fbc88d by kazu
[AArch64] Fix sub with carry

13403a70e45b2d22878ba59fc211f8dba3a8deba introduced a bug where we
generate the outgoing carry inverted, which in turn breaks the
lowering of @llvm.usub.sat.i128, returning the normal difference on
saturation and zero otherwise.

Note that AArch64 has peculiar semantics where the subtraction
instructions generate borrow inverted.  The problem is that we mix the
two forms of semantics -- the normal carry and inverted carry -- in
the area of extended precision subtractions.  Specifically, we have
three problems:

- lowerADDSUBCARRY takes the non-inverted incoming carry from a
  subtraction and feeds it to SBCS without inverting it first.

- lowerADDSUBCARRY makes available the outgoing carry from SBCS
  without inverting it.

- foldOverflowCheck folds:

  (SBC{S} l r (CMP (CSET LO carry) 1)) => (SBC{S} l r carry)

  When the incoming carry flag is set, CSET LO results in zero.  CMP
  in turn generates a borrow, *clearing* the carry flag.  Instead, we
  should fold:

  (SBC{S} l r (CMP 0 (CSET LO carry))) => (SBC{S} l r carry)

  When the incoming carry flag is set, CSET LO results in zero.  CMP
  does not generate a borrow, *setting* the carry flag.

IIUC, we should use the normal (that is, non-inverted) semantics for
carry everywhere.

This patch fixes the three problems above.

This patch does not add any new testcases because we have a plenty of
them covering the instruction in question.  In particular,
@u128_saturating_sub is identical to the testcase in the motivating
issue.

Fixes: #55253

Differential Revision: https://reviews.llvm.org/D124976
The file was modifiedllvm/test/CodeGen/AArch64/i128-math.ll
The file was modifiedllvm/test/CodeGen/AArch64/usub_sat_vec.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit c468635b7dfcec302f7688f5dcde91913524e355 by sam.mccall
[clangd] Speed up a slow sleeping testcase.

This testcase runs slowly due to 3.2s of sleeps = 2 + 1 + 0.2s.
After this patch it has 0.55s only.

Reduced by:
- observed that the last test was bogus: we were sleeping until the queue was
   idle, effectively just a second copy of the first test. This avoids 1s sleep.
- when waiting for debounce, sleep only until test passes, not for enough
   time to be safe (in practice was 2x debounce time, now 1x debounce time)
- scaling delays down by a factor of 2 (note: factor of 10 caused bot failures)

Differential Revision: https://reviews.llvm.org/D125103
The file was modifiedclang-tools-extra/clangd/support/Threading.h
The file was modifiedclang-tools-extra/clangd/support/Threading.cpp
The file was modifiedclang-tools-extra/clangd/unittests/TUSchedulerTests.cpp
Commit 270ca878d9ad62cf36d12e3b0433d325090fb924 by michaelrj
[libc] Update windows entrypoint list

The entrypoint list for windows hasn't been updated in a while, this
adds all of the entrypoints that are working for windows now.

Reviewed By: sivachandra, lntue

Differential Revision: https://reviews.llvm.org/D125058
The file was modifiedlibc/config/windows/entrypoints.txt
Commit 3fa5eb4cfc065b686c03f912e4414fd00a54d04e by python3kgae
[HLSL] add -fcgl option flag.

fcgl option will make compilation stop after clang codeGen and output the llvm ir.
It is added to check clang codeGen output for HLSL.

It will be translated into -S -emit-llvm and -disable-llvm-passes.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D124983
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedclang/test/Driver/dxc_fcgl.hlsl
The file was modifiedclang/lib/Driver/ToolChains/HLSL.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit 7e63a0d479dd3ccce20de5cddb0f138b537c08bb by yitzhakm
[clang-tidy] New check for safe usage of `std::optional` and like types.

This check verifies the safety of access to `std::optional` and related
types (including `absl::optional`). It is based on a corresponding Clang
Dataflow Analysis, which does most of the work. This check merely runs it and
converts its findings into diagnostics.

Differential Revision: https://reviews.llvm.org/D121120
The file was addedclang-tools-extra/test/clang-tidy/checkers/Inputs/absl/types/optional.h
The file was modifiedclang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
The file was addedclang-tools-extra/clang-tidy/bugprone/UncheckedOptionalAccessCheck.cpp
The file was addedclang-tools-extra/docs/clang-tidy/checks/bugprone-unchecked-optional-access.rst
The file was modifiedclang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
The file was modifiedclang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
The file was modifiedclang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
The file was addedclang-tools-extra/clang-tidy/bugprone/UncheckedOptionalAccessCheck.h
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
The file was addedclang-tools-extra/test/clang-tidy/checkers/bugprone-unchecked-optional-access.cpp
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
Commit 945fa672c60d265fa0dc13f5a5445768945feb0a by michaelrj
[libc][NFC] add index mode to printf parser

This patch is a followup to the previous patch which implemented the
main printf parsing logic as well as sequential mode. This patch adds
index mode.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D123424
The file was modifiedlibc/test/src/stdio/printf_core/parser_test.cpp
The file was modifiedlibc/src/stdio/printf_core/parser.h
The file was modifiedlibc/src/stdio/printf_core/parser.cpp
The file was modifiedlibc/src/stdio/printf_core/CMakeLists.txt
Commit ec34de1bfe5501fd3017ff867bc2481dc052788d by yitzhakm
[clang-tidy][NFC] Fix doc typo for bugprone-unchecked-optional-access
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/bugprone-unchecked-optional-access.rst
Commit 061f253e13b53904fb907a3da030a7e96b300761 by joker.eph
Apply clang-tidy fixes for llvm-prefer-isa-or-dyn-cast-in-conditionals in OpenMPDialect.cpp (NFC)
The file was modifiedmlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Commit c5ea8d509cf87d6731f658acb1937d845a005f37 by joker.eph
Apply clang-tidy fixes for llvm-else-after-return in Merger.cpp (NFC)
The file was modifiedmlir/lib/Dialect/SparseTensor/Utils/Merger.cpp
Commit 072e0aabbc457b8802dcf7b483e3acebfbde1c33 by joker.eph
Enable the use of ThreadPoolTaskGroup in MLIR threading helper to enable nested parallelism

The LLVM ThreadPool recently got the addition of the concept of
ThreadPoolTaskGroup: this is a way to "partition" the threadpool
into a group of tasks and enable nested parallelism through this
grouping at every level of nesting.
We make use of this feature in MLIR threading abstraction to fix a long
lasting TODO and enable nested parallelism.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D124902
The file was modifiedmlir/include/mlir/IR/Threading.h
Commit 7b04bf9d6f27a9c5f4de2287fcd73edea9213bcb by Louis Dionne
[runtimes] Always configure libc++abi before libc++

That makes it possible to reuse libc++abi targets from the libc++
configuration, which is necessary to allow major CMake simplifications.
As a fly-by fix, we also unify how compiler-rt ordering is handled so
it matches how libc++ and libc++abi are handled (compiler-rt always
ends up first).

Differential Revision: https://reviews.llvm.org/D120719
The file was modifiedruntimes/CMakeLists.txt
Commit 24e9d90e65243fd8674bfc264c1c7d27c3cce67c by github
Added the brief discription about the new CSA checker.
The file was modifiedclang/docs/ReleaseNotes.rst
Commit b39017340806ee68b305d5c8330cbc3e1d398a4d by github
update the doc for the static analyzer checker
The file was modifiedclang/docs/ReleaseNotes.rst
Commit bbd031943a3d1bd72fed362ee3e8456dbb901747 by github
Update ReleaseNotes.rst
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 68609d4641a8289cc0063059b4f2b3bb099f776b by thakis
[gn build] (semi-manually) port 7e63a0d479dd
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
Commit 5930691ee1b6d6d5fb58160ac991747869f38e9f by david.green
Revert "[DAGCombine] Make combineShuffleOfBitcast LittleEndian specific"

This reverts commit 891c3cf99e100e8871aff9a0747c887a5d0a8b0f as it turns
out that the error was not caused by this commit, the error caming
from D124526 instead.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/load-and-splat.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix-vsx-splatimm.ll
Commit dee9b01d83df8a20db7b983d0f3cc6dce65e022f by preames
[riscv] Add some minimal tracing output to InsertVSETVLI

Only available with -debug.  Main purpose is simplifying an upcoming change, and providing tools for debugging problems.
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Commit 99a41005fe780570b06e88facf464e1e3c0e5a6d by preames
[riscv] Add early return to InsertVSETLI fixed point step [nfc]

If the income state hasn't changed, and the step function is fixed by assumption, then the output state can't have changed.

In the current algorithm, this is a very minor win and mostly allows adding tracing output without being horrible verbose.
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Commit c7c3f5854460a85ca7305c8ee15acc08a1d6df30 by preames
[riscv] Use early return to reduce nesting for InsertVSETVLI [nfc]
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Commit 90c2af57afb826579525c6c473f3c918e2c8000c by joker.eph
Apply clang-tidy fixes for llvm-include-order in Merger.cpp (NFC)
The file was modifiedmlir/lib/Dialect/SparseTensor/Utils/Merger.cpp
Commit 298d2fa1c5f103fc28e533345ecb9e2e2f5c0ad7 by joker.eph
Apply clang-tidy fixes for readability-identifier-naming in SparseTensorUtils.cpp (NFC)
The file was modifiedmlir/lib/ExecutionEngine/SparseTensorUtils.cpp
Commit b37d158f71c2b579cd8c8bf355437455563d008d by joker.eph
Apply clang-tidy fixes for bugprone-copy-constructor-init in TestPassManager.cpp (NFC)
The file was modifiedmlir/test/lib/Pass/TestPassManager.cpp
Commit 6a9c1029f84532a7ffcaf8a5c43c4ad24862fba1 by joker.eph
Fix build with shared libs: add missing CMake dep to MLIR sparse pipeline
The file was modifiedmlir/lib/Dialect/SparseTensor/Pipelines/CMakeLists.txt
Commit 7f0e741db97c64b4a566d65b878c2e0fe4dabb38 by phosek
[Driver] Pass --fix-cortex-a53-843419 automatically on Fuchsia

When targeting cortex-a53, set this linker flag rather than relying
on the toolchain users to do it in their build.

Differential Revision: https://reviews.llvm.org/D114023
The file was modifiedclang/test/Driver/fuchsia.c
The file was modifiedclang/lib/Driver/ToolChains/Fuchsia.cpp
Commit 042bd21cf9f42189c37fbaf57c234c3dd82acf1b by thakis
Revert "Automatically generates several X86/sse tests cases. NFC"

This reverts commit 324d696c154aad42b2580d2f225a677c04fe0ab4.
Broke check-llvm on Windows, see e.g.
https://lab.llvm.org/buildbot/#/builders/216/builds/4005 and
comment on https://reviews.llvm.org/rG324d696c154aad42b2580d2f225a677c04fe0ab4
The file was modifiedllvm/test/CodeGen/X86/sse-commute.ll
The file was modifiedllvm/test/CodeGen/X86/sse-regcall.ll
The file was modifiedllvm/test/CodeGen/X86/sse_reload_fold.ll
The file was modifiedllvm/test/CodeGen/X86/sse-unaligned-mem-feature.ll
Commit ef9d39de2f083226a734feb743c5c280ce9d369d by spatel
[InstCombine] add tests for shuffle with fneg operand(s); NFC

issue #45631
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle.ll
Commit b331a7ebc1e02f9939d1a4a1509e7eb6cdda3d38 by spatel
[InstCombine] canonicalize fneg after shuffle

For the unary shuffle pattern, this is opposite to what we try
to do with binops, but it seems better to keep it consistent
with the motivating binary shuffle pattern. On that, it is
clearly better on the usual no-extra uses case.

There is a chance that this will pull an fneg away from some
other binop and cause a regression in codegen, but that should
be invertible in the backend. The transform is birectional:
https://alive2.llvm.org/ce/z/kKaKCU
https://alive2.llvm.org/ce/z/3Desfw

Fixes #45631
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
Commit a8308020ac2fce5ad7d616b2dbdbe7ccae0585a4 by riddleriver
[mlir] Remove special case parsing/printing of `func` operations

This was leftover from when the standard dialect was destroyed, and
when FuncOp moved to the func dialect. Now that these transitions
have settled a bit we can drop these.

Most updates were handled using a simple regex: replace `^( *)func` with `$1func.func`

Differential Revision: https://reviews.llvm.org/D124146
The file was modifiedflang/test/Fir/Todo/len_param_index.fir
The file was modifiedflang/test/Fir/convert-fold.fir
The file was modifiedflang/test/Fir/Todo/unboxproc.fir
The file was modifiedflang/test/Fir/memory-allocation-opt.fir
The file was modifiedmlir/test/Dialect/SparseTensor/conversion_sparse2dense.mlir
The file was modifiedflang/test/Fir/rebox.fir
The file was modifiedflang/test/Fir/alloc.fir
The file was modifiedflang/test/Fir/char-conversion.fir
The file was modifiedflang/test/Fir/boxchar.fir
The file was modifiedflang/test/Fir/invalid-types.fir
The file was modifiedflang/test/Fir/select.fir
The file was modifiedflang/test/Fir/affine-demotion.fir
The file was modifiedmlir/test/IR/invalid.mlir
The file was modifiedmlir/test/IR/test-take-body.mlir
The file was modifiedflang/test/Fir/array-copies-pointers.fir
The file was modifiedflang/test/Fir/Todo/boxproc_host.fir
The file was modifiedflang/test/Fir/addrof.fir
The file was modifiedflang/test/Fir/affine-promotion.fir
The file was modifiedflang/test/Fir/array-value-copy-3.fir
The file was modifiedmlir/test/Transforms/test-legalize-erased-op-with-uses.mlir
The file was modifiedflang/test/Fir/peephole.fir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir
The file was modifiedmlir/test/IR/attribute.mlir
The file was modifiedmlir/test/IR/dynamic.mlir
The file was modifiedflang/test/Fir/Todo/dispatch.fir
The file was modifiedflang/test/Fir/convert-to-llvm-target.fir
The file was modifiedmlir/test/Analysis/test-liveness.mlir
The file was modifiedmlir/test/Dialect/Arithmetic/canonicalize.mlir
The file was modifiedmlir/test/Analysis/test-data-flow.mlir
The file was modifiedmlir/lib/IR/Operation.cpp
The file was modifiedmlir/test/Dialect/SCF/canonicalize.mlir
The file was modifiedflang/test/Fir/array-value-copy-2.fir
The file was modifiedflang/test/Fir/cse.fir
The file was modifiedflang/test/Fir/convert-to-llvm-openmp-and-fir.fir
The file was modifiedflang/test/Fir/external-mangling-emboxproc.fir
The file was modifiedflang/test/Fir/abstract-results.fir
The file was modifiedmlir/test/Dialect/OpenMP/ops.mlir
The file was modifiedflang/test/Fir/Todo/cordinate_of_5.fir
The file was modifiedflang/test/Fir/Todo/select_case_with_character.fir
The file was modifiedflang/test/Fir/Todo/cordinate_of_1.fir
The file was modifiedflang/test/Fir/arrayset.fir
The file was modifiedflang/test/Fir/ignore-missing-type-descriptor.fir
The file was modifiedflang/test/Fir/recursive-type.fir
The file was modifiedflang/test/Fir/convert-to-llvm-invalid.fir
The file was modifiedflang/test/Fir/array-value-copy.fir
The file was modifiedflang/test/Fir/loop02.fir
The file was modifiedflang/test/Fir/target-rewrite-boxchar.fir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/test/Dialect/OpenMP/invalid.mlir
The file was modifiedflang/test/Fir/inline.fir
The file was modifiedflang/test/Fir/Todo/allocmem.fir
The file was modifiedmlir/test/Transforms/test-rewrite-dynamic-op.mlir
The file was modifiedflang/test/Fir/loop01.fir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_tanh.mlir
The file was modifiedmlir/test/python/ir/operation.py
The file was modifiedflang/test/Fir/cg-ops.fir
The file was modifiedmlir/test/IR/attribute-roundtrip.mlir
The file was modifiedflang/test/Fir/widechar.fir
The file was modifiedflang/test/Fir/target-rewrite-triple.fir
The file was modifiedflang/test/Fir/fir-types.fir
The file was modifiedflang/test/Fir/optional.fir
The file was modifiedflang/test/Fir/fir-ops.fir
The file was modifiedmlir/test/Dialect/GPU/ops.mlir
The file was modifiedmlir/test/Dialect/Vector/canonicalize.mlir
The file was modifiedflang/test/Fir/embox.fir
The file was modifiedflang/test/Fir/Todo/cordinate_of_6.fir
The file was modifiedmlir/include/mlir/Dialect/Func/IR/FuncOps.td
The file was modifiedmlir/test/CAPI/ir.c
The file was modifiedflang/test/Fir/external-mangling.fir
The file was modifiedflang/test/Fir/types-to-llvm.fir
The file was modifiedflang/test/Fir/Todo/cordinate_of_4.fir
The file was modifiedflang/test/Fir/basic-program.fir
The file was modifiedflang/test/Fir/invalid.fir
The file was modifiedmlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-analysis.mlir
The file was modifiedmlir/test/Dialect/Linalg/transform-ops.mlir
The file was modifiedflang/test/Fir/boxaddr-folding.fir
The file was modifiedmlir/test/Dialect/Linalg/fusion-elementwise-ops.mlir
The file was modifiedflang/test/Fir/annotate-constant.fir
The file was modifiedflang/test/Fir/Todo/end.fir
The file was modifiedflang/test/Fir/convert-to-llvm.fir
The file was modifiedmlir/test/Dialect/Linalg/bubble-up-extract-slice-op.mlir
The file was modifiedflang/test/Fir/target-rewrite-complex.fir
The file was modifiedflang/test/Fir/array-modify.fir
The file was modifiedmlir/test/Transforms/scf-if-utils.mlir
The file was modifiedflang/test/Fir/rebox-susbtring.fir
The file was modifiedflang/test/Fir/Todo/cordinate_of_3.fir
The file was modifiedflang/test/Fir/memref-data-flow.fir
The file was modifiedmlir/test/IR/print-value-users.mlir
The file was modifiedflang/test/Fir/Todo/gentypedesc.fir
The file was modifiedflang/test/Fir/Todo/cordinate_of_2.fir
The file was modifiedflang/test/Fir/target-rewrite-char-proc.fir
Commit 8477a0d769a0b877f14e3ec3fde576b6a3b173ce by jhuber6
[OpenMP] Allow compiling multiple target architectures with OpenMP

This patch adds support for OpenMP to use the `--offload-arch` and
`--no-offload-arch` options. Traditionally, OpenMP has only supported
compiling for a single architecture via the `-Xopenmp-target` option.
Now we can pass in a bound architecture and use that if given, otherwise
we default to the value of the `-march` option as before.

Note that this only applies the basic support, the OpenMP target runtime
does not yet know how to choose between multiple architectures.
Additionally other parts of the offloading toolchain (e.g. LTO) require
the `-march` option, these should be worked out later.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D124721
The file was modifiedclang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
The file was modifiedclang/test/Driver/amdgpu-openmp-toolchain-new.c
The file was modifiedclang/lib/Driver/ToolChains/Cuda.cpp
The file was modifiedclang/lib/Driver/Driver.cpp
The file was modifiedclang/test/Driver/openmp-offload-gpu-new.c
Commit 509b631f84e97e717a675a6ef60ae4728bb11551 by jhuber6
[OpenMP] Try to Infer target triples using the offloading architecture

Currently we require the `-fopenmp-targets=` option to specify the
triple to use for the offloading toolchains, and the `-Xopenmp-target=`
option to specify architectures to a specific toolchain. The changes
made in D124721 allowed us to use `--offload-arch=` to specify multiple
target architectures. However, this can become combersome with many
different architectures. This patch introduces functinality that
attempts to deduce the target triple and architectures from the
offloading action. Currently we will deduce known GPU architectures when
only `-fopenmp` is specified.

This required a bit of a hack to cache the deduced architectures,
without this we would've just thrown an error when we tried to look up
the architecture again when generating the job. Normally we require the
user to manually specify the toolchain arguments, but here they would
confict unless we overrode them.

Depends on: D124721

Reviewed By: saiislam

Differential Revision: https://reviews.llvm.org/D125050
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td
The file was modifiedclang/lib/Driver/Driver.cpp
The file was modifiedclang/include/clang/Driver/Driver.h
The file was addedclang/test/Driver/openmp-offload-infer.c
Commit 981523b2e4675d4be496a333583b2f728c057d02 by housel
[ORC-RT][ORC] Handle dynamic unwind registration for libunwind

This changes the ELFNix platform Orc runtime to use, when available,
the __unw_add_dynamic_eh_frame_section interface provided by libunwind
for registering .eh_frame sections loaded by JITLink. When libunwind
is not being used for unwinding, the ELFNix platform detects this and
defaults to the __register_frame interface provided by libgcc_s.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D114961
The file was modifiedcompiler-rt/test/orc/lit.cfg.py
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/ELFNixPlatform.h
The file was modifiedcompiler-rt/lib/orc/elfnix_platform.cpp
The file was addedcompiler-rt/test/orc/TestCases/FreeBSD/ehframe-default.cpp
The file was addedcompiler-rt/test/orc/TestCases/Linux/ehframe-default.cpp
The file was addedcompiler-rt/test/orc/TestCases/Linux/ehframe-libunwind.cpp
The file was addedcompiler-rt/test/orc/TestCases/FreeBSD/ehframe-libunwind.cpp
The file was modifiedcompiler-rt/test/orc/lit.site.cfg.py.in
The file was modifiedllvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
Commit 203455c85ad03325ce2d77f067f6ac953f2a32ce by phosek
[CMake][libcxx] Use target_include_directories for libc++ headers

This is the idiomatic way to handle include directories in CMake.

Differential Revision: https://reviews.llvm.org/D122614
The file was modifiedruntimes/CMakeLists.txt
The file was modifiedlibcxx/include/CMakeLists.txt
Commit 1eb97481ef8b7c8923b29d80b8b018015dd3e27c by sam.mccall
Fix check-clang-tools target after 7cc8377f2c572a919ecb

This change was intended to add the tests check-clang and check-clang-pseudo,
but afterwards it was *only* running those tests.
(This was because unlike add_lit_testsuite, add_lit_testsuite*s* does not
get included in umbrella suites).
The file was modifiedclang-tools-extra/test/CMakeLists.txt
Commit 9924d8d66ae103bee09387de3bef226d745807a8 by varconst
[libc++][ranges] Implement `views::take`.

The view itself has been implemented previously -- this patch only adds
the ability to pipe it.

Also implements [P1739](https://wg21.link/p1739) (partially) and [LWG3407](https://wg21.link/lwg3407).

Differential Revision: https://reviews.llvm.org/D123600
The file was modifiedlibcxx/include/span
The file was modifiedlibcxx/test/libcxx/lint/lint_modulemap.sh.py
The file was addedlibcxx/test/std/ranges/range.adaptors/range.take/adaptor.pass.cpp
The file was modifiedlibcxx/include/__ranges/take_view.h
The file was modifiedlibcxx/include/module.modulemap
The file was modifiedlibcxx/include/string_view
The file was modifiedlibcxx/test/std/library/description/conventions/customization.point.object/cpo.compile.pass.cpp
The file was addedlibcxx/include/__fwd/span.h
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/test/libcxx/private_headers.verify.cpp
The file was addedlibcxx/include/__fwd/string_view.h
Commit 679ee517c662d508720c8173b9ee33129f7fa36e by llvmgnsyncbot
[gn build] Port 9924d8d66ae1
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit 26ba347fbb0cf8abcb861aa558711f51455a0ec3 by kazu
[AArch64] Add llvm/test/CodeGen/AArch64/i256-math.ll

This patch adds a test case for i256 additions and subtractions.  I'm
leaving out multiplications for now, which would result in very long
sequences.

Differential Revision: https://reviews.llvm.org/D125125
The file was addedllvm/test/CodeGen/AArch64/i256-math.ll
Commit 0102527352ff50a6d66402ab0fd8d857dcac3c5a by varconst
[libc++][ranges] Implement `views::single`.

This only adds the customization point object (which isn't pipeable),
the view itself has already been implemented previously.

Differential Revision: https://reviews.llvm.org/D124978
The file was modifiedlibcxx/include/__ranges/single_view.h
The file was modifiedlibcxx/test/std/library/description/conventions/customization.point.object/cpo.compile.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.lazy.split/ctor.range.pass.cpp
The file was addedlibcxx/test/std/ranges/range.factories/range.single.view/cpo.pass.cpp
The file was modifiedlibcxx/include/__ranges/lazy_split_view.h
Commit a097c4ce95335f5c38d20f4e260f80c5e002be01 by Louis Dionne
[compiler-rt] Fix issue with compiler-rt tests mixing <atomic> and <stdatomic.h>

Since D97044, libc++ implements <stdatomic.h>, which is not compatible
with the <atomic> header in C++03 mode. To fix the tests, avoid using
<stdatomic.h> at all, since it is not strictly required.

rdar://92867529

Differential Revision: https://reviews.llvm.org/D125118
The file was modifiedcompiler-rt/test/tsan/Darwin/libcxx-shared-ptr-stress.mm
The file was modifiedcompiler-rt/test/tsan/libdispatch/groups-destructor.cpp
Commit 7211d5ce07830ebfa2cfc30818cd7155375f7e47 by flo
Revert "[SimpleLoopUnswitch] Collect either logical ANDs/ORs but not both."

This reverts commit db7a87ed4fa79a7c366438ae62d8a1088a11f29c.

This seems to cause a PPC buildbot failure:
https://lab.llvm.org/buildbot#builders/93/builds/8787
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-invariant-select-bug.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-freeze.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-logical-and-or.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-freeze-individual-conditions.ll
Commit af4cf1c6b8ed0d8102fc5e69acdc2fcbbcdaa9a7 by owenca
[clang-format][NFC] Make all TokenAnnotator member functions const

Differential Revision: https://reviews.llvm.org/D125064
The file was modifiedclang/lib/Format/TokenAnnotator.h
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
Commit d8564dcbcf72d01198637aa7cc5a8791a2c20c2f by fmayer
[HWASan] Allow to linkify symbolizer output.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D124950
The file was addedcompiler-rt/test/hwasan/TestCases/hwasan_symbolize.cpp
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize
Commit 68cd47e0caffcf0adcf3e519652e63b51fa45996 by fmayer
[HWASan] Clean up hwasan_symbolize.

The globals are better expressed as members of the Symbolizer, and all
functions operating on it should be methods instead.

Also using the standard idiom of wrapping the main code in
`if __name__ == '__main__'`.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D125032
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize
Commit f827ee671f5440a7514d071abbfec0556119a34f by ashaposhnikov
[Scalar][NFC] Minor cleanups in CallSiteSplitting.cpp
The file was modifiedllvm/lib/Transforms/Scalar/CallSiteSplitting.cpp
Commit 57636c25904e05c6b94370c82e52a89f5baf80f1 by phosek
[CMake] Include llvm-debuginfod-find in Fuchsia toolchain

Differential Revision: https://reviews.llvm.org/D125082
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
Commit fecad835fb4c6e65eb487fc626355686959605f6 by phosek
[runtime] Build compiler-rt with --unwindlib=none

This applies the change made to libunwind+libcxxabi+libcxx in D113253
to compiler-rt as well.

Differential Revision: https://reviews.llvm.org/D115674
The file was modifiedcompiler-rt/CMakeLists.txt
The file was modifiedcompiler-rt/cmake/config-ix.cmake
Commit d7732695ebcc79d71259872d169be23dc3e6646f by phosek
Revert "[runtime] Build compiler-rt with --unwindlib=none"

This reverts commit fecad835fb4c6e65eb487fc626355686959605f6.
The file was modifiedcompiler-rt/CMakeLists.txt
The file was modifiedcompiler-rt/cmake/config-ix.cmake
Commit 102bc634cb4129d9984a8da8515af945e8a5568b by phosek
[runtime] Build compiler-rt with --unwindlib=none

This applies the change made to libunwind+libcxxabi+libcxx in D113253
to compiler-rt as well.

Differential Revision: https://reviews.llvm.org/D115674
The file was modifiedcompiler-rt/cmake/config-ix.cmake
The file was modifiedcompiler-rt/CMakeLists.txt
Commit 1bffc75383a2285e69deda90cd10860769485234 by eschweitz
Upstream support for POINTER assignment in FORALL.

Reviewed By: vdonaldson, PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D125140
The file was modifiedflang/lib/Lower/ComponentPath.cpp
The file was modifiedflang/include/flang/Optimizer/Builder/FIRBuilder.h
The file was modifiedflang/lib/Optimizer/Builder/BoxValue.cpp
The file was modifiedflang/test/Lower/forall/forall-2.f90
The file was modifiedflang/include/flang/Lower/ComponentPath.h
The file was modifiedflang/include/flang/Optimizer/Builder/BoxValue.h
The file was modifiedflang/lib/Lower/Allocatable.cpp
The file was modifiedflang/include/flang/Runtime/io-api.h
The file was modifiedflang/include/flang/Lower/Allocatable.h
The file was modifiedflang/include/flang/Optimizer/Dialect/FIRType.h
The file was modifiedflang/unittests/Optimizer/Builder/FIRBuilderTest.cpp
The file was modifiedflang/include/flang/Lower/AbstractConverter.h
The file was modifiedflang/include/flang/Lower/Support/Utils.h
The file was modifiedflang/include/flang/Optimizer/Builder/Factory.h
The file was modifiedflang/include/flang/Lower/ConvertExpr.h
The file was addedflang/test/Lower/forall/array-pointer.f90
The file was modifiedflang/lib/Lower/IO.cpp
The file was modifiedflang/lib/Optimizer/Builder/MutableBox.cpp
The file was modifiedflang/lib/Optimizer/Builder/FIRBuilder.cpp
The file was modifiedflang/lib/Optimizer/Dialect/FIRType.cpp
The file was modifiedflang/lib/Lower/Bridge.cpp
The file was modifiedflang/lib/Lower/ConvertExpr.cpp
Commit bf3cba71e17464af57b77e3783244ff116026c4e by phosek
Revert "[runtime] Build compiler-rt with --unwindlib=none"

This reverts commit 102bc634cb4129d9984a8da8515af945e8a5568b because
some tests are failing on sanitizer bots.
The file was modifiedcompiler-rt/cmake/config-ix.cmake
The file was modifiedcompiler-rt/CMakeLists.txt
Commit 1dda6ad80c1256c280a2c0b9d0104422eb2fcdac by housel
[test][ORC-RT] Disable elfnix_platform tests on non-x86_64 platforms

ORC ELFNixPlatform currently only supports x86_64.
The file was removedcompiler-rt/test/orc/TestCases/FreeBSD/ehframe-default.cpp
The file was removedcompiler-rt/test/orc/TestCases/Linux/ehframe-default.cpp
The file was addedcompiler-rt/test/orc/TestCases/FreeBSD/x86-64/ehframe-libunwind.cpp
The file was addedcompiler-rt/test/orc/TestCases/Linux/x86-64/ehframe-default.cpp
The file was removedcompiler-rt/test/orc/TestCases/Linux/ehframe-libunwind.cpp
The file was removedcompiler-rt/test/orc/TestCases/FreeBSD/ehframe-libunwind.cpp
The file was addedcompiler-rt/test/orc/TestCases/Linux/x86-64/ehframe-libunwind.cpp
The file was addedcompiler-rt/test/orc/TestCases/FreeBSD/x86-64/ehframe-default.cpp
Commit ed85de6db44e830b1019815d74aee1b595748b5d by brad
[libcxx] random_device, use arc4random() on Solaris

Reviewed By: ldionne

Differential Revision: https://reviews.llvm.org/D125068
The file was modifiedlibcxx/include/__config
The file was modifiedlibcxx/docs/ReleaseNotes.rst
Commit 67b0b02ec9f2bbc57bf8f0550828d97f460ac11f by brad
[libcxx] Remove static inline and make use of _LIBCPP_HIDE_FROM_ABI in __support headers

After feedback from D122861, do the same thing with some of the other headers. Try to move the
headers so they have a similar style and way of doing things.

Reviewed By: ldionne, daltenty

Differential Revision: https://reviews.llvm.org/D124227
The file was modifiedlibcxx/include/__support/ibm/gettod_zos.h
The file was modifiedlibcxx/include/__support/solaris/xlocale.h
The file was modifiedlibcxx/include/__support/ibm/xlocale.h
The file was modifiedlibcxx/include/__support/musl/xlocale.h
Commit 83e07916ffc55dd85989726f991331c8ad1439d0 by phosek
Revert "[CMake][libcxx] Use target_include_directories for libc++ headers"

This reverts commit 203455c85ad03325ce2d77f067f6ac953f2a32ce since
it breaks the OpenMP builders for AMDGPU.
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedruntimes/CMakeLists.txt
Commit 8eaa1ef0d88c36dbf90e191c8852ea46bf4841c9 by Chenbing.Zheng
[InstCombine] add casts from splat-a-bit pattern if necessary

Splatting a bit of constant-index across a value:
sext (ashr (trunc iN X to iM), M-1) to iN --> ashr (shl X, N-M), N-1
If the dest type is different, use a cast (adjust use check).

https://alive2.llvm.org/ce/z/acAan3

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D124590
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modifiedllvm/test/Transforms/InstCombine/sext.ll
Commit 1fd7929ae544addbecaec695124e42d4ec7e96b9 by Chenbing.Zheng
[InstCombine] precommit some tests for reassociate add
The file was modifiedllvm/test/Transforms/InstCombine/add.ll
Commit 25cd6fba983a606145912e25b0f3d37d1197970c by joker.eph
Fix MLIR integration test after a8308020 (`func.` prefix is required bythe parser now)
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/AMX/test-tilezero-block.mlir
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir
Commit 394c683d4063119086f91bbfbbd514a4ace31683 by Chenbing.Zheng
[InstCombine] sub(add(X,Y),umin(Y,Z)) --> add(X,usub.sat(Y,Z))

Alive2: https://alive2.llvm.org/ce/z/2UNVbp

Reviewed By: RKSimon, spatel

Differential Revision: https://reviews.llvm.org/D124503
The file was modifiedllvm/test/Transforms/InstCombine/sub-minmax.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
Commit 2db46db54d8ae6d3cfc30030768b53637d88e137 by david.green
[SLP] Add tests for awkward laod orders from SLP. NFC
The file was addedllvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
Commit eeb44579f13d2bf7d7c6769746b11d6425ff0990 by llvm-dev
[X86] Add description comments to SandyBridge for COPY/WriteZero/WriteVecMaskedGatherWriteback cases. NFC.

Match other models.

Use X86WriteRes for WriteVecMaskedGatherWriteback like other models as well.
The file was modifiedllvm/lib/Target/X86/X86SchedSandyBridge.td
Commit 0a83ff83af3d8db5512d61e043c246d854502e9e by sam.mccall
[FuzzMutate] Move LLVM module (de)serialization from FuzzerCLI -> IRMutator. NFC

These are not directly related to the CLI, and are mostly (always?) used when
mutating the modules as part of fuzzing.

Motivation: split FuzzerCLI into its own library that does not depend on IR.
Subprojects that don't use IR should be be fuzzed without the dependency.

Differential Revision: https://reviews.llvm.org/D125080
The file was modifiedllvm/include/llvm/FuzzMutate/IRMutator.h
The file was modifiedllvm/lib/FuzzMutate/FuzzerCLI.cpp
The file was modifiedllvm/include/llvm/FuzzMutate/FuzzerCLI.h
The file was modifiedllvm/lib/FuzzMutate/IRMutator.cpp
Commit 1c5e85b3da649c89db87abecc53b42f6eaa574c2 by sam.mccall
[FuzzMutate] Split out FuzzerCLI library that doesn't depend on IR.

All llvm-project fuzzers use this library to parse command-line arguments.
Many of them don't deal with LLVM IR or modules in any way. Bundling those
functions in one library forces build dependencies that don't need to be there.

Among other things, this means check-clang-pseudo no longer depends on most of
LLVM.

Differential Revision: https://reviews.llvm.org/D125081
The file was modifiedllvm/tools/llvm-isel-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-rust-demangle-fuzzer/CMakeLists.txt
The file was modifiedclang-tools-extra/clangd/fuzzer/CMakeLists.txt
The file was modifiedclang-tools-extra/pseudo/fuzzer/CMakeLists.txt
The file was modifiedmlir/tools/mlir-parser-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-special-case-list-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-opt-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-microsoft-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-dlang-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/lib/FuzzMutate/CMakeLists.txt
The file was modifiedclang/tools/clang-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-itanium-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-yaml-numeric-parser-fuzzer/CMakeLists.txt
Commit 702c4ade225be58118d34760d9f67e02a826e426 by paul.walker
[ISD::IndexType] Helper functions for common queries.

Add helper functions to query the signed and scaled properties
of ISD::IndexType along with functions to change them.

Remove setIndexType from MaskedGatherSDNode because it only has
one usage and typically should only be changed alongside its
index operand.

Minimise the direct use of the enum values to lay the groundwork
for more refactoring.

Differential Revision: https://reviews.llvm.org/D123347
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAGNodes.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 8614674b55669025e349324f31eb11505becede1 by aaron
Fix underlining in docs to fix the sphinx build
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/bugprone-unchecked-optional-access.rst
Commit a1bb952e833b34fdf03bd571e7f8c948191be018 by aaron
Revert "[FuzzMutate] Split out FuzzerCLI library that doesn't depend on IR."

This reverts commit 1c5e85b3da649c89db87abecc53b42f6eaa574c2.

It broke a lot of bots with a link error:
https://lab.llvm.org/buildbot/#/builders/171/builds/14222
https://lab.llvm.org/buildbot/#/builders/188/builds/13748
https://lab.llvm.org/buildbot/#/builders/109/builds/38127
The file was modifiedllvm/tools/llvm-yaml-numeric-parser-fuzzer/CMakeLists.txt
The file was modifiedllvm/lib/FuzzMutate/CMakeLists.txt
The file was modifiedllvm/tools/llvm-rust-demangle-fuzzer/CMakeLists.txt
The file was modifiedmlir/tools/mlir-parser-fuzzer/CMakeLists.txt
The file was modifiedclang/tools/clang-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-dlang-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-microsoft-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-itanium-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-isel-fuzzer/CMakeLists.txt
The file was modifiedclang-tools-extra/clangd/fuzzer/CMakeLists.txt
The file was modifiedclang-tools-extra/pseudo/fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-opt-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-special-case-list-fuzzer/CMakeLists.txt
Commit e571e1a6c356ef045a69220cb8a96e6e26a72209 by sam.mccall
Reland "[FuzzMutate] Split out FuzzerCLI library that doesn't depend on IR."

This reverts commit a1bb952e833b34fdf03bd571e7f8c948191be018.

I'd somehow missed updating llvm-yaml-parser-fuzzer, now fixed.
The file was modifiedllvm/tools/llvm-dlang-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-yaml-numeric-parser-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-rust-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-itanium-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-microsoft-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-isel-fuzzer/CMakeLists.txt
The file was modifiedclang/tools/clang-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-special-case-list-fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-yaml-parser-fuzzer/CMakeLists.txt
The file was modifiedllvm/lib/FuzzMutate/CMakeLists.txt
The file was modifiedclang-tools-extra/pseudo/fuzzer/CMakeLists.txt
The file was modifiedllvm/tools/llvm-opt-fuzzer/CMakeLists.txt
The file was modifiedclang-tools-extra/clangd/fuzzer/CMakeLists.txt
The file was modifiedmlir/tools/mlir-parser-fuzzer/CMakeLists.txt
Commit eb28da89a6594a017e067a2a4043c2f2bb2c425e by sepavloff
[InstCombine] Remove side effect of replaced constrained intrinsics

If a constrained intrinsic call was replaced by some value, it was not
removed in some cases. The dangling instruction resulted in useless
instructions executed in runtime. It happened because constrained
intrinsics usually have side effect, it is used to model the interaction
with floating-point environment. In some cases side effect is actually
absent or can be ignored.

This change adds specific treatment of constrained intrinsics so that
their side effect can be removed if it actually absents.

Differential Revision: https://reviews.llvm.org/D118426
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/include/llvm/Analysis/InstructionSimplify.h
The file was addedllvm/test/Transforms/InstCombine/constrained.ll
Commit 6e345426de370479c322962f7aa1dd1cde817adf by llvm-dev
[X86] Remove unused 'hint' argument from prefetch tests

hint is a compile time constant and can't be passed in as a variable - we already hardcode
The file was modifiedclang/test/CodeGen/X86/avx512pf-builtins.c
Commit 8650f05c97624b76fed3230bf0ea26a6106bcc3d by spatel
[InstCombine] fix miscompile when casting int->FP->int

As shown in https://github.com/llvm/llvm-project/issues/55150 -
the existing fold may be wrong when converting to a signed value.
This is a quick fix to avoid the miscompile.

I added tests/comments for all of the signed/unsigned combinations
at either side of the boundary width, and tried to confirm with Alive2:
https://alive2.llvm.org/ce/z/3p9DSu

There are already some TODO items in the test file that suggest
possible refinements, so the regression with ui->FP->si is probably ok.
It seems unlikely that we'd see these kind of edge cases with
non-byte-width integer types in real code. The potential miscompile
went undetected for several years.

This and 747c6a0c734e fixes #55150.

Differential Revision: https://reviews.llvm.org/D124692
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
The file was modifiedllvm/test/Transforms/InstCombine/sitofp.ll
Commit f4183441d45d48edd84a46bafa4deb6c45abc773 by deadalnix
Automatically generate aix32-cc-abi-vaarg.ll . NFC
The file was modifiedllvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
Commit 2cd080c884a3dd1fc673f02afd48bfe9ba01ce89 by llvm-dev
[X86] rdrand-builtins.c - add 32-bit target coverage and enable -Wall/-Werror
The file was modifiedclang/test/CodeGen/X86/rdrand-builtins.c
Commit 802e15c576997f76bffb4c08b6f81d6c79c320e0 by david.green
[SLP] Cluster ordering for loads

Given a load without a better order, this patch partially sorts the
elements to form clusters of adjacent elements in memory. These clusters
can potentially be loaded in fewer loads, meaning less overall shuffling
(for example loading v4i8 clusters of a v16i8 as a single f32 loads, as
opposed to multiple independent bytes loads and inserts).

Differential Revision: https://reviews.llvm.org/D122145
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
Commit 4750be4907bc22c1b7575fa53c3568628d6cbbe4 by llvm-dev
[X86] Add 32-bit target test coverage to clean header tests
The file was modifiedclang/test/Headers/x86-intrinsics-headers-clean.cpp
Commit c2c259224bb30b089206dd69dc44aefddffec2f4 by deadalnix
const char* for LLVMTargetMachineEmitToFile's argument

The `LLVMTargetMachineEmitToFile` takes a `char* Filename` right now, but it doesn't modify it.
This is annoying to use in the case where you want to pass a const string, because you either have to remove the const, or copy it somewhere else and pass that. Either way, it's not very nice.

I added a const and clang formatted it. This shouldn't break any ABI in my opinion.
I'm sorry but I didn't know whom to put as reviewer for this, so I chose someone with a lot of commits from the .cpp file.

Reviewed By: deadalnix

Differential Revision: https://reviews.llvm.org/D124453
The file was modifiedllvm/include/llvm-c/TargetMachine.h
The file was modifiedllvm/lib/Target/TargetMachineC.cpp
Commit d44ffd631cd04dfed3bced8c34e7aadf59e471dc by sam.mccall
[Bitstream] Only consider flushing to file on block boundaries

The goal of flushing to disk is to keep a reasonable bound on peak memory usage.
With a a default threshold of 512MB (and most BitstreamWriters having no backing
file at all), checking after every byte whether to flush seems excessive.

This change makes clangd's unittests run 5% faster (in opt), so it's not
actually free even in the case with no backing file. Likely there are more
important workloads where it makes some difference.

Differential Revision: https://reviews.llvm.org/D125145
The file was modifiedllvm/include/llvm/Bitstream/BitstreamWriter.h
Commit e7806c08dc1b1c80104029b7a28f748f7123593f by llvm-dev
[Headers][X86] amxintrin.h - fixed unknown parameter Wdocumentation warning. NFC

Noticed while triaging Issue #35297
The file was modifiedclang/lib/Headers/amxintrin.h
Commit b432f80e48a005b47cee7bb86bc9ec9cc861b705 by llvm-dev
[ARM] Update ror.ll test to canonicalized IR

As discussed on D124839, we're almost certainly only ever going to see this from IR directly - which now will create funnel shift intrinsics directly

I've also added a couple of rotl(rotr()) tests to check left/right rotation merging.
The file was modifiedllvm/test/CodeGen/ARM/ror.ll
Commit 06fad8bc05dcd0ecaf7d95f133a6344283d4f5ee by deadalnix
[DAGCombine] Add node in the worklist in topological order in CombineTo

This is part of an ongoing effort toward making DAGCombine process the nodes in topological order.

This is able to discover a couple of new optimizations, but also causes a couple of regression. I nevertheless chose to submit this patch for review as to start the discussion with people working on the backend so we can find a good way forward.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D124743
The file was modifiedllvm/test/CodeGen/AArch64/swifterror.ll
The file was modifiedllvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
The file was modifiedllvm/test/CodeGen/X86/movmsk-cmp.ll
The file was modifiedllvm/test/CodeGen/ARM/and-load-combine.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-abi-varargs.ll
The file was modifiedllvm/test/CodeGen/AArch64/pr51476.ll
The file was modifiedllvm/test/CodeGen/X86/vector-mulfix-legalize.ll
The file was modifiedllvm/test/CodeGen/X86/xor-with-overflow.ll
The file was modifiedllvm/test/CodeGen/ARM/swifterror.ll
The file was modifiedllvm/test/CodeGen/X86/and-with-overflow.ll
The file was modifiedllvm/test/CodeGen/X86/or-with-overflow.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/pr51175.ll
Commit 00bfaba997e944be7edb52fb3933a19178ec239d by craig.topper
[LegalizeTypes] Don't assume fshl/fshr shift amount type matches the other operands.

Like other shifts, the type isn't required to match. We shouldn't
assume we can call ZExtPromotedInteger.

I tested the PromoteIntOp_FunnelShift locally by removing the promotion
of the shift amount from PromoteIntRes_FunnelShift. But with the final
version of this patch it is never executed on any tests.

Differential Revision: https://reviews.llvm.org/D125106
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Commit b81bf7bb2ff301ba204e542c282e7d4ed2414dae by craig.topper
[LegalizeTypes] Make use of SelectionDAG::getShiftAmountConstant. NFC

Instead of calling getShiftAmountTy and getConstant separately.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
Commit 7e3ef7dcd2b8201dce671237857f04a1d527d580 by llvm-dev
[AMDGPU] lowerEXTRACT_VECTOR_ELT - fold from a SCALAR_TO_VECTOR source

As suggested by @foad on D124839

If we're extracting a vector element that originally came from a scalar_to_vector, then avoid the bitcasting of a vector type and perform the shift masking on the (any-extended) scalar source directly, making use of the fact that the upper elements of a scalar_to_vector are all undef.

Differential Revision: https://reviews.llvm.org/D125173
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/load-lo16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
Commit 830c18047bf8ce6d4d85345567847d344f97e975 by david.green
[AArch64] Add missing NVCAST patterns.

There were apparently some missing NVCAST patterns. This fills them in
using foreach, as opposed to having the specify them individually.

Fixes #55321
The file was modifiedllvm/test/CodeGen/AArch64/arm64-nvcast.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
Commit a385645b470e2d3a1534aae618ea56b31177639f by llvm-dev
[RISCV] Regenerate rv32zbp-zbkb.ll

Noticed in D124839
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbp-zbkb.ll
Commit e38f014c40e94205925403fa75e48244ee31b6c0 by andrew.litteken
[IROutliner] Accomodate blocks containing PHINodes with one entry outside the region and others inside the region.

When a PHINode has an incoming block from outside the region, it must be handled specially when assigning a global value number to each incoming value. A PHINode has multiple predecessors, and we must handle this case rather than only the single predecessor case.

Reviewer: paquette

Differential Revision: https://reviews.llvm.org/D124777
The file was addedllvm/test/Transforms/IROutliner/one-external-incoming-block-phi-node.ll
The file was addedllvm/test/Transforms/IROutliner/no-external-block-entries.ll
The file was modifiedllvm/lib/Transforms/IPO/IROutliner.cpp
Commit bead7a2ed5ba3d91a5d7d6f1eb6925e98c9a5ca6 by deadalnix
Regenerate avx512-regcall-NoMask.ll . NFC
The file was modifiedllvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
Commit 5cd690ad9c6af143502f52b003b3608f693d2938 by deadalnix
Generate sse-intel-ocl.ll automatically. NFC
The file was modifiedllvm/test/CodeGen/X86/sse-intel-ocl.ll
Commit 6bbf51f3ed59ae37f0fec729f25af002111c9e74 by sam.mccall
[Frontend] Move, don't copy the predefines buffer into PP. NFC.

It's not trivially small, >10kb.
The file was modifiedclang/lib/Frontend/InitPreprocessor.cpp
The file was modifiedclang/include/clang/Lex/Preprocessor.h
Commit 6dedbcd5e96ff36ea7d38534068a2d3e4746a929 by stellaraccident
Make BinaryStreamWriter::padToAlignment write blocks vs bytes.

While I think this is a performance improvement over the original, this actually fixes a correctness issue: For an appendable underlying stream, padToAlignment would fail if the additional padding would have caused the stream to grow since it was doing its own check on bounds. By deferring to the regular writeArray method this takes the same path as everything else, which does the correct bounds check in WritableBinaryStreamRef::checkOffsetForWrite (i.e. skips the extension check if BSF_Append is set). I had started to fix the existing bounds check in BinaryStreamWriter but deferred to this because it layered better and is more efficient/consistent.

It didn't look like this method was tested at all, so I added a unit test.

Differential Revision: https://reviews.llvm.org/D124746
The file was modifiedllvm/lib/Support/BinaryStreamWriter.cpp
The file was modifiedllvm/unittests/Support/BinaryStreamTest.cpp
Commit 009d56da5c4ea3666c4753ce7564c8c20d7e0255 by Vitaly Buka
[test][msa] Add more sse,avx intrinsics tests
The file was addedllvm/test/Instrumentation/MemorySanitizer/sse2-intrinsics-x86.ll
The file was addedllvm/test/Instrumentation/MemorySanitizer/avx-intrinsics-x86.ll
The file was addedllvm/test/Instrumentation/MemorySanitizer/avx2-intrinsics-x86.ll
The file was addedllvm/test/Instrumentation/MemorySanitizer/sse41-intrinsics-x86.ll
The file was addedllvm/test/Instrumentation/MemorySanitizer/sse-intrinsics-x86.ll
Commit 08ac66124874d70dab63c731da0244f9e29ef168 by Vitaly Buka
[test][msan] Relax order of param shadow

Looks like different bots have them in a different order.
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/avx2-intrinsics-x86.ll
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/sse41-intrinsics-x86.ll
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/sse-intrinsics-x86.ll
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/sse2-intrinsics-x86.ll
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/avx-intrinsics-x86.ll
Commit f2b16488129ef408e89c900f61dc53b1a6699c45 by llvm-dev
[X86] Fix some signedness errors in x86 headers

Another step toward enabling full -Wsystem-headers testing across all x86 headers

Fix a number of cases where the arg / return value signedness doesn't match the C/C++ intrinsic.

So far I've just added explicit casts as necessary, but we might want to address some of the mismatches directly

Differential Revision: https://reviews.llvm.org/D125164
The file was modifiedclang/lib/Headers/bmiintrin.h
The file was modifiedclang/lib/Headers/avx512fintrin.h
The file was modifiedclang/lib/Headers/avx512vlbwintrin.h
The file was modifiedclang/lib/Headers/ia32intrin.h
The file was modifiedclang/lib/Headers/avx512bwintrin.h
The file was modifiedclang/lib/Headers/avx512vlintrin.h
The file was modifiedclang/lib/Headers/immintrin.h
The file was modifiedclang/test/Headers/x86-intrinsics-headers-clean.cpp
The file was modifiedclang/lib/Headers/rtmintrin.h
The file was modifiedclang/lib/Headers/avx512vlbf16intrin.h
The file was modifiedclang/lib/Headers/cetintrin.h
The file was modifiedclang/lib/Headers/rdseedintrin.h
Commit 6f9e1ea0efb93388c9301e672b7a73e8216ffa44 by david.green
[VectorCombine] Attempt to fold select shuffles from reductions

Given a commutative reduction leading from a shuffle, the order of the
lanes on the shuffle are not important for the result. This means we can
reorder the shuffle to something simpler, which we try shuffling the
first vector lanes first. This was D123494.

The new shuffle may not be profitable though, and if it is not we can
try the folding of select shuffles from D123911. This, with some
adjustment as the output lane ordering is now unimportant, can allow the
final shuffle to simplify given the inputs to the patterns from D123911.
Where as each transformation on their own are not profitable, the
combination is.

We can only support a single shuffle when called from reductions, but we
are able to sort the ReconstructMask, potentially allowing it to
simplify to an identity or concat mask.

Differential Revision: https://reviews.llvm.org/D125086
The file was modifiedllvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VectorCombine.cpp
Commit 6b3a111a2867ce075e70ff1fa1eac2a9e1a4156a by llvm-dev
[Headers][X86] Replace \operation with \code{.operation}

\operation ... \endoperation are not valid doxygen commands and cause issues when -Wdocumentation is enabled (Issue #35297)

This patch proposes to replace them with \code{.operation} ... \endcode blocks so that the pseudo-code is correctly retained in any documentation and downstream can use the ".operation" type for its own formatting.

Differential Revision: https://reviews.llvm.org/D125170
The file was modifiedclang/lib/Headers/keylockerintrin.h
The file was modifiedclang/lib/Headers/uintrintrin.h
The file was modifiedclang/lib/Headers/avx512fintrin.h
The file was modifiedclang/lib/Headers/avxvnniintrin.h
The file was modifiedclang/lib/Headers/hresetintrin.h
The file was modifiedclang/lib/Headers/avx512vlvnniintrin.h
Commit 72eb630207b812dced21fb820c6d65ecc2978c0a by llvm-dev
[Headers][X86] Enable basic Wdocumentation testing on X86 headers

First part of Issue #35297 - we want to enable Wdocumentation-pedantic as well, but need '\n' support first which Issue #55319 is addressing
The file was modifiedclang/test/Headers/x86-intrinsics-headers-clean.cpp
Commit 993d9462e131c79cbc45e306dfb8e406864ebb4c by llvm-dev
[InstCombine] Add test coverage for PR43261 / Issue #42606
The file was modifiedllvm/test/Transforms/InstCombine/zext-or-icmp.ll
Commit 96d2d2508e4d71062eb3cf72ece556d3ec1371cc by llvm-dev
[SLP][X86] Add test coverage for PR47491 / Issue #46835

D124284 should help us vectorize the sub-128-bit vector cases
The file was addedllvm/test/Transforms/SLPVectorizer/X86/arith-mul-load.ll
The file was addedllvm/test/Transforms/SLPVectorizer/X86/arith-add-load.ll
Commit 2233a6150015950a620ada32041814c92f429bf3 by llvm-dev
[SLP][X86] Add test coverage for PR49934 / Issue #49278

D124284 should help us vectorize the sub-128-bit vector cases
The file was addedllvm/test/Transforms/SLPVectorizer/X86/arith-and-const-load.ll
Commit 7d945970488e2474f18fd78fbc9598962703692d by llvm-dev
[SLP][X86] Add test coverage for PR41892 / Issue #41237
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/odd_store.ll
Commit 751005a2ca821bc01411307d1a19f43e38b74858 by llvm-dev
[SLP][X86] Add test coverage for PR42652 / Issue #41997
The file was addedllvm/test/Transforms/SLPVectorizer/X86/bool-mask.ll
Commit d5d498f9baae218c56dc3a3582ef0083f795f088 by yuanke.luo
[X86][AMX] Simplify AMX test case.

Extract test for zero tile configure into a small test case.
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll
The file was addedllvm/test/CodeGen/X86/AMX/amx-zero-config.ll
Commit 5a6792a146a388ef0147f03043eccfd898816504 by llvm-dev
[X86] combine-add.ll - add test case for PR52039 / Issue #51381

Also split AVX1/AVX2 test coverage
The file was modifiedllvm/test/CodeGen/X86/combine-add.ll
Commit 800d36cf32367a633bc24f668189365d63894f8c by llvm-dev
[DAG] Only perform the fold (A-B)+(C-D) --> (A+C)-(B+D) when both inner subs have one use

Fixes #51381
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-add.ll
Commit 6824cf1ab7f16ba68270a5f23007c060e42ea6dc by llvm-dev
[X86] Set some more plausible latencies for horizontal add/subs on znver1

These are all microcoded/multi-pipe nightmares on Ryzen, but we shouldn't just be using the WriteMicrocoded class which is for REALLY bad microcoded nightmares - instead use the same approximate latencies as znver2 (Agner and uops.info both suggest similar values) - and make sure we use the FPU defs for both

Fixes #53242
The file was modifiedllvm/lib/Target/X86/X86ScheduleZnver1.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-avx1.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-avx2.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver1/resources-avx2.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver1/resources-sse3.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver1/resources-avx1.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-sse3.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleZnver2.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver1/resources-ssse3.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-ssse3.s
Commit 4d1fd705f0b0fe7e75e7dddc979778fbe3c8e102 by groverkss
[docs] Add Office Hours for Tobias Grosser
The file was modifiedllvm/docs/GettingInvolved.rst
Commit 7e3aa70668aeb28e0d76c0d2807300eab337e0a7 by llvm-dev
[X86] Add test coverage for PR26515 / Issue #26889
The file was modifiedllvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
Commit 13f358376a597077e93e11653b51648d4976b181 by lntue.h
[libc] Add LINK_LIBRARIES option to add_fp_unittest and add_libc_unittest.

This is needed to prepare for adding FLAGS option.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D125055
The file was modifiedlibc/test/src/stdio/printf_core/CMakeLists.txt
The file was modifiedlibc/test/src/stdio/CMakeLists.txt
The file was modifiedlibc/test/src/string/CMakeLists.txt
The file was modifiedlibc/test/src/CMakeLists.txt
The file was modifiedlibc/cmake/modules/LLVMLibCTestRules.cmake
The file was modifiedlibc/test/src/__support/File/CMakeLists.txt
The file was modifiedlibc/test/src/math/exhaustive/CMakeLists.txt
Commit 6d92f4022dcf8b9a6d1479e612db56341090c9a4 by lntue
[libc][Obvious] Fix cmake usage of list PREPEND (unavailable pre-3.15).
The file was modifiedlibc/cmake/modules/LLVMLibCTestRules.cmake
Commit 9a12138b5fd8c807c3b95144236c07dfc323974f by llvm-dev
[SLP][X86] Add test coverage for PR50392 / Issue #49736
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/hadd-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/hadd.ll
Commit 3abb68a626160e019c30a4860e569d7bc75e486a by ayermolo
[BOLT][DWARF] Fix assert for split dwarf.

Fixing a small bug where it would assert if CU does not modify .debug_addr section.

Differential Revision: https://reviews.llvm.org/D125181
The file was addedbolt/test/X86/Inputs/dwarf4-split-dwarf-no-address-main.s
The file was addedbolt/test/X86/dwarf4-split-dwarf-no-address.test
The file was modifiedbolt/lib/Rewrite/DWARFRewriter.cpp
The file was addedbolt/test/X86/Inputs/dwarf4-split-dwarf-no-address-helper.s
The file was modifiedbolt/lib/Core/DebugData.cpp
Commit 36d4f42c36ea9c64e2d29f6d5bc3ac0384d7eb92 by liuxiaodong
[lld] Fix typo for processAux; NFC

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D125163
The file was modifiedlld/ELF/Relocations.cpp
Commit c207e36025f7a7889f1f26cf8a1b797656060e78 by qiaopeixin
[flang] Enforce a program not including more than one main program

As Fortran 2018 5.2.2 states, a program shall consist of exactly one
main program. Add this semantic check.

Reviewed By: klausler

Differential Revision: https://reviews.llvm.org/D125186
The file was addedflang/test/Semantics/multi-programs01.f90
The file was modifiedflang/test/Semantics/resolve102.f90
The file was modifiedflang/test/Semantics/case01.f90
The file was addedflang/test/Semantics/multi-programs02.f90
The file was addedflang/test/Semantics/multi-programs06.f90
The file was modifiedflang/lib/Semantics/check-declarations.cpp
The file was addedflang/test/Semantics/multi-programs05.f90
The file was modifiedflang/lib/Semantics/resolve-names.cpp
The file was modifiedflang/test/Semantics/call02.f90
The file was modifiedflang/test/Semantics/symbol16.f90
The file was modifiedflang/test/Semantics/resolve61.f90
The file was addedflang/test/Semantics/multi-programs03.f90
The file was modifiedflang/test/Semantics/resolve49.f90
The file was modifiedflang/test/Semantics/omp-do11.f90
The file was modifiedflang/test/Semantics/modfile41.f90
The file was modifiedflang/test/Semantics/omp-do04.f90
The file was addedflang/test/Semantics/multi-programs04.f90
The file was modifiedflang/test/Semantics/resolve14.f90
Commit 9879807393d3f502d3cac468c5f6451db872aa5f by cbate
[mlir][NvGpu] Fix nvgpu.mma.sync lowering to NVVM for f32, tf32 types

Adds missing logic in the lowering from NvGPU to NVVM to support fp32
(in an accumulator operand) and tf32 (in multiplicand operand) types.
Fixes logic in one of the helper functions for converting the result
of a mma.sync operation with multiple 8x256bit output tiles, which is
the case for f32 outputs.

Differential Revision: https://reviews.llvm.org/D124533
The file was modifiedmlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
The file was modifiedmlir/test/Conversion/NVGPUToNVVM/mma-sync-to-nvvm.mlir
Commit a4190037fac06c2b0cc71b8bb90de9e6b570ebb5 by hoy
[CSSPGO][Preinliner] Use linear threshold to drive inline decision.

The per-callsite size threshold used today to drive preinline decision is based on hotness/coldness cutoff. The default setup is for callsites with a sample count above the hotness cutoff (99%), a 1500 size threshold is used. Any callsite below 99.99% coldness cutoff uses a zero threshold. This has a couple issues:

1. While both cutoffs and size thoresholds are configurable, different applications may need different setups, making a universal setup impractical.

2. The callsites between hotness cutoff and coldness cutoff are not considered as inline candidates, which could be a missing opportunity.

3. Hot callsites always use the same threshold. In reality we may want a bigger threshold for hotter callsites.

In this change we are introducing a linear threshold regardless of hot/cold cutoffs. Given a sample space, a threshold is computed for a callsite based on the position of that callsite sample in the whole space. With that we no longer need to define what's hot or cold. Callsites with different hotness will get a different threshold. This should overcome the above three issues.

I have seen good results with a universal default setup for two of our internal services.

For one service, 0.2% to 0.5% perf improvement over a baseline with a previous default setup, on-par code size.
For the second service, 0.5% to 0.8% perf improvement over a baseline with a previous default setup, 0.2% code size increase; on-par performance and code size with a baseline that is with a carefully tuned cutoff to cover enough hot functions.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D125023
The file was modifiedllvm/tools/llvm-profgen/CSPreInliner.h
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.cpp
The file was modifiedllvm/tools/llvm-profgen/CSPreInliner.cpp
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.h
Commit ed0341788af290f4028c0e200f4a8854bfe46e7d by jperier
[flang] retain binding label of entry subprograms

When processing an entry-stmt in name resolution, attrs_ was
reset before SetBindNameOn was called, causing the symbol to lose
the binding label information.

Differential Revision: https://reviews.llvm.org/D125097
The file was modifiedflang/test/Lower/program-units-fir-mangling.f90
The file was modifiedflang/lib/Semantics/resolve-names.cpp
Commit 7f6489d0e3cc4e3c9a4180ff4fc568da7175d9d5 by abinavpp
[AMDGPU] Regenerate checks in a mir test
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmax.ll
Commit d2c4ac979b2acf2f9675fa7ab78f827afeed95bc by ben.shi
[AVR] Add PrintMethod for operand memspi

Reviewed By: Patryk27

Differential Revision: https://reviews.llvm.org/D124913
The file was modifiedllvm/lib/Target/AVR/AVRInstrInfo.td
The file was modifiedllvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.h
Commit 02f8519502447de6ef69a85fa8de5732dd59d853 by david.green
[DAG] Prevent infinite loop combining bitcast shuffle

This prevents an infinite loop from D123801, where code trying to reduce
the total number of bitcasts, but also handling constants, could create
the opposite transform. Prevent the transform in these case to let the
bitcast of a constant transform naturally.

Fixes #55345
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was addedllvm/test/CodeGen/X86/shuffle-combine-crash-4.ll
The file was modifiedllvm/test/CodeGen/ARM/vector-DAGCombine.ll
Commit 50cd52d9357224cce66a9e00c9a0417c658a5655 by marek.kurdej+llvm.org
[clang-format] Fix WhitespaceSensitiveMacros not being honoured when macro closing parenthesis is followed by a newline.

Fixes https://github.com/llvm/llvm-project/issues/54522.

This fixes regression introduced in https://github.com/llvm/llvm-project/commit/5e5efd8a91f2e340e79a73bedbc6ab66ad4a4281.

Before the culprit commit, macros in WhitespaceSensitiveMacros were correctly formatted even if their closing parenthesis weren't followed by semicolon (or, to be precise, when they were followed by a newline).
That commit changed the type of the macro token type from TT_UntouchableMacroFunc to TT_FunctionLikeOrFreestandingMacro.

Correct formatting (with `WhitespaceSensitiveMacros = ['FOO']`):
```
FOO(1+2)
FOO(1+2);
```

Regressed formatting:
```
FOO(1 + 2)
FOO(1+2);
```

Reviewed By: HazardyKnusperkeks, owenpan, ksyx

Differential Revision: https://reviews.llvm.org/D123676
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/lib/Format/UnwrappedLineParser.cpp
The file was modifiedclang/lib/Format/FormatTokenLexer.cpp
Commit 61bb2e4ea82fc5499a271d70d4537383d1942208 by flo
[ConstraintElimination] Add initial ssub.with.overflow tests.
The file was addedllvm/test/Transforms/ConstraintElimination/ssub-with-overflow.ll
Commit fa593b079b76f1c30d684cfe42a662fed157e2e5 by pavel
Revert "[lldb] parallelize calling of Module::PreloadSymbols()"

This reverts commit b7d807dbcff0d9df466e0312b4fef57178d207be -- it
breaks TestMultipleDebuggers.py.
The file was modifiedlldb/source/Target/Target.cpp
Commit 7dcd0ea683ed3175bc3ec6aed24901a9d504182e by david.green
[AArch64] Generate AND in place of CSEL for predicated CTTZ

This patch implements a for a target specific optimization that replaces
the cmp and csel from cttz with an and mask.

Differential Revision: https://reviews.llvm.org/D123782
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/fold-csel-cttz-and.ll
Commit 91b24b018062c8650abfbd10f7da80a0c92266a7 by philipp.tomsich
[AArch64] Ampere1 does not support MTE

The initial support for the Ampere1 mistakenly signalled support for
the MTE feature.  However, the core does not include the optional MTE
functionality.

Update the target parser to not include MTE for Ampere1.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D125191
The file was modifiedllvm/include/llvm/Support/AArch64TargetParser.def
The file was modifiedllvm/unittests/Support/TargetParserTest.cpp
Commit 85ec8a9ac141a1807d907b7514546f531007d87d by marek.kurdej+llvm.org
[clang-format] Correctly handle SpaceBeforeParens for builtins.

That's a partial fix for https://github.com/llvm/llvm-project/issues/55292.

Before, known builtins behaved differently from other identifiers:
```
void f () { return F (__builtin_LINE() + __builtin_FOO ()); }
```
After:
```
void f () { return F (__builtin_LINE () + __builtin_FOO ()); }
```

Reviewed By: owenpan

Differential Revision: https://reviews.llvm.org/D125085
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
Commit 61f9ec5e61a9306ccaca24d562cdc1584c19909b by martin
[libcxx] [test] Fix the nasty_macros test on Windows on ARM/ARM64

This isn't a configuration that we unfortunately can add to
the CI practically at the moment, but I do run the tests
sporadically offline in this configuration.

Differential Revision: https://reviews.llvm.org/D124993
The file was modifiedlibcxx/test/libcxx/nasty_macros.compile.pass.cpp
Commit ae7fe65cf65dd4f71e117dee868965c152d27542 by pavel
[lldb/DWARF] Fix linking direction in CopyUniqueClassMethodTypes

IIUC, the purpose of CopyUniqueClassMethodTypes is to link together
class definitions in two compile units so that we only have a single
definition of a class. It does this by adding entries to the die_to_type
and die_to_decl_ctx maps.

However, the direction of the linking seems to be reversed. It is taking
entries from the class that has not yet been parsed, and copying them to
the class which has been parsed already -- i.e., it is a very
complicated no-op.

Changing the linking order allows us to revert the changes in D13224
(while keeping the associated test case passing), and is sufficient to
fix PR54761, which was caused by an undesired interaction with that
patch.

Differential Revision: https://reviews.llvm.org/D124370
The file was addedlldb/test/API/lang/cpp/incomplete-types/members/TestCppIncompleteTypeMembers.py
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
The file was addedlldb/test/API/lang/cpp/incomplete-types/members/a.h
The file was addedlldb/test/API/lang/cpp/incomplete-types/members/g.cpp
The file was addedlldb/test/API/lang/cpp/incomplete-types/members/Makefile
The file was addedlldb/test/API/lang/cpp/incomplete-types/members/f.cpp
The file was addedlldb/test/API/lang/cpp/incomplete-types/members/main.cpp
Commit a48adc565864e0ce10becf301de5455308bd7d6c by benny.kra
[mlir][math] Promote (b)f16 to f32 when lowering to libm calls

libm doesn't have overloads for the small types, so promote them to a
bigger type and use the f32 function.

Differential Revision: https://reviews.llvm.org/D125093
The file was modifiedmlir/test/Conversion/MathToLibm/convert-to-libm.mlir
The file was modifiedmlir/lib/Conversion/MathToLibm/MathToLibm.cpp
Commit fef81131d92ef71f43640667b6fc88b241aebe50 by peter.waller
[SVE] Optimize new cases for lowerConvertToSVBool

Converts to SVBool are already considered as a nop, if they
are converting an operand from a ptrue or a cmp, because
they zero the extra predicate lanes by construction.

This patch adds 2 similar cases:
- The wide cmp, which were not directly recognized by the test
for other forms of cmp
- Splats of 1, which will be generated as ptrue, and as such
will also zero the extra predicate lines.

Reviewed By: paulwalker-arm, peterwaller-arm

Differential Revision: https://reviews.llvm.org/D124908
The file was modifiedllvm/test/CodeGen/AArch64/sve-ptest-removal-cmplo.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-ptest-removal-cmpne.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-vector-splat.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-ptest-removal-cmphi.ll
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret-no-streaming.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-ptest-removal-cmple.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/sve-ptest-removal-cmphs.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-ptest-removal-cmpgt.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-ptest-removal-cmpls.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-ptest-removal-cmpeq.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-ptest-removal-cmplt.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-ptest-removal-cmpge.ll
Commit fc440f27cd50e48e1f9ebe6e56febe2823e59de4 by pavel
Filter non-external static members from SBType::GetFieldAtIndex.

See [[ https://github.com/llvm/llvm-project/issues/55040 | issue 55040 ]] where static members of classes declared in the anonymous namespace are incorrectly returned as member fields from lldb::SBType::GetFieldAtIndex(). It appears that attrs.member_byte_offset contains a sentinel value for members that don't have a DW_AT_data_member_location.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D124409
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
The file was addedlldb/test/Shell/SymbolFile/DWARF/x86/debug_static-member-anonymous-namespace.s
Commit 12cb540529e41d12cf27d2e716a384b6692563a8 by n.james93
[clang-tidy][NFC] Replace many instances of std::string where a StringRef would suffice.

There's many instances in clang tidy checks where owning strings are used when we already have a stable string from the options, so using a StringRef makes much more sense.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D124341
The file was modifiedclang-tools-extra/clang-tidy/zircon/TemporaryObjectsCheck.h
The file was modifiedclang-tools-extra/clang-tidy/abseil/StringFindStartswithCheck.h
The file was modifiedclang-tools-extra/clang-tidy/readability/SimplifySubscriptExprCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/utils/OptionsUtils.h
The file was modifiedclang-tools-extra/clang-tidy/performance/ForRangeCopyCheck.h
The file was modifiedclang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.h
The file was modifiedclang-tools-extra/clang-tidy/readability/SimplifySubscriptExprCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/EasilySwappableParametersCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/readability/UppercaseLiteralSuffixCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/NarrowingConversionsCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/utils/Matchers.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/UnusedReturnValueCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.h
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseOverrideCheck.h
The file was modifiedclang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
The file was modifiedclang-tools-extra/clang-tidy/readability/UppercaseLiteralSuffixCheck.h
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseNoexceptCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/AssertSideEffectCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseOverrideCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/OwningMemoryCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/cert/NonTrivialTypesLibcMemoryCallsCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/DanglingHandleCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/zircon/TemporaryObjectsCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/StringConstructorCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/SuspiciousMissingCommaCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/LoopConvertUtils.h
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseEmplaceCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/performance/FasterStringFindCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/abseil/StringFindStrContainsCheck.h
The file was modifiedclang-tools-extra/clang-tidy/google/UnnamedNamespaceInHeaderCheck.h
The file was modifiedclang-tools-extra/clang-tidy/readability/RedundantStringInitCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseNodiscardCheck.h
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/NoMallocCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseNoexceptCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/android/ComparisonInTempFailureRetryCheck.h
The file was modifiedclang-tools-extra/clang-tidy/readability/MagicNumbersCheck.h
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/ProBoundsConstantArrayIndexCheck.h
The file was modifiedclang-tools-extra/clang-tidy/readability/RedundantStringInitCheck.h
The file was modifiedclang-tools-extra/clang-tidy/performance/FasterStringFindCheck.h
The file was modifiedclang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.h
The file was modifiedclang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/performance/NoAutomaticMoveCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/SuspiciousIncludeCheck.h
The file was modifiedclang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.h
The file was modifiedclang-tools-extra/clang-tidy/performance/InefficientVectorOperationCheck.h
The file was modifiedclang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/modernize/ReplaceDisallowCopyAndAssignMacroCheck.h
The file was modifiedclang-tools-extra/clang-tidy/objc/ForbiddenSubclassingCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/DynamicStaticInitializersCheck.h
The file was modifiedclang-tools-extra/clang-tidy/objc/ForbiddenSubclassingCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/EasilySwappableParametersCheck.h
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseEmplaceCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/SuspiciousStringCompareCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/DanglingHandleCheck.h
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseNodiscardCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/readability/MagicNumbersCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/InitVariablesCheck.h
The file was modifiedclang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/AssertSideEffectCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/SignedCharMisuseCheck.h
The file was modifiedclang-tools-extra/clang-tidy/bugprone/StringConstructorCheck.h
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseNullptrCheck.h
The file was modifiedclang-tools-extra/clang-tidy/utils/OptionsUtils.cpp
The file was modifiedclang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/abseil/StringFindStartswithCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/ReservedIdentifierCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/bugprone/SuspiciousStringCompareCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/NoMallocCheck.h
The file was modifiedclang-tools-extra/clang-tidy/modernize/MakeSmartPtrCheck.h
The file was modifiedclang-tools-extra/clang-tidy/abseil/StringFindStrContainsCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/cert/NonTrivialTypesLibcMemoryCallsCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/OwningMemoryCheck.h
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/NarrowingConversionsCheck.h
The file was modifiedclang-tools-extra/clang-tidy/google/IntegerTypesCheck.h
Commit 8a92c45e07dc81c83ca3afda3971d98c512429d4 by llvm-dev
[Clang] Add integer mul reduction builtin

Similar to the existing bitwise reduction builtins, this lowers to a llvm.vector.reduce.mul intrinsic call.

For other reductions, we've tried to share builtins for float/integer vectors, but the fmul reduction intrinsic also take a starting value argument and can either do unordered or serialized, but not reduction-trees as specified for the builtins. However we address fmul support this shouldn't affect the integer case.

Differential Revision: https://reviews.llvm.org/D117829
The file was modifiedclang/test/CodeGen/builtins-reduction-math.c
The file was modifiedclang/test/Sema/builtins-reduction-math.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/docs/LanguageExtensions.rst
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/include/clang/Basic/Builtins.def
Commit e48cd7088b736dae5cd572ebb58963c70a4a72b8 by nathan
[demangler] Buffer peeking needs buffer

The output buffer has a 'back' member, which returns NUL when you try
it with an empty buffer.  But there are no use cases that need that
additional functionality.  This makes the 'back' member behave more
like STL containers' back members.  (It still returns a value, not a
reference.)

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D123201
The file was modifiedllvm/include/llvm/Demangle/Utility.h
The file was modifiedlibcxxabi/src/demangle/Utility.h
Commit 45f2e92d971bf133ec37f765584d9616ca08e48e by david.sherwood
[NFC][LoopVectorize] Add SVE test for tail-folding combined with interleaving

Differential Revision: https://reviews.llvm.org/D125001
The file was addedllvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
Commit bf9921adb9304b90f21f087c1ea2ef178d9c57dd by sam.mccall
[clangd] Disable predefined macros in tests. NFC

These aren't needed. With them the generated predefines buffer is 13KB.
For every TestTU, we must:
- generate the buffer (3 times: parsing preamble, scanning preamble, main file)
- parse the buffer (again 3 times)
- serialize all the macros it defines in the PCH
- compress the buffer itself to write it into the PCH
- decompress it from the PCH

Avoiding this reduces unit test time by ~25%.

Differential Revision: https://reviews.llvm.org/D125172
The file was modifiedclang-tools-extra/clangd/unittests/IncludeCleanerTests.cpp
The file was modifiedclang-tools-extra/clangd/unittests/TestTU.cpp
Commit bb53eb1ef4369fa7ae13d693eb219665c2cecd24 by sam.mccall
[clangd] Skip extra round-trip in parsing args in debug builds. NFC

This is a clever cross-cutting sanity test for clang's arg parsing I suppose.
But clangd creates thousands of invocations, ~all with identical trivial
arguments, and problems with these would be caught by clang's tests.
This overhead accounts for 10% of total unittest time!

Differential Revision: https://reviews.llvm.org/D125169
The file was modifiedclang-tools-extra/clangd/Compiler.cpp
Commit 4c569ceeaad6a0d0c2feec1177f382afc716ceca by flo
[SimpleLoopUnswitch] Add test case for crash with db7a87ed4fa7.
The file was removedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-invariant-select-bug.ll
The file was addedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-trivial-select.ll
Commit 41e142fdc797fead0b64f51dd9051c81853efa06 by flo
Recommit "[SimpleLoopUnswitch] Collect either logical ANDs/ORs but not both."

This reverts commit 7211d5ce07830ebfa2cfc30818cd7155375f7e47.

This version fixes a crash that caused buildbot failures with the first
version.
The file was modifiedllvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-logical-and-or.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-freeze.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-freeze-individual-conditions.ll
The file was modifiedllvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-trivial-select.ll
Commit a316a9815a4f4105bb96420e85e93fe5f0033ed0 by sam.mccall
[clangd] Rewrite TweakTesting helpers to avoid reparsing the same code. NFC

Previously the EXPECT_AVAILABLE macros would rebuild the code at each marked
point, by expanding the cases textually.
There were often lots, and it's nice to have lots!

This reduces total unittest time by ~10% on my machine.
I did have to sacrifice a little apply() coverage in AddUsingTests (was calling
expandCases directly, which was otherwise unused), but we have
EXPECT_AVAILABLE tests covering that, I don't think there's real risk here.

Differential Revision: https://reviews.llvm.org/D125109
The file was modifiedclang-tools-extra/clangd/unittests/tweaks/TweakTesting.cpp
The file was modifiedclang-tools-extra/clangd/unittests/tweaks/TweakTesting.h
The file was modifiedclang-tools-extra/clangd/unittests/tweaks/AddUsingTests.cpp
Commit 1a2665902f128155fa1febafea990ebaee9476f2 by rosie.sumpter
[AArch64][SVE] Improve codegen when extracting first lane of active lane mask

When extracting the first lane of a predicate created using the
llvm.get.active.lane.mask intrinsic, it should give the same codegen as
when the predicate is created using the llvm.aarch64.sve.whilelo
intrinsic, since get.active.lane.mask is lowered to whilelo. This patch
ensures the codegen is the same by recognizing
llvm.get.active.lane.mask as a flag-setting operation in this case.

Differential Revision: https://reviews.llvm.org/D125215
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/sve-cmp-folds.ll
Commit 33f02de5df4d66ee704fbe282bcae7eb0c8e9493 by npopov
[ScalarEvolution] Add tests for umin_seq with non-zero operand (NFC)
The file was modifiedllvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll
Commit ec6024d0811b3116e0a29481b01179d5081a3b92 by llvm-dev
[X86] Replace avx512f integer mul reduction builtins with generic builtin

D117829 added the generic "__builtin_reduce_mul" which we can use to replace the x86 specific integer mul reduction builtins - internally these were mapping to the same intrinsic already so there are no test changes required.

Differential Revision: https://reviews.llvm.org/D125222
The file was modifiedclang/include/clang/Basic/BuiltinsX86.def
The file was modifiedclang/lib/Headers/avx512fintrin.h
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit 18eaff1510525a2226e1fd0c31c6b176f07ae0a7 by npopov
[ScalarEvolution] Fold %x umin_seq %y if %x cannot be zero

Fold %x umin_seq %y to %x umin %y if %x cannot be zero. They only
differ in semantics for %x==0.

More generally %x *_seq %y folds to %x * %y if %x cannot be the
saturation fold (though currently we only have umin_seq).
The file was modifiedllvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 2cfb243bcd6aeab77dc80455bc8f2061128bd11b by david.green
[DAG] Use isAnyConstantBuildVector. NFC

As suggested from 02f8519502447de, this uses the
isAnyConstantBuildVector method in lieu of separate
isBuildVectorOfConstantSDNodes calls. It should
otherwise be an NFC.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit bc150a07f1a14a7923a29499b568d799f7214912 by nathan
[demangler] No need to space adjacent template closings

With the demangler parenthesizing 'a >> b' inside template parameters,
because C++11 parsing of >> there, we don't really need to add spaces
between adjacent template arg closing '>' chars.  In 2022, that just
looks odd.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D123134
The file was modifiedlibcxxabi/src/demangle/ItaniumDemangle.h
The file was modifiedllvm/unittests/Demangle/PartialDemangleTest.cpp
The file was modifiedllvm/test/tools/llvm-objdump/MachO/symbolized-disassembly.test
The file was modifiedllvm/include/llvm/Demangle/ItaniumDemangle.h
The file was modifiedlibcxxabi/test/test_demangle.pass.cpp
Commit 7ed16e7c510a8b8e82fbf7d48a2d6d108f9c3748 by preames
[riscv] Fix state tracking bug on vsetvli (phi of vsetvli) peephole

This fixes the first of several cases where the state computed in phase 1 and 2 of the algorithm differs from the state computed during phase 3. Note that such differences can cause miscompiles by creating disagreements about contents of the VL and VTYPE registers at block boundaries.

In this particular case, we recognize that for the first vsetvli in a block, that if the AVL is a phi of GPR results from previous vsetvlis and the VTYPE field matches, we can avoid emitting a vsetvli as the register contents don't change. Unfortunately, the abstract state does change and that update was lost.

As noted in the test change, this can actually improve results by preserving information until later state transitions in the block. However, this minor codegen improvement is not the motivation for the patch. The motivation is to avoid cases a case where we break a key internal correctness invariant.

Differential Revision: https://reviews.llvm.org/D125133
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
Commit d38915ffebee403dd1786ad4e165100160529939 by jperier
[flang] Fix windows bot after D125140

The ifdef is not required in the header, common::int128_t is always
defined. The function declaration must be available in lowering
regardless of the host int128_t support.

Differential Revision: https://reviews.llvm.org/D125211
The file was modifiedflang/include/flang/Runtime/io-api.h
Commit a425cac31e2e4cee8e14b7b9a99c8ba17c1ebb52 by erich.keane
"Re-apply 4b6c2cd642 "Deferred Concept Instantiation Implementation""""

This includes a fix for the libc++ issue I ran across with friend
declarations not properly being identified as overloads.

This reverts commit 45c07db31cc76802a1a2e41bed1ce9c1b8198181.
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
The file was modifiedclang/test/SemaTemplate/concepts.cpp
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was addedclang/test/SemaTemplate/deferred-concept-inst.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.constr/non-function-templates.cpp
The file was modifiedclang/lib/Sema/SemaConcept.cpp
The file was modifiedclang/lib/ExtractAPI/ExtractAPIConsumer.cpp
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp
The file was modifiedclang/include/clang/AST/Decl.h
The file was modifiedclang/lib/AST/DeclBase.cpp
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/test/SemaTemplate/instantiate-requires-clause.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp
The file was modifiedclang/include/clang/AST/DeclBase.h
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/lib/AST/Decl.cpp
The file was addedclang/test/SemaTemplate/trailing-return-short-circuit.cpp
The file was modifiedclang/include/clang/Sema/Template.h
Commit f1a9c4b717be9a9a730f837dfd70df69d1daf44f by sam.mccall
[clangd] Skip (most) predefined macros when scanning for preamble patching.

This is unneccesary work.
With this change, we skip generating and lexing ~10k of predefines twice.

A dumb benchmark of building a preamble for an empty file in a loop shows:
- before: 1.90ms/run
- after: 1.36ms/run
So this should be worth 0.5ms for each AST build and code completion.

There can be a functional difference, but it's very minor.
If the preamble contains e.g. `#ifndef __llvm__ ... #endif` then before we would
not take it. After this change we will take the branch (single-file mode takes
all branches with unknown conditions) and so gather different directives.

However I think this is negligible:
- this is already true of non-builtin macros (from included headers).
   We've had no complaints.
- this affects the baseline and modified in the same way, so only makes a
   difference transiently when code guarded by such an #ifdef is being edited

Differential Revision: https://reviews.llvm.org/D125179
The file was modifiedclang-tools-extra/clangd/Preamble.cpp
Commit 44ae49e1a72576ca6aa8835b3f72df9605516403 by aaron.puchert
Thread safety analysis: Handle compound assignment and ->* overloads

Like regular assignment, compound assignment operators can be assumed to
write to their left-hand side operand. So we strengthen the requirements
there. (Previously only the default read access had been required.)

Just like operator->, operator->* can also be assumed to dereference the
left-hand side argument, so we require read access to the pointee. This
will generate new warnings if the left-hand side has a pt_guarded_by
attribute. This overload is rarely used, but it was trivial to add, so
why not. (Supporting the builtin operator requires changes to the TIL.)

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D124966
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/lib/Analysis/ThreadSafety.cpp
The file was modifiedclang/test/SemaCXX/warn-thread-safety-analysis.cpp
Commit 70ad96ca5e9ba6361cca6d35100361ef917990a0 by preames
[riscv, InsertVSETVLI] Rename InstrInfo to Require to more clearly indicate purpose [nfc]
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Commit 1ec1cdcfb49aed24a634999ab90c4feb48100c3e by tomasz.kamiński
[analyzer] Inline operator delete when MayInlineCXXAllocator is set.

This patch restores the symmetry between how operator new and operator delete
are handled by also inlining the content of operator delete when possible.

Patch by Fred Tingaud.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D124845
The file was modifiedclang/lib/StaticAnalyzer/Core/CallEvent.cpp
The file was removedclang/test/Analysis/cxxnewexpr-callback-inline.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp
The file was removedclang/test/Analysis/cxxnewexpr-callback-noinline.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
The file was addedclang/test/Analysis/cxxnewexpr-callback.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/AnalyzerOptions.def
The file was modifiedclang/include/clang/Analysis/ConstructionContext.h
The file was modifiedclang/test/Analysis/dtor.cpp
Commit 0195163dbae962ebb48bcba32b6db85919f07370 by sam.mccall
[Frontend] when attaching a preamble, don't generate the long predefines buffer.

We know we're going to overwrite it anyway.
It'd be a bit of work to coordinate not generating it at all, but setting this
flag avoids generating ~10k of the 13k string.

Differential Revision: https://reviews.llvm.org/D125180
The file was modifiedclang/lib/Frontend/PrecompiledPreamble.cpp
Commit d9e6b5df74f54a7cf21a419f737d922040c1ed08 by kparzysz
[clang] Recognize scope of thread local variables in CFGBuilder

Differential Revision: https://reviews.llvm.org/D125177
The file was modifiedclang/lib/Analysis/CFG.cpp
The file was modifiedclang/test/Analysis/cfg.cpp
Commit 882915df61e33f3a2b7f58e52f572717e1c11499 by aaron
Enum conversion warning when one signed and other unsigned.

Ensures an -Wenum-conversion warning happens when one of the enums is
signed and the other is unsigned. Also adds a test file to verify these
warnings.

This warning would not happen since the -Wsign-conversion would make a
diagnostic then return, never allowing the -Wenum-conversion checks.

For example:

C
enum PE { P = -1 };
enum NE { N };
enum NE conv(enum PE E) { return E; }
Before this would only create a diagnostic with -Wsign-conversion and
never on -Wenum-conversion. Now it will create a diagnostic for both
-Wsign-conversion and -Wenum-conversion.

I could change it to just warn on -Wenum-conversion as that was what I
initially did. Seeing PR35200 (or GitHub Issue 316268), I let both
diagnostics check so that the sign conversion could generate a warning.
The file was modifiedclang/test/Sema/enum-sign-conversion.c
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was addedclang/test/Sema/enum-enum-conversion.c
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 7dddf12f448d7ed7e2e35a4de69b53bd140f12c0 by npopov
[SCEV] Add more tests for umin_seq with known predicate (NFC)
The file was modifiedllvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll
Commit 68e1ba818869d6312a2774ccc320c0de86a8249c by npopov
[SCEV] Fold umin_seq using known predicate

Fold %x umin_seq %y to %x if %x ule %y. This also subsumes the
special handling for constant operands, as if %y is constant this
folds to umin via implied poison reasoning, and if %x is constant
then either %x is not zero and it folds to umin, or it is known
zero, in which case it is ule anything.
The file was modifiedllvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 9c3a75eabf577f0e0e372be95ec4861600a5acdb by a.bataev
[SLP]Fix a crash when preparing a mask for external scalars.

Need to use actual index instead of the tree entry position, since the
insert index may be different than 0. It mean, that we vectorized part
of the buildvector starting from not initial insertelement instruction
beause of some reason.
The file was addedllvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 01188f996d2e65c9f1d0849cf834acebb32065ea by llvm-dev
[X86] insertps-combine.ll - show address math in checks
The file was modifiedllvm/test/CodeGen/X86/insertps-combine.ll
Commit 7c20e7ca8642bafa44f5829a14deea5f9b37f0ef by alexrichardson
[ELF] Support -plugin-opt=stats-file=

This flag is added by clang::driver::tools::addLTOOptions() and was causing
errors for me when building the llvm-test-suite repository with LTO and
-DTEST_SUITE_COLLECT_STATS=ON. This replaces the --stats-file= option
added in 1c04b52b2594d403f739ed919ef420b1e47ae343 since the flag is only
used for LTO and should therefore be in the -plugin-opt= namespace.

Additionally, this commit fixes the `REQUIRES: asserts` that was added in
948d05324a150a5a24e93bad07c9090d5b8bd129: the feature was never defined in
the lld test suite so it effectively disabled the test.

Reviewed By: MaskRay, MTC

Differential Revision: https://reviews.llvm.org/D124105
The file was modifiedlld/test/ELF/lto/stats-file-option.ll
The file was modifiedlld/ELF/Options.td
The file was modifiedlld/test/lit.cfg.py
The file was modifiedlld/ELF/Driver.cpp
Commit d35bff8bc41f40d8c0f11c6dc4085440b140a771 by zarko
[LLVM][sancov] Inclusive language: Add -ignorelist option

Adding the `-ignorelist` option that may eventually replace `-blacklist`.
With this patch `sancov` accepts both options.

Reviewed By: quinnp

Differential Revision: https://reviews.llvm.org/D113514
The file was removedllvm/test/tools/sancov/Inputs/src_blacklist.txt
The file was addedllvm/test/tools/sancov/ignorelist.test
The file was addedllvm/test/tools/sancov/Inputs/fun_ignorelist.txt
The file was addedllvm/test/tools/sancov/Inputs/src_ignorelist.txt
The file was removedllvm/test/tools/sancov/Inputs/fun_blacklist.txt
The file was removedllvm/test/tools/sancov/blacklist.test
The file was modifiedllvm/tools/sancov/sancov.cpp
Commit 8abfa5119addc97e881025a819b8d643d53dda14 by pavel
[lldb/test] Fix TestCppIncompleteTypeMembers.py

modify the Makefile.rules line which was interfering with the
target-specific variable values.
The file was modifiedlldb/packages/Python/lldbsuite/test/make/Makefile.rules
Commit e287d647c61f5fbd054410d6ed9c37d5271f29ef by springerm
[mlir] Add translation from tensor.reshape to memref.reshape

This patch augments the `tensor-bufferize` pass by adding a conversion
rule to translate ReshapeOp from the `tensor` dialect to the `memref`
dialect, in addition to adding a unit test to validate the translation.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D125031
The file was modifiedmlir/test/Dialect/Tensor/bufferize.mlir
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
Commit ad7c49bef774191304b804e60821c0cdb6a390cb by hanchung
[mlir][linalg] Fix padding size calculation for Conv2d ops.

This patch fixed the padding size calculation for Conv2d ops when the stride > 1. It contains the changes below:

- Use addBound to add constraint for AffineApplyOp in getUpperBoundForIndex. So the result value can be mapped and retrieved later.

- Fixed the bound from AffineMinOp by adding as a closed bound. Originally the bound was added as an open upper bound, which results in the incorrect bounds when we multiply the values. For example:

```
%0 = affine.min affine_map<()[s0] -> (4, -s0 + 11)>()[iv0]
%1 = affine.apply affine_map<()[s0] -> (s0 * 2)>()[%0]

If we add the affine.min as an open bound, addBound will internally transform it into the close bound "%0 <= 3". The following sliceBounds will derive the bound of %1 as "%1 <= 6" and return the open bound "%1 < 7", while the correct bound should be "%1 <= 8".
```

- In addition to addBound, I also changed sliceBounds to support returning closed upper bound, since for the size computation, we usually care about the closed bounds.

- Change the getUpperBoundForIndex to favor constant bounds when required. The sliceBounds will return a tighter but non-constant bounds, which can't be used for padding. The constantRequired option requires getUpperBoundForIndex to get the constant bounds when possible.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D124821
The file was modifiedmlir/lib/Dialect/Affine/Analysis/AffineStructures.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/test/Dialect/Linalg/pad.mlir
The file was modifiedmlir/include/mlir/Dialect/Affine/Analysis/AffineStructures.h
Commit 3b9a231d255c0f61361044acf0dc79d79b2f59b6 by fraser
[RISCV] Remove two unmasked RVV patterns

These can be selected to unmasked from masked instructions by the
post-process DAG step.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125239
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
Commit 11728db9e6eadd2831e055e378a4d1d3a83d04df by preames
[riscv] Add a few more vsetvli insertion tests

These are aimed at a possible miscompile spotted in the vmv.s.x/f mutation case, but it appears this is a latent bug.  Or at least, I haven't been able to construct a case with compatible policy flags via intrinsics.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
Commit 017abbb258618ed7aad4573f8940a67eb868027f by erich.keane
Revert ""Re-apply 4b6c2cd642 "Deferred Concept Instantiation Implementation"""""

This reverts commit a425cac31e2e4cee8e14b7b9a99c8ba17c1ebb52.

There is another libc++ test, that this time causes us to hit an
assertion. Reverting, likely for a while this time.
The file was modifiedclang/include/clang/AST/Decl.h
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/lib/AST/DeclBase.cpp
The file was modifiedclang/test/SemaTemplate/instantiate-requires-clause.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/ExtractAPI/ExtractAPIConsumer.cpp
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.constr/non-function-templates.cpp
The file was modifiedclang/lib/Sema/SemaOverload.cpp
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/test/SemaTemplate/concepts.cpp
The file was removedclang/test/SemaTemplate/deferred-concept-inst.cpp
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp
The file was modifiedclang/lib/Sema/SemaTemplate.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp
The file was modifiedclang/include/clang/AST/DeclBase.h
The file was removedclang/test/SemaTemplate/trailing-return-short-circuit.cpp
The file was modifiedclang/lib/Sema/SemaConcept.cpp
The file was modifiedclang/include/clang/Sema/Template.h
Commit a2f2dfde48ac6e337a5cf1dfd54a766371627b75 by sam.mccall
[clang-fuzzer] Add a tiny tool to generate a fuzzing dictionary for clang

It should be useful clang-fuzzer itself, though my own motivation is
to use this in fuzzing clang-pseudo. (clang-tools-extra/pseudo/fuzzer).

Differential Revision: https://reviews.llvm.org/D125166
The file was modifiedclang/tools/clang-fuzzer/CMakeLists.txt
The file was addedclang/test/Misc/fuzzer-dictionary.test
The file was modifiedclang/test/CMakeLists.txt
The file was addedclang/tools/clang-fuzzer/dictionary/dictionary.c
The file was addedclang/tools/clang-fuzzer/dictionary/CMakeLists.txt
Commit 167bbfcb9d7004ed84c086ecce676f1ff4433cab by jtucholski00
[mlir] Refactoring dialect and test code to use parseCommaSeparatedList

Issue #55173

Reviewed By: lattner, rriddle

Differential Revision: https://reviews.llvm.org/D124791
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
The file was modifiedmlir/lib/Dialect/PDLInterp/IR/PDLInterp.cpp
The file was modifiedmlir/include/mlir/IR/OpImplementation.h
The file was modifiedmlir/lib/Dialect/DLTI/DLTI.cpp
The file was modifiedmlir/unittests/Interfaces/DataLayoutInterfacesTest.cpp
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
The file was modifiedmlir/lib/Dialect/PDL/IR/PDL.cpp
Commit cd99227c7876278fdd5244b741f1f897bd94a49c by anastasia.stulova
[Docs] Added my office hours.
The file was modifiedllvm/docs/GettingInvolved.rst
Commit 9dc4ced204d1e918d4c8d3279e52197e9a5abc94 by a.bataev
[SLP]Try partial store vectorization if supported by target.

We can try to vectorize number of stores less than MinVecRegSize
/ scalar_value_size, if it is allowed by target. Gives an extra
opportunity for the vectorization.

Fixes PR54985.

Differential Revision: https://reviews.llvm.org/D124284
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/arith-and-const-load.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_sim4b1.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/arith-mul-load.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/fptosi-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_bullet3.ll
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/fptosi.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/remark_not_all_parts.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/memory-runtime-checks.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_7zip.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/fptoui.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/pr49933.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/simple-loop.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/hadd.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/saxpy.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_bullet.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/hadd-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/insert-after-bundle.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/odd_store.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/schedule-bundle.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/uitofp.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll
The file was modifiedllvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/arith-add-load.ll
Commit 431b23d20d5c2889d38c9ce20ac8e66357d5d9c4 by aeubanks
[opt] Error on `opt -O# --foo-pass`

Matches the error message we emit with `-opt -O# --passes=foo`.
Otherwise we crash later on.

Makes #55320 much less confusing.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D125196
The file was modifiedllvm/test/Other/opt-On.ll
The file was modifiedllvm/tools/opt/opt.cpp
Commit b2206d1de3d33c8ae58433cb6c1d50b5db3417ce by kai.nacke
[SystemZ] Fix argument type of tdc instruction.

The DAG node for the Test Data Class is defined using i64 as the second parameter.
However, the code to lower is_fpclass uses `i32` as type. This only works because no
type check is generated in the DAG matcher.
This PR changes the type of the mask constant to `i64`.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D125230
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Commit 3f64f0328941c6ef13ce9d425f2a52061d774b92 by kazu
[CodeGen] Clarify the semantics of ADDCARRY/SUBCARRY

This patch clarifies the semantics of ADDCARRY/SUBCARRY, specifically
stating that both the incoming and outgoing carries are active high.

Differential Revision: https://reviews.llvm.org/D125130
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
Commit ac7747ef281c3be4cfefa5adb5d0395cefc10223 by pavel
[lldb/test] Append CXXFLAGS_EXTRAS last in Makefile.rules

This matches what we do with CFLAGS, and it started to matter
8abfa5119ad, which added some -std=-apending code.
The file was modifiedlldb/packages/Python/lldbsuite/test/make/Makefile.rules
Commit a49d5e976e6d49a5a182a394c4a2a04395159b13 by pavel
[lldb/test] Remove superfluous -std=c++11 from tests

We default to that anyway. It does not work on windows, and since
ac7747e, the flag actually takes effect.
The file was modifiedlldb/test/API/lang/c/step_over_no_deadlock/Makefile
The file was modifiedlldb/test/API/commands/expression/no-deadlock/Makefile
Commit 057863a9bc31d0d92d06e20c1a23c165dbb4e488 by stilis
[mlir] Fix build & test of mlir python bindings on Windows

There are a couple of issues with the python bindings on Windows:
- `create_symlink` requires special permissions on Windows - using `copy_if_different` instead allows the build to complete and then be usable
- the path to the `python_executable` is likely to contain spaces if python is installed in Program Files. llvm's python substitution adds extra quotes in order to account for this case, but mlir's own python substitution does not
- the location of the shared libraries is different on windows
- if the type is not specified for numpy arrays, they appear to be treated as strings

I've implemented the smallest possible changes for each of these in the patch, but I would actually prefer a slightly more comprehensive fix for the python_executable and the shared libraries.

For the python substitution, I think it makes sense to leverage the existing %python instead of adding %PYTHON and instead add a new variable for the case when preloading is needed. This would also make it clearer which tests are which and should be skipped on platforms where the preloading won't work.

For the shared libraries, I think it would make sense to pass the correct path and extension (possibly even the names) to the python script since these are known by lit and don't have to be hardcoded in the test at all.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D125122
The file was modifiedmlir/test/lit.cfg.py
The file was modifiedmlir/cmake/modules/AddMLIRPython.cmake
The file was modifiedmlir/test/python/execution_engine.py
The file was modifiedmlir/test/python/dialects/shape.py
Commit d08e5d4cc66ad8d3cb9342f263c35e40c0dd6215 by Vitaly Buka
Make lsan TestCases more consistent

Inlining `LSAN_BASE` makes the lsan TestCases more consistent to the other sanitizer TestCases.
It is also needed on Windows: https://reviews.llvm.org/D115103

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D124322
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/use_tls_pthread_specific_static.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/disabler_in_tsd_destructor.c
The file was modifiedcompiler-rt/test/lsan/TestCases/high_allocator_contention.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/leak_check_at_exit.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/recoverable_leak_check.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/disabler.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/use_globals_initialized.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/use_poisoned_asan.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/use_registers_extra.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/stale_stack_leak.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/suppressions_default.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/use_globals_uninitialized.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/suppressions_file.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/Darwin/dispatch.mm
The file was modifiedcompiler-rt/test/lsan/TestCases/use_after_return.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/use_stacks.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/do_leak_check_override.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/cleanup_in_tsd_destructor.c
The file was modifiedcompiler-rt/test/lsan/TestCases/pointer_to_self.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/use_stacks_threaded.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/use_tls_pthread_specific_dynamic.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/ignore_object.c
The file was modifiedcompiler-rt/test/lsan/TestCases/many_tls_keys_thread.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/use_tls_static.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/use_globals_unused.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/Linux/use_tls_dynamic.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/many_tls_keys_pthread.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/register_root_region.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/use_registers.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/large_allocation_leak.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/link_turned_off.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/print_suppressions.cpp
The file was modifiedcompiler-rt/test/lsan/TestCases/disabler.c
The file was modifiedcompiler-rt/test/lsan/TestCases/use_unaligned.cpp
Commit f5d054cdc12ef6c94a75c42400372ad525934bca by chris.bieneman
Modify DXILPrepare to emit no-op bitcasts

In supporting opaque pointers we need to re-materialize typed pointers
in bitcode emission. Because of how the value-enumerator pre-allocates
types and instructions we need to insert some no-op bitcasts in the
places that we'll need bitcasts for the pointer types.

Reviewed By: kuhar

Differential Revision: https://reviews.llvm.org/D122269
The file was modifiedllvm/lib/Target/DirectX/DXILPrepare.cpp
The file was addedllvm/test/CodeGen/DirectX/conflicting-bitcast-insert.ll
The file was addedllvm/test/CodeGen/DirectX/omit-bitcast-insert.ll
Commit a6b399ad79cfa994621938b2acd426b79e20566a by llvm-project
[PassManager] Implement DOTGraphTraitsViewer under NPM

Rename the legacy `DOTGraphTraits{Module,}{Viewer,Printer}` to the corresponding `DOTGraphTraits...WrapperPass`, and implement a new `DOTGraphTraitsViewer` with new pass manager.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D123677
The file was modifiedpolly/lib/Analysis/ScopGraphPrinter.cpp
The file was modifiedllvm/lib/Analysis/DomPrinter.cpp
The file was modifiedllvm/include/llvm/Analysis/DOTGraphTraitsPass.h
The file was modifiedllvm/lib/Analysis/RegionPrinter.cpp
Commit 6b3b87376bfe86306c5032fc68ae53d6a524520e by llvm-project
[polly] migrate -polly-show to the new pass manager

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D123678
The file was modifiedllvm/include/llvm/Analysis/RegionPrinter.h
The file was addedpolly/include/polly/ScopGraphPrinter.h
The file was modifiedpolly/lib/Support/PollyPasses.def
The file was modifiedllvm/lib/Analysis/RegionPrinter.cpp
The file was modifiedpolly/lib/Support/RegisterPasses.cpp
The file was modifiedpolly/lib/Analysis/ScopGraphPrinter.cpp
The file was addedpolly/test/ScopDetect/dot-scops-npm.ll
The file was modifiedpolly/include/polly/LinkAllPasses.h
Commit 588ffdaf376a191ddcf106c29462f156fa8bdce5 by llvm-project
[polly] Fix compiler warning. NFC.

Fix the warning

   warning: 'polly::ScopViewer' has virtual functions but non-virtual destructor [-Wnon-virtual-dtor]

and for several other classes by inserting virtual destructors.
The file was modifiedllvm/include/llvm/Analysis/DOTGraphTraitsPass.h
Commit 266ea446ab747671eb6c736569c3c9c5f3c53d11 by flo
Revert "Recommit "[VPlan] Remove uneeded needsVectorIV check.""

This reverts commit 8b48223447311af8b3022697dd58858e1ce6975f.

This triggers an assertion on a test case mentioned in D123720.
Revert while I investigate.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Commit 09fc685ce6808ae34de8e235bad686252eef3812 by thomasraoux
[mlir][nvvm] Add attribute to nvvm.cpAsyncOp to control l1 bypass

Add attribute to be able to generate the intrinsic version of async copy
generating a copy with l1 bypass. This correspond to
cp.async.cg.shared.global in ptx.

Differential Revision: https://reviews.llvm.org/D125241
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/test/Target/LLVMIR/nvvmir.mlir
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/nvvm.mlir
Commit 2f31b4b10a1ab3ec937fbbead55b66b8dfbb0934 by pklausler
[flang][runtime] Fix input of NAN(...) on non-fast path

The closing parenthesis needs to be consumed when a NaN
with parenthesized (ignored) information is read on the
real input path that preprocesses input characters before
passing them to the decimal-to-binary converter.

Differential Revision: https://reviews.llvm.org/D125048
The file was modifiedflang/runtime/edit-input.cpp
Commit cea8b8a72d877a796c1e97fca2adae8a85bb36a1 by pklausler
[flang][runtime] Don't pad CHARACTER input at end of record unless PAD='YES'

When formatted CHARACTER input runs into the end of an input record,
the runtime usually fills the remainder of the variable with spaces,
but this should be conditional, and not done when PAD='NO'.

And while here, add some better comments to two members of connection.h
to make their non-obvious relationship more clear.

Differential Revision: https://reviews.llvm.org/D125053
The file was modifiedflang/runtime/edit-input.cpp
The file was modifiedflang/runtime/connection.h
The file was modifiedflang/runtime/io-api.cpp
The file was modifiedflang/unittests/Runtime/ExternalIOTest.cpp
Commit fb9ec95cf0c2ed6e3b5273b2274eac70dd8bd3d4 by pklausler
[flang][runtime] Enforce restrictions on unlimited format repetition

A repeated format item group with an unlimited ('*') repetition count
can appear only as the last item at the top level of a format; it can't
be nested in more parentheses and it can't be followed by anything
else.

Differential Revision: https://reviews.llvm.org/D125054
The file was modifiedflang/unittests/Runtime/Format.cpp
The file was modifiedflang/runtime/format-implementation.h
Commit 28b5e99a4c84f687b4c43c46a293e9f4b4cf6986 by pklausler
[flang][runtime] (G0) for CHARACTER means (A), not (A0)

I'm emitting zero characters for (G0) formatting of CHARACTER values
instead of using their lengths to determine the output field width.

Differential Revision: https://reviews.llvm.org/D125056
The file was modifiedflang/runtime/edit-output.cpp
Commit 72831a592edf1bdcca15354181867079a17d4f76 by pklausler
[flang][runtime] BACKSPACE after non-advancing I/O

A BACKSPACE statement on a unit after a READ or WRITE with ADVANCE="NO"
must reset the position to the beginning of the record, not to the
beginning of the previous one.

Differential Revision: https://reviews.llvm.org/D125057
The file was modifiedflang/runtime/unit.cpp
The file was modifiedflang/runtime/io-stmt.cpp
Commit cce80bd8b74d54deb82b1b6ae0cbec1ab53c1dbb by a.bataev
[SLP]Adjust assertion check for scalars in several insertelements.

If the same scalar is inserted several times into the same buildvector,
the mask index can be used already. In this case need to check, that
this scalar is already part of the vectorized buildvector.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 460fc79a080ba5733c30610cceb6ddced37afdd4 by pklausler
[flang] Fold intrinsic inquiry functions SAME_TYPE_AS() and EXTENDS_TYPE_OF()

When the result can be known at compilation time, fold it.
Success depends on whether the operands are polymorphic.
When neither one is polymorphic, the result is known and can
be either .TRUE. or .FALSE.; when either one is polymorphic,
a .FALSE. result still can be discerned.

Differential Revision: https://reviews.llvm.org/D125062
The file was modifiedflang/lib/Evaluate/fold-logical.cpp
The file was modifiedflang/include/flang/Evaluate/type.h
The file was addedflang/test/Evaluate/fold-type.f90
The file was modifiedflang/lib/Evaluate/type.cpp
Commit 4212ef8a0e5ccdcba41e132501ee6f7dbbf226fb by a.bataev
Revert "[SLP]Further improvement of the cost model for scalars used in buildvectors."

This reverts commit 99f31acfce338417fea3c14983d6f8fedc8ed043 and several
others to fix detected crashes, reported in https://reviews.llvm.org/D115750
The file was removedllvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_scheduling.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/extracts-with-undefs.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 1cff71b975bf4138604775dd32126bb564704ec7 by pklausler
[flang] Fold intrinsic functions SPACING() and RRSPACING()

The related real number system inquiry functions SPACING()
and RRSPACING() can be folded for constant arguments.
See 16.9.164 & 16.9.180 in Fortran 2018.

Differential Revision: https://reviews.llvm.org/D125100
The file was addedflang/test/Evaluate/fold-spacing.f90
The file was modifiedflang/lib/Evaluate/real.cpp
The file was modifiedflang/lib/Evaluate/fold-real.cpp
The file was modifiedflang/include/flang/Evaluate/real.h
Commit e61baceedb91fcedc7d8a9554b018cb560cd84f3 by llvm-project
[polly] Load NPM pass plugin for NPM test.

This fixes the polly-*-plugin buildbots.
The file was modifiedpolly/test/ScopDetect/dot-scops-npm.ll
Commit b77d16f7f392e057bd6ffe6220deac15a1c8beca by fmayer
[HWASan] deflake hwasan_symbolize test

Also enable on X86_64.

The directory would change during the test execution. This should not
necessarily prevent us from indexing a directory (a user might
potentially do that if they specify a parent directory of the actual
symbols directory, and change unrelated files).

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D125143
The file was modifiedcompiler-rt/test/hwasan/TestCases/hwasan_symbolize.cpp
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize
Commit 18dd123c56754edf62c7042dcf23185c3727610f by pklausler
[flang] Operands of SIGN() need not have same kind

The standard requires that the operands of the intrinsic function
SIGN() must have the same type (INTEGER or REAL), but they are not
required to have the same kind.

Differential Revision: https://reviews.llvm.org/D125105
The file was modifiedflang/test/Evaluate/folding02.f90
The file was modifiedflang/lib/Evaluate/intrinsics.cpp
Commit 9641b9be9dfc599cbb6a812c1e587eff2ddd8707 by hoy
[Inliner] Preserve !prof metadata when converting call to invoke.

When a callee function is inlined via an invoke instruction, every function call inside the callee, if not an invoke,  will be converted to an invoke after cloned to the caller body. I found that during the conversion the !prof metadata was dropped. This in turned caused a cloned indirect call not properly promoted in subsequent passes.

The particular scenario I was investigating was with AutoFDO and thinLTO. In prelink, no ICP was triggered (neither by the sample loader nor PGO ICP), no indirect call was promoted. This is because 1) the particular indirect call did not have inlined samples;  and 2) PGO ICP was intentionally disabled.  After inlining, the prof metadata was dropped. Then in postlink, PGO ICP jumped in but didn't do anything. Thus the opportunity was missed.

I'm making a simple fix to preserve !prof metadata when converting call to invoke.

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D125249
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was addedllvm/test/Transforms/Inline/profile_meta_invoke.ll
Commit 85fdbc1569f5c97daafd6a0daade54282806aa6a by pklausler
[flang] Correct folding of SPREAD() for higher ranks

The construction of the dimension order vector used to populate the
result array was incorrect, leading to a scrambled-looking result
for rank-3 and higher results.  Fix, and extend tests.

Differential Revision: https://reviews.llvm.org/D125113
The file was modifiedflang/lib/Evaluate/fold-implementation.h
The file was modifiedflang/test/Evaluate/fold-spread.f90
Commit 867cd5007d1124f839fdf8c5b51442586ae7d360 by riddleriver
[mlir-LSP] Ensure existing documents are process synchronously

This prevents races where we accidentally launched multiple servers.
The file was modifiedmlir/utils/vscode/src/mlirContext.ts
Commit 42915e2be231983a6476eabc059d114d60742ded by thakis
[gn build] (manually) port a2f2dfde48ac (clang-fuzzer-dictionary)
The file was addedllvm/utils/gn/secondary/clang/tools/clang-fuzzer/dictionary/BUILD.gn
The file was modifiedclang/tools/clang-fuzzer/dictionary/CMakeLists.txt
The file was modifiedllvm/utils/gn/secondary/clang/test/BUILD.gn
Commit be768164a7837bcb87cb6409731d23dc2c00dcfe by pklausler
[flang] Refine handling of short character actual arguments

Actual arguments whose lengths are less than the expected length
of their corresponding dummy argument are errors; but this needs
to be refined.  Short actual arguments that are variables remain
errors, but those that are expressions can be (again) extended on
the right with blanks.

Differential Revision: https://reviews.llvm.org/D125115
The file was modifiedflang/lib/Semantics/check-call.cpp
The file was modifiedflang/test/Semantics/call03.f90
Commit 67d0bc27c0fde04a3e0c7130419eb1b8a5fda7db by riddleriver
[mlir][doc] Move documentation of extensible dialects

Merge the documentation of the definition of extensible dialects
with the definition of dialects.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D125200
The file was removedmlir/docs/ExtensibleDialects.md
The file was modifiedmlir/docs/DefiningDialects.md
Commit b8d1776fc58d56af30d446386788e377d25dd512 by walter erquinigo
[trace][intelpt] Support system-wide tracing [2] - Add a dummy --per-core-tracing option

This updates the documentation of the gdb-remote protocol, as well as the help messages, to include the new --per-core-tracing option.

Differential Revision: https://reviews.llvm.org/D124640
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.h
The file was modifiedlldb/source/Plugins/Process/Linux/IntelPTCollector.cpp
The file was modifiedlldb/include/lldb/Utility/TraceIntelPTGDBRemotePackets.h
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPTConstants.h
The file was modifiedlldb/docs/lldb-gdb-remote.txt
The file was modifiedlldb/test/API/commands/trace/multiple-threads/TestTraceStartStopMultipleThreads.py
The file was modifiedlldb/source/Plugins/Trace/intel-pt/CommandObjectTraceStartIntelPT.h
The file was modifiedlldb/test/API/commands/trace/TestTraceStartStop.py
The file was modifiedlldb/source/Utility/TraceIntelPTGDBRemotePackets.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/CommandObjectTraceStartIntelPT.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/tools/intelpt/intelpt_testcase.py
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPTOptions.td
Commit 7b73de9ec2b19df040c919d3004dfbead9b6ac59 by walter erquinigo
[trace][intelpt] Support system-wide tracing [3] - Refactor IntelPTThreadTrace

I'm refactoring IntelPTThreadTrace into IntelPTSingleBufferTrace so that it can
both single threads or single cores. In this diff I'm basically renaming the
class, moving it to its own file, and removing all the pieces that are not used
along with some basic cleanup.

Differential Revision: https://reviews.llvm.org/D124648
The file was modifiedlldb/unittests/Process/Linux/PerfTests.cpp
The file was modifiedlldb/source/Plugins/Process/Linux/IntelPTCollector.cpp
The file was modifiedlldb/source/Plugins/Process/Linux/Perf.h
The file was addedlldb/source/Plugins/Process/Linux/IntelPTSingleBufferTrace.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
The file was modifiedlldb/unittests/Process/Linux/CMakeLists.txt
The file was modifiedlldb/docs/lldb-gdb-remote.txt
The file was addedlldb/source/Plugins/Process/Linux/IntelPTSingleBufferTrace.h
The file was modifiedlldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPTSessionSaver.cpp
The file was removedlldb/unittests/Process/Linux/IntelPTCollectorTests.cpp
The file was modifiedlldb/include/lldb/Utility/TraceIntelPTGDBRemotePackets.h
The file was modifiedlldb/source/Plugins/Process/Linux/CMakeLists.txt
The file was modifiedlldb/source/Plugins/Process/Linux/IntelPTCollector.h
The file was modifiedlldb/source/Plugins/Process/Linux/Perf.cpp
The file was modifiedlldb/source/Utility/TraceIntelPTGDBRemotePackets.cpp
Commit ee0e00b1983e7d173f9b47683bba8715642353aa by llvmgnsyncbot
[gn build] Port 7b73de9ec2b1
The file was modifiedllvm/utils/gn/secondary/lldb/source/Plugins/Process/Linux/BUILD.gn
Commit 879a47a55ffb94976cbac1d191ef53be135d86a7 by gclayton
Add the ability to debug through an exec into ld

A previous commit enabled LLDB to be able to debug a program launched via ld: https://reviews.llvm.org/D108061.

This commit adds the ability to debug a program launched via ld when it happens during an exec into the dynamic loader. There was an issue where after the exec we would locate the rendezvous structure right away but it didn't contain any valid values and we would try to set the dyanamic loader breakpoint at address zero. This patch fixes that and adds a test.

Differential Revision: https://reviews.llvm.org/D125253
The file was addedlldb/test/API/functionalities/dyld-exec-linux/Makefile
The file was addedlldb/test/API/functionalities/dyld-exec-linux/main.cpp
The file was modifiedlldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
The file was addedlldb/test/API/functionalities/dyld-exec-linux/TestDyldExecLinux.py
Commit a054c882053e63e6fce7b412a93dc7fc228f11fd by pklausler
[flang] Ensure that structure constructors fold parameter references

Structure contructors for instances of parameterized derived types
must have their components' values folded in the context of the values
of the type parameters.

Differential Revision: https://reviews.llvm.org/D125116
The file was modifiedflang/lib/Evaluate/fold.cpp
The file was addedflang/test/Semantics/structconst05.f90
Commit b554c643c5bc3688fd0dfa646480b8337023a6fd by llvm-project
[polly] Fix type in function name. NFC.
The file was modifiedpolly/lib/Transform/ScheduleTreeTransform.cpp
Commit 6f14dbedd942d9a30abcf2e067083a826eab23db by pklausler
[flang] Fix to UnwrapConvertedExpr()

The utility UnwrapConvertedExpr() was failing to unwrap a
converted TypeParamInquiry operation when called from runtime
derived type description table construction, leading to an
abort in semantics.

Differential Revision: https://reviews.llvm.org/D125119
The file was modifiedflang/include/flang/Evaluate/tools.h
Commit 948d0b340b86b9f0ba79195bdd67451832727fbf by pklausler
[flang] Correct actual/dummy procedure compatibility for ALLOCATABLE/POINTER functions

Functions returning ALLOCATABLE or POINTER arrays have descriptor inquiries in
their results' shape expressions that won't compare equal.  These functions
need only be checked for compatible ranks (& of course other characteristics).

Differential Revision: https://reviews.llvm.org/D125123
The file was modifiedflang/lib/Evaluate/characteristics.cpp
Commit 59fea9380dae01697157057e33a8b2fd8cb94de6 by deadalnix
[AArch64] Remove ADDC, ADDE, SUBC, SUBE support, use the CARRY ops instead

This cleans up tech debt. Similar to D33390 .

Reviewed By: Kmeakin

Differential Revision: https://reviews.llvm.org/D125150
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 45ac2c730bc4f78d2d90a76e98fab66de92433b6 by pklausler
[flang] Allow PDTs with LEN parameters in REDUCE()

The type compatibility checks for the ARRAY= argument and the dummy
arguments and result of the OPERATION= argument to the REDUCE intrinsic
function need to allow for parameterized data types with LEN parameters.
(Their values are required to be identical but this is not a numbered
constraint requiring a compilation time check).

Differential Revision: https://reviews.llvm.org/D125124
The file was modifiedflang/test/Semantics/reduce01.f90
The file was modifiedflang/lib/Evaluate/intrinsics.cpp
Commit 78a166b47beb919b50594f13c1d0c23bda3e4fd7 by pklausler
[flang] Allow NULL() actual argument for optional dummy procedure

A disassociated procedure pointer is allowed to be passed as an absent
actual argument that corresponds to an optional dummy procedure,
but not NULL(); accept that case as well.

Differential Revision: https://reviews.llvm.org/D125127
The file was modifiedflang/lib/Semantics/check-call.cpp
The file was modifiedflang/test/Semantics/call02.f90
Commit dcd69d82baad437405d8dd4b5c4b2e137be2d730 by carl.ritson
[AMDGPU] Generate checks in llvm.amdgcn.softwqm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.softwqm.ll
Commit 78ab7adbd39ecfd04da5937a78a33f59b89ee310 by carl.ritson
[AMDGPU] Pre-commit test for D124981. NFC.
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.softwqm.ll
Commit 3382edf9b96caae4f1e2fde1b6611be95191de14 by pklausler
[flang] Allow implicit declaration of DATA objects in inner procedures

DATA statements in inner procedures were not treating undeclared objects
as implicitly declared variables if the DATA statement appeared in a
specification part; they were treated as host-associated symbols instead.
This was incorrect.  Fix DATA statement name resolution to always treat
DATA as if it had appeared in the executable part.

Differential Revision: https://reviews.llvm.org/D125129
The file was modifiedflang/lib/Semantics/resolve-names.cpp
The file was addedflang/test/Semantics/data16.f90
Commit 5d5d2a0b197fa02abac5ccf295731ca826864ddd by pklausler
[flang] Refine error checking in specification expressions

The rules in the Fortran standard for specification expressions
are full of special cases and exceptions, and semantics didn't get
them exactly right.  It is valid to refer to an INTENT(OUT) dummy
argument in a specification expression in the context of a
specification inquiry function like SIZE(); it is not valid to
reference an OPTIONAL dummy argument outside of the context of
PRESENT.  This patch makes the specification expression checker
a little context-sensitive about whether it's examining an actual
argument of a specification inquiry intrinsic function or not.

Differential Revision: https://reviews.llvm.org/D125131
The file was modifiedflang/test/Semantics/spec-expr.f90
The file was modifiedflang/lib/Evaluate/check-expression.cpp
The file was modifiedflang/lib/Evaluate/intrinsics.cpp
The file was modifiedflang/test/Semantics/symbol13.f90
Commit eef76f9821b845b684c9f54d4f3b6d67c0dc2acc by pklausler
[flang] Reverse a reversed type compatibility check

The semantic test for an intrinsic assignment to a polymorphic
derived type entity from a type that is an extension of its base
type was reversed, so it would allow assignments that it shouldn't
and disallowed some that it should; and the test case for it
incorectly assumed that the invalid semantics were correct.
Fix the code and the test, and add a new test for the invalid
case (LHS type is an extension of the RHS type).

Differential Revision: https://reviews.llvm.org/D125135
The file was modifiedflang/test/Semantics/selecttype03.f90
The file was modifiedflang/lib/Semantics/tools.cpp
Commit c35ad9ee4f21c03baaea65e2479e9d08c4b4acd2 by mtrofin
[mlgo] Support exposing more features than those supported by models

This allows the compiler to support more features than those supported by a
model. The only requirement (development mode only) is that the new
features must be appended at the end of the list of features requested
from the model. The support is transparent to compiler code: for
unsupported features, we provide a valid buffer to copy their values;
it's just that this buffer is disconnected from the model, so insofar
as the model is concerned (AOT or development mode), these features don't
exist. The buffers are allocated at setup - meaning, at steady state,
there is no extra allocation (maintaining the current invariant). These
buffers has 2 roles: one, keep the compiler code simple. Second, allow
logging their values in development mode. The latter allows retraining
a model supporting the larger feature set starting from traces produced
with the old model.

For release mode (AOT-ed models), this decouples compiler evolution from
model evolution, which we want in scenarios where the toolchain is
frequently rebuilt and redeployed: we can first deploy the new features,
and continue working with the older model, until a new model is made
available, which can then be picked up the next time the compiler is built.

Differential Revision: https://reviews.llvm.org/D124565
The file was modifiedllvm/unittests/Analysis/TFUtilsTest.cpp
The file was modifiedllvm/lib/Analysis/TFUtils.cpp
The file was modifiedllvm/include/llvm/Analysis/ModelUnderTrainingRunner.h
The file was modifiedllvm/lib/Analysis/MLInlineAdvisor.cpp
The file was modifiedllvm/unittests/Analysis/MLModelRunnerTest.cpp
The file was modifiedllvm/include/llvm/Analysis/TensorSpec.h
The file was modifiedllvm/unittests/Analysis/CMakeLists.txt
The file was modifiedllvm/include/llvm/Analysis/NoInferenceModelRunner.h
The file was modifiedllvm/lib/Analysis/ModelUnderTrainingRunner.cpp
The file was modifiedllvm/include/llvm/Analysis/ReleaseModeModelRunner.h
The file was modifiedllvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp
The file was modifiedllvm/lib/Analysis/NoInferenceModelRunner.cpp
The file was modifiedllvm/lib/CodeGen/MLRegallocEvictAdvisor.cpp
The file was modifiedllvm/include/llvm/Analysis/MLModelRunner.h
The file was modifiedllvm/include/llvm/Analysis/InlineModelFeatureMaps.h
Commit 62f7dc7c037c880f0179ce29be3a7310e5cfa548 by douglas.yung
Add x86 to REQUIRES line in test as suggested in https://reviews.llvm.org/D124105.
The file was modifiedlld/test/ELF/lto/stats-file-option.ll
Commit f6d4769894484bc9e89f83d12679e3dc31c4b4eb by llvmgnsyncbot
[gn build] Port 059e03476cbb
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
Commit 8594b051fb40312e991d94f0c7eb09accd8ac822 by pklausler
[flang] Accept POINTER followed by INTERFACE

As is already supported for dummy procedures, we need to also accept
declarations of procedure pointers that consist of a POINTER attribute
statement followed by an INTERFACE block.  (The case of an INTERFACE
block followed by a POINTER statement already works.)

While cleaning this case up, adjust the utility predicate IsProcedurePointer()
to recognize it (namely a SubprogramDetails symbol with Attr::POINTER)
and delete IsProcName().  Extend tests, and add better comments to
symbol.h to document the two ways in which procedure pointers are
represented.

Differential Revision: https://reviews.llvm.org/D125139
The file was modifiedflang/lib/Lower/ConvertType.cpp
The file was modifiedflang/lib/Semantics/check-nullify.cpp
The file was modifiedflang/lib/Evaluate/tools.cpp
The file was modifiedflang/lib/Semantics/resolve-names.cpp
The file was modifiedflang/include/flang/Semantics/symbol.h
The file was modifiedflang/lib/Semantics/tools.cpp
The file was modifiedflang/test/Semantics/procinterface01.f90
The file was modifiedflang/include/flang/Semantics/tools.h
The file was modifiedflang/test/Semantics/nullify02.f90
The file was modifiedflang/lib/Semantics/data-to-inits.cpp
Commit debd9bf3f0198984cb4ae66c16758e0c8eeb2e9e by yedeng.yd
[NFC] follow up code cleanup after D123837

Reviewed By: iains

Differential Revision: https://reviews.llvm.org/D124149
The file was modifiedclang/lib/Sema/SemaLookup.cpp
Commit 8c407f4a1121ac3eaf46ca6e92f0976c196ce35b by pklausler
[flang] Allow ENTRY function result symbol usage before the ENTRY

In a function, ENTRY E without an explicit RESULT() creates a
function result entity also named E that is storage associated with
the enclosing function's result.  f18 was emitting an incorrect error
message if that function result E was referenced without any
declaration prior to its ENTRY statement when it should have been
implicitly declared instead.

Differential Revision: https://reviews.llvm.org/D125144
The file was modifiedflang/lib/Semantics/resolve-names.cpp
The file was modifiedflang/test/Semantics/entry01.f90
Commit eccf5efeccfab6b1028dd3bd7adf239d5f0a6381 by ben.shi
[RISCV][NFC] Add 'rv32izvfh' invalid arch test

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125210
The file was modifiedllvm/test/MC/RISCV/attribute-arch-invalid.s
Commit 88c336d8eff03fc59a669c9ae4f2e415d95ff07c by ben.shi
[clang][Driver] Add more tests for riscv

Reviewed By: benshi001

Differential Revision: https://reviews.llvm.org/D125157
The file was modifiedclang/test/Driver/riscv-arch.c
Commit 1284ce917b5ab16a2ec4447e0f0500af96c39e64 by ox59616e
[NFC] Modify the comment to reflect the changes in decoder
The file was modifiedllvm/utils/TableGen/DecoderEmitter.cpp
Commit 784a5bccfd2bffd698be18ad13cdcd2162c981e2 by stilis
[mlir] Fix python bindings build on Windows in Debug

Currently, building mlir with the python bindings enabled on Windows in Debug is broken because pybind11, python and cmake don't like to play together. This change normalizes how the three interact, so that the builds can now run and succeed.

The main issue is that python and cmake both make assumptions about which libraries are needed in a Windows build based on the flavor.
- cmake assumes that a debug (or a debug-like) flavor of the build will always require pythonX_d.lib and provides no option/hint to tell it to use a different library. cmake does find both the debug and release versions, but then uses the debug library.
- python (specifically pyconfig.h and by extension python.h) hardcodes the dependency on pythonX_d.lib or pythonX.lib depending on whether `_DEBUG` is defined. This is NOT transparent - it does not show up anywhere in the build logs until the link step fails with `pythonX_d.lib is missing` (or `pythonX.lib is missing`)
- pybind11 tries to "fix" this by implementing a workaround - unless Py_DEBUG is defined, `_DEBUG` is explicitly undefined right before including python headers. This also requires some windows headers to be included differently, so while clever, this is a non-trivial workaround.

mlir itself includes the pybind11 headers (which contain the workaround) AS WELL AS python.h, essentially always requiring both pythonX.lib and pythonX_d.lib for linking. cmake explicitly only adds one or the other, so the build fails.

This change does a couple of things:
- In the cmake files, explicitly add the release version of the python library on Windows builds regardless of flavor. Since Py_DEBUG is not defined, pybind11 will always require release and it will be satisfied
- To satisfy python as well, this change removes any explicit inclusions of Python.h on Windows instead relying on the fact that pybind11 headers will bring in what is needed

There are a few additional things that we could do but I rejected as unnecessary at this time:
- define Py_DEBUG based on the CMAKE_BUILD_TYPE - this will *mostly* work, we'd have to think through multiconfig generators like VS, but it's possible. There doesn't seem to be a need to link against debug python at the moment, so I chose not to overcomplicate the build and always default to release
- similar to above, but define Py_DEBUG based on the CMAKE_BUILD_TYPE *as well as* the presence of the debug python library (`Python3_LIBRARY_DEBUG`). Similar to above, this seems unnecessary right now. I think it's slightly better than above because most people don't actually have the debug version of python installed, so this would prevent breaks in that case.
- similar to the two above, but add a cmake variable to control the logic
- implement the pybind11 workaround directly in mlir (specifically in Interop.h) so that Python.h can still be included directly. This seems prone to error and a pain to maintain in lock step with pybind11
- reorganize how the pybind11 headers are included and place at least one of them in Interop.h directly, so that the header has all of its dependencies included as was the original intention. I decided against this because it really doesn't need pybind11 logic and it's always included after pybind11 is, so we don't necessarily need the python includes

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D125284
The file was modifiedmlir/include/mlir-c/Bindings/Python/Interop.h
The file was modifiedmlir/lib/Bindings/Python/IRCore.cpp
The file was modifiedmlir/cmake/modules/AddMLIRPython.cmake
The file was modifiedmlir/lib/Bindings/Python/ExecutionEngineModule.cpp
Commit 96345f773cfeb23b80aba8c9592446c661f1a0ef by andrew.litteken
[IRSim] Remove early check from similarity matching such that commutative instructions are checked correctly when using the same value.

When the first commutative instruction in a region using the same value in both positions was compared to a corresponding instruction with two different values, there was an early check that determined that since the values were new, it was true that these values acted in the same way structurally. If this was not contradicted later in the program, the regions were marked as similar. This removes that check, so that it is clear that the same value cannot be mapped to two different values.

Reviewer: paquette

Differential Revision: https://reviews.llvm.org/D124775
The file was modifiedllvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp
The file was modifiedllvm/lib/Analysis/IRSimilarityIdentifier.cpp
Commit 909a2e3c8822f0826234aa320794003c7066fada by walter erquinigo
[lldb] Fix 7b73de9ec2b19df040c919d3004dfbead9b6ac59

This commit causes
https://lab.llvm.org/buildbot/#/builders/17/builds/21743 to fail
seemingly because of bad handling of the PERF_ATTR_SIZE_VER5 symbol.

This patch tries to handle better the absence of this symbol.
The file was modifiedlldb/source/Plugins/Process/Linux/IntelPTSingleBufferTrace.cpp
Commit c4172c751a39313efd9c7588a103482c3648987e by walter erquinigo
[lldb] Fix 7b73de9ec2b19df040c919d3004dfbead9b6ac59

It turns out that the issue in
https://lab.llvm.org/buildbot/#/builders/17/builds/21754 is that a
size_t is attempted to be used interchangeably with uint64_t.
The file was modifiedlldb/source/Plugins/Process/Linux/IntelPTSingleBufferTrace.cpp
Commit ebc25292060dd641e7c10fd0e4768458b123a060 by gkm
[ELF] Move InputSectionBase::rawData member [NFC]
The file was modifiedlld/ELF/InputSection.h
Commit b6bb9e7d61fd84caf1221eeb09a743e8393fb43f by walter erquinigo
[lldb] Fix 7b73de9ec2b19df040c919d3004dfbead9b6ac59

    It turns out that the issue in
    https://lab.llvm.org/buildbot/#/builders/17/builds/21754 is that a
    size_t is attempted to be used interchangeably with uint64_t.
The file was modifiedlldb/source/Plugins/Process/Linux/IntelPTSingleBufferTrace.cpp
Commit 39e63bd2d848667e44fc05d8a39460f29a3dfbe1 by craig.topper
[IR][CostModel] A scalable vector shuffle can't be an identity or reverse shuffle.

Even if the minimum number of elements is 1 and the length doesn't change,
we don't know what vscale is so we can't classify it as identity mask. Instead it
is a zero element splat.

For reverse, we shouldn't classify it as a reverse unless there are at least 2 elements
in the mask. This applies to both fixed and scalable vectors. For fixed vectors, a single
element would be an identity shuffle. For scalable vector it's a zero elt splat.

Reviewed By: sdesmalen, liaolucy

Differential Revision: https://reviews.llvm.org/D124655
The file was modifiedllvm/test/Analysis/CostModel/RISCV/shuffle-broadcast.ll
The file was modifiedllvm/include/llvm/IR/Instructions.h
The file was modifiedllvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
The file was modifiedllvm/lib/IR/Instructions.cpp
Commit 9d2dd6d7622335ba9c19b55ac7d463cf662cab0d by walter erquinigo
[NFC][lldb][trace] Use uint64_t when decoding and enconding json

llvm's json parser supports uint64_t, so let's better use it for the
packets being sent between lldb and lldb-server instead of using int64_t
as an intermediate type, which might be error-prone.
The file was modifiedlldb/source/Target/Trace.cpp
The file was modifiedlldb/include/lldb/Utility/TraceIntelPTGDBRemotePackets.h
The file was modifiedlldb/source/Plugins/Process/Linux/IntelPTCollector.cpp
The file was modifiedlldb/source/Utility/TraceIntelPTGDBRemotePackets.cpp
The file was modifiedlldb/include/lldb/Utility/TraceGDBRemotePackets.h
The file was modifiedlldb/source/Utility/TraceGDBRemotePackets.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
Commit 04cb01cf102a3ecb52de4cd3f007dceb5698e6a0 by Shraiysh.Vaishay
[flang][OpenMP] Lowering for task construct

This patch adds lowering for task construct from Fortran to
`omp.task` operation in OpenMPDialect Dialect (mlir). Also added tests
for the same.

Reviewed By: kiranchandramohan, peixin

Differential Revision: https://reviews.llvm.org/D124138
The file was modifiedflang/lib/Lower/OpenMP.cpp
The file was addedflang/test/Lower/OpenMP/task.f90
Commit beeed0994eff7397d692a050cfdad9f4de7b75db by yedeng.yd
[Coroutines] Use PassManager instead of Legacy PassManager internally

This is a following cleanup for the previous work D123918. I missed
serveral places which still use legacy pass managers. This patch tries
to remove them.
The file was modifiedllvm/lib/Transforms/Coroutines/CoroSplit.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/CoroCleanup.cpp
Commit 285b39a31ec63a0253fa88c3c61f447712e2f131 by walter erquinigo
Revert "[NFC][lldb][trace] Use uint64_t when decoding and enconding json"

This reverts commit 9d2dd6d7622335ba9c19b55ac7d463cf662cab0d.

Reverting because this exposes an issue in the uint64_t json parser.
The file was modifiedlldb/include/lldb/Utility/TraceGDBRemotePackets.h
The file was modifiedlldb/source/Target/Trace.cpp
The file was modifiedlldb/source/Utility/TraceGDBRemotePackets.cpp
The file was modifiedlldb/include/lldb/Utility/TraceIntelPTGDBRemotePackets.h
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
The file was modifiedlldb/source/Plugins/Process/Linux/IntelPTCollector.cpp
The file was modifiedlldb/source/Utility/TraceIntelPTGDBRemotePackets.cpp
Commit 1daf35f47cb13ae3c257873203a52f7c48856eef by mkazantsev
[Test] One more test to prevent crash in SLP vectorizer

Make sure "[SLP]Further improvement of the cost model for scalars used in buildvectors."
does not come back until it's fixed.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
Commit 00916f700820f14c433929f9ddd0ade501b7ce80 by mkazantsev
Revert "[Test] One more test to prevent crash in SLP vectorizer"

This reverts commit 1daf35f47cb13ae3c257873203a52f7c48856eef.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
Commit fb148057c5488f403b4706f8ea724134604a546c by mkazantsev
Return "[Test] One more test to prevent crash in SLP vectorizer"

Looks like this test exposes some non-determinism and fails with
auth-generated checks. Recommited with sole check it didn't crash.
Will investigate why it happens.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/malformed_phis.ll
Commit bf1b81d076f89bd56e86189b013f27dcf4d73ae8 by martin
[libcxxabi] [cmake] Fix a mismatched variable name

The variable name checked didn't match the one set on the line above.

This error was introduced in b3df14b6c98702ce50401fd039852787373e4676.
The file was modifiedlibcxxabi/cmake/Modules/HandleLibcxxabiFlags.cmake
Commit 3d888b0491f899d5255653eb2f294c38248a4fc9 by npopov
[Docs] Clarify CLANG_ENABLE_OPAQUE_POINTERS behavior (NFC)

While it originally did, this option no longer affects the cc1
interface. For the cc1 interface, -no-opaque-pointers has to be
passed, there is no cmake option.
The file was modifiedllvm/docs/OpaquePointers.rst
Commit c4fa05f5f7783efa380c200d96cc1f756fa88c6c by gabor.marton
[analyzer] Indicate if a parent state is infeasible

In some cases a parent State is already infeasible, but we recognize
this only if an additonal constraint is added. This patch is the first
of a series to address this issue. In this patch `assumeDual` is changed
to clone the parent State but with an `Infeasible` flag set, and this
infeasible-parent is returned both for the true and false case. Then
when we add a new transition in the exploded graph and the destination
is marked as infeasible, the node will be a sink node.

Related bug:
https://github.com/llvm/llvm-project/issues/50883
Actually, this patch does not solve that bug in the solver, rather with
this patch we can handle the general parent-infeasible cases.

Next step would be to change the State API and require all checkers to
use the `assume*Dual` API and deprecate the simple `assume` calls.

Hopefully, the next patch will introduce `assumeInBoundDual` and will
solve the CRASH we have here:
https://github.com/llvm/llvm-project/issues/54272

Differential Revision: https://reviews.llvm.org/D124674
The file was modifiedclang/lib/StaticAnalyzer/Core/ConstraintManager.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CoreEngine.h
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
The file was modifiedclang/lib/StaticAnalyzer/Core/ProgramState.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ConstraintManager.h
The file was addedclang/test/Analysis/infeasible-sink.c
Commit 1c1c1e25f94fd1bb10fdbfe96dc14ffc655db5df by gabor.marton
[analyzer] Implement assume in terms of assumeDual

Summary:
By evaluating both children states, now we are capable of discovering
infeasible parent states. In this patch, `assume` is implemented in the terms
of `assumeDuali`. This might be suboptimal (e.g. where there are adjacent
assume(true) and assume(false) calls, next patches addresses that). This patch
fixes a real CRASH.
Fixes https://github.com/llvm/llvm-project/issues/54272

Differential Revision:
https://reviews.llvm.org/D124758
The file was modifiedclang/lib/StaticAnalyzer/Core/ConstraintManager.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/SimpleConstraintManager.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/SimpleConstraintManager.h
The file was addedclang/test/Analysis/infeasible-crash.c
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ConstraintManager.h
Commit 34ac048aef298270d82e5430727ffd00f15c63d5 by gabor.marton
[analyzer] Replace adjacent assumeInBound calls to assumeInBoundDual

This is to minimize superfluous assume calls.

Depends on D124758

Differential Revision: https://reviews.llvm.org/D124761
The file was modifiedclang/lib/StaticAnalyzer/Checkers/UndefResultChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/ProgramState.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/ObjCContainersChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/ReturnPointerRangeChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/ArrayBoundChecker.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
Commit 03ab30686dc4db4b0c4a2652c0d610bb03f220d2 by npopov
[MLIR] Split off MLIRExecutionEngineUtils to fix libMLIR.so build (PR54242)

Building libMLIR.so currently fails with:

> /usr/bin/ld: /tmp/ccNzulEA.ltrans39.ltrans.o: in function `(anonymous namespace)::SerializeToHsacoPass::optimizeLlvm(llvm::Module&, llvm::TargetMachine&)':
> /builddir/build/BUILD/llvm-project-15.0.0.src/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp:328: undefined reference to `mlir::makeOptimizingTransformer(unsigned int, unsigned int, llvm::TargetMachine*)'

This is because MLIRGPUTransforms depends on MLIRExecutionEngine in
https://github.com/llvm/llvm-project/blob/61bb2e4ea82fc5499a271d70d4537383d1942208/mlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp#L328,
but MLIRExecutionEngine is marked as excluded from libMLIR.so.

However, this code doesn't require the full execution engine: It
only performs middle-end optimization, and does not need any of
the JIT/codegen infrastructure. As such, split off a separate
library MLIRExecutionEngineUtils, which only contains that part
and is not excluded from libMLIR.so.

Fixes https://github.com/llvm/llvm-project/issues/54242.

Differential Revision: https://reviews.llvm.org/D125214
The file was modifiedmlir/lib/ExecutionEngine/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/GPU/CMakeLists.txt
Commit ddfc84e63494a9689f7cc22cbc391d030ffdb9bb by npopov
[fuzzer] Reduce size of large.test

This halves the size of LargeTest, dropping time to compile this
file locally from 14s to 5.5s. Hopefully this will also fix the
persistent timeouts in pre-merge checks.

Differential Revision: https://reviews.llvm.org/D124237
The file was modifiedcompiler-rt/test/fuzzer/LargeTest.cpp
Commit 3b3ff24037e48b74c14a3768209a0ffc3d953dac by Lian.Wang
[RISCV] Add more tests for vector reduce mask operations

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D125216
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
Commit 17a8a1bb7126a7c1b0bc629d9299f2e5ae6db3f1 by Lian.Wang
[RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125206
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
Commit 21feafaeb85aad2847db44aa2208999b166ba4a9 by gabor.marton
[analyzer] Attempt to fix test infeasible-crash.c
The file was modifiedclang/test/Analysis/infeasible-crash.c
Commit f14a1f26ade3786d3cda566a1c38f92f7fbb24b3 by Lian.Wang
Revert "[RISCV][SelectionDAG] Support VECREDUCE_ADD mask operation"

This patch make CodeGen/test/AArch64/vecreduce-add-legalization.ll fail.

This reverts commit 17a8a1bb7126a7c1b0bc629d9299f2e5ae6db3f1.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit d222bab6720ad8dbaf2a307956faf228918e10d2 by npopov
[InstCombine] Handle GEP scalar/vector base mismatch (PR55363)

30a12f3f6322399185fdceffe176152a58bb84ae switched the type check
to use the GEP result type rather than the GEP operand type.
However, the GEP result types may match even if the operand types
don't, in case GEPs with scalar/vector base and vector index
are compared.

Fixes https://github.com/llvm/llvm-project/issues/55363.
The file was modifiedllvm/test/Transforms/InstCombine/opaque-ptr.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit 02d6845234865675d7e802e1982efca6ca86c866 by yedeng.yd
[NFC] [Coroutines] Remove EnableReuseStorageInFrame option

The EnableReuseStorageInFrame option is designed for testing only.
But it is better to use *_PASS_WITH_PARAMS macro to keep consistent with
other passes.
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/test/Transforms/Coroutines/coro-debug-O2.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-02.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-01.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-05.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-00.ll
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
Commit c077510bb195325b33eb28c550ebff4665b0c709 by npopov
[InstSimplify] Handle unknown function context in pointer icmp fold (PR54615)

This issue reproduces in the context of LoopDeletion, because the
bitcast does not get simplified away there. For a plain -inst-simplify
run the bitcast would get folded away first.

Fixes https://github.com/llvm/llvm-project/issues/54615.
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
Commit ff20ee32d82d839c6ec7161795112fca268c2417 by npopov
[LoopVectorize] Remove incorrect nuw flag from test (NFC)

nuw does not make sense for reverse iteration.
The file was modifiedllvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
Commit 0b2e7a7c72c71b1cd5d39980a296b104013ec4ea by fraser
[RISCV][NFC] Remove else after continue
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit 64c85742099d4de14f18167249fc0f40c10b9782 by akuegel
[mlir] Remove unused using declaration (NFC)
The file was modifiedmlir/unittests/TableGen/EnumsGenTest.cpp
Commit be895d5768d5e12581f158b9522b167c833796d8 by hokein.wu
[pseudo] Add benchmarks for pseudoparser.

Running on SemaDecl.cpp with the cxx.bnf grammar:

```
--------------------------------------------------------------
Benchmark                    Time             CPU   Iterations
--------------------------------------------------------------
runParseBNFGrammar      649389 ns       649365 ns         1013
runBuildLR            34591903 ns     34591380 ns           20
runPreprocessTokens   11418744 ns     11418703 ns           61 bytes_per_second=63.8971M/s
runGLRParse          282996863 ns    282988726 ns            2 bytes_per_second=2.57827M/s
runParseOverall      294969719 ns    294951870 ns            2 bytes_per_second=2.4737M/s
```

Differential Revision: https://reviews.llvm.org/D125226
The file was addedclang-tools-extra/pseudo/benchmarks/CMakeLists.txt
The file was addedclang-tools-extra/pseudo/benchmarks/Benchmark.cpp
The file was modifiedclang-tools-extra/pseudo/CMakeLists.txt
Commit f635e63709519aaefc564a4754ea38fc5f2ce911 by rosie.sumpter
[Sema][SVE] Move/simplify Sema testing for SVE ACLE builtins

Currently for SVE ACLE builtins, single tests are used to verify both
clang code generation (when the feature is available) and semantic
error/warning messages (when the feature is unavailable). This
patch moves the semantic testing into dedicated Sema tests.

Differential Revision: https://reviews.llvm.org/D124924
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfd.c
The file was addedclang/test/Sema/aarch64-sve-intrinsics/acle_sve_imm_n.cpp
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecw.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_asrd.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c
The file was addedclang/test/Sema/aarch64-sve-intrinsics/acle_sve_imm.cpp
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincw.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_get3.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cmla.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c
The file was addedclang/test/Sema/aarch64-sve-intrinsics/big_endian.cpp
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecb.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_svptrue.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_set3.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincb.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/big_endian.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdecd.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfw.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_mul.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_tmad.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_cadd.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_ext.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_set2.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qinch.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfh.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_mla.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c
The file was addedclang/test/Sema/aarch64-sve-intrinsics/acle_sve_bfloat.cpp
The file was addedclang/test/Sema/aarch64-sve-intrinsics/acle_sve_imm_lane.cpp
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_get4.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_get2.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qdech.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_svcnt.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_set4.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c
The file was addedclang/test/Sema/aarch64-sve-intrinsics/acle_sve_imm_rotation.cpp
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_dot.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_qincd.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c
The file was removedclang/test/CodeGen/aarch64-sve-intrinsics/negative/acle_sve_prfb.c
Commit 131e6636f23c69a6f2a411f32406a27c9be2626b by rosie.sumpter
[Sema][SVE2] Move/simplify Sema testing for SVE2 ACLE builtins

Currently for SVE2 ACLE builtins, single tests are used to verify both
clang code generation (when the feature is available) and semantic
error/warning messages (when the feature is unavailable). This
patch moves the semantic testing for the target feature flag into
dedicated Sema tests.

Differential Revision: https://reviews.llvm.org/D124850
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c
The file was addedclang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_aes_bitperm_sha3_sm4.cpp
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c
The file was addedclang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_bfloat.cpp
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c
The file was addedclang/test/Sema/aarch64-sve2-intrinsics/acle_sve2.cpp
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c
The file was modifiedclang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c
Commit 38bb46523f87c9841db47b3518ffb232d9a6a06d by nicolai.haehnle
GlobalISel: Trivial documentation and comment fixes

Differential Revision: https://reviews.llvm.org/D124808
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
The file was modifiedllvm/docs/GlobalISel/GenericOpcode.rst
Commit 3898759538c0a5933103e671a3ea0c0f49e161ab by npopov
[IndVarSimplify] Regenerate test checks (NFC)
The file was modifiedllvm/test/Transforms/IndVarSimplify/post-inc-range.ll
Commit c40f4f2880f5b14344fbb5e2dc4486a6c11ab4dc by a.bataev
[SLP][NFC]Add a test for improved shuffles in buildvector sequences,
NFC.
The file was addedllvm/test/Transforms/SLPVectorizer/X86/buildvector-shuffle.ll
Commit 0eafef117117d84027506486348a72480670aefa by npopov
[SCEVExpander] Remove handling for mixed int/pointer min/max (NFCI)

Mixed int/pointer min/max are no longer possible.
The file was modifiedllvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
Commit ead7a5fc04360c1d740214048b15c4d7100dc768 by Louis Dionne
[libc++abi] Reword uncaught exception termination message

When we terminate due to an exception being uncaught, libc++abi prints
a message saying "terminating with uncaught exception [...]". This patch
changes that to say "terminating due to uncaught exception [...]" instead,
which is a bit clearer. Indeed, I've seen some people being confused and
thinking that libc++abi was the component throwing the exception.

Differential Revision: https://reviews.llvm.org/D125245
The file was modifiedlibcxxabi/src/cxa_default_handlers.cpp
Commit 009f6ce0ef1b5cdc8ec465797366ce1ce151acd4 by dawid_jurek
[GVNSink] Make GVNSink resistant against self referencing instructions (PR36954)

Before this change GVNSink pass suffers from stack overflow while processing self referenced instruction in unreachable basic block.
According [1] and [2] it's reasonable to make pass resistant against self referencing instructions.
To fix issue we skip sinking analysis when we reach instruction coming from unreachable block.

[1] https://groups.google.com/g/llvm-dev/c/843Tig9IzwA
[2] https://lists.llvm.org/pipermail/llvm-dev/2015-February/082629.html

Differential Revision: https://reviews.llvm.org/D113897
The file was modifiedllvm/test/Transforms/GVNSink/sink-common-code.ll
The file was modifiedllvm/lib/Transforms/Scalar/GVNSink.cpp
Commit 6c2a01ce3a824622e4491e913023c304841363b1 by nicolai.haehnle
AMDGPU/SDAG: Refine the fold to v_mad_[iu]64_[iu]32

Only fold for uniform values on pre-GFX9 chips. GFX9+ allow us
to keep the calculation entirely on the SALU.

For subtargets where integer multiplication isn't full-rate, avoid
folding if the multiply has too many uses.

Finally, we expand 64x32 and 64x64 multiplies here as well, if they
feed into an addition. This results in better code generation than
the generic expansion for such multiplies because we end up using
the accumulator of the MAD instructions.

Differential Revision: https://reviews.llvm.org/D123835
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mad_64_32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
Commit 0c1000cbd6d25d749c78f9c27fa985a2608ff217 by amy.kwan1
[NFC][PowerPC] Add 32-bit AIX RUN lines to test cases.

This patch adds 32-bit AIX RUN lines to several test cases, along with the
addition of one new test case, to prepare for future codegen changes involving
the PPCISD::SCALAR_TO_VECTOR_PERMUTED node on 32-bit mode.
The file was addedllvm/test/CodeGen/PowerPC/aix_scalar_vector_permuted.ll
The file was modifiedllvm/test/CodeGen/PowerPC/load-v4i8-improved.ll
The file was modifiedllvm/test/CodeGen/PowerPC/pre-inc-disable.ll
The file was modifiedllvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
The file was modifiedllvm/test/CodeGen/PowerPC/float-vector-gather.ll
The file was modifiedllvm/test/CodeGen/PowerPC/reduce_scalarization.ll
The file was modifiedllvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
The file was modifiedllvm/test/CodeGen/PowerPC/vec_insert_elt.ll
Commit ad3b358180e8e1d723b790cf5f68264e486c0b1a by clattner
[MLIR Parser] Improve QoI for "expected token" errors

A typical problem with missing a token is that the missing
token is at the end of a line.  The problem with this is that
the error message gets reported on the start of the following
line (which is where the next / invalid token is) which can
be confusing.

Handle this by noticing this case and backing up to the end of
the previous line.

Differential Revision: https://reviews.llvm.org/D125295
The file was modifiedmlir/test/Dialect/LLVMIR/global.mlir
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedmlir/test/Dialect/SPIRV/IR/misc-ops.mlir
The file was modifiedmlir/test/Dialect/SPIRV/IR/memory-ops.mlir
The file was modifiedmlir/test/IR/invalid-locations.mlir
The file was modifiedmlir/test/Dialect/ControlFlow/invalid.mlir
The file was modifiedmlir/test/Dialect/SPIRV/IR/logical-ops.mlir
The file was modifiedmlir/test/IR/invalid.mlir
The file was modifiedmlir/test/Dialect/SPIRV/IR/control-flow-ops.mlir
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/lib/Parser/Parser.h
Commit 9e50168be444dc6cc076fe3ac3d0fb73dfca7428 by pklausler
[flang] Fold real-valued DIM()

Fold references to the intrinsic function DIM with constant real
arguments.  And clean up folding of comparisons with NaNs to address
a problem noticed in testing -- NaNs should successfully compare
unequal to all values, including themselves, instead of failing all
comparisons.

Differential Revision: https://reviews.llvm.org/D125146
The file was modifiedflang/include/flang/Evaluate/real.h
The file was modifiedflang/include/flang/Evaluate/common.h
The file was modifiedflang/test/Evaluate/folding03.f90
The file was modifiedflang/lib/Evaluate/fold-real.cpp
The file was modifiedflang/lib/Evaluate/real.cpp
The file was addedflang/test/Evaluate/fold-dim.f90
Commit 00a3c9f2a46a566b3ff10f2d24b01426df2193ab by sam.mccall
[Frontend] Flip default of CreateInvocationOptions::ProbePrecompiled to false

This is generally a better default for tools other than the compiler, which
shouldn't assume a PCH file on disk is something they can consume.

Preserve the old behavior in places associated with libclang/c-index-test
(including ASTUnit) as there are tests relying on it and most important
consumers are out-of-tree. It's unclear whether the tests are specifically
trying to test this functionality, and what the downstream implications of
removing it are. Hopefully someone more familiar can clean this up in future.

Differential Revision: https://reviews.llvm.org/D125149
The file was modifiedclang/include/clang/Frontend/Utils.h
The file was modifiedclang/lib/Frontend/ASTUnit.cpp
The file was modifiedclang/tools/libclang/Indexing.cpp
The file was modifiedclang/unittests/Frontend/UtilsTest.cpp
The file was modifiedclang/tools/c-index-test/core_main.cpp
Commit f1f05a91cacb13635cac252e53e50f9f962d4627 by Krzysztof.Drewniak
[MLIR][AMDGPU] Add AMDGPU dialect, wrappers around raw buffer intrinsics

By analogy with the NVGPU dialect, introduce an AMDGPU dialect for
AMD-specific intrinsic wrappers.

The dialect initially includes wrappers around the raw buffer intrinsics.

On AMD GPUs, a memref can be converted to a "buffer descriptor" that
allows more precise control of memory access, such as by allowing for
out of bounds loads/stores to be replaced by 0/ignored without adding
additional conditional logic, which is important for performance.

The repository currently contains a limited conversion from
transfer_read/transfer_write to Mubuf intrinsics, which are an older,
deprecated intrinsic for the same functionality.

The new amdgpu.raw_buffer_* ops allow these operations to be used
explicitly and for including metadata such as whether the target
chipset is an RDNA chip or not (which impacts the interpretation of
some bits in the buffer descriptor), while still maintaining an
MLIR-like interface.

(This change also exposes the floating-point atomic add intrinsic.)

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D122765
The file was addedmlir/lib/Dialect/AMDGPU/CMakeLists.txt
The file was addedmlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
The file was addedmlir/include/mlir/Dialect/AMDGPU/AMDGPU.td
The file was addedmlir/include/mlir/Dialect/AMDGPU/AMDGPUDialect.h
The file was modifiedmlir/test/Target/LLVMIR/rocdl.mlir
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
The file was modifiedmlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
The file was modifiedmlir/include/mlir/Conversion/Passes.h
The file was addedmlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
The file was modifiedmlir/test/mlir-opt/commandline.mlir
The file was modifiedmlir/include/mlir/Conversion/Passes.td
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/lib/Dialect/CMakeLists.txt
The file was addedmlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
The file was modifiedmlir/lib/Conversion/CMakeLists.txt
The file was modifiedmlir/test/Dialect/LLVMIR/rocdl.mlir
The file was addedmlir/include/mlir/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.h
The file was modifiedmlir/include/mlir/InitAllDialects.h
The file was addedmlir/lib/Conversion/AMDGPUToROCDL/CMakeLists.txt
The file was addedmlir/lib/Dialect/AMDGPU/IR/CMakeLists.txt
The file was addedmlir/test/Dialect/AMDGPU/ops.mlir
The file was addedmlir/include/mlir/Dialect/AMDGPU/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/CMakeLists.txt
Commit 93a8225da1f983cccb3e4b5e762369121aaa7dd5 by thakis
[CodeGen] Use ABI alignment for C++ new expressions

In case of placement new, if we do not know the alignment of the
operand, we can't assume it has the preferred alignment. It might be
e.g. a pointer to a struct member which follows ABI alignment rules.

This makes UBSAN no longer report "constructor call on misaligned
address" when constructing a double into a struct field of type double
on i686. The psABI specifies an alignment of 4 bytes, but the preferred
alignment used by Clang is 8 bytes.

We now use ABI alignment for allocating new as well, as the preferred
alignment should be used for over-aligning e.g. local variables, which
isn't relevant for ABI code dealing with operator new. AFAICT there
wouldn't be problems either way though.

Fixes #54845.

Differential Revision: https://reviews.llvm.org/D124736
The file was addedclang/test/CodeGenCXX/pr54845.cpp
The file was modifiedclang/lib/CodeGen/CGExprCXX.cpp
Commit 53ff0daa7e9d3646ac9de7f0d6ed39359af94738 by ashay
[mlir] Fail early if AnalysisState::getBuffer() returns failure

This patch updates calls to AnalysisState::getBuffer() so that we return
early with a failure if the call does not succeed.

Reviewed By: springerm

Differential Revision: https://reviews.llvm.org/D125251
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
Commit 671afac89dece7d728cd3c6a277faee1c8d1d592 by Louis Dionne
[libc++abi][NFC] Fix typo in comment
The file was modifiedlibcxxabi/src/cxa_exception.h
Commit 71728360ada3e0f6c21d4c09d33424f6150afcc9 by pklausler
[flang] Fold real-valued MODULO() and MOD()

Evaluate real-valued references to the intrinsic functions MODULO
and MOD at compilation time without recourse to an external math
library.

Differential Revision: https://reviews.llvm.org/D125151
The file was modifiedflang/lib/Evaluate/real.cpp
The file was modifiedflang/test/Evaluate/folding04.f90
The file was addedflang/test/Evaluate/fold-mod.f90
The file was modifiedflang/lib/Evaluate/intrinsics-library.cpp
The file was modifiedflang/include/flang/Evaluate/real.h
The file was modifiedflang/lib/Evaluate/fold-real.cpp
Commit ca75ac5f04f269def97e6844c2f5c9596b29c84c by aaron
Diagnose unreachable generic selection associations

The controlling expression of a _Generic selection expression undergoes
lvalue conversion, array conversion, and function conversion before
picking the association. This means that array types, function types,
and qualified types are all unreachable code if they're used as an
association. I've been caught by this twice in the past few months and
I figure that if a WG14 member can't seem to remember this rule, users
are also likely to struggle with it. So this adds an on-by-default
unreachable code diagnostic for generic selection expression
associations.

Note, we don't have to worry about function types as those are already
a constraint violation which generates an error.

Differential Revision: https://reviews.llvm.org/D125259
The file was modifiedclang/test/Sema/generic-selection.c
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td
Commit 88f04bdbd861cd904d93d107edaa4b7ec0483f70 by ivan.kosarev
[AMDGPU][GFX10] Support base+soffset+offset SMEM loads.

Also makes a step towards resolving
https://github.com/llvm/llvm-project/issues/38652

Reviewed By: foad, dp

Differential Revision: https://reviews.llvm.org/D125117
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
The file was modifiedllvm/lib/Target/AMDGPU/SMInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
The file was modifiedllvm/test/MC/AMDGPU/smem.s
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
The file was modifiedllvm/test/MC/AMDGPU/gfx10_asm_smem.s
Commit c813516ef809494d66f611e4f92569492935ddf9 by npopov
[InstCombine] Add additional freeze tests (NFC)
The file was modifiedllvm/test/Transforms/InstCombine/freeze.ll
Commit 940871dd289c9f92ee32d899d58538c57c76c16d by pklausler
[flang] Enforce limit on rank + corank

Fortran 2018 requires that a compiler allow objects whose rank + corank
is 15, and that's our maximum; detect and diagnose violations.

Differential Revision: https://reviews.llvm.org/D125153
The file was addedflang/test/Semantics/maxrank.f90
The file was modifiedflang/lib/Semantics/check-declarations.cpp
The file was modifiedflang/include/flang/Evaluate/real.h
Commit 7b362ddda9ca53906b0be6fe30c64fd1a910d9d4 by craig.topper
[SCCP] Preserve Name when converting SExt->ZExt.

This makes the output IR more readable since we're doing a one to
one replacement.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D125280
The file was modifiedllvm/lib/Transforms/Scalar/SCCP.cpp
Commit 4b36d9bde7ac48f1dc93e724a8812fddfda68483 by craig.topper
[CVP] Preserve exact name when converting sext->zext and ashr->lshr.

Previously we took the old name and always appended a numberic suffix.
Since we're doing a 1:1 replacement, it's clearer to keep the original
name exactly.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D125281
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
Commit 442c351b2bb1f99a4dc58f66660ce0f282f55b95 by david.green
Revert "[AArch64] Generate AND in place of CSEL for predicated CTTZ"

This reverts commit 7dcd0ea683ed3175bc3ec6aed24901a9d504182e due to
issues reported postcommit with the correctness of truncated cttzs.
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was removedllvm/test/CodeGen/AArch64/fold-csel-cttz-and.ll
Commit 8200e1253f6f300dc70b3457589e99a5a618f2d7 by varconst
[libc++][ranges] Implement `views::drop`.

The view itself has been implemented previously -- this patch only adds
the ability to pipe it.

Also finishes the implementation of [P1739](https://wg21.link/p1739) and
[LWG3407](https://wg21.link/lwg3407).

Differential Revision: https://reviews.llvm.org/D125156
The file was addedlibcxx/test/std/ranges/range.adaptors/range.drop/adaptor.pass.cpp
The file was modifiedlibcxx/test/std/ranges/range.adaptors/range.take/adaptor.pass.cpp
The file was modifiedlibcxx/docs/Status/Cxx20Papers.csv
The file was modifiedlibcxx/docs/Status/Cxx2bIssues.csv
The file was modifiedlibcxx/docs/Status/RangesIssues.csv
The file was modifiedlibcxx/include/__ranges/drop_view.h
The file was modifiedlibcxx/include/__ranges/subrange.h
Commit 814b60509599614ba767cf0afef119cdbb7c4df8 by Krzysztof.Drewniak
[mlir][AMDGPU] Add AMDGPU conversion patterns to ConvertGPUToROCDL

This ensures that attributes such as the index bitwidth propagate
correctly to the AMDGPUToROCDL patterns.

Differential Revision: https://reviews.llvm.org/D125320
The file was modifiedmlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/lib/Conversion/GPUToROCDL/CMakeLists.txt
Commit 7fe0630fcb6d52cb63463669c47f4846f7d9ccbf by kito.cheng
[RISCV] 'K'-extension ordering

This commit adds 'K' to supported extension list (before 'J').
It makes "Zk*" extensions correctly placed before "Zv*" extensions.

Multi-letter "Z*" extensions are first ordered with the most closely
related alphabetical extension category ("IMAF...").  This is represented
in LLVM as `AllStdExts' variable in `llvm/lib/Support/RISCVISAInfo.cpp'.

However, it did not have 'k' making "Zk*" extensions not correctly ordered.

Reviewed By: kito-cheng

Differential Revision: https://reviews.llvm.org/D124340
The file was modifiedllvm/test/MC/RISCV/attribute-arch.s
The file was modifiedllvm/lib/Support/RISCVISAInfo.cpp
Commit 1a02519bc504a12a12ba875db29c9e5901ed9bef by michael.p.rice
[OpenMP] Add mangling support for linear modifiers (ref,uval,val)

Add mangling for linear parameters specified with ref, uval, and val
for 'omp declare simd' vector functions.

Add missing stride for linear this parameters.

Differential Revision: https://reviews.llvm.org/D125269
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/test/OpenMP/declare_simd_codegen.cpp
Commit 3137ca80b9ef99359a4adf77512925c2edc461b9 by kadircet
[clangd] Support for standard inlayHint protocol

- Make clangd's internal representation more aligned with the standard.
  We keep range and extra inlayhint kinds around, but don't serialize
  them on standard version.
- Have custom serialization for extension (ugly, but going to go away).
- Support both versions until clangd-17.
- Don't advertise extension if client has support for standard
  implementation.
- Log a warning at startup about extension being deprecated, if client
  doesn't have support.

Differential Revision: https://reviews.llvm.org/D125228
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.h
The file was modifiedclang-tools-extra/clangd/InlayHints.cpp
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.cpp
The file was modifiedclang-tools-extra/clangd/Protocol.h
The file was modifiedclang-tools-extra/clangd/Protocol.cpp
The file was modifiedclang-tools-extra/clangd/unittests/InlayHintTests.cpp
The file was modifiedclang-tools-extra/clangd/test/initialize-params.test
The file was modifiedclang-tools-extra/clangd/test/inlayHints.test
Commit 75e50f70c6fd461cae915fc4983faf4127a6059f by Matthias Braun
Use update_llc_test_checks for the switch.ll test; add new test

- Change `switch.ll` test to a style suitable for
  `tools/update_llc_test_checks.py`.
- Precommit test for upcoming changes:
  - Add `switch_i8` to `test/CodeGen/X86/switch.ll`.
  - Add `test/CodeGen/X86/switch-phi-const.ll`.

Differential Revision: https://reviews.llvm.org/D124893
The file was modifiedllvm/test/CodeGen/X86/switch.ll
The file was addedllvm/test/CodeGen/X86/switch-phi-const.ll
Commit cd19af74c031f0f538050d00b26bab3fbca07414 by Matthias Braun
Avoid 8 and 16bit switch conditions on x86

This adds a `TargetLoweringBase::getSwitchConditionType` callback to
give targets a chance to control the type used in
`CodeGenPrepare::optimizeSwitchInst`.

Implement callback for X86 to avoid i8 and i16 types where possible as
they often incur extra zero-extensions.

This is NFC for non-X86 targets.

Differential Revision: https://reviews.llvm.org/D124894
The file was modifiedllvm/test/CodeGen/X86/SwitchLowering.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/test/CodeGen/X86/switch-phi-const.ll
The file was modifiedllvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll
The file was modifiedllvm/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
The file was modifiedllvm/test/Transforms/CodeGenPrepare/X86/widen_switch.ll
The file was modifiedllvm/test/CodeGen/X86/conditional-tailcall.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/test/CodeGen/X86/switch.ll
The file was modifiedllvm/test/CodeGen/X86/tail-opts.ll
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.h
Commit f0ea9c9cec7f7b632ef7894ff7b3859269de611b by Matthias Braun
CodeGenPrepare: Replace constant PHI arguments with switch condition value

We often see code like the following after running SCCP:

    switch (x) { case 42: phi(42, ...); }

This tends to produce bad code as we currently materialize the constant
phi-argument in the switch-block. This increases register pressure and
if the pattern repeats for `n` case statements, we end up generating `n`
constant values.

This changes CodeGenPrepare to catch this pattern and revert it back to:

    switch (x) { case 42: phi(x, ...); }

Differential Revision: https://reviews.llvm.org/D124552
The file was modifiedllvm/test/CodeGen/X86/switch-phi-const.ll
The file was modifiedllvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll
The file was addedllvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll
The file was modifiedllvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
Commit ce583b14b2ec37b1c168bb92020680cb452502b3 by Jan Korous
[utils] Avoid hardcoding metadata ids in update_cc_test_checks

Specifically for: !tbaa, !tbaa.struct, !annotation, !srcloc, !nosanitize.

The goal is to avoid test brittleness caused by hardcoded values.

Differential Revision: https://reviews.llvm.org/D123273
The file was addedclang/test/utils/update_cc_test_checks/Inputs/tbaa-struct-id.c
The file was addedclang/test/utils/update_cc_test_checks/annotation-id.test
The file was addedclang/test/utils/update_cc_test_checks/Inputs/tbaa-id.c
The file was addedclang/test/utils/update_cc_test_checks/Inputs/srcloc-id.expected
The file was addedclang/test/utils/update_cc_test_checks/Inputs/tbaa-id.expected
The file was addedclang/test/utils/update_cc_test_checks/Inputs/tbaa-struct-id.expected
The file was addedclang/test/utils/update_cc_test_checks/Inputs/annotation-id.c
The file was addedclang/test/utils/update_cc_test_checks/srcloc-id.test
The file was addedclang/test/utils/update_cc_test_checks/tbaa-id.test
The file was addedclang/test/utils/update_cc_test_checks/Inputs/annotation-id.expected
The file was addedclang/test/utils/update_cc_test_checks/Inputs/nosanitize-id.expected
The file was addedclang/test/utils/update_cc_test_checks/tbaa-struct-id.test
The file was addedclang/test/utils/update_cc_test_checks/nosanitize-id.test
The file was addedclang/test/utils/update_cc_test_checks/Inputs/nosanitize-id.c
The file was addedclang/test/utils/update_cc_test_checks/Inputs/srcloc-id.c
The file was modifiedllvm/utils/UpdateTestChecks/common.py
Commit 045665423e6e893ee168368dab10469c8d3168c5 by jhuber6
[OpenMP] Fix embedding offload code when there is no offloading toolchain

Summary:
We use the `--offload-new-driver` option to enable offload code
embedding. The check for when to do this was flawed and was enabling it
too early in the case of OpenMP, causing a segfault when dereferencing
the offloading toolchain.
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit aca33294de9a062f7ff82d861cb671f443ed78ee by spatel
[InstCombine] add tests for shuffles with FP<->int cast operands; NFC
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle.ll
Commit 0353c2c996c5863463c356de97c9852f9330ed11 by spatel
[InstCombine] fold shuffles with FP<->Int cast operands

shuffle (cast X), (cast Y), Mask --> cast (shuffle X, Y, Mask)

This is similar to a recent transform with fneg ( b331a7ebc1e0 ),
but this is intentionally the most conservative first step to
try to avoid regressions in codegen. There are several
restrictions that could be removed as follow-up enhancements.

Note that a cast with a unary shuffle is currently canonicalized
in the other direction (shuffle after cast - D103038 ). We might
want to invert that to be consistent with this patch.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle.ll
Commit afc9d674fe5a14b95c50a38d8605a159c2460427 by Yaxun.Liu
[CUDA][HIP] support __noinline__ as keyword

CUDA/HIP programs use __noinline__ like a keyword e.g.
__noinline__ void foo() {} since __noinline__ is defined
as a macro __attribute__((noinline)) in CUDA/HIP runtime
header files.

However, gcc and clang supports __attribute__((__noinline__))
the same as __attribute__((noinline)). Some C++ libraries
use __attribute__((__noinline__)) in their header files.
When CUDA/HIP programs include such header files,
clang will emit error about invalid attributes.

This patch fixes this issue by supporting __noinline__ as
a keyword, so that CUDA/HIP runtime could remove
the macro definition.

Reviewed by: Aaron Ballman, Artem Belevich

Differential Revision: https://reviews.llvm.org/D124866
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/include/clang/Basic/Features.def
The file was modifiedclang/lib/Parse/ParseDecl.cpp
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was modifiedclang/include/clang/Basic/TokenKinds.def
The file was modifiedclang/lib/Basic/IdentifierTable.cpp
The file was modifiedclang/include/clang/Parse/Parser.h
The file was addedclang/test/SemaCUDA/noinline.cu
The file was addedclang/test/CodeGenCUDA/noinline.cu
The file was addedclang/test/Lexer/has_feature.cu
The file was modifiedclang/include/clang/Basic/Attr.td
Commit 82c5e302f9e63a3491b5e40aa33771f355791598 by epastor
[llvm-ml] Implement support for MASM's extern directive

The EXTERN keyword defines external symbols in MASM.

Credit goes to epastor@ for implementing most of the logic; I (ayzhao@)
added some bugfixes and tests.

[0]: https://docs.microsoft.com/en-us/cpp/assembler/masm/extern-masm?view=msvc-170

Reviewed By: epastor

Submitted By: epastor

Differential Revision: https://reviews.llvm.org/D125273
The file was addedllvm/test/tools/llvm-ml/extern.asm
The file was addedllvm/test/tools/llvm-ml/extern_errors.asm
The file was modifiedllvm/test/tools/llvm-ml/indirect_branch.asm
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp
Commit 567fd523bf538523f58779e5af9d20c3e48838a2 by ravishankarm
[mlir][SCF] Add utility method to add new yield values to a loop.

The current implementation of `cloneWithNewYields` has a few issues
- It clones the loop body of the original loop to create a new
  loop. This is very expensive.
- It performs `erase` operations which are incompatible when this
  method is called from within a pattern rewrite. All erases need to
  go through `PatternRewriter`.

To address these a new utility method `replaceLoopWithNewYields` is added
which
- moves the operations from the original loop into the new loop.
- replaces all uses of the original loop with the corresponding
  results of the new loop
- use a call back to allow caller to generate the new yield values.
- the original loop is modified to just yield the basic block
  arguments corresponding to the iter_args of the loop. This
  represents a no-op loop. The loop itself is dead (since all its uses
  are replaced), but is not removed. The caller is expected to erase
  the op. Consequently, this method can be called from within a
  `matchAndRewrite` method of a `PatternRewriter`.

The `cloneWithNewYields` could be replaces with
`replaceLoopWithNewYields`, but that seems to trigger a failure during
walks, potentially due to the operations being moved. That is left as
a TODO.

Differential Revision: https://reviews.llvm.org/D125147
The file was modifiedmlir/include/mlir/Dialect/SCF/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/SCF/Utils/Utils.cpp
The file was modifiedmlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
The file was modifiedmlir/test/Transforms/scf-loop-utils.mlir
The file was addedmlir/test/Transforms/scf-replace-with-new-yields.mlir
Commit 1f23211cb1eee2c08713512b1ecc30c78a90dc64 by ravishankarm
[mlir][SCF] Retire `cloneWithNewYields` helper function.

This is now subsumed by `replaceLoopWithNewYields`.

Differential Revision: https://reviews.llvm.org/D125309
The file was modifiedmlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
The file was removedmlir/test/Transforms/scf-loop-utils.mlir
The file was modifiedmlir/include/mlir/Dialect/SCF/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
The file was modifiedmlir/lib/Dialect/SCF/Utils/Utils.cpp
Commit 180a8536cec8e5e13e86863b17982daf95f2038a by Yaxun.Liu
Fix indentation in ReleaseNotes.rst
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 17a73992dd8ba831e47b29b41d5c20292992a810 by flo
[AArch64] Remove redundant f{min,max}nm intrinsics.

The patch extends AArch64TTIImpl::instCombineIntrinsic to simplify
llvm.aarch64.neon.f{min,max}nm(a, a) -> a.

This helps with simplifying code written using the ACLE, e.g.
see https://godbolt.org/z/jYxsoc89c

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D125234
The file was modifiedllvm/test/Transforms/InstCombine/AArch64/neon-min-max-intrinsics.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Commit 7e0802aeb5b9059c580479049e6074f6b97ba5d6 by aeubanks
[BasicAA] Fix order in which we pass MemoryLocations to alias()

D98718 caused the order of Values/MemoryLocations we pass to alias() to
be significant due to storing the offset in the PartialAlias case. But
some callers weren't audited and were still passing swapped arguments,
causing the returned PartialAlias offset to be negative in some
cases. For example, the newly added unittests would return -1
instead of 1.

Fixes #55343, a miscompile.

Reviewed By: asbirlea, nikic

Differential Revision: https://reviews.llvm.org/D125328
The file was modifiedllvm/include/llvm/IR/IRBuilder.h
The file was modifiedllvm/unittests/Analysis/BasicAliasAnalysisTest.cpp
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
Commit 3ff8ee2447eca4d33aa037b2b0782ae24b410d18 by jrbyrnes1989
[NFC] Fix typo

Reviewed By: kerbowa

Differential Revision: https://reviews.llvm.org/D124647
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Commit 508d2b4e13c05388a19173e5bd98ac06b9dd9b98 by erich.keane
[NFC]Add Missing Break in switch that we didn't notice because it was
last.
The file was modifiedclang/lib/AST/ASTStructuralEquivalence.cpp
Commit d84ca05ef7f897fdd51900ea07e3c5344632130a by mingmingl
Enhance peephole optimization.

Differential Revision: https://reviews.llvm.org/D124118
The file was addedllvm/test/CodeGen/X86/peephole-test-after-add.mir
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
Commit b6572ad504753c6c27ba49c2ed595a091c977dcd by erich.keane
[NFC] Add missing 'break' in a switch case
The file was modifiedclang/lib/AST/TypePrinter.cpp
Commit f822db7670d4399bcc90830f23fdb5cec6878c73 by jrbyrnes1989
[AMDGPU] Allow for MFMA Inst Clustering

This patch adds cluster edges between independent MFMA instructions. Additionally, it propogates all predecessors of cluster insts to the root of the cluster(s), and all successors to the leaf(ves) of the cluster(s) -- this is done to remove the possibility that those insts will be interspersed within the cluster.

Reviewed By: kerbowa

Differential Revision: https://reviews.llvm.org/D124678
The file was addedllvm/test/CodeGen/AMDGPU/mfma-cluster-edges.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt
The file was addedllvm/lib/Target/AMDGPU/AMDGPUMFMAClustering.cpp
The file was addedllvm/lib/Target/AMDGPU/AMDGPUMFMAClustering.h
The file was addedllvm/test/CodeGen/AMDGPU/mfma-cluster.mir
Commit a308a557202497495c10355279b5b9975bbee98e by n.james93
[clang-tidy] Fix unintended change left in 12cb540529e
The file was modifiedclang-tools-extra/clang-tidy/readability/SuspiciousCallArgumentCheck.cpp
Commit 3bf643eb12c5e2263fc3b46b2e22964eb91eee17 by Matthias Braun
Update test for changes in f0ea9c9cec7f7b632ef7894ff7b3859269de611b / D124552
The file was modifiedllvm/test/CodeGen/Thumb2/bti-indirect-branches.ll
Commit 63865e1fce624422a526f0de603aa87b7dddb49a by jingham
Add the "sent break" message to the "gdb-remote packets" channel

It was originally only in "gdb-remote process" but it is convenient to
also have it come as part of gdb-remote packets.
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteClientBase.cpp
Commit eadeabbe10f5096b12e488e7bd8e2292429b5e08 by erich.keane
[NFC] Replace not-null and not-isa check with a not-isa_and_nonnull
The file was modifiedclang/lib/Sema/AnalysisBasedWarnings.cpp
Commit 035aee725c9aebc1435a26766e135daff729866e by vporpodas
[SLP][NFC] Precommit a lit test for a followup patch that improves tree reordering for external users.

Differential Revision: https://reviews.llvm.org/D125110
The file was addedllvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
Commit 1555c41abb227e1becf53bfa2ffc3c60a322c546 by mingmingl
Revert "Enhance peephole optimization."

This reverts commit d84ca05ef7f897fdd51900ea07e3c5344632130a.

Will revert, update commit message and re-commit.
The file was removedllvm/test/CodeGen/X86/peephole-test-after-add.mir
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
Commit 0376c0f271398147b3df79ab20ffb2f375e47215 by Jan Korous
Revert "[utils] Avoid hardcoding metadata ids in update_cc_test_checks"

This reverts commit ce583b14b2ec37b1c168bb92020680cb452502b3.
The file was removedclang/test/utils/update_cc_test_checks/Inputs/annotation-id.expected
The file was removedclang/test/utils/update_cc_test_checks/Inputs/tbaa-struct-id.c
The file was removedclang/test/utils/update_cc_test_checks/annotation-id.test
The file was removedclang/test/utils/update_cc_test_checks/Inputs/nosanitize-id.expected
The file was removedclang/test/utils/update_cc_test_checks/Inputs/srcloc-id.expected
The file was removedclang/test/utils/update_cc_test_checks/nosanitize-id.test
The file was removedclang/test/utils/update_cc_test_checks/Inputs/nosanitize-id.c
The file was removedclang/test/utils/update_cc_test_checks/Inputs/tbaa-struct-id.expected
The file was removedclang/test/utils/update_cc_test_checks/Inputs/tbaa-id.c
The file was removedclang/test/utils/update_cc_test_checks/Inputs/srcloc-id.c
The file was removedclang/test/utils/update_cc_test_checks/Inputs/tbaa-id.expected
The file was removedclang/test/utils/update_cc_test_checks/Inputs/annotation-id.c
The file was removedclang/test/utils/update_cc_test_checks/tbaa-id.test
The file was removedclang/test/utils/update_cc_test_checks/srcloc-id.test
The file was modifiedllvm/utils/UpdateTestChecks/common.py
The file was removedclang/test/utils/update_cc_test_checks/tbaa-struct-id.test
Commit 3ffb08844cc484828ba36339b77f849f0e0b7356 by joker.eph
Remove unused variable (fix -Werror build on MSVC)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMFMAClustering.cpp
Commit a0f3ef42b01094b3606eef43ec1d0e79433154ed by llvmgnsyncbot
[gn build] Port f822db7670d4
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Commit 0dbaef61b56f0ef0ab0cf38ea92ffc1f35bee3ff by michael.p.rice
[OpenMP] Fix mangling for linear modifiers with variable stride

This adds support for variable stride with the val, uval, and ref linear
modifiers.  Previously only the no modifer type ls<argno> was supported.

  val  -> Ls<argno>
  uval -> Us<argno>
  ref  -> Rs<argno>

Differential Revision: https://reviews.llvm.org/D125330
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/test/OpenMP/declare_simd_codegen.cpp
Commit 413052310add7737c130767799b524c9bb57439f by preames
[riscv] Minor style cleanup so that code more obviously matches comments [nfc]
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Commit 7731935ffc96db2ceea9638d395439df814b5839 by preames
[riscv] Consolidate logic for SEW/VL operand offset calculations [nfc]
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Commit 71bcead98b2e655031208e5ad0ce89f8971a6343 by vporpodas
[SLP] Make reordering aware of external vectorizable scalar stores.

The current reordering scheme only checks the ordering of in-tree operands.
There are some cases, however, where we need to adjust the ordering based on
the ordering of a future SLP-tree who's instructions are not part of the
current tree, but are external users.

This patch is a simple implementation of this. We keep track of scalar stores
that are users of TreeEntries and if they look profitable to vectorize, then
we keep track of their ordering. During the reordering step we take this new
index order into account. This can remove some shuffles in cases like in the
lit test.

Differential Revision: https://reviews.llvm.org/D125111
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 15bcc36eede13b24470e554dfa932f1fc40dd4ba by thomasraoux
[mlir][gpu] Move async copy ops to NVGPU and add caching hints

Move async copy operations to NVGPU as they only exist on NV target and are
designed to match ptx semantic. This allows us to also add more fine grain
caching hint attribute to the op.
Add hint to bypass L1 and hook it up to NVVM op.

Differential Revision: https://reviews.llvm.org/D125244
The file was modifiedmlir/include/mlir/Dialect/NVGPU/NVGPUDialect.h
The file was modifiedmlir/test/Dialect/GPU/invalid.mlir
The file was modifiedmlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
The file was removedmlir/test/Conversion/NVGPUToNVVM/mma-sync-to-nvvm.mlir
The file was addedmlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUBase.td
The file was modifiedmlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td
The file was modifiedmlir/lib/Conversion/NVGPUToNVVM/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
The file was addedmlir/test/Dialect/NVGPU/invalid.mlir
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/lib/Dialect/NVGPU/IR/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
The file was modifiedmlir/include/mlir/Dialect/NVGPU/NVGPU.td
The file was modifiedmlir/test/Dialect/GPU/ops.mlir
The file was modifiedmlir/test/Dialect/NVGPU/roundtrip.mlir
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUDialect.h
Commit 96e642652b9b7cfe5a50819a217b9994bdc219fd by chiahungduan
[mlir] Print some message for op-printing verification

Before dump, Insetad of switching to generic form silently after
verification failure. Print some debug logs to help identify why an op
may be printed in a different way.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D125136
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
Commit fc58d7a3261dc168fc177e54722b5ade1bb8508b by mingmingl
[Peephole-opt][X86] Enhance peephole opt to see through SUBREG_TO_REG
(following AND) and eliminates redundant TEST instruction.

Differential Revision: https://reviews.llvm.org/D124118
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
The file was addedllvm/test/CodeGen/X86/peephole-test-after-add.mir
Commit 6baaad740a5abb4bfcff022a8114abb4eea66a2d by ndesaulniers
[Bitcode] Include indirect users of BlockAddresses in bitcode

The original fix (commit 23ec5782c3cc) of
https://github.com/llvm/llvm-project/issues/52787 only adds `Function`s
that have `Instruction`s that directly use `BlockAddress`es into the
bitcode (`FUNC_CODE_BLOCKADDR_USERS`).

However, in either @rickyz's original reproducing code:

```
void f(long);

__attribute__((noinline)) static void fun(long x) {
  f(x + 1);
}

void repro(void) {
  fun(({
    label:
      (long)&&label;
  }));
}
```

```
...
define dso_local void @repro() #0 {
entry:
  br label %label

label:                                            ; preds = %entry
  tail call fastcc void @fun()
  ret void
}

define internal fastcc void @fun() unnamed_addr #1 {
entry:
  tail call void @f(i64 add (i64 ptrtoint (i8* blockaddress(@repro, %label) to i64), i64 1)) #3
  ret void
}
...
```

or the xfs and overlayfs in the Linux kernel, `BlockAddress`es (e.g.,
`i8* blockaddress(@repro, %label)`) may first compose `ConstantExpr`s
(e.g., `i64 ptrtoint (i8* blockaddress(@repro, %label) to i64)`) and
then used by `Instruction`s. This case is not handled by the original
fix.

This patch adds *indirect* users of `BlockAddress`es, i.e., the
`Instruction`s using some `Constant`s which further use the
`BlockAddress`es, into the bitcode as well, by doing depth-first
searches.

Fixes: https://github.com/llvm/llvm-project/issues/52787
Fixes: 23ec5782c3cc ("[Bitcode] materialize Functions early when BlockAddress taken")

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D124878
The file was addedllvm/test/Bitcode/blockaddress-aggregate-users.ll
The file was addedllvm/test/Bitcode/blockaddress-globalvalue-users.ll
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was addedllvm/test/Bitcode/blockaddress-expr-users.ll
The file was addedllvm/test/Bitcode/blockaddress-nested-users.ll
Commit c167c0a4dcdb998affb2756ce76903a12f7d8ca5 by ndesaulniers
[BuildLibCalls] infer inreg param attrs from NumRegisterParameters

We're having a hard time booting the ARCH=i386 Linux kernel with clang
after removing -ffreestanding because instcombine was dropping inreg
from callers during libcall simplification, but not the callees defined
in different translation units. This led the callers and callees to have
wildly different calling conventions, which (predictably) blew up at
runtime.

Infer the inreg param attrs on function declarations from the module
metadata "NumRegisterParameters." This allows us to boot the ARCH=i386
Linux kernel (w/ -ffreestanding removed).

Fixes: https://github.com/llvm/llvm-project/issues/53645

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D125285
The file was addedllvm/test/Transforms/InstCombine/simplify-libcalls-inreg.ll
The file was modifiedllvm/lib/Transforms/Utils/BuildLibCalls.cpp
Commit 2cd95504df575d129b0c23327962695d47dc25fd by pklausler
[flang] Allow local variables and function result inquiries in specification expressions

Inquiries into the bounds, size, and length of local variables (and function results)
are acceptable specification expressions.  A recent change allowed them for dummy
arguments that are not OPTIONAL or INTENT(OUT), but didn't address other object
entities.

Differential Revision: https://reviews.llvm.org/D125343
The file was modifiedflang/lib/Evaluate/check-expression.cpp
Commit be17d18ae8e44cb80830268f605104adfff9e313 by fmayer
[HWASan] deflake hwasan_symbolize test more.

Don't fail on corrupted ELF file on indexing. This happens because files
change in the directory from concurrent tests.
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize
Commit de67bc8edb816a0a294f75d166efd745e5c6a465 by fmayer
[HWASan symbolize] Write error to stderr.
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize
Commit 8a63326150ee7e3e67e019ac8fe90fe420cd5162 by yhs
[BPF] Mark FI_ri as isPseudo to avoid assertion during disassembly

When a specific sequence of bytes is present in the file during
disassembly the disassembler fails with the following assertion:

  ...
       0: 18 20 00 00 00 00 00 00 lea
  ... Assertion `idx < size()' failed.
  ...
  llvm::SmallVectorTemplateCommon<...>::operator[](...) ...
  llvm::MCInst::getOperand(unsigned int) ...
  llvm::BPFInstPrinter::printOperand(...) ...
  llvm::BPFInstPrinter::printInstruction() ...
  llvm::BPFInstPrinter::printInst(...) ...
  ...

The byte sequence causing the error is (little endian):

18 20 00 00  00 00 00 00  00 00 00 00  00 00 00 00

The issue could be reproduced using the program bellow:

  test.ir:

  @G = constant
         [16 x i8]
         [i8 u0x18, i8 u0x20, i8 u0x00, i8 u0x00, i8 u0x00, i8 u0x00, i8 u0x00, i8 u0x00,
          i8 u0x00, i8 u0x00, i8 u0x00, i8 u0x00, i8 u0x00, i8 u0x00, i8 u0x00, i8 u0x00],
         section "foo", align 8

Compiled and disassembled as follows:

  cat test.ir | llc -march=bpfel -filetype=obj -o - \
              | llvm-objdump --arch=bpfel --section=foo -d -

This byte sequence corresponds to FI_ri instruction declared in the
BPFInstrInfo.td as follows:

  def FI_ri
      : TYPE_LD_ST<BPF_IMM.Value, BPF_DW.Value,
                   (outs GPR:$dst),
                   (ins MEMri:$addr),
                   "lea\t$dst, $addr",
                   [(set i64:$dst, FIri:$addr)]> {
    // This is a tentative instruction, and will be replaced
    // with MOV_rr and ADD_ri in PEI phase
    let Inst{51-48} = 0;
    let Inst{55-52} = 2;
    let Inst{47-32} = 0;
    let Inst{31-0} = 0;
    let BPFClass = BPF_LD;
  }

Notes:
- First byte (opcode) is formed as follows:
  - BPF_IMM.Value is 0x00
  - BPF_DW.Value  is 0x18
  - BPF_LD        is 0x00
- Second byte (registers) is formed as follows:
  - let Inst{55-52} = 2;
  - let Inst{51-48} = 0;

The FI_ri instruction is always replaced by MOV_rr ADD_ri instructions
pair in the BPFRegisterInfo::eliminateFrameIndex method. Thus, this
instruction should be invisible to disassembler. This patch achieves
this by adding "isPseudo" flag for this instruction.

The bug was found by decompiling of one of the BPF tests from Linux
kernel (llvm-objdump -D tools/testing/selftests/bpf/bpf_iter_sockmap.o)

Differential Revision: https://reviews.llvm.org/D125185
The file was modifiedllvm/lib/Target/BPF/BPFInstrInfo.td
Commit 256a18997e41da94833fe0b90ce85de76eda8a7c by yhs
[BPF] Add a test for making FI_ri as isPseudo

Commit 8a63326150ee ("[BPF] Mark FI_ri as isPseudo to avoid
assertion during disassembly") added isPseudo to FI_ri insn
in BPFInstrInfo.td file. This patch added the missing test file.

Differential Revision: https://reviews.llvm.org/D125185
The file was addedllvm/test/CodeGen/BPF/objdump_fi_ri.ll
Commit 289236d597a228484dfd9607da6889603b9210a8 by Ting.Wang.SH
[PowerPC] Fix PPCISD::STBRX selection issue on A2

Enable FeatureISA2_06 on Power A2 target

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D125203
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was modifiedclang/test/Driver/ppc-isa-features.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/bswap-load-store.ll
Commit 8bef5476de3ec7388ad0c72b26dcc82ac7fd970a by mingmingl
[NFC] Run clang-format on llvm/lib/Target/X86/X86InstroInfo.cpp

Differential Revision: https://reviews.llvm.org/D125345
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
Commit 2ea8f203cd9a6cc7ed756d9322f43ebf8cebf33f by xiang1.zhang
[CodeGen] Fix ConvertNodeToLibcall for STRICT_FPOWI

Reviewed By: PengfeiWang

Differential Revision: https://reviews.llvm.org/D125159
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was addedllvm/test/CodeGen/X86/float-strict-powi-convert.ll
Commit da823382d29d7bf600079a3b4e41736e60c72918 by ashaposhnikov
[Transform][Utils][NFC] Clean up CtorUtils.cpp
The file was modifiedllvm/lib/Transforms/Utils/CtorUtils.cpp
Commit 852f3d9987877e8bd315e3de021ec99e925991b1 by mingmingl
Revert "[NFC] Run clang-format on llvm/lib/Target/X86/X86InstroInfo.cpp"

This reverts commit 8bef5476de3ec7388ad0c72b26dcc82ac7fd970a.

Need to revert, update commit message and reapply.
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
Commit cb22cb2691d0b0d2f7e0183e9049e76dac6e2b9d by mingmingl
[X86] Fix 80 column violation in X86InstrInfo.cpp. NFC

Differential Revision: https://reviews.llvm.org/D125345
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp
Commit d4609ae47d16a8f5ccd761fa1b61cf52505b1a08 by psteinfeld
[flang] Change "bad kind" messages in the runtime to "not yet implemented"

Similar to change D125046.

If a programmer is able to compile and link a program that contains types that
are not yet supported by the runtime, it must be because they're not yet
implemented.

This change will make it easier to find unimplemented code in tests.

Differential Revision: https://reviews.llvm.org/D125267
The file was modifiedflang/runtime/random.cpp
The file was modifiedflang/runtime/transformational.cpp
The file was modifiedflang/runtime/character.cpp
The file was modifiedflang/runtime/tools.cpp
Commit 2509dcd58a0a3dee33ed337b92fd2436d2e342f2 by jacquesguan
[RISCV] Add rvv codegen support for vp.fpext.

This patch adds rvv codegen support for vp.fpext. The lowering of fp_round, vp.fptrunc, fp_extend and vp.fpext share most code so use a common lowering function to handle these four.
And this patch changes the intermediate cast from ISD::FP_EXTEND/ISD::FP_ROUND to the RVV VL version op RISCVISD::FP_EXTEND_VL and RISCVISD::FP_ROUND_VL for scalable vectors.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D123975
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was addedllvm/test/CodeGen/RISCV/rvv/vfpext-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vector-fpext-vp.ll
Commit 4537aae0d57e17c217c192d8977012ba475b130c by yeting.kuo
[RISCV] Make PseudoReadVL have the vtypes of the corresponding VLEFF/VLSEGFF.

The patch make PseudoReadVL have the vtypes of the corresponding VLEFF/VLSEGFF.
It's useful to get the vtypes of locations of PseudoReadVL without finding the
corresponding VLEFF/VLSEGFF.
It could simplify optimizations in RISCVInsertVSETVLI like D123581.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125199
The file was addedllvm/test/CodeGen/RISCV/rvv/vleff-rv32-readvl.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vlseg2ff-rv32-readvl.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/vleff-rv64-readvl.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVMCInstLower.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/vlseg2ff-rv64-readvl.ll
Commit 85285be9c37ad0b6e3dabe82248d8917a6ebd5ec by python3kgae
[DirectX backend] Add pass to lower llvm intrinsic into dxil op function.

A new pass DXILOpLowering was added.
It will scan all llvm intrinsics, create dxil op function if it can map to dxil op function.
Then translate call instructions on the intrinsic into call on dxil op function.
dxil op function will add i32 argument to the begining of args for dxil opcode.
So cannot use setCalledFunction to update the call instruction on intrinsic.

This commit only support sin to start the work.

Reviewed By: kuhar, beanz

Differential Revision: https://reviews.llvm.org/D124805
The file was addedllvm/lib/Target/DirectX/DXILConstants.h
The file was modifiedllvm/lib/Target/DirectX/DirectXTargetMachine.cpp
The file was addedllvm/test/CodeGen/DirectX/sin.ll
The file was modifiedllvm/lib/Target/DirectX/DirectX.h
The file was modifiedllvm/tools/opt/opt.cpp
The file was modifiedllvm/lib/Target/DirectX/CMakeLists.txt
The file was addedllvm/lib/Target/DirectX/DXILOpLowering.cpp
Commit e451d552348bc714614d294e32dfbe7ec2cd4005 by jonas.hahnfeld
[ORC] Fix sorting of contructors by priority

The code was incorrectly sorting by the function address.

Differential Revision: https://reviews.llvm.org/D123311
The file was modifiedllvm/lib/ExecutionEngine/Orc/LLJIT.cpp
The file was modifiedllvm/test/ExecutionEngine/OrcLazy/global-ctors-and-dtors.ll
Commit 764a7f48647210f4a360f74f82432ad276d92716 by david.green
[TypePromotion] Format Type Promotion. NFC

This clang-formats the TypePromotion code, with the only meaningful
change being the removal of a verifyFunction call inside a LLVM_DEBUG,
and the printing of the entire function which can be better handled
via -print-after-all.
The file was modifiedllvm/lib/CodeGen/TypePromotion.cpp
Commit 34b6f206cbab8471abf29739dab981bd8b868a65 by clattner
[AsmParser] Improve error recovery again.

Change the parsing logic to use StringRef instead of lower level
char* logic.  Also, if emitting a diagnostic on the first token
in the file, we make sure to use that position instead of the
very start of the file.

Differential Revision: https://reviews.llvm.org/D125353
The file was modifiedmlir/lib/Parser/Parser.cpp
The file was modifiedmlir/test/IR/invalid.mlir
Commit c1d48b35d88a7eb497c9f9851bfab868228c52dd by fraser
[SelectionDAG][VP] Rename VP sext/zext/trunc ISD opcodes

Rather than VP_SEXT/VP_ZEXT/VP_TRUNC, having
VP_SIGN_EXTEND/VP_ZERO_EXTEND/VP_TRUNCATE better matches their non-VP
counterparts.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D125298
The file was modifiedllvm/include/llvm/IR/VPIntrinsics.def
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit 5feeceddb2b5422dcb555b6d601e35a2d7840707 by david.green
[TypePromotion] Fix sext vs zext in promoted constant

As pointed out in #55342, given non-canonical IR with multiple
constants, we check the second operand in isSafeWrap, but can promote
both with sext. Fix that as suggested by @craig.topper by ensuring we
only extend the second constant if multiple are present.

Fixes #55342

Differential Revision: https://reviews.llvm.org/D125294
The file was modifiedllvm/lib/CodeGen/TypePromotion.cpp
The file was modifiedllvm/test/Transforms/TypePromotion/ARM/icmps.ll
Commit 36c3a9692ecbbad66bb63d1c75b7cc12d04493ad by npopov
[InstCombine] Add additional freeze tests (NFC)
The file was modifiedllvm/test/Transforms/InstCombine/freeze.ll
Commit c1bb4a881efe7d15083fd9a453c82d92ad663878 by npopov
[SCEVExpander] Deduplicate min/max expansion code (NFC)
The file was modifiedllvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
Commit ba7b6f46b37b1926552e96bd102b995f6d36de04 by ty1208chiang
[docs][pp-trace] Remove FileNotFound callback

`FileNotFound` preprocessor callback is removed in D119708.
We should also remove it from the documentation.

Reviewed by: jansvoboda11

Differential Revision: https://reviews.llvm.org/D125258
The file was modifiedclang-tools-extra/docs/pp-trace.rst
Commit b4a5340be55863c0b2d0ebea92188fb42948bcd1 by npopov
[IndVarSimplify] Regenerate test checks (NFC)
The file was modifiedllvm/test/Transforms/IndVarSimplify/pr45835.ll
Commit c2d40f1dfb64816765080ba5fa5c0837dbeee620 by aaupov
[BOLT] Add icp-inline option

Add an option to only peel ICP targets that can be subsequently inlined.
Yet there's no guarantee that they will be inlined.

The mode is independent from the heuristic used to choose ICP targets: by exec
count, mispredictions, or memory profile.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D124900
The file was modifiedbolt/lib/Passes/IndirectCallPromotion.cpp
Commit e79c1962b9d7b0dda9d4481fc79fe55e762d0f5d by flo
[LV] Add opaque pointer test for #55375.
The file was addedllvm/test/Transforms/LoopVectorize/X86/interleave-opaque-pointers.ll
Commit 635b7522112a69a3b50686077e54e06465fcd801 by flo
[VPlan] VPInterleaveRecipe only uses first lane if op not stored.

With opaque pointers, both the stored value and the address can be the
same. Only consider the recipe using the first lane only *if* the
address is not stored.

Fixes #55375.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/interleave-opaque-pointers.ll
Commit 4a58eb9e4e5282df95deff243f4141b35909710c by aaupov
[BOLT][TEST] Remove -gdwarf-4 override from %cflags

As BOLT support for monolithic and split DWARF5 is added, remove DWARF version
override for BOLT tests.

Reviewed By: ayermolo

Differential Revision: https://reviews.llvm.org/D125366
The file was modifiedbolt/test/AArch64/asm-func-debug.test
The file was modifiedbolt/test/lit.cfg.py
The file was modifiedbolt/test/X86/asm-func-debug.test
Commit 786c721c2bbd2e0646e314671e010859550423bf by aaron
Add extension diagnostic for linemarker directives

This adds the -Wgnu-line-marker diagnostic flag, grouped under -Wgnu,
to warn about use of the GNU linemarker preprocessor extension.

Fixes #55067

Differential Revision: https://reviews.llvm.org/D124534
The file was modifiedclang/lib/Lex/PPDirectives.cpp
The file was modifiedclang/test/Preprocessor/line-directive.c
The file was modifiedclang/test/SemaCXX/constexpr-string.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticLexKinds.td
The file was addedclang/test/Preprocessor/line-directive-system-headers.c
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td
Commit c7ba568f40b2d6cbae781223529f63063785b0cf by aaron
Fix test; we now expect a pedantic warning

This fixes:
https://lab.llvm.org/buildbot/#/builders/109/builds/38337
The file was modifiedclang/test/SemaCUDA/noinline.cu
Commit 0035f7154c2a80c58aea6c6dfcac548050e4c5e0 by jhuber6
[CUDA] Create offloading entries when using the new driver

The changes made in D123460 generalized the code generation for OpenMP's
offloading entries. We can use the same scheme to register globals for
CUDA code. This patch adds the code generation to create these
offloading entries when compiling using the new offloading driver mode.
The offloading entries are simple structs that contain the information
necessary to register the global. The struct used is as follows:

```
Type struct __tgt_offload_entry {
  void    *addr;      // Pointer to the offload entry info.
                      // (function or global)
  char    *name;      // Name of the function or global.
  size_t  size;       // Size of the entry info (0 if it a function).
  int32_t flags;
  int32_t reserved;
};
```

Currently CUDA handles RDC code generation by deferring the registration
of globals in the current TU to a callback function containing the
modules ID. Later all the module IDs will be used to register all of the
globals at once. Rather than mimic this, offloading entries allow us to
mimic the way OpenMP registers globals. That is, we create a simple
global struct for each device global to be registered. These are placed
at a special section `cuda_offloading_entires`. Because this section is
a valid C-identifier, the linker will profide a `__start` and `__stop`
pointer that we can use to iterate and register all globals at runtime.

the registration requires a flag variable to indicate which registration
function to use. I have assigned the flags somewhat arbitrarily, but
these use the following values.

Kernel: 0
Variable: 0
Managed: 1
Surface: 2
Texture: 3

Depends on D120272

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D123471
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/CodeGen/CGCUDANV.cpp
The file was modifiedclang/include/clang/Basic/LangOptions.def
The file was modifiedclang/lib/CodeGen/CGCUDARuntime.h
The file was addedclang/test/CodeGenCUDA/offloading-entries.cu
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit e7858a9fab8c11a44868ad4e0572c6c7618b219a by jhuber6
[Cuda] Add initial support for wrapping CUDA images in the new driver.

This patch adds the initial support for wrapping CUDA images. This
requires changing some of the logic for how we bundle images. We now
need to copy the image for all kinds that are active for the
architecture. Then we need to run a separate wrapping job if the Kind is
Cuda. For cuda wrapping we need to use the `fatbinary` program from the
CUDA SDK to bundle all the binaries together. This is then passed to a
new function to perfom the actual module code generation that will be
implemented in a later patch.

Depends on D120273 D123471

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D123810
The file was modifiedclang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
The file was modifiedclang/tools/clang-linker-wrapper/OffloadWrapper.h
The file was modifiedclang/tools/clang-linker-wrapper/OffloadWrapper.cpp
The file was modifiedllvm/include/llvm/Object/OffloadBinary.h
Commit f49d576a882da81292b5730af442fa38899af312 by jhuber6
[CUDA] Add wrapper code generation for registering CUDA images

This patch adds the necessary code generation to create the wrapper code
that registers all the globals in CUDA. We create the necessary
functions and iterate through the list of
`__start_cuda_offloading_entries` to find which globals must be
registered. This is very similar to the code generation done currently
in Clang for non-rdc builds, but here we are registering a fully linked
fatbinary and finding the globals via the above sections.

With this we should be able to fully support basic RDC / LTO building of CUDA
code.

It's also worth noting that this does not include the necessary PTX to JIT the
image, so to use this support the offloading architecture must match the
system's architecture.

Depends on D123810

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D123812
The file was modifiedclang/test/Driver/linker-wrapper-image.c
The file was modifiedclang/tools/clang-linker-wrapper/OffloadWrapper.cpp
The file was modifiedclang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
The file was modifiedclang/test/Driver/linker-wrapper.c
Commit 874b802a6de106308b54df4268397184b209f610 by fraser
[RISCV][NFC] Move variable down closer to its first use
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Commit 27c7e922fe612a728286c78f585ed34dfd11e037 by fraser
[RISCV][NFC] Rename variable to appease code style
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Commit dab5e10ea5dbc2e6314e0e7ce54a9c51fbcb44bd by marek.kurdej+llvm.org
[clang-format] fix nested angle brackets parse inside concept definition

Due to how parseBracedList always stopped on the first closing angle
bracket and was used in parsing angle bracketed expression inside concept
definition, nested brackets inside concepts were parsed incorrectly.

nextToken() call before calling parseBracedList is required because
we were processing opening angle bracket inside parseBracedList second
time leading to incorrect logic after my fix.

Fixes https://github.com/llvm/llvm-project/issues/54943
Fixes https://github.com/llvm/llvm-project/issues/54837

Reviewed By: HazardyKnusperkeks, curdeius

Differential Revision: https://reviews.llvm.org/D123896
The file was modifiedclang/unittests/Format/TokenAnnotatorTest.cpp
The file was modifiedclang/lib/Format/UnwrappedLineParser.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
Commit 06a98328fc7b70756782fafff5ebfbec815cf1f5 by whisperity
[ASTMatchers][NFC] Fix name of matcher in docs and add a missing test
The file was modifiedclang/docs/LibASTMatchersReference.html
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
Commit 400587ba0c8b14537e5b52190ee2fc869f2f9728 by spatel
[InstCombine] improve auto-generated test checks by matching function signature; NFC

Without this, miscompiles go undetected here as shown in D125352.
The file was modifiedllvm/test/Transforms/InstCombine/sub-minmax.ll
Commit f5d45d70a5114c6c93822ba9f8e9e042f881238f by a.bataev
[SLP]Further improvement of the cost model for scalars used in buildvectors.

Further improvement of the cost model for the scalars used in
buildvectors sequences. The main functionality is outlined into
a separate function.
The cost is calculated in the following way:
1. If the Base vector is not undef vector, resizing the very first mask to
have common VF and perform action for 2 input vectors (including non-undef
Base). Other shuffle masks are combined with the resulting after the 1 stage and processed as a shuffle of 2 elements.
2. If the Base is undef vector and have only 1 shuffle mask, perform the
action only for 1 vector with the given mask, if it is not the identity
mask.
3. If > 2 masks are used, perform serie of shuffle actions for 2 vectors,
combing the masks properly between the steps.

The original implementation misses the very first analysis for the Base
vector, so the cost might too optimistic in some cases. But it improves
the cost for the insertelements which are part of the current SLP graph.

Part of D107966.

Differential Revision: https://reviews.llvm.org/D115750
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_scheduling.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/crash_scheduling-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/extracts-with-undefs.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 75bb815231f6967bd5f4e24143141b9fe69d01f8 by matthew.devereau
[AArch64][SVE] Add aarch64_sve_pcs attribute to Clang

Enable function attribute aarch64_sve_pcs at the C level, which correspondes to
aarch64_sve_vector_pcs at the LLVM IR level.

This requirement was created by this addition to the ARM C Language Extension:
https://github.com/ARM-software/acle/pull/194

Differential Revision: https://reviews.llvm.org/D124998
The file was addedclang/test/Sema/aarch64-svepcs.c
The file was modifiedclang/lib/Sema/SemaType.cpp
The file was modifiedclang/tools/libclang/CXType.cpp
The file was modifiedclang/include/clang/Basic/Specifiers.h
The file was addedclang/test/CodeGen/aarch64-svepcs.c
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/lib/CodeGen/CGCall.cpp
The file was modifiedclang/lib/AST/TypePrinter.cpp
The file was modifiedclang/include/clang-c/Index.h
The file was modifiedclang/lib/AST/Type.cpp
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/test/Sema/callingconv.c
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was modifiedclang/include/clang/Basic/Attr.td
The file was modifiedclang/lib/Basic/Targets/AArch64.cpp
Commit 26eb04268f4c9c0e2d4ff5bc53ae90cbb7f6c731 by jhuber6
[Clang] Introduce clang-offload-packager tool to bundle device files

In order to do offloading compilation we need to embed files into the
host and create fatbainaries. Clang uses a special binary format to
bundle several files along with their metadata into a single binary
image. This is currently performed using the `-fembed-offload-binary`
option. However this is not very extensibile since it requires changing
the command flag every time we want to add something and makes optional
arguments difficult. This patch introduces a new tool called
`clang-offload-packager` that behaves similarly to CUDA's `fatbinary`.
This tool takes several input files with metadata and embeds it into a
single image that can then be embedded in the host.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D125165
The file was modifiedclang/lib/Driver/ToolChain.cpp
The file was modifiedclang/test/lit.cfg.py
The file was modifiedclang/tools/CMakeLists.txt
The file was modifiedclang/lib/Driver/Action.cpp
The file was modifiedclang/lib/Driver/Driver.cpp
The file was modifiedclang/test/Driver/openmp-offload-gpu-new.c
The file was addedclang/docs/ClangOffloadPackager.rst
The file was modifiedclang/include/clang/Driver/ToolChain.h
The file was modifiedclang/test/Driver/amdgpu-openmp-toolchain-new.c
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedclang/test/Frontend/embed-object.c
The file was modifiedclang/include/clang/Basic/CodeGenOptions.h
The file was modifiedclang/test/Driver/openmp-offload-infer.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/Driver/cuda-openmp-driver.cu
The file was addedclang/tools/clang-offload-packager/ClangOffloadPackager.cpp
The file was modifiedclang/test/Frontend/embed-object.ll
The file was modifiedclang/lib/Driver/ToolChains/Clang.h
The file was modifiedclang/test/Driver/linker-wrapper.c
The file was addedclang/tools/clang-offload-packager/CMakeLists.txt
The file was modifiedclang/test/Driver/linker-wrapper-image.c
The file was modifiedclang/test/Driver/cuda-phases.cu
The file was modifiedclang/include/clang/Driver/Action.h
Commit 53342c6bcfc6f4e8aa0e7f8bf6ba519736a0e47d by thakis
[gn build] (manually) port 26eb04268f4c (clang-offload-packager)
The file was addedllvm/utils/gn/secondary/clang/tools/clang-offload-packager/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
Commit c631e33f316d891b39c1e01217a7422fdc29ced1 by Louis Dionne
[runtimes] Print the testing configuration in use in libunwind and libc++abi

We do it for libc++, and it's rather useful for debugging e.g. CI.
The file was modifiedlibcxxabi/CMakeLists.txt
The file was modifiedlibunwind/CMakeLists.txt
Commit 248e113e9f6e583ed93e52de621a89d098c6d79e by springerm
[mlir][bufferize][NFC] Move helper functions to BufferizationOptions

Move helper functions for creating allocs/deallocs/memcpys to BufferizationOptions.

Differential Revision: https://reviews.llvm.org/D125375
The file was modifiedmlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
The file was modifiedmlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
The file was modifiedmlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp
The file was modifiedmlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
Commit cc0283a6358b4a97d8340da8d32ba23300ae9889 by preames
[riscv] Prefer to use previous VL for scalar move instructionsK

This patch is an alternative to a piece of D125270. Its direct motivation is to fix a wrong code bug (described below), but somewhat unexpectedly, it also results in a significant code quality improvement for idiomatic fixed length vector patterns.

The existing transform is simply wrong in its current location. We are correct about the fact that the scalar move itself can use the previous vsetvli, but we loose track of the fact that later instructions might depend on the state change represented. That is, the actual value of VL in the register is different than the abstract state thinks it is. Not simply due to precision of modeling, but e.g. the VL register could contain 3 when the abstract state says it is 1. This is annoying hard to demonstrate in practice due to differences in policy flags on the intrinsics, but this is at least a latent wrong code bug.

The code quality benefit comes from the fact we don't need to tie this to explicit vsetvli instructions at all. We can propagate the abstract state, and reduce a) the number of transitions, or b) the cost of those transitions. It turns out we have a bunch of cases - in tests at least - where fixed length AVLs are known non-zero, and we can leave VL unchanged while changing VTYPE.

Differential Revision: https://reviews.llvm.org/D125337
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
Commit 6001bfcedc3102b45878b7883c241b45863d7e2c by npopov
[InstCombine] Freeze other uses of frozen value

If there is a freeze %x, we currently replace all other uses of %x
with freeze %x -- as long as they are dominated by the freeze
instruction. This patch extends this behavior to cases where we
did not originally dominate the use by moving the freeze
instruction directly after the definition of the frozen value.

The motivation can be seen in test @combine_and_after_freezing_uses:
Canonicalizing everything to freeze %x allows folds that are based
on value identity (i.e. same operand occurring in two places) to
trigger. This also covers the case from D125248.

Differential Revision: https://reviews.llvm.org/D125321
The file was modifiedllvm/test/Transforms/InstCombine/freeze.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/test/Transforms/InstCombine/onehot_merge.ll
Commit b049eb1fec926084c0e0d00f5fb057a0669d375e by sunshaoce
[RISCV] Remove some TODOs in tests

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D125289
The file was modifiedllvm/test/CodeGen/RISCV/float-br-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/half-br-fcmp.ll
The file was modifiedllvm/test/MC/RISCV/rvd-aliases-valid.s
The file was modifiedllvm/test/MC/RISCV/rvf-aliases-valid.s
The file was modifiedllvm/test/CodeGen/RISCV/double-br-fcmp.ll
Commit 18ed279a3a4aa830830e5cfee3e3824f91c3ca6c by Joseph.Nash
[AMDGPU] gfx11 subtarget features & early tests

Tablegen definitions for subtarget features and cpp predicate functions to
access the features.
New Sub-TargetProcessors and common latencies.
Simple changes to MIR codegen tests which pass on gfx11 because they have the
same output as previous subtargets or operate on pseudo instructions which
are reused from previous subtargets.

Contributors:
Jay Foad <jay.foad@amd.com>
Petar Avramovic <Petar.Avramovic@amd.com>

Patch 4/N for upstreaming of AMDGPU gfx11 architecture

Depends on D124538

Reviewed By: Petar.Avramovic, foad

Differential Revision: https://reviews.llvm.org/D125261
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-and-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpow.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-local.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-flat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/lower-term-opcodes.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-global.s96.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-flat.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uaddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpowi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp2.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fp-atomic-to-s_denormmode.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-flat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-freeze.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.v2s16.mir
The file was modifiedllvm/lib/Target/AMDGPU/SISchedule.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcmp.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/large-work-group-promote-alloca.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-region.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-local.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-atomic-flat.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s64.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.wavefrontsize.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.s96.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-atomic-local.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
The file was modifiedllvm/lib/Target/AMDGPU/GCNProcessors.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-anyext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir
The file was modifiedllvm/lib/Target/AMDGPU/GCNSubtarget.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-usube.gfx10.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-region.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-uadde.gfx10.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-flat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/scheduler-handle-move-bundle.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptr-add.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-add-global.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/optimize-negated-cond-exec-masking-wave32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.v2s16.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-saddr.mir
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The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
Commit 301fe084bff388a734d284cf4db9cb44f29d99c0 by flo
[ConstraintElimination] Add test where ssub result is not used.

Extra tests for D125264.
The file was modifiedllvm/test/Transforms/ConstraintElimination/ssub-with-overflow.ll
Commit a0a406b2577be6eaa6db6836d254b2bde713a18f by Joseph.Nash
[AMDGPU] gfx11 Decode wider instructions. NFC

Refactor to pass a templatized size parameter to the decoder to allow wider than
64bit decodes in a later patch.

Contributors:
Jay Foad <jay.foad@amd.com>

Depends on D125261

Patch 5/N for upstreaming of AMDGPU gfx11 architecture.

Reviewed By: dp

Differential Revision: https://reviews.llvm.org/D125316
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
Commit 0c7f7f1b01e1bdf3b4b4008d74a1d36e68fda478 by python3kgae
[DirectX backend] Add pass to emit dxil metadata.

A new pass DxilEmitMetadata is added to translate information saved in llvm ir into metadata to match DXIL spec.

Only generate DXIL validator version in this PR.

In llvm ir, validator version is saved in ModuleFlag with "dx.valver" as Key.

  !llvm.module.flags = !{!0, !1}
  !1 = !{i32 6, !"dx.valver", !2}
  !2 = !{i32 1, i32 1}

DXIL validator version has major and minor versions that are specified as named metadata:

  !dx.valver = !{!2}
  !2 = !{i32 1, i32 7}

Reviewed By: kuhar, beanz

Differential Revision: https://reviews.llvm.org/D125158
The file was modifiedllvm/lib/Target/DirectX/CMakeLists.txt
The file was addedllvm/test/CodeGen/DirectX/dxil_ver.ll
The file was modifiedllvm/lib/Target/DirectX/DirectX.h
The file was addedllvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
The file was modifiedllvm/lib/Target/DirectX/DirectXTargetMachine.cpp
Commit e6635377e56e26d9ceef5b6829fef6f46ca33106 by alban.bridonneau
[NFC] Change comment number in aarch64 isel
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit de9ad98d2d6358e6aa773f0bb5258b629bde9389 by Matthias Braun
Fix endless loop in optimizePhiConst with integer constant switch condition

Avoid endless loop in degenerate case with an integer constant as switch
condition as reported in https://reviews.llvm.org/D124552
The file was modifiedllvm/test/Transforms/CodeGenPrepare/X86/switch-phi-const.ll
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
Commit 65860a9f5db1befcbd7dc73059b63b5cbce418f4 by aaron
Fix the Clang sphinx build

This should address:
https://lab.llvm.org/buildbot/#/builders/92/builds/26609
The file was modifiedclang/docs/index.rst
Commit 6b6e796b74622ecf1983e860b1878353048466b4 by gcmn
[Bazel] Add support for s390x build target

While executing the test suite for Tensorflow(v2.8.0), we encountered multiple TC failures with the below error
```
'z14' is not a recognized processor for this target
```
This patch adds the s390x target to the build target list. It fixes TC failures in multiple modules of Tensorflow on s390x arch. It is also tested to have no effect on x86 machines.

Reviewed By: GMNGeoffrey

Differential Revision: https://reviews.llvm.org/D125096
The file was modifiedutils/bazel/llvm-project-overlay/llvm/config.bzl
Commit f933c896d1abe9e0e7854e95023fe389c0e704eb by jhuber6
[OpenMP] Add a check for alignment in the offload packager

Summary:
These sections need to be aligned correctly to be extracted later, add
a check to indicate if they aren't.
The file was modifiedclang/tools/clang-offload-packager/ClangOffloadPackager.cpp
Commit 8cb7a873ab8568acfbfd6c27a927d924cc994017 by aaupov
[BOLT][NFC] Add MCPlus::primeOperands iterator_range

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D125397
The file was modifiedbolt/lib/Passes/AsmDump.cpp
The file was modifiedbolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
The file was modifiedbolt/lib/Core/BinaryFunction.cpp
The file was modifiedbolt/lib/Passes/AllocCombiner.cpp
The file was modifiedbolt/lib/Target/X86/X86MCPlusBuilder.cpp
The file was modifiedbolt/include/bolt/Core/MCPlus.h
The file was modifiedbolt/lib/Passes/RegReAssign.cpp
Commit d428f09b2c9d49f6a328ef636c02305a8be4ab61 by spatel
[InstCombine] freeze operand in urem expansion

As discussed in issue #37809, this transform is not safe
if the input is an undefined value.

There is no difference in codegen on the basic examples,
but this could lead to regressions. We may need to
improve freeze analysis or lowering if that happens.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
The file was modifiedllvm/test/Transforms/InstCombine/vector-urem.ll
The file was modifiedllvm/test/Transforms/InstCombine/rem.ll
Commit 3a26596af3613a2ede294ed017f2c05e48255713 by pklausler
[flang] Fold complex component references

Complex component references (z%RE, z%IM) of complex named constants
should be evaluated at compilation time.

Differential Revision: https://reviews.llvm.org/D125341
The file was modifiedflang/lib/Evaluate/fold-implementation.h
The file was modifiedflang/include/flang/Evaluate/type.h
The file was addedflang/test/Evaluate/fold-re-im.f90
The file was modifiedflang/lib/Evaluate/fold-real.cpp
The file was modifiedflang/include/flang/Evaluate/tools.h
The file was modifiedflang/include/flang/Evaluate/variable.h
The file was modifiedflang/lib/Semantics/expression.cpp
The file was modifiedflang/lib/Evaluate/tools.cpp
Commit 0cc607345fa5c03cda7e1989f91858ce1a1551d4 by mtrofin
[mlgo] Fix test

Updated reference file for dev-mode-logging.ll and expected output.
The file was modifiedllvm/test/CodeGen/MLRegalloc/dev-mode-logging.ll
The file was modifiedllvm/test/CodeGen/MLRegalloc/Inputs/reference-log-noml.txt
Commit d9c1d3cbcb9751a6a82cc5e4ada0533cbbc79a1a by daltenty
[clang][AIX] Don't ignore XCOFF visibility by default

D87451 added -mignore-xcoff-visibility for AIX targets and made it the default (which mimicked the behaviour of the XL 16.1 compiler on AIX).

However, ignoring hidden visibility has unwanted side effects and some libraries depend on visibility to hide non-ABI facing entities from user headers and
reserve the right to change these implementation details based on this (https://libcxx.llvm.org/DesignDocs/VisibilityMacros.html). This forces us to use
internal linkage fallbacks for these cases on AIX and creates an unwanted divergence in implementations on the plaform.

For these reasons, it's preferable to not add -mignore-xcoff-visibility by default, which is what this patch does.

Reviewed By: DiggerLin

Differential Revision: https://reviews.llvm.org/D125141
The file was modifiedclang/test/CodeGen/PowerPC/aix-visibility-inlines-hidden.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/test/CodeGen/PowerPC/aix-ignore-xcoff-visibility.cpp
Commit 987362342597df266df6b5ac871c9ca19b064795 by preames
[riscv] Add tests for vsetvli reuse across iterations of a loop

These variations are chosen to exercise both FRE and PRE cases involving loops which don't change state in the iteration and can thus perform vsetvli in the preheader of the loop only.  At the moment, these are essentially all TODOs.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
Commit d80d812df0c829b6dbbcb968e7c3cf3c6be6ff41 by pklausler
[flang] Fix check for assumed-size arguments to SHAPE() & al.

The predicate that is used to detect an invalid assumed-size argument
to the intrinsic functions SHAPE, SIZE, & LBOUND gives false results
for arguments whose shapes are not calculatable at compilation time.
Replace with an explicit test for an assumed-size array dummy argument
symbol.

Differential Revision: https://reviews.llvm.org/D125342
The file was modifiedflang/lib/Evaluate/intrinsics.cpp
Commit f37e6faf523d237a04b91fa3d736659a6ef8a9c6 by aeubanks
[gn build] Use llvm-ar when clang_base_path is specified

Only applies linux for now.

This prevents warnings with use_thinlto like
  bfd plugin: LLVM gold plugin has failed to create LTO module: Not an int attribute (Producer: 'LLVM15.0.0git' Reader: 'LLVM 13.0.1')

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D125399
The file was modifiedllvm/utils/gn/build/toolchain/BUILD.gn
Commit 72925d98bf928431e430a49a0504bda8d7d0d184 by preames
[riscv] Canonicalize vsetvli (vsetvli avl, vtype1) vtype2 transitionsas reviewed

This patch is an alternative to a piece of D125270. If we have one vsetvli which is using as AVL the output of another, and the prior AVL can be proven to produce the same VL value as that defining one, we can use the AVL from the prior instruction. This has the effect of removing a state transition on AVL, and will let us use the cheaper 'vsetvli x0, x0, vtype1' form or possible even skip emitting it entirely.

This builds on the same infrastructure as D125337, and does the analogous extension to working on abstract states instead of only prior explicit vsetvli instructions. This is where the (relatively minor) code improvements come from.

More importantly, this fixes the last case where the state computed in phase 1 and 2 of the algorithm differs from the state computed during phase 3. Note that such differences can cause miscompiles by creating disagreements about contents of the VL and VTYPE registers at block boundaries.

Doing this transform inside the dataflow can cause the compatibility of a later store to change with regards to the current state. test15 in the diff illustrates this case well. What we have is a vsetvli which is mutated by one following vector op, but whose GPR result is used by another. The compatibility logic walks back to the def in this case, and checks to see if it matches the immediate prior state. In phase 1 and 2, it doesn't, and in phase 3 (after mutation) it does because we remove a transition which caused it to differ.

Differential Revision: https://reviews.llvm.org/D125392
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
Commit 078174278574761edfd557908af59c67aa7b303e by craig.topper
[RISCV] Add a DAG combine to pre-promote (i32 (and (srl X, Y), 1)) with Zbs on RV64.

Type legalization will want to turn (srl X, Y) into RISCVISD::SRLW,
which will prevent us from using a BEXT instruction.

I don't think there is any precedent for type promotion checking
users to decide how to promote. Instead, I've added this DAG combine to
do it before type legalization.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D124109
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbs.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit 5fdfcf489264fea9840fd70536b79cdcd22b1c0d by spatel
[InstCombine] update auto-generated CHECK lines in test file; NFC

These are all cosmetic (value naming) diffs that would distract from
real changes in this file.
The file was modifiedllvm/test/Transforms/InstCombine/div.ll
Commit 99ef341ce9436e0471eb5502a8521fcaddaf851c by spatel
[InstCombine] freeze operand in sdiv expansion

As discussed in issue #37809, this transform is not safe
if the input is an undefined value.

This is similar to a recent change for urem:
d428f09b2c9d

There is no difference in codegen on the basic examples,
but this could lead to regressions. We may need to
improve freeze analysis or lowering if that happens.

Presumably, in real cases that are similar to the tests
where a subsequent transform removes the select, we
will also be able to remove the freeze by seeing that
the parameter has 'noundef'.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
The file was modifiedllvm/test/Transforms/InstCombine/div.ll
Commit 0ebb02b90a47b43e039cb7040cc9fb7dd5ec5fce by craig.topper
[RISCV] Override TargetLowering::shouldProduceAndByConstByHoistingConstFromShiftsLHSOfAnd.

This hook determines if SimplifySetcc transforms (X & (C l>>/<< Y))
==/!= 0 into ((X <</l>> Y) & C) ==/!= 0. Where C is a constant and
X might be a constant.

The default implementation favors doing the transform if X is not
a constant. Otherwise the code is left alone. There is a provision
that if the target supports a bit test instruction then the transform
will favor ((1 << Y) & X) ==/!= 0. RISCV does not say it has a variable
bit test operation.

RISCV with Zbs does have a BEXT instruction that performs (X >> Y) & 1.
Without Zbs, (X >> Y) & 1 still looks preferable to ((1 << Y) & X) since
we can fold use ANDI instead of putting a 1 in a register for SLL.

This patch overrides this hook to favor bit extract patterns and
otherwise falls back to the "do the transform if X is not a constant"
heuristic.

I've added tests where both C and X are constants with both the shl form
and lshr form. I've also added a test for a switch statement that lowers
to a bit test. That was my original motivation for looking at this.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D124639
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/test/CodeGen/RISCV/bittest.ll
Commit 09f48c6b80a44f91cc8acae1406ce4224e0bfe42 by craig.topper
[RISCV] Move implementation of getVLOpNum and getSEWOpNum from RISCVInsertVSETVLI to RISCVBaseInfo.h. NFC

We should consolidate the operand counting and ordering into
RISCVBaseInfo.h and stop spreading it around.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D125344
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
Commit 4dae38ebfba0d8583e52c3ded8f62f5f9fa77fda by python3kgae
[HLSL] add -D option for dxc mode.

Create dxc_D as alias to option D which Define <macro> to <value> (or 1 if <value> omitted).

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D125338
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was addedclang/test/Driver/dxc_D.hlsl
The file was modifiedclang/include/clang/Driver/Options.td
Commit 84db35594953a6f7aff7cbc007f1c5d2fd35b1a9 by Yaxun.Liu
[clang] Fix KEYALL

Update KEYALL to cover KEYCUDA. Introduce KEYMAX and
a generic way to update KEYALL.

Reviewed by: Dan Liew

Differential Revision: https://reviews.llvm.org/D125396
The file was modifiedclang/lib/Basic/IdentifierTable.cpp
Commit f499ec6b3d138e6b5643f5c848c38d61462e063b by craig.topper
[RISCV] Add caching to the gather/scatter to strided load/store conversion.

If we have multiple gather/scatter instructions using the same the
same strided address we would scalarize it multiple times. I guess
a later pass cleans this up, but I don't know if that's guaranteed.

This patch adds a cache to remember the scalarization we already
created for a previous gather/scatter.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D125326
The file was modifiedllvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store.ll
Commit 3ca6328637b3f42096c652e4df53282649956bdb by qwu
[clang][ppc] Creating Seperate Install Target for PPC htm Headers

This patch splits out the htm intrinsic headers from the PPC headers list.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D125386
The file was modifiedclang/lib/Headers/CMakeLists.txt
Commit 2ac3cd20cacdf37135eeb64ad2b7baefb9769e99 by riddleriver
[TableGen] Remove the use of global Record state

This commits removes TableGens reliance on managed static global record state
by moving the RecordContext into the RecordKeeper. The RecordKeeper is now
treated similarly to a (LLVM|MLIR|etc)Context object and is passed to static
construction functions. This is an important step forward in removing TableGens
reliance on global state, and in a followup will allow for users that parse tablegen
to parse multiple tablegen files without worrying about Record lifetime.

Differential Revision: https://reviews.llvm.org/D125276
The file was modifiedllvm/utils/TableGen/SearchableTableEmitter.cpp
The file was modifiedllvm/utils/TableGen/DecoderEmitter.cpp
The file was modifiedllvm/lib/TableGen/Record.cpp
The file was modifiedllvm/utils/TableGen/CodeGenRegisters.cpp
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was removedllvm/lib/TableGen/RecordContext.h
The file was modifiedllvm/utils/TableGen/PseudoLoweringEmitter.cpp
The file was modifiedllvm/utils/TableGen/WebAssemblyDisassemblerEmitter.cpp
The file was modifiedllvm/lib/TableGen/Error.cpp
The file was modifiedllvm/utils/TableGen/CodeGenDAGPatterns.cpp
The file was modifiedllvm/lib/TableGen/Parser.cpp
The file was modifiedllvm/utils/TableGen/CodeGenInstruction.cpp
The file was modifiedllvm/include/llvm/TableGen/Record.h
The file was modifiedllvm/lib/TableGen/TGParser.cpp
Commit 5a9a438a54672915247b70ba293d2e8dfe262570 by riddleriver
[TableGen] Refactor TableGenParseFile to no longer use a callback

Now that TableGen no longer relies on global Record state, we can allow
for the client to own the RecordKeeper and SourceMgr. Given that TableGen
internally still relies on the global llvm::SrcMgr, this method unfortunately
still isn't thread-safe.

Differential Revision: https://reviews.llvm.org/D125277
The file was modifiedllvm/include/llvm/TableGen/Parser.h
The file was modifiedllvm/lib/TableGen/Parser.cpp
The file was modifiedmlir/lib/Tools/PDLL/Parser/Parser.cpp
The file was modifiedllvm/unittests/TableGen/ParserEntryPointTest.cpp
Commit ca81c0f8fca4730d4cf9c950c2b38d10e37d7357 by preames
[test, riscv] Add test illustrating missing handling for fallthrough blocks in 541c9ba
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
Commit edbf390d10b86962774c920cfab089fa1fd1c3f5 by craig.topper
[CodeGenPrepare] Use const reference to avoid unnecessary APInt copy. NFC

Spotted while looking at Matthias' patches.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D124985
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
Commit 08f68dfef6102e7b18116aec30ecb712cedfc2d9 by nikolasklauser
[libc++] Add a few more debug wrapper functions

Reviewed By: ldionne, #libc, jloser

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D125176
The file was modifiedlibcxx/include/unordered_set
The file was modifiedlibcxx/include/unordered_map
The file was modifiedlibcxx/include/vector
The file was modifiedlibcxx/include/__hash_table
The file was modifiedlibcxx/include/__debug
The file was modifiedlibcxx/include/string
The file was modifiedlibcxx/include/list
Commit c095440cafb22f9342fafbbef0b8dee04fc24206 by nikolasklauser
[libc++] Remove __invalidate_all_iterators and replace the uses with std::__debug_db_invalidate_all

Reviewed By: ldionne, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D125188
The file was modifiedlibcxx/include/vector
The file was modifiedlibcxx/include/string
The file was modifiedlibcxx/include/list
Commit 86445e8c63c7a15456149c88b99af03933268c5d by clattner
[AsmParser] Adopt emitWrongTokenError more, improving QoI

This is a full audit of emitError calls, I took the opportunity
to remove extranous parens and fix a couple cases where we'd
generate multiple diagnostics for the same error.

Differential Revision: https://reviews.llvm.org/D125355
The file was modifiedmlir/lib/Parser/LocationParser.cpp
The file was modifiedmlir/test/Dialect/SPIRV/IR/ocl-ops.mlir
The file was modifiedmlir/lib/Parser/AttributeParser.cpp
The file was modifiedmlir/test/Dialect/SPIRV/IR/logical-ops.mlir
The file was modifiedmlir/test/Dialect/SPIRV/IR/glsl-ops.mlir
The file was modifiedmlir/lib/Parser/AffineParser.cpp
The file was modifiedmlir/lib/Parser/TypeParser.cpp
The file was modifiedmlir/test/Dialect/SPIRV/IR/misc-ops.mlir
The file was modifiedmlir/test/IR/invalid.mlir
The file was modifiedmlir/test/IR/invalid-locations.mlir
The file was modifiedmlir/lib/Parser/DialectSymbolParser.cpp
Commit 411b9b8153ee95a51a2b7b3ebdb6fec9a7229f5a by flo
[GVN] Add test case for memdep invalidation bug.

Test case for #30999.
The file was addedllvm/test/Transforms/GVN/condprop-memdep-invalidation.ll
Commit 5c7ec998a916baf8b35d571d0cc11753d464792d by craig.topper
[RISCV] Fold addiw from (add X, (addiw (lui C1, C2))) into load/store address

This is a followup to D124231.

We can fold the ADDIW in this pattern if we can prove that LUI+ADDI
would have produced the same result as LUI+ADDIW.

This pattern occurs because constant materialization prefers LUI+ADDIW
for all simm32 immediates. Only immediates in the range
0x7ffff800-0x7fffffff require an ADDIW. Other simm32 immediates
work with LUI+ADDI.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D124693
The file was modifiedllvm/test/CodeGen/RISCV/mem64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/mem.ll
Commit ed242b54c9c2aa84a47f66af5b8497d93646b68d by craig.topper
[RISCV] Enable subregister liveness tracking for RVV.

RVV makes heavy use of subregisters due to LMUL>1 and segment
load/store tuples. Enabling subregister liveness tracking improves the quality
of the register allocation.

I've added a command line that can be used to turn it off if it causes compile
time or functional issues. I used the command line to keep the old behavior
for one interesting test case that was testing register allocation.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D125108
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVSubtarget.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-interleave.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vector-segN-load.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVSubtarget.h
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insert-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-interleave.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll
Commit 4c4c5511d32612f407d6ed4d53945b565b340a9e by preames
[riscv] Add a bunch of tests exploring switch lowering

Specifically, how we handle zext vs sext around truncates.
The file was addedllvm/test/CodeGen/RISCV/switch-width.ll
Commit 1911843c3126a3cbe13a7fd75146f3fa3e06e133 by flo
[ConstraintElimination] Add extra tests for different overflows.

Additional tests for D125264, inspired by @spatel.
The file was modifiedllvm/test/Transforms/ConstraintElimination/ssub-with-overflow.ll
Commit 2db700215a2eebce7358c0a81a3d52d0a9d4a997 by Austin.Kerbow
[AMDGPU] Add llvm.amdgcn.sched.barrier intrinsic

Adds an intrinsic/builtin that can be used to fine tune scheduler behavior. If
there is a need to have highly optimized codegen and kernel developers have
knowledge of inter-wave runtime behavior which is unknown to the compiler this
builtin can be used to tune scheduling.

This intrinsic creates a barrier between scheduling regions. The immediate
parameter is a mask to determine the types of instructions that should be
prevented from crossing the sched_barrier. In this initial patch, there are only
two variations. A mask of 0 means that no instructions may be scheduled across
the sched_barrier. A mask of 1 means that non-memory, non-side-effect inducing
instructions may cross the sched_barrier.

Note that this intrinsic is only meant to work with the scheduling passes. Any
other transformations that may move code will not be impacted in the ways
described above.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D124700
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-pseudo-machineinstrs.mir
The file was modifiedclang/include/clang/Basic/BuiltinsAMDGPU.def
The file was addedllvm/test/CodeGen/AMDGPU/sched_barrier.mir
The file was modifiedclang/test/SemaOpenCL/builtins-amdgcn-error.cl
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td
The file was modifiedclang/test/CodeGenOpenCL/builtins-amdgcn.cl
The file was addedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.barrier.ll
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUMemoryUtils.cpp
Commit 42a1fb5ca56c494e25419a97057a9526f3e8608d by jhuber6
[LinkerWrapper][Fix} Fix bad alignment from extracted archive members

Summary:
We use embedded binaries to extract offloading device code from the host
fatbinary. This uses a binary format whose necessary alignment is
eight bytes. The alignment is included within the ELF section type so
the data extracted from the ELF should always be aligned at that amount.
However, if this file was extraqcted from a static archive, it was being
sent as an offset in the archive file which did not have the same
alignment guaruntees as the ELF file. This was causing errors in the
UB-sanitizer build as it would occasionally try to access a misaligned
address. To fix this, I simply copy the memory directly to a new buffer
which is guarnteed to have worst-case alignment of 16 in the case that
it's not properly aligned.
The file was modifiedclang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Commit 6055837f6d2941bbc09e44dc88b6a39b934a7453 by python3kgae
Revert "[HLSL] add -D option for dxc mode."

This reverts commit 4dae38ebfba0d8583e52c3ded8f62f5f9fa77fda.

Differential Revision: https://reviews.llvm.org/D125414
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was removedclang/test/Driver/dxc_D.hlsl
Commit 772b0c44a4296a34cbc072c2a7cf294410d07a1a by michael.p.rice
[OpenMP] Fix mangling for linear parameters with negative stride

The 'n' character is used in place of '-' in the mangled name.

Differential Revision: https://reviews.llvm.org/D125406
The file was modifiedclang/test/OpenMP/declare_simd_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
Commit 6398f3f2e9045cb38c73425fcc4dddbfb8933a57 by hans
[clang] Add the flag -ffile-reproducible

When Clang generates the path prefix (i.e. the path of the directory
where the file is) when generating FILE, __builtin_FILE(), and
std::source_location, Clang uses the platform-specific path separator
character of the build environment where Clang _itself_ is built. This
leads to inconsistencies in Chrome builds where Clang running on
non-Windows environments uses the forward slash (/) path separator
while Clang running on Windows builds uses the backslash (\) path
separator. To fix this, we add a flag -ffile-reproducible (and its
inverse, -fno-file-reproducible) to have Clang use the target's
platform-specific file separator character.

Additionally, the existing flags -fmacro-prefix-map and
-ffile-prefix-map now both imply -ffile-reproducible. This can be
overriden by setting -fno-file-reproducible.

[0]: https://crbug.com/1310767

Differential revision: https://reviews.llvm.org/D122766
The file was modifiedclang/lib/Lex/PPMacroExpansion.cpp
The file was modifiedclang/lib/Basic/LangOptions.cpp
The file was modifiedclang/test/CodeGenCXX/builtin-source-location.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/Preprocessor/file_test.c
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/include/clang/Lex/Preprocessor.h
The file was modifiedclang/include/clang/Basic/LangOptions.h
The file was modifiedclang/test/Preprocessor/file_test_windows.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit 52af5df8aef737b5b609912ea28f79fcb3d9ba22 by Yuanfang Chen
[Driver][test] run one test in darwin-dsymutil.c for Darwin only
The file was modifiedclang/test/Driver/darwin-dsymutil.c
Commit 8016a0e5a56b8afc0f328412adae97369c71af78 by aeubanks
Explicitly add -target for Windows builds in file_test_windows.c

It turns out that the llvm buildbots run the test with
-DLLVM_DEFAULT_TARGET_TRIPLE=x86_64-scei-ps4, which would cause this
test to fail as the test assumed that the default target is Windows. To
fix this, we explicitly set -target for the Windows testcases.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D125425
The file was modifiedclang/test/Preprocessor/file_test_windows.c
Commit c2a7904aba465fcaf13bbe2a5772cdeeb88060e5 by aeubanks
Revert "[SLP] Make reordering aware of external vectorizable scalar stores."

This reverts commit 71bcead98b2e655031208e5ad0ce89f8971a6343.

Causes crashes, see comments in D125111.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit ba1c70c69db853485c3f286f470a2efc9a4b7fea by simon.dardis
[MIPS] Remove an incorrect microMIPS instruction alias

The microMIPS instruction set is compatible with the MIPS instruction
set at the assembly level but not in terms of encodings. `nop` in
microMIPS is a special case as it has the same encoding as `nop` for
MIPS.

Fix this error by reducing the usage of NOP in the MIPS backend such
that only that ISA correct variants are produced.

Differential Revision: https://reviews.llvm.org/D124716
The file was modifiedllvm/test/CodeGen/Mips/longbranch/branch-limits-int-microMIPS.mir
The file was modifiedllvm/lib/Target/Mips/MipsInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mips.mir
The file was modifiedllvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts.mir
The file was modifiedllvm/test/CodeGen/Mips/longbranch/branch-limits-msa.mir
The file was modifiedllvm/test/CodeGen/Mips/delay-slot-filler-bundled-insts-def-use.mir
The file was modifiedllvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64r6.mir
The file was modifiedllvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
The file was modifiedllvm/test/CodeGen/Mips/longbranch/branch-limits-fp-mipsr6.mir
The file was modifiedllvm/lib/Target/Mips/MipsBranchExpansion.cpp
The file was modifiedllvm/test/CodeGen/Mips/longbranch/branch-limits-int.mir
The file was modifiedllvm/lib/Target/Mips/MicroMipsInstrInfo.td
The file was modifiedllvm/lib/Target/Mips/MipsInstrInfo.h
The file was modifiedllvm/test/CodeGen/Mips/longbranch/branch-limits-int-mips64.mir
The file was modifiedllvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
The file was modifiedllvm/test/CodeGen/Mips/longbranch/branch-limits-fp-micromips.mir
Commit 91d5bfdb7996b353097c886128fc984e310f7122 by gclayton
Add "indexedVariables" to variables with lots of children.

Prior to this fix if we have a really large array or collection class, we would end up always creating all of the child variables for an array or collection class. If the number of children was very high this can cause delays when expanding variables. By adding the "indexedVariables" to variables with lots of children, we can keep good performance in the variables view at all times. This patch will add the "indexedVariables" key/value pair to any "Variable" JSON dictionairies when we have an array of synthetic child provider that will create more than 100 children.

We have to be careful to not call "uint32_t SBValue::GetNumChildren()" on any lldb::SBValue that we use because it can cause a class, struct or union to complete the type in order to be able to properly tell us how many children it has and this can be expensive if you have a lot of variables. By default LLDB won't need to complete a type if we have variables that are classes, structs or unions unless the user expands the variable in the variable view. So we try to only get the GetNumChildren() when we have an array, as this is a cheap operation, or a synthetic child provider, most of which are for showing collections that typically fall into this category. We add a variable reference, which indicates that something can be expanded, when the function "bool SBValue::MightHaveChildren()" is true as this call doesn't need to complete the type in order to return true. This way if no one ever expands class variables, we don't need to complete the type.

Differential Revision: https://reviews.llvm.org/D125347
The file was modifiedlldb/test/API/tools/lldb-vscode/variables/TestVSCode_variables.py
The file was modifiedlldb/tools/lldb-vscode/JSONUtils.cpp
The file was modifiedlldb/test/API/tools/lldb-vscode/variables/main.cpp
Commit d63c5a38fe0d06148a5881e3c51472f50d9a397b by aaupov
[BOLT][NFC] Use BitVector::set_bits

Refactor and use `set_bits` BitVector interface.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D125374
The file was modifiedbolt/lib/Passes/RegReAssign.cpp
The file was modifiedbolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
The file was modifiedbolt/lib/Passes/StokeInfo.cpp
The file was modifiedbolt/lib/Passes/DataflowAnalysis.cpp
The file was modifiedbolt/include/bolt/Passes/ReorderUtils.h
The file was modifiedbolt/lib/Passes/ShrinkWrapping.cpp
Commit 0950d4060cd916a1d08da657db2513d2ce3e38fa by vporpodas
Recommit "[SLP] Make reordering aware of external vectorizable scalar stores."

This reverts commit c2a7904aba465fcaf13bbe2a5772cdeeb88060e5.

Original code review: https://reviews.llvm.org/D125111
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
Commit d64bad8ff12611a3c79420a895df19c23fe86ae0 by keithbsmiley
[lld/macho] Fixes the -ObjC flag

When checking the segment name for Swift symbols, we should be checking that they start with `__swift` instead of checking for equality

Fixes the issue https://github.com/llvm/llvm-project/issues/55355

Reviewed By: #lld-macho, keith, thevinster

Differential Revision: https://reviews.llvm.org/D125250
The file was modifiedlld/MachO/ObjC.cpp
The file was modifiedlld/test/MachO/objc.s
Commit 9519dacab7b8afd537811fc2abaceb4d14f4e16a by daltenty
Revert "[NFC][tests][AIX] XFAIL test for lack of visibility support"

This reverts commit f5a9b5cc12658f4d6caa3e0cfc3e771698fb3798 since
https://reviews.llvm.org/D125141 has resolved the test issue.
The file was modifiedclang/test/OpenMP/target_update_messages.cpp
Commit 24532d05f8da67058c41ea4ad885c96ee918aa57 by luweining
[LoongArch] Check msb is not less than lsb for the bstr{ins/pick}.{w/d} instructions

Differential Revision: https://reviews.llvm.org/D124825