Changes

[MachineSink] replace MachineLoop with MachineCycle

MachineCycle can handle irreducible loop. Natural loop
analysis (MachineLoop) can not return correct loop depth if
the loop is irreducible loop. And MachineSink is sensitive
to the loop depth, see MachineSinking::isProfitableToSinkTo().

This patch tries to use MachineCycle so that we can handle
irreducible loop better.

Reviewed By: sameerds, MatzeB

Differential Revision: https://reviews.llvm.org/D123995

[X86][AMX] Multiple configure for AMX register.

The previous solution depends on variable name to record the shape
information. However it is not reliable, because in release build
compiler would not set the variable name. It can be accomplished with an
additional option `fno-discard-value-names`, but it is not acceptable
for users.
This patch is to preconfigure the tile register with machine
instruction. It follow the same way what sigle configure does. In the
future we can fall back to multiple configure when single configure
fails due to the shape dependency issue.
The algorithm to configure the tile register is simple in the patch. We
may improve it in the future. It configure tile register based on basic
block. Compiler would spill the tile register if it live out the basic
block. After the configure there should be no spill across tile
confgiure in the register alloction. Just like fast register allocation
the algorithm walk the instruction in reverse order. When the shape
dependency doesn't meet, it insert ldtilecfg after the last instruction
that define the shape.
In post configuration compiler also walk the basic block to collect the
physical tile register number and generate instruction to fill the stack
slot for the correponding shape information.
TODO: There is some following work in D125602. The risk is modifying the
fast RA may cause regression as fast RA is usded for different targets.
We may create an independent RA for tile register.

Differential Revision: https://reviews.llvm.org/D125075

[gn build] Port 496156ac57da

[RISCV] Fix RVV stack frame alignment bugs

This patch addresses several alignment issues in the stack frame when
RVV objects are taken into account.

One bug is that the RVV stack was never guaranteed to keep the alignment
of the stack *as a whole*. We must maintain a 16-byte aligned stack at
all times, especially when calling other functions. With the standard V
extension, this is conveniently happening since VLEN is at least 128 and
always 16-byte aligned. However, we support Zvl64b which does not
guarantee this. To fix this, the RVV stack size is rounded up to be
aligned to 16 bytes. This in practice generally makes us allocate a
stack sized at least 2*VLEN in size, and a multiple of 2.

    |------------------------------| -- <-- FP
    | 8-byte callee-save           | |      |
    |------------------------------| |      |
    | one VLENB-sized RVV object   | |      |
    |------------------------------| |      |
    | 8-byte local variable        | |      |
    |------------------------------| -- <-- SP (must be aligned to 16)

In the example above, with Zvl64b we are decrementing SP by 12 bytes
which does not leave SP correctly aligned. We therefore introduce an
extra VLENB-sized amount used for alignment. This would therefore ensure
the total stack size was 16 bytes (48 for Zvl128b, 80 for Zvl256b, etc):

    |------------------------------| -- <-- FP
    | 8-byte callee-save           | |      |
    |------------------------------| |      |
    | one VLENB-sized padding obj  | |      |
    | one VLENB-sized RVV object   | |      |
    |------------------------------| |      |
    | 8-byte local variable        | |      |
    |------------------------------| -- <-- SP

A new RVV invariant has been introduced in this patch, which is that the
base of the RVV stack itself is now always aligned to 16 bytes, not 8 as
before. This keeps us more in line with the scalar stack and should be
easier to reason about. The calculation of the RVV padding has thus
changed to be the amount required to align the scalar local variable
section to the RVV section's alignment. This amount is further rounded
up when setting up the initial stack to keep everything aligned:

    |------------------------------| -- <-- FP
    | 8-byte callee-save           |
    |------------------------------|
    |                              |
    | RVV objects                  |
    | (aligned to at least 16)     |
    |                              |
    |------------------------------|
    | RVV padding of 8 bytes       |
    |------------------------------|
    | 8-byte local variable        |
    |------------------------------| -- <-- SP

In the example above, it's clear that we need 8 bytes of padding to keep
the RVV section aligned to 16 when using SP. But to keep SP *itself*
aligned to 16 we can't decrement the initial stack pointer by 24 - we
have to round up to 32.

With the RVV section correctly aligned, the second bug fixed by
this patch is that RVV objects themselves are now correctly aligned. We
were previously only guaranteeing an alignment of 8 bytes, even if they
required a higher alignment. This is relatively simple and in practice
we see more rounding up of VLEN amounts to account for alignment in
between objects:

    |------------------------------|
    | RVV object (aligned to 16)   |
    |------------------------------|
    | no padding necessary         |
    |------------------------------|
    | 2*VLENB RVV object (align 16)|
    |------------------------------|
    | VLENB alignment padding      |
    |------------------------------|
    | RVV object (align 32)        |
    |------------------------------|
    | 3*VLENB alignment padding    |
    |------------------------------|
    | VLENB RVV object (align 32)  |
    |------------------------------| -- <-- base of RVV section

Note that a lot of the regressions in codegen owing to the new alignment
rules are correct but actually only strictly necessary for Zvl64b (and
Zvl32b but that's not really supported). I plan a follow-up patch to
take the known VLEN into account when padding for alignment.

Reviewed By: StephenFan

Differential Revision: https://reviews.llvm.org/D125787

[RISCV] Ensure the entire stack is aligned to the RVV stack alignment

This patch fixes another bug in the RVV frame lowering. While some frame
objects with non-default stack IDs (such scalable-vector alloca
instructions) are considered in the target-independent max alignment
calculations, others (for example, during calling-convention lowering)
are not. This means we'd occasionally align the base of the stack to
only 16 bytes, with no way to ensure that the RVV section contained
within that is aligned to anything higher.

Reviewed By: StephenFan

Differential Revision: https://reviews.llvm.org/D125973

[LegalizeTypes][VP] Fix OpNo in WidenVecOp_VP_SCATTER

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D126276

[LoopUnroll] Freeze tripcount rather than condition

This is a followup to D125754. We introduce two branches, one
before the unrolled loop and one before the epilogue (and similar
for the prologue case). The previous patch only froze the
condition on the first branch.

Rather than independently freezing the second condition, this patch
instead freezes TripCount and bases BECount on it. These are the
two quantities involved in the conditions, and this ensures that
both work on a consistent, non-poisonous trip count.

Differential Revision: https://reviews.llvm.org/D125896

llvm-reduce: improve basic-blocks removal pass

When the single branch target of a block has been removed try updating
it to target a  block that is kept (by scanning forward in the sequence)
instead of replacing the branch with a return instruction. Doing so
reduces the risk of breaking loop structures meaning that when the loop
is 'interesting' these reductions should have more blocks eliminated.

Differential Revision: https://reviews.llvm.org/D125766

[InstCombine] Use different icmp pattern in test (NFC)

Use an and/or of icmp pattern that produces different code
depending on whether it is part of a logical or bitwise and/or.

[InstCombine] Handle logical and/or in recursive and/or of icmps fold

The and/or of icmps fold is also applied in reassociated form.
However, this currently only happens for bitwise and of bitwise
and, but not for bitwise and of logical and (or other combinations,
but this is the one being addressed here).

We can do this for bitwise+logical combinations as well, but need
to be a bit careful about which of the resulting ands are logical:
https://alive2.llvm.org/ce/z/WYSjGh
https://alive2.llvm.org/ce/z/guxYnz
https://alive2.llvm.org/ce/z/S5SYxY
https://alive2.llvm.org/ce/z/2rAWeW

[libc++] type_traits: use __is_core_convertible in __invokable_r.

This fixes incorrect handling of non-moveable types, adding tests for this case.
See [issue 55346](https://github.com/llvm/llvm-project/issues/55346).

The current implementation is based on is_convertible, which is
[defined](https://timsong-cpp.github.io/cppwp/n4659/meta.rel#5) in terms of
validity of the following function:

```
To test() {
  return declval<From>();
}
```

But this doesn't work if To and From are both some non-moveable type, which the
[definition](https://timsong-cpp.github.io/cppwp/n4659/conv#3) of implicit
conversions says should work due to guaranteed copy elision:

```
To to = E;  // E has type From
```

It is this latter definition that is used in the
[definition](https://timsong-cpp.github.io/cppwp/n4659/function.objects#func.require-2)
of INVOKE<R>. Make __invokable_r use __is_core_convertible, which
captures the ability to use guaranteed copy elision, making the
definition correct for non-moveable types.

Fixes llvm/llvm-project#55346.

Reviewed By: #libc, philnik, EricWF

Spies: EricWF, jloser, ldionne, philnik, libcxx-commits

Differential Revision: https://reviews.llvm.org/D125300

[LegalizeTypes][NFC] Fix node name in assertion message

This was probably copy/pasted from the MSCATTER widening.

[libc++] Replace modulus operations in std::seed_seq::generate with conditional checks.

Abseil benchmarks suggest that the conditional checks result in faster code (4-5x)
as they are compiled into conditional move instructions (cmov on x86).

Reviewed By: #libc, philnik, Mordante

Spies: pengfei, Mordante, philnik, libcxx-commits

Differential Revision: https://reviews.llvm.org/D125329

[libc++] Implement ranges::reverse

Reviewed By: var-const, #libc

Spies: libcxx-commits, mgorny

Differential Revision: https://reviews.llvm.org/D125752

[gn build] Port 1d1a191edcfa

[InstCombine] Add splat vector test for asymmetric masked icmp fold
(NFC)

[InstCombine] Use m_APInt() in asymmetric masked icmp fold

This is mostly intended as code cleanup, but it does also add
support for splat vectors to this fold.

[InstCombine] Add tests for masked icmps with bitwise+logical and (NFC)

[InstCombine] Support logical and in masked icmp fold

Most of the folds implemented in this function work fine with
logical operations. We only need to be careful for the cases that
work on non-constant masks, where the RHS operand shouldn't be
poison.

This is a conservative implementation that bails out of illegal
transforms, but we could also change these to insert freeze instead.

[RISCV][NFC] Change interface of RVVIntrinsic::getSuffixStr

This NFC patch is splited from D111617.

Using llvm::ArrayRef rather than llvm::SmallVector, ArrayRef is more generic
interface that could accept both llvm::ArrayRef and llvm::SmallVector.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D125893

[TableGen] Remove code beads

Code beads is useless since the only user, M68k, has moved on to
a new encoding/decoding infrastructure.

[X86] Add test showing failure to expand <2 x float> fpow without widening to <4 x float>

Similar to D125988 (and I have a pending follow up patch to handle fpow).

[X86][AMX] Reduce the compiling time for non-amx code.

Differential Revision: https://reviews.llvm.org/D126280

[Test] Add LICM test for PR55672 showing problem with freeze instruction

Fix comment in test. NFC

[OpenCL] Make -cl-ext a driver option.

For generic targets such as SPIR-V clang sets all OpenCL
extensions/features as supported by default. However
concrete targets are unlikely to support all extensions
features, which creates a problem when such generic SPIR-V
binary is compiled for a specific target later on.

To allow compile time diagnostics for unsupported features
this flag is now being exposed in the clang driver.

Differential Revision: https://reviews.llvm.org/D125243

[X86] scalar_widen_div.ll - remove non-generated CHECKs

These were left over from when we converted to the update_llc_test_checks script and were just matching some asm/cfi directives - we have CHECK-LABEL to do this properly now.

Minutes for security group sync-ups have moved to Discourse.

[Clang][CodeGen] Fix the cmse-clear-return.c test.

Caught with D125604.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D126191

Revert "[TableGen] Remove code beads"

It is breaking the build with:

/build/llvm-toolchain-snapshot-15~++20220524114008+96323c9f4c10/llvm/lib/Target/M68k/MCTargetDesc/M68kMCCodeEmitter.cpp:478:10: fatal error: 'M68kGenMCCodeBeads.inc' file not found
         ^~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.

Remove the #include causes:
error: undefined reference to 'llvm::M68k::getMCInstrBeads(unsigned int)'

This reverts commit f50be3d21808ae113c40a68a9ac6581f203d92d2.

[x86][DAG] Unroll vectorized FREMs that will become libcalls

Currently, two element vectors produced as the result of a binary op are
widened to four element vectors on x86 by
DAGTypeLegalizer::WidenVecRes_BinaryCanTrap. If the op still isn't legal
after widening it is unrolled into 4 scalar ops in SelectionDAG before
being converted into a libcall. This way we end up with 4 libcalls (two of
them on known undef elements) instead of the original two libcalls.

This patch modifies DAGTypeLegalizer::WidenVectorResult to ensure that if
it is known that a binary op will be tunred into a libcall, it is unrolled
instead of being widened. This prevents the creation of the extra scalar
instructions on known undef elements and (eventually) libacalls with known
undef parameters which would otherwise be created when the op gets expanded
post widening.

Differential Revision: https://reviews.llvm.org/D125988

[SLP][NFC]Make isFirstInsertElement a weak strict ordering comparator.

To be used correctly in a sort-like function, isFirstInsertElement
function must follow weak strict ordering rule, i.e.
isFirstInsertElement(IE1, IE1) should return false.

[OpenMP] Add `-Xoffload-linker` to forward input to the device linker

We use the clang-linker-wrapper to perform device linking of embedded
offloading object files. This is done by generating those jobs inside of
the linker-wrapper itself. This patch adds an argument in Clang and the
linker-wrapper that allows users to forward input to the device linking
phase. This can either be done for every device linker, or for a
specific target triple. We use the `-Xoffload-linker <arg>` and the
`-Xoffload-linker-<triple> <arg>` syntax to accomplish this.

Reviewed By: markdewing, tra

Differential Revision: https://reviews.llvm.org/D126226

[pseudo] (trivial) bracket-matching

Error-tolerant bracket matching enables our error-tolerant parsing strategies.
The implementation here is *not* yet error tolerant: this patch sets up the APIs
and plumbing, and describes the planned approach.

Differential Revision: https://reviews.llvm.org/D125911

[InstCombine] Add tests for freeze of load with metadata (NFC)

[InstCombine] Use IRBuilder in freeze pushing transform (PR55619)

Use IRBuilder so that the newly created freeze instructions
automatically gets inserted back into the IC worklist.

The changed worklist processing order leads to some cosmetic
differences in tests.

Fixes https://github.com/llvm/llvm-project/issues/55619.

[libc++] Rename the generic-singlethreaded CI job to generic-no-threads for consistency

[InstCombine] Add test for GEP difference with bitcasts (NFC)

[InstCombine] Strip bitcasts in GEP diff fold

Bitcasts were stripped in one case, but not the other. Of course,
this no longer really matters with opaque pointers, but as I went
through the trouble of tracking this down, we may as well remove
one typed vs opaque pointer optimization discrepancy.

[AMDGPU][MC][GFX11] Support base+soffset+offset SMEM loads.

Reviewed By: dp

Differential Revision: https://reviews.llvm.org/D126207

[CostModel][X86] getScalarizationOverhead - improve extraction costs for > 128-bit vectors

We were using the default getScalarizationOverhead expansion for extraction costs, which adds up all the individual element extraction costs.

This is fine for 128-bit vectors, but for 256/512-bit vectors each element extraction also has to account for extracting the upper 128-bit subvector extraction before it can handle the element. For scalarization costs we only need to extract each demanded subvector once.

Differential Revision: https://reviews.llvm.org/D125527

[mlir][vector] Add new lowering mode to vector.contractionOp

Add lowering for cases where the reduction dimension is fully unrolled.
It is common to unroll the reduction dimension, therefore we would want
to lower the contractions to an elementwise vector op in this case.

Differential Revision: https://reviews.llvm.org/D126120

[TypePromotion] Avoid unnecessary trunc zext pairs

Any zext 'sink' should already have an operand that is in the legal
value, so avoid using a trunc and just use the trunc operand instead.

Differential Revision: https://reviews.llvm.org/D118905

[libcxx] Add sort.bench.cpp to libcxx/benchmarks/CMakeLists.txt

It was forgotten in D124740.

Differential revision: https://reviews.llvm.org/D126297

[DAG] Unroll vectorized FPOW instructions before widening that will scalarize to libcalls anyway

Followup to D125988 - FPOW is similar to FREM and will most likely scalarize to libcalls, so unroll before widening to prevent use making additional libcalls with UNDEF args.

Fix behavior of is_fp_class on empty class set

The second argument to is_fp_class specifies the set of floating-point
class to test against. It can be zero, in this case the intrinsic is
expected to return zero value.

Differential Revision: https://reviews.llvm.org/D112025

[flang][runtime] Clean up asynchronous I/O APIs

Now that the requirements and implementation of asynchronous I/O are
better understood, adjust their I/O runtime APIs.  In particular:
1) Remove the BeginAsynchronousOutput/Input APIs; they're not needed,
   since any data transfer statement might have ASYNCHRONOUS= and
   (if ASYNCHRONOUS='YES') ID= control list specifiers that need to
   at least be checked.
2) Add implementations for BeginWait(All) to check for the error
   case of a bad unit number and nonzero ID=.
3) Rearrange and comment SetAsynchronous so that it's clear that
   it can be called for READ/WRITE as well as for OPEN.

The implementation remains completely synchronous, but should be conforming.
Where opportunities make sense for true asynchronous implementations of
some big block transfers without SIZE= in the future, we'll need to add
a GetAsynchronousId API to capture ID= on a READ or WRITE; add sourceFile
and sourceLine arguments to BeginWait(All) for good error reporting;
track pending operations in unit.h; and add code to force synchronization
to non-asynchronous I/O operations.

Lowering should call SetAsynchronous when ASYNCHRONOUS= appears as
a control list specifier.  It should also set ID=x variables to 0
until such time as we support asynchronous operations, if ever.
This patch only removes the removed APIs from lowering.

Differential Revision: https://reviews.llvm.org/D126143

[mlir] Breakdown diagnostic string literals

This commit breaks down diagnostic string literals so that the attribute
name and enumurator names can be shared with the stringify utility
function and the "expected ", " to be one of ", and ", " can be shared
between different enum-related diagnostic.

Differential Revision: https://reviews.llvm.org/D125938

[mlir] Rename mlir::SmallVector -> llvm::SmallVector

[libc++][NFC] Move definitions around in string.cpp to reduce _LIBCPP_HAS_NO_WIDE_CHARACTERS blocks

[libc++][NFC] Whitespace refactoring of string.cpp for consistency and legibility

[gn build] (semi-automatically) port 0360b9f1599b

[Clang] Avoid misleading 'conflicting types' diagnostic with no-prototype decls.

Clang has recently started diagnosing prototype redeclaration errors like [rG385e7df33046](https://reviews.llvm.org/rG385e7df33046d7292612ee1e3ac00a59d8bc0441)

This flagged legitimate issues in a codebase but was confusing to resolve because it actually conflicted with a function declaration from a system header and not from the one emitted with "note: ".

This patch updates the error handling to use the canonical declaration's source location instead to avoid misleading errors like the one described.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D126258

[flang] Extension: Accept Hollerith actual arguments as if they were BOZ

When a Hollerith (or short character) literal is presented as an actual
argument that corresponds to a dummy argument for which a BOZ literal
would be acceptable, treat the Hollerith as if it had been a BOZ
literal in the same way -- and with the same code -- as f18 already
does for the similar extension in DATA statements.

Differential Revision: https://reviews.llvm.org/D126144

[gn build] Reformat all build files

Ran:

    git ls-files '*.gn' '*.gni' | xargs llvm/utils/gn/gn.py format

[RISCV] Add test cases showing failure to remove mask on rotate amounts.

This is similar to tests I added in
e2f410feeab27a8bb2c015fc02bb8527702e401f that had to be reverted.

I've modified them to avoid the bug that is being fixed by D126036.

Recommit "[RISCV] Use selectShiftMaskXLen ComplexPattern for isel of rotates."

This reverts commit dfe513ae1bb6e788ead93b850d80d77d54cf29d3.

Tests have been changed to avoid the type legalization bug being
fixed in D126036.

Original commit message:
This will remove masks on the shift amount. We usually get this with
SimplifyDemandedBits in DAGCombine, but that's restricted to cases
where the AND has a single use. selectShiftMaskXLen does not have
that restriction.

[PS5] Verify defaults to -fno-stack-size-section

[flang][runtime] INQUIRE(UNIT=666,NUMBER=n) must set n=666

Whether a unit number in an inquire-by-unit statement is valid or not,
it should be the value to which the NUMBER= variable is set, not -1.
-1 should be returned to NUMBER= only for an inquire-by-file statement
when the FILE= is not connected to any unit.

Differential Revision: https://reviews.llvm.org/D126145

NFC. Clang-formatting.

Since the rest of the DirectX backend is pretty well clang-format
clean, this file should be too.

Revert "[PS5] Verify defaults to -fno-stack-size-section"

This reverts commit 28432b0f655641df7f9d079cf69ba235038d6340.

Caused some unexpected buildbot failures.

[libclang] add supporting for indexing/visiting C++ concepts

This commit builds upon recently added indexing support for C++ concepts
from https://reviews.llvm.org/D124441 by extending libclang to
support indexing and visiting concepts, constraints and requires
expressions as well.

Differential Revision: https://reviews.llvm.org/D126031

[AMDGPU] Enforce alignment of image vaddr on gfx90a

Even though single address image instructions only use a single VGPR
HW accesses 4 or 5 which creates alignment requirement.

Fixes: SWDEV-316648

Differential Revision: https://reviews.llvm.org/D126009

Reland "[PS5] Verify defaults to -fno-stack-size-section"

This reverts commit efebb27b745a0d677ad2ea9aefff242c12aef29c.
Fixes typos (accidentally omitted %s from some RUN lines).

[clangd] Handle '--' in QueryDriverDatabase

Fixes https://github.com/clangd/clangd/issues/1100,
a regression from D116721.

Differential Revision: https://reviews.llvm.org/D126274

[compiler-rt][lsan] Update CanBeAHeapPointer for AArch64

While attempting to get the 64-bit lsan allocator working for Fuchsia, I
noticed this function would incorrectly return false for pointers returned
by the 64-bit allocator. On AArch64, this function attempts to get the VMA
size dynamically by counting the number of leading zeros from the function
frame address. This will fail if the frame address is significantly below an
allocated pointer (that is, the frame address has more leading zeros than an
allocated pointer). This is possible on Fuchsia and linux (when not called
from the initial thread stack).

It seems the intended use of this function is to speed up pointer scanning by
filtering out addresses that user code might not be able to access. Other
platforms this check is done on seem to hardcode the VMA size/shift, so it
seems appropriate to do this for aarch64 as well. This implies pointers on
aarch64 where the VMA size is <64 will pass through, but bad pointers will
still be caught by subsequent scan checks.

This patch also renames the function to something more fitting of what it's
trying to do.

Differential Revision: https://reviews.llvm.org/D123814

[flang][runtime] Handle BACKSPACE after reading past EOF

An external READ(END=) that hits the end of the file must
also note the virtual position of the endfile record that
has just been discovered, so that a later BACKSPACE statement
won't end up at the wrong record.

Differential Revision: https://reviews.llvm.org/D126146

[OpenMP] Add parsing/sema support for omp_all_memory reserved locator

Adds support for the reserved locator 'omp_all_memory' for use
in depend clauses with 'out' or 'inout' dependence-types.

Differential Revision: https://reviews.llvm.org/D125828

[OpenMP] Fix file arguments for embedding bitcode in the linker wrapper

Summary:
The linker wrapper supports embedding bitcode images instead of linked
device images to facilitate JIT in the device runtime. However, we were
incorrectly passing in the file twice when this option was set. This
patch makes sure we only use the intermediate result of the LTO pass and
don't add the final output to the full job.

In the future we will want to add both of these andle handle that
accoridngly to allow the runtime to either use the AoT compiled version
or JIT compile the bitcode version if availible.

Sema: adjust assertion to account for deduced types

Previous changes for the BTF attributes introduced a new sub-tree
visitation.  That uncovered that when accessing the typespec location we
would assert that the type specification is either a type declaration or
`typename`.  However, `typename` was explicitly permitted.  This change
predates the introduction of newer deduced type representations such as
`__underlying_type` from C++ and the addition of the GNU `__typeof__`
expression.

Thanks to aaron.ballman for the valuable discussion and pointer to
`isTypeRep`.

Differential Revision: https://reviews.llvm.org/D126093
Reviewed By: aaron.ballman, yonghong-song

[compiler-rt][scudo] Simplify TBI checks

Differential Revision: https://reviews.llvm.org/D111080

[AMDGPU] Disable newly added gfx90a global isel image tests. NFC.

This fixed build failure with expensive checks after D126009.
The change has added new run lines for Global ISel which has
uncovered a pre-existing problem: it does not select a correct
flavor of these image instructions.

[flang] Alternate entry points with unused arguments

A dummy argument in an entry point of a subprogram with multiple
entry points need not be defined in other entry points. It is only
legal to reference such an argument when calling an entry point that
does have a definition. An entry point without such a definition
needs a local "substitute" definition sufficient to generate code.
It is nonconformant to reference such a definition at runtime.
Most such definitions and associated code will be deleted as dead
code at compile time. However, that is not always possible, as in
the following code. This code is conformant if all calls to entry
point ss set m=3, and all calls to entry point ee set n=3.

subroutine ss(a, b, m, d, k) ! no x, y, n
  integer :: a(m), b(a(m)), m, d(k)
  integer :: x(n), y(x(n)), n
  integer :: k
1 print*, m, k
  print*, a
  print*, b
  print*, d
  if (m == 3) return
entry ee(x, y, n, d, k) ! no a, b, m
  print*, n, k
  print*, x
  print*, y
  print*, d
  if (n /= 3) goto 1
end

  integer :: xx(3), yy(5), zz(3)
  xx = 5
  yy = 7
  zz = 9
  call ss(xx, yy, 3, zz, 3)
  call ss(xx, yy, 3, zz, 3)
end

Lowering currently generates fir::UndefOp's for all unused arguments.
This is usually ok, but cases such as the one here incorrectly access
unused UndefOp arguments for m and n from an entry point that doesn't
have a proper definition.

The problem is addressed by creating a more complete definition of an
unused argument in most cases. This is implemented in large part by
moving the definition of an unused argument from mapDummiesAndResults
to mapSymbolAttributes. The code in mapSymbolAttributes then chooses
one of three code generation options, depending on information
available there.

This patch deals with dummy procedures in alternate entries, and adds
a TODO for procedure pointers (the PFTBuilder is modified to analyze
procedure pointer symbol so that they are not silently ignored, and
instead hits proper TODOs).

BoxAnalyzer is also changed because assumed-sized arrays were wrongfully
categorized as constant shape arrays.  This had no impact, except when
there were unused entry points.

Co-authored-by: jeanPerier <jperier@nvidia.com>

Differential Revision: https://reviews.llvm.org/D125867

[flang] Fix crash in semantics after PDT instantiation

The code in semantics that reinitializes symbol table pointers in
the parse tree of a parameterized derived type prior to a new
instantiation of the type was processing the symbols of the
derived type instantiation scope in arbitrary address order,
which could fail if a reference to a type parameter inherited from
an ancestor type was processed prior to the parent component sequence.
Fix by instantiating components of PDT instantiations in declaration
order.

Differential Revision: https://reviews.llvm.org/D126147

Recommit "[SelectOpti][5/5] Optimize select-to-branch transformation"

Use container::size_type directly to avoid type mismatch causing build failures in Windows.

Original commit message:
This patch optimizes the transformation of selects to a branch when the heuristics deemed it profitable.
It aggressively sinks eligible instructions to the newly created true/false blocks to prevent their
execution on the common path and interleaves dependence slices to maximize ILP.

Depends on D120232

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D120233

[compiler-rt][scudo] Add missing preprocessor token

This should fix build errors seen on bots like
https://lab.llvm.org/buildbot/#/builders/57/builds/18263.

Revert "[compiler-rt][scudo] Add missing preprocessor token" and "[compiler-rt][scudo] Simplify TBI checks"

This reverts commit 676eaa2ca967ca6ad4a84d31d6f0ebabdcf3e44b
and f6038cdca03115da22b9e6ada5c25de4df5f42d2 since builders are still
broken.

[InstCombine] fold more shuffles with FP<->Int cast operands

shuffle (cast X), (cast Y), Mask --> cast (shuffle X, Y, Mask)

This extends the transform added with 0353c2c996c5.

If the shuffle reduces vector length, the transform
reduces the width of the cast, so that should be a
win for most codegen (if not, it can be inverted).

[SLP] Fix crash caused by reorderBottomToTop().

The crash is caused by incorrect order set by reorderBottomToTop(), which
happens when it is reordering a TreeEntry which has a user that has already been
reordered earlier. Please see the detailed description in the lit test.

Differential Revision: https://reviews.llvm.org/D126099

[flang] Catch calls to assumed-length character functions

Semantics was allowing calls to CHARACTER(*) functions, which are odd
things -- they can be declared, and passed around, but can never actually
be called as such.  They must be redeclared with an explicit length that
ends up being passed as a hidden argument.  So check for these calls
and diagnose them, add tests, and clean up some existing tests that
were in error and now get caught.

Possible TODO for lowering: there were some test cases that used
bad calls to assumed-length CHARACTER*(*) functions and validated
their implementations.  I've removed some, and adjusted another,
but the code that somehow implemented these calls may need to be
removed and replaced with an assert about bad semantics.

Differential Revision: https://reviews.llvm.org/D126148

[Sanitizers][Darwin] Replace SANITIZER_MAC with SANITIZER_APPLE in source files

This is a follow up to [Sanitizers][Darwin] Rename Apple macro SANITIZER_MAC -> SANITIZER_APPLE (D125816)

Performed a global search/replace as in title against LLVM sources

Differential Revision: https://reviews.llvm.org/D126263

[clang][dataflow] Make limit on fixpoint-algorithm iterations proportional to size of CFG.

Currently, the maximum number of iterations of the loop for finding the fixpoint
of the dataflow analysis is set at 2^16. When things go wrong in an analysis,
this can be far too large.  This patch changes the limit to be proportional to
the size of the CFG, which will generally be far smaller than 2^16 (while still
maintaining 2^16 as the absolute limit).

Differential Revision: https://reviews.llvm.org/D126316

[flang] Don't prematurely resolve subprogram names

Name resolution for subprograms checks whether the name is already
present in the enclosing scope as a generic interface, so that the
case of a generic with the same name as one of its specifics can be
handled.  The particular means by which the enclosing scope is searched
for the name would resolve the name (bind a symbol to it) as a side
effect.  This turns out to be the wrong thing to do when the subprogram
is going to have its symbol created in another scope to cope with its
BIND(C,NAME="name") name, and its Fortran name is already present in the
enclosing scope for a subprogram of the same name but without
BIND(C,NAME="name").

A very long explanation for a one-line fix, sorry.  In short, change
the code to look up the name but not resolve it at that point.

Differential Revision: https://reviews.llvm.org/D126149

[clang][test] mark tests added in ee8524087c78 as unsupported on AIX

These tests are failing on the PPC64 AIX CI bot, but it's unclear why,
as they pass on other CI jobs.
I marked them as unsupported on AIX for now while investigating the failure.

[flang] Fix purity testing for generic calls

The purity or impurity of a call to a generic interface
depends on the attributes of the specific procedure or specific
binding.  Change expression analysis of calls to generic interfaces
to replace the symbol in the parse tree with the specific procedure
or binding; this ensures that later checking for purity in
DO CONCURRENT and other contexts will be accurate.

Remove an "XFAIL" from a test that now passes again with this fix.

Differential Revision: https://reviews.llvm.org/D126150

[flang] Accept defined assignment with CLASS(*) RHS

A utility predicate in semantics was incorrectly determining that
an INTERFACE ASSIGNMENT(=) (or other form of generic) could not have
a specific procedure with an unlimited polymorphic second argument.
This led to a crash later in expression analysis.  Fix, and
extend tests.

Differential Revision: https://reviews.llvm.org/D126151

[flang] Fix false error for multiple defined I/O subroutines

User-defined derived type I/O subroutines need to be unique for
a given type and operation in any scope, but it is acceptable
to have more than one defined I/O subroutine so long as only one
of them is visible.

Differential Revision: https://reviews.llvm.org/D126152

[clang][dataflow] Relax `Environment` comparison operation.

Ignore `MemberLocToStruct` in environment comparison. As an ancillary data
structure, including it is redundant. We also can generate environments which
differ in their `MemberLocToStruct` but are otherwise equivalent.

Differential Revision: https://reviews.llvm.org/D126314

[flang] Process subprogram BIND(C,NAME=...) locally

The scalar-default-character-expression that defines the interoperable
name of a function or subroutine (or interface) must have its names
resolved within the context of the subprogram, despite its appearance
on a function-stmt or a subroutine-stmt.  Failure to do so can lead
to bogus errors or to incorrect results.

The solution is to defer name resolution for function-stmt suffixes
(but not entry-stmt suffixes) and for subroutine-stmt language binding
specifications to EndSubprogram().  (Their resolution only need to be
deferred to the end of the specification part, but it's cleanest to
deal with it in EndSubprogram().)

Differential Revision: https://reviews.llvm.org/D126153

[flang] Replace crash and improve a semantics TODO message

The derived type information table construction code had a
crash whose root cause was replacing an expression with one
of its operands -- the deletion of the LHS of that assignment
led to the RHS being invalidated before it could be read.
Fix by cloning the RHS.  Also update a TODO message to the
new "_todo_en_US" message class and add a comment about how
it should be resolved.

Differential Revision: https://reviews.llvm.org/D126154

[flang][runtime] Catch decimal integer input overflow

B/O/Z input overflow is already caught, and real input overflow
is signalled as an IEEE arithmetic exception, but regular decimal
integer overflow was silent.

Differential Revision: https://reviews.llvm.org/D126155

Fix build failure revealed by c35ca3a1c78f693b749ad11742350b7fc6c5cd89

This commit resolves a Linux kernel build failure that was revealed by
c35ca3a1c78f693b749ad11742350b7fc6c5cd89. The patch introduces two new
intrinsics, which ultimately changes the intrinsic numbering of other PPC
intrinsics. This causes an issue introduced by
ff40fb07ad6309131c2448ca00572a078c7a2d59, as the patch checks for intrinsics
with particular values, but the addition of the fnabs/fnabss intrinsics updates
the original sqrt/sdiv intrinsic values.

[Flang][OpenMP] Fixes for unstructured OpenMP code

Since the FIR operations are mostly structured, it is only the functions
that could contain multiple blocks inside an operation. This changes
with OpenMP since OpenMP regions can contain multiple blocks. For
unstructured code, the blocks are created in advance and belong to the
top-level function. This caused code in OpenMP region to be placed under
the function level.

In this fix, if the OpenMP region is unstructured then new blocks are
created inside it.

Note1: This is part of upstreaming from the fir-dev branch of
https://github.com/flang-compiler/f18-llvm-project. The code in this patch is a
subset of the changes in https://github.com/flang-compiler/f18-llvm-project/pull/1178.

Reviewed By: vdonaldson

Differential Revision: https://reviews.llvm.org/D126293

Co-authored-by: Val Donaldson <vdonaldson@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Valentin Clement <clementval@gmail.com>

[SelectionDAG] Add support to widen ISD::STEP_VECTOR operations.

Fixes: #55165

Differential Revision: https://reviews.llvm.org/D126168

[RISCV] Hoist VSETVLI out of idiomatic fixed length vector loops

This patch teaches the VSETVLI insertion pass to perform a very limited form of partial redundancy elimination. The motivating example comes from the fixed length vectorization of a simple loop such as:

for (unsigned i = 0; i < a_len; i++)
    a[i] += b;

Without this change, the core vector loop and preheader is as follows:

.LBB0_3:                                # %vector.ph
	andi	a1, a6, -8
	addi	a4, a0, 16
	mv	a5, a1
.LBB0_4:                                # %vector.body
                                        # =>This Inner Loop Header: Depth=1
	addi	a3, a4, -16
	vsetivli	zero, 4, e32, m1, ta, mu
	vle32.v	v8, (a3)
	vle32.v	v9, (a4)
	vadd.vx	v8, v8, a2
	vadd.vx	v9, v9, a2
	vse32.v	v8, (a3)
	vse32.v	v9, (a4)
	addi	a5, a5, -8
	addi	a4, a4, 32
	bnez	a5, .LBB0_4

The key thing to note here is that, the execution of the vsetivli only needs to happen once. Since there's no tail folding happening here, the value of the vector configuration registers are invariant through the loop.

After this patch, we hoist the configuration into the preheader and perform it once.

.LBB0_3:                                # %vector.ph
	andi	a1, a6, -8
	vsetivli	zero, 4, e32, m1, ta, mu
	addi	a4, a0, 16
	mv	a5, a1
.LBB0_4:                                # %vector.body
                                        # =>This Inner Loop Header: Depth=1
	addi	a3, a4, -16
	vle32.v	v8, (a3)
	vle32.v	v9, (a4)
	vadd.vx	v8, v8, a2
	vadd.vx	v9, v9, a2
	vse32.v	v8, (a3)
	vse32.v	v9, (a4)
	addi	a5, a5, -8
	addi	a4, a4, 32
	bnez	a5, .LBB0_4

Differential Revision: https://reviews.llvm.org/D124869

[riscv] Use getFirstInstrTerminator [nfc]

[RISCV] Add an operand kind to the opcode/imm returned from RISCVMatInt.

Instead of matching opcodes to know the format to emit, use an
enum value that we can get from the RISCVMatInt::Inst class.

Change the consumers to use fully covered switches so that we get
a compiler warning if a new kind is added. With the opcode checks
it was easier to forget to update one of the 3 consumers.

Reviewed By: reames

Differential Revision: https://reviews.llvm.org/D126317

[mlir][sparse] add new complex ops to reduction recognition

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D126318

[RISCV] Ensure the forwarded AVL register is alive

When the AVL value does not fit in 5 bits, the register in which this value is stored may be dead when we want to forward it. This patch ensure the kill flags on the register are cleared before forwarding.

Patch by: loralb
Differential Revision: https://reviews.llvm.org/D125971

[OpenMP] Add codegen for 'omp_all_memory' reserved locator.

This creates an entry with address=nullptr and flag=0x80.
When an 'omp_all_memory' entry is specified any other 'out' or
'inout' entries are not needed and are not passed to the runtime.

Differential Revision: https://reviews.llvm.org/D126321

[libc] Add the pthread_mutex_t type.

Simple implementations of the functions pthread_mutex_init,
pthread_mutex_destroy, pthread_mutex_lock and pthread_mutex_unlock have
have also been added. Future patches will extend these functions to add
features required by the POSIX specification.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D126235

[InstCombine] Fold memrchr calls with sequences of identical bytes.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D123631

[mlir][sparse] complex lowering

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D126335

[LLVM][IR] Fix assert in ConstantExpr::getPtrToInt so all vector types are supported.

Fixes: #55410

[DFSan] Add option to specify individual library files, and an option to exit with an error code if any library file was not found.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D126336

[clang-tidy] Fix #55134 (regression introduced by 5da7c04)

5da7c04 introduced a regression in the NOLINT macro checking loop, replacing the
call to `getImmediateExpansionRange().getBegin()` with
`getImmediateMacroCallerLoc()`, which has similar but subtly different
behaviour.

The consequence is that NOLINTs cannot suppress diagnostics when they are
attached to a token that came from a macro **argument**, rather than elsewhere
in the macro expansion.

Revert to pre-patch behaviour and add test cases to cover this issue.

Differential Revision: https://reviews.llvm.org/D126138

[lldb] Disable modules in Apple-lldb-base

The LLDB website recommends using the CMake caches to build on macOS.
Although modules result in a faster build, this configuration tends to
break occasionally because it's specific to our platform. I don't expect
newcomers to be able to deal with those kind of breakages so don't
enable them by default.

[lldb] Improve TestAppleSimulatorOSType.py error message

This was inspired by D109336 which got reverted because we didn't want
the test to fail silently. This patch prints a more informative error
message when we fail to parse the simctl output while still failing the
test.

Differential revision: https://reviews.llvm.org/D126217

[BOLT][NFC] Remove unused BF::computeLocalUDChain method definition

The function is only used inside AArch64MCPlusBuilder class, there are no uses
of it as a BinaryFunction method.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D126220

[BOLT][NFC] Use for_each to simplify printLoopInfo

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D126242

[BOLT][NFC] Customize endline character for printInstruction(s)

This would be used in `BF::dumpGraph` to dump left-justified text.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D126232

[BOLT][NFC] Use ListSeparator in BinaryFunction print methods

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D126243

[clang-format][NFC] Insert/remove braces in clang/lib/Format/

Differential Revision: https://reviews.llvm.org/D126157

[InstCombine] add test for trunc-shl-trunc ; NFC

[InstCombine] [NFC] Move transforms for truncated shifts into narrowBinOp

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D126056

[C++20] [Coroutines] Conform the updates for CWG issue 2585

According to the updates in CWG issue 2585
https://cplusplus.github.io/CWG/issues/2585.html, we shouldn't find an
allocation function with (size, p0, …, pn) in global scope.

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D126187

Revert "[MachineSink] replace MachineLoop with MachineCycle"

This reverts commit 62a9b36fcf728b104ea87e6eb84c0be69b779df7.
Cause build failure on lldb incremental buildbot:
https://green.lab.llvm.org/green/view/LLDB/job/lldb-cmake/43994/changes

[libc++][NFC] Add more tests to `move_{iterator,sentinel}`.

More test coverage for the parts added by the One Ranges Proposal.

Differential Revision: https://reviews.llvm.org/D124906

Move GCC-compatible pod-packing change to v15/old behavior available at v14 and below

Since this didn't make it into the v14 release - anyone requesting the
v14 ABI shouldn't get this GCC-compatible change that isn't backwards
compatible with v14 Clang.

Differential Revision: https://reviews.llvm.org/D126334

[RISCV] Replace untested code with assert

We found untested code where negative frame indices were ostensibly
handled despite it being in a block guarded by !MFI.isFixedObjectIndex.

While the implementation of MachineFrameInfo::isFixedObjectIndex
suggests this is possible (i.e., if a frame index was more negative - less than the
number of fixed objects), I couldn't find any test in tree -- for any
target -- where a negative frame index wasn't also a fixed object
offset. I couldn't find a way of creating such a object with the
public MachineFrameInfo creation APIs. Even
MachineFrameInfo::getObjectIndexBegin starts counting at the negative
number of fixed objects, so such frame indices wouldn't be covered by
loops using the provided begin/end methods.

Given all this, an assert that any object encountered in the block is
non-negative seems reasonable.

Reviewed By: StephenFan, kito-cheng

Differential Revision: https://reviews.llvm.org/D126278

[flang][MSVC] Fix building with `/permissive-` flag

CLOCK_REALTIME is POSIX defined and never available with MSVC, even without /permissive-.
The difference is that the template is never instantiated and the compiler ignores the undefined identifier.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D125262

[RISCV] Fix vnsrl/vnsra isel patterns that are dropping VL.

We were incorrectly using VLMax instead of the passed VL.

Reviewed By: khchen, reames

Differential Revision: https://reviews.llvm.org/D126319