Changes

Summary

  1. [AArch64] Optimize add/sub with immediate (details)
  2. [X86][LV] X86 does *not* prefer vectorized addressing (details)
  3. [ConstantFolding] ConstantFoldScalarCall1 - early-out if getLibFunc fails. NFC. (details)
  4. [ConstantFolding] Use getValueAPF const ref value where possible. NFC. (details)
  5. [ConstantFolding] ConstantFoldScalarCall2 - early-out if getLibFunc fails. NFC. (details)
  6. [LazyValueInfo] getPredicateAt - remove unnecessary null pointer check. NFC. (details)
  7. [Analysis] Replace assert(isa)/dyn_cast with cast. NFC. (details)
  8. [docs] Mention DragonFlyBSD as a supported platform for LLVM. (details)
  9. [Demangle] Extract nonMicrosoftDemangle from llvm::demangle (details)
  10. [llvm-cxxfilt] Use nonMicrosoftDemangle for demangling NFC (details)
  11. [Symbolize] Demangle Rust symbols (details)
  12. [lldb] Split ParseSingleMember into Obj-C property and normal member/ivar parsing code. (details)
  13. [LV][X86] Add PR47437 test case (details)
  14. [Support] Add more Windows error codes to mapWindowsError (details)
  15. Use llvm::is_contained (NFC) (details)
  16. [NFC][X86][Codegen] Add missing interleaving tests after D111546 (details)
  17. [TTI][X86] Add SSE2 sub-128bit vXi16/32 and v2i64 stride 2 interleaved load costs (details)
  18. [libc++][doc] Adds more issue status labels. (details)
  19. [TTI][X86] Add v8i16 -> 2 x v4i16 stride 2 interleaved load costs (details)
  20. [OpenMP][deviceRTLs] Fix wrong return value of `__kmpc_is_spmd_exec_mode` (details)
  21. [APInt] Fix 1-bit edge case in smul_ov() (details)
  22. Revert "[clang] Pass -clear-ast-before-backend in Clang::ConstructJob()" (details)
  23. Improve fatal error message when an Attribute or Type wasn't initialized by a dialect (NFC) (details)
  24. [Builders.h] Silence a warning by adding a cast. (details)
  25. [X86] Add DAG combine for negation of CMOV absolute value pattern. (details)
  26. [NFC][sanitizer] Rename stack depot tests (details)
  27. [NFC][sanitizer] Add StackDepotTestOnlyUnmap (details)
  28. [Object] Simplify RELR decoding (details)
  29. Revert "[AArch64] Optimize add/sub with immediate" (details)
Commit 9bf6bef9951a1c230796ccad2c5c0195ce4c4dff by powerman1st
[AArch64] Optimize add/sub with immediate

Optimize ([add|sub] r, imm) -> ([ADD|SUB] ([ADD|SUB] r, #imm0, lsl #12), #imm1),
if imm == (imm0<<12)+imm1. and both imm0 and imm1 are non-zero 12-bit unsigned
integers.

Optimize ([add|sub] r, imm) -> ([SUB|ADD] ([SUB|ADD] r, #imm0, lsl #12), #imm1),
if imm == -(imm0<<12)-imm1, and both imm0 and imm1 are non-zero 12-bit unsigned
integers.

Reviewed By: jaykang10, dmgreen

Differential Revision: https://reviews.llvm.org/D111034
The file was modifiedllvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
The file was modifiedllvm/test/CodeGen/AArch64/addsub.ll
Commit d137f1288e2c2169b53a1baef0d5cd94a4bb3999 by lebedev.ri
[X86][LV] X86 does *not* prefer vectorized addressing

And another attempt to start untangling this ball of threads around gather.
There's `TTI::prefersVectorizedAddressing()`hoop, which confusingly defaults to `true`,
which tells LV to try to vectorize the addresses that lead to loads,
but X86 generally can not deal with vectors of addresses,
the only instructions that support that are GATHER/SCATTER,
but even those aren't available until AVX2, and aren't really usable until AVX512.

This specializes the hook for X86, to return true only if we have AVX512 or AVX2 w/ fast gather.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111546
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/parallel-loops.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/cost-model.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-012u.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/test/Analysis/CostModel/X86/gather-i8-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-01uu.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/gather-i16-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/gather-i64-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2-indices-0u.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-0uuu.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-0uu.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/gather-i32-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-01u.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-5.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-5.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
Commit 76ca0d67ab07929dd6d2d34327034bc87ff822a9 by llvm-dev
[ConstantFolding] ConstantFoldScalarCall1 - early-out if getLibFunc fails. NFC.
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
Commit c18cf10a049506534de5efaed0e91e062866532a by llvm-dev
[ConstantFolding] Use getValueAPF const ref value where possible. NFC.

Don't copy the value if we can avoid it.
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
Commit c28824179530db3aaa3b76291111b2c8a56face4 by llvm-dev
[ConstantFolding] ConstantFoldScalarCall2 - early-out if getLibFunc fails. NFC.
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
Commit a1b43d2bc946966a64f390058e3bf5fc22ee9304 by llvm-dev
[LazyValueInfo] getPredicateAt - remove unnecessary null pointer check. NFC.

We already dereference the CxtI pointer several times before reaching the "if(CxtI)", we have no need to check it again.

Fixes a coverity warning.
The file was modifiedllvm/lib/Analysis/LazyValueInfo.cpp
Commit d464a9d476a2620293ff19cf743b8537b94c4a42 by llvm-dev
[Analysis] Replace assert(isa)/dyn_cast with cast. NFC.

cast<> will perform the assertion for us.

Removes a static analysis null dereference warning.
The file was modifiedllvm/lib/Analysis/LoopCacheAnalysis.cpp
Commit 4d7c7d87e46e3589594aa789c543e2a8b667d3f2 by fred
[docs] Mention DragonFlyBSD as a supported platform for LLVM.

Differential Revision: https://reviews.llvm.org/D111758
The file was modifiedllvm/docs/GettingStarted.rst
Commit 41a6fc8438f306aa562908027de64061353778ce by tomasz.miasko
[Demangle] Extract nonMicrosoftDemangle from llvm::demangle

Introduce a new demangling function that supports symbols using Itanium
mangling and Rust v0 mangling, and is expected in the near future to
include support for D mangling as well.

Unlike llvm::demangle, the function does not accept extra underscore
decoration. The callers generally know exactly when symbols should
include the extra decoration and so they should be responsible for
stripping it.

Functionally the only intended change is to allow demangling Rust
symbols with an extra underscore decoration through llvm::demangle,
which matches the existing behaviour for Itanium symbols.

Reviewed By: dblaikie, jhenderson

Part of https://reviews.llvm.org/D110664
The file was modifiedllvm/lib/Demangle/Demangle.cpp
The file was modifiedllvm/include/llvm/Demangle/Demangle.h
The file was modifiedllvm/unittests/Demangle/DemangleTest.cpp
Commit a3813438ae1c2d688f7bccc4501a172f17b7a505 by tomasz.miasko
[llvm-cxxfilt] Use nonMicrosoftDemangle for demangling NFC

Reviewed By: dblaikie, jhenderson

Part of https://reviews.llvm.org/D110664
The file was modifiedllvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
Commit 48ce523a26b7a5a3dc4cff616c93ed951244746b by tomasz.miasko
[Symbolize] Demangle Rust symbols

Add support for demangling Rust v0 symbols to LLVM symbolizer by reusing
nonMicrosoftDemangle which supports both Itanium and Rust mangling.

Reviewed By: dblaikie, jhenderson

Part of https://reviews.llvm.org/D110664
The file was modifiedllvm/lib/DebugInfo/Symbolize/Symbolize.cpp
The file was modifiedllvm/test/DebugInfo/symbolize-demangling.s
Commit 60b96aa65e5959361e9edea15b3591f90988ccad by Raphael Isemann
[lldb] Split ParseSingleMember into Obj-C property and normal member/ivar parsing code.

Right now DWARFASTParserClang::ParseSingleMember has two parts: One part parses
Objective-C properties and the other part parses C/C++ members/Objective-C
ivars. These parts are pretty much independent of each other (with one
historical exception, see below) and in practice they parse DIEs with different
tags/attributes: `DW_TAG_APPLE_property` and `DW_TAG_member`.

I don't see a good reason for keeping the different parsing code intertwined in
a single function, so instead split out the Objective-C property parser into its
own function.

Note that 90% of this commit is just unindenting nearly all of
`ParseSingleMember` which was inside a `if (tag == DW_TAG_member)` block. I.e.,
think of the old `ParseSingleMember` function as: The rest is just moving the
property parsing code into its own function and I added the ReportError
implementation in case we fail to resolve the property type (which before was
just a silent failure).

```
lang=c++
void DWARFASTParserClang::ParseSingleMember(...) {
  [...]
  if (tag == DW_TAG_member) {
    [...] // This huge block got unindented in this patch as the `if` above is gone.
  }
  if (property) {
    [...] // This is the property parsing code that is now its own function.
  }
}
```

There is one exception to the rule that the parsers are independent. Before 2012
Objective-C properties were encoded as `DW_TAG_member` with
`DW_AT_APPLE_property*` attributes describing the property. In 2012 this has
changed in a series of commits (see for example
c0449635b35b057c5a877343b0c5f14506c7cf02 which updates the docs) so that
`DW_TAG_APPLE_property` is now used for properties. With the old format we first
created an ivar and afterwards used the `DW_AT_APPLE_property*` attributes to
create the respective property, but there doesn't seem to be any way to create
such debug info with any clang from the last 9 years. So this is technically not
NFC in case some finds debug info from that time and tries to use properties.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D111632
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Commit d5f5121ea65a2948c439abec9faf2d4a75ccdd49 by llvm-dev
[LV][X86] Add PR47437 test case
The file was addedllvm/test/Transforms/LoopVectorize/X86/pr47437.ll
Commit 6c96ceabaf84d149244a15916ce53df95aac3660 by martin
[Support] Add more Windows error codes to mapWindowsError

Also sort ERROR_BAD_NETPATH correctly.

Compared with the similar error code mapping in
libcxx/src/filesystem/operations.cpp, I'm leaving out
mappings for ERROR_NOT_SAME_DEVICE and ERROR_OPERATION_ABORTED.
They map nicely to std::errc::cross_device_link and
std::errc::operation_canceled, but those aren't available in
llvm::errc, as they aren't available across all platforms.

Also, the libcxx version maps ERROR_INVALID_NAME to
no_such_file_or_directory instead of invalid_argument.

Differential Revision: https://reviews.llvm.org/D111874
The file was modifiedllvm/lib/Support/ErrorHandling.cpp
Commit 939a80867004c8b5a64ffc84120c31db634162a0 by kazu
Use llvm::is_contained (NFC)
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
The file was modifiedllvm/include/llvm/Option/Arg.h
Commit bfe5b1b3122ca3cfee977380acae01f3b409c57b by lebedev.ri
[NFC][X86][Codegen] Add missing interleaving tests after D111546
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-4.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-4.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-4.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-3.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-2.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-4.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-2.ll
Commit 6ec644e2157d63acccacd877cf08c68d5836c169 by llvm-dev
[TTI][X86] Add SSE2 sub-128bit vXi16/32 and v2i64 stride 2 interleaved load costs

These cases use the same codegen as AVX2 (pshuflw/pshufd) for the sub-128bit vector deinterleaving, and unpcklqdq for v2i64.

It's going to take a while to add full interleaved cost coverage, but since these are the same for SSE2 -> AVX2 it should be an easy win.

Fixes PR47437

Differential Revision: https://reviews.llvm.org/D111938
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/interleaving.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2-indices-0u.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/pr47437.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
Commit 3956a1f8b6d29d2ed3590c7e8f877c7525b165ef by koraq
[libc++][doc] Adds more issue status labels.

A followup to D111458 adding more labels to LWG-issues. This should add
the labels for the not completed chrono, format, ranges, and spaceship
issues.

Some minor formatting cleanups along the way.

Reviewed By: #libc, Quuxplusone

Differential Revision: https://reviews.llvm.org/D111935
The file was modifiedlibcxx/docs/Status/Cxx2bIssues.csv
The file was modifiedlibcxx/docs/Status/Cxx20Issues.csv
Commit 85b87179f4820592894d2d1da699794edf9ad6b6 by llvm-dev
[TTI][X86] Add v8i16 -> 2 x v4i16 stride 2 interleaved load costs

Split SSE2 and SSSE3 costs to correctly handle PSHUFB lowering - as was noted on D111938
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/pr47437.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 2c941fa2f9b9a93b42bdddc810a817b02a937b55 by tianshilei1992
[OpenMP][deviceRTLs] Fix wrong return value of `__kmpc_is_spmd_exec_mode`

D110279 introduced a bug to the device runtime. In `__kmpc_parallel_51`, we detect
whether we are already in parallel region by `__kmpc_parallel_level() > __kmpc_is_spmd_exec_mode()`.
It is based on the assumption that:
- In SPMD mode, parallel level is initialized to 1.
- In generic mode, parallel level is initialized to 0.
- `__kmpc_is_spmd_exec_mode` returns `1` for SPMD mode, 0 otherwise.

Because the return value type of `__kmpc_is_spmd_exec_mode` is `int8_t`, there
was an implicit cast from `bool` to `int8_t`. We can make sure it is either 0 or
1 since C++14. In D110279, the return value is the result of an `and` operation,
which is 2 in SPMD mode. This breaks the assumption in `__kmpc_parallel_51`.

Reviewed By: carlo.bertolli, dpalermo

Differential Revision: https://reviews.llvm.org/D111905
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/omptarget.cu
Commit 492a4a428f77556d413c2179fad9ba4ae6d130b9 by nikita.ppv
[APInt] Fix 1-bit edge case in smul_ov()

The sdiv used to check for overflow can itself overflow if the
LHS is signed min and the RHS is -1. The code tried to account for
this by also checking the commuted version. However, for 1-bit
values, signed min and -1 are the same value, so both divisions
overflow. As such, the overflow for -1 * -1 was not detected
(which results in -1 rather than 1 for 1-bit values). Fix this by
explicitly checking for this case instead.

Noticed while adding exhaustive test coverage for smul_ov(),
which is also part of this commit.
The file was modifiedllvm/lib/Support/APInt.cpp
The file was modifiedllvm/unittests/ADT/APIntTest.cpp
Commit 49562d3dfed0ed6983d29d040db7e46ef3bc833e by aeubanks
Revert "[clang] Pass -clear-ast-before-backend in Clang::ConstructJob()"

This reverts commit 47eb99aa44ab1d20327d67a49d6c47163de76387.

This causes crashes with -print-stats: PR52193.
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Interpreter/Interpreter.cpp
Commit d0d991cd23eff29737aae704d8b9611bd3416ec9 by joker.eph
Improve fatal error message when an Attribute or Type wasn't initialized by a dialect (NFC)

The existing message hints that the dialect may not be loaded, but there
is also the possibility that the dialect was loaded and the initialize()
method didn't include the Type/Attribute.
The file was modifiedmlir/include/mlir/IR/AttributeSupport.h
The file was modifiedmlir/include/mlir/IR/TypeSupport.h
Commit ecbee4804d44c0afdf97fe59e8221c30cbbf3ae7 by clattner
[Builders.h] Silence a warning by adding a cast.

The no-result version of createOrFold calls 'tryFold' but
ignores the result since it doesn't matter what it produced.
Explicitly cast to void to silence this warning:

../llvm/mlir/include/mlir/IR/Builders.h:454:5: warning: ignoring return value of function declared with 'nodiscard' attribute [-Wunused-result]
    tryFold(op.getOperation(), unused);
    ^~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~

Differential Revision: https://reviews.llvm.org/D111951
The file was modifiedmlir/include/mlir/IR/Builders.h
Commit beb7862db520541fea429f27733e1993d254d76f by craig.topper
[X86] Add DAG combine for negation of CMOV absolute value pattern.

This patch detects the absolute value pattern on the RHS of a
subtract. If we find it we swap the CMOV true/false values and
replace the subtract with an ADD.

There may be a more generic way to do this, but I'm not sure.
Targets that don't have legal or custom ISD::ABS use a generic
expand in DAG combiner already when it sees (neg (abs(x))). I
haven't checked what happens if the neg is a more general subtract.

Fixes PR50991 for X86.

Reviewed By: RKSimon, spatel

Differential Revision: https://reviews.llvm.org/D111858
The file was modifiedllvm/test/CodeGen/X86/neg-abs.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit c0b1b52a28bea47cf707015993b6870eac0a7fcb by Vitaly Buka
[NFC][sanitizer] Rename stack depot tests
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_stackdepot_test.cpp
Commit 746dd6a700931988dd9021d3d04718f1929885a5 by Vitaly Buka
[NFC][sanitizer] Add StackDepotTestOnlyUnmap
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stackdepot.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_persistent_allocator.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_flat_map.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stackdepot.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_stackdepot_test.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stackdepotbase.h
Commit 8e1d532707fdf590da6dee53f33cca8a79d133e5 by i
[Object] Simplify RELR decoding
The file was modifiedllvm/lib/Object/ELF.cpp
Commit d0dbc991c0983613c14a8f3ec606cd572cda8d23 by powerman1st
Revert "[AArch64] Optimize add/sub with immediate"

This reverts commit 9bf6bef9951a1c230796ccad2c5c0195ce4c4dff.
The file was modifiedllvm/test/CodeGen/AArch64/addsub.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
The file was modifiedllvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll