FailedChanges

Summary

  1. Add a libc x86_64 windows worker and a debug builder running on it (details)
  2. Add buildbot for OpenMP on AMDGPU (details)
Commit 7d9ffd49c6358b9f20ddff6f29c79e186ee1be33 by hedingarcia
Add a libc x86_64 windows worker and a debug builder running on it

Differential Revision: https://reviews.llvm.org/D106981
The file was modifiedbuildbot/osuosl/master/config/workers.py (diff)
The file was modifiedbuildbot/osuosl/master/config/status.py (diff)
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)
Commit bc9f85040092ec7a969821f38e73f1ba2d946b08 by gkistanova
Add buildbot for OpenMP on AMDGPU

Build OpenMP for AMDGPU target

Differential revision: https://reviews.llvm.org/D106928
The file was modifiedbuildbot/osuosl/master/config/status.py (diff)
The file was modifiedbuildbot/osuosl/master/config/workers.py (diff)
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)

Summary

  1. [mlir] Handle cases where transfer_read should turn into a scalar load (details)
  2. [llvm-readobj][XCOFF] dump the string table only if the size is bigger than 4. (details)
  3. [mlir][Bazel] Adjust BUILD.bazel file. (details)
  4. [Support] Initialize common options in `getRegisteredOptions` (details)
  5. [FuncSpec] Support specialising recursive functions (details)
  6. [libc] Fix Memory Benchmarks code after rename (details)
  7. Introduce intrinsic llvm.isnan (details)
  8. X86: fix frame offset calculation with mandatory tail calls (details)
  9. [lldb] Partly revert "Allow range-based for loops over DWARFDIE's children" (details)
  10. [llvm][ExecutionEngine] Don't try to run tests on ARM64/Windows on Arm (details)
  11. [lldb] Fix lookup of .debug_loclists with split-dwarf (details)
  12. [X86] Split Subtarget ISA / Security / Tuning Feature Flags Definitions. NFC (details)
  13. Revert "Introduce intrinsic llvm.isnan" (details)
  14. [mlir] Fix CMake linker rules for ViewOpGraph.cpp (details)
  15. Reland "[lldb/DWARF] Only match mangled name in full-name function lookup (with accelerators)" (details)
  16. X86: add test for realignment fix committed earlier. (details)
  17. [llvm][MC] Disable cfi-version test for Windows on Arm (details)
  18. tsan: minor MetaMap tweaks (details)
  19. tsan: use DCHECK instead of CHECK in atomic functions (details)
  20. tsan: unify __cxa_guard_acquire and pthread_once implementations (details)
  21. [mlir] Support drawing control-flow graphs in ViewOpGraph.cpp (details)
  22. [clang][cli] Expose -fno-cxx-modules in cc1 (details)
  23. tsan: refactor guard_acquire/release (details)
  24. [clang][deps] Substitute clang-scan-deps executable in lit tests (details)
  25. tsan: don't use spinning in __cxa_guard_acquire/pthread_once (details)
  26. [LLDB] Skip flaky tests on Arm/AArch64 Linux bots (details)
  27. [X86] Move FeatureFastBEXTR from bdver2 features to tuning (details)
  28. [X86] Rename X86 tuning feature flag FeatureHasFastGather -> FeatureFastGather (details)
  29. [mlir] Include llvm/Support/Debug.h in Transforms/Passes.h (details)
  30. [ARM] Test showing incorrect codegen when subreg liveness is enabled. NFC (details)
  31. [RDA] Attempt to make RDA subreg aware (details)
  32. [flang] Add missing FileSystem.h (details)
  33. [mlir] Fix gcc-5 build in ViewOpGraph.cpp (details)
  34. [X86] combineX86ShuffleChain(): canonicalize mask elts picking from splats (details)
  35. [ARM][atomicrmw] Fix CMP_SWAP_32 expand assert (details)
  36. [NFC][X86] combineX86ShuffleChain(): rename inner Mask to avoid future shadowing (details)
  37. [NFC][X86] combineX86ShuffleChain(): hoist Mask variable higher up (details)
  38. [AMDGPU] Handle functions in llvm's global ctors and dtors list (details)
  39. [ADT] Drop unnecessary const from return types (NFC) (details)
  40. [AMDGPU] Generate checks for i64 to fp conversions (details)
  41. [DebugInfo][LSR] Avoid crashes on large integer inputs (details)
  42. [AMDGPU] Add cttz tests and globalisel checks for ctlz (details)
  43. [PowerPC][AIX] Packed zero-width bitfields do not affect alignment. (details)
  44. [AArch64] Fix assert AArch64TargetLowering::ReplaceNodeResults (details)
  45. [AMDGPU][OpenMP] Wrap amdgcn declare variant inside ifdef (details)
  46. [mlir][amx] add doc to AMX dialect (details)
  47. [AArch64][SVE] Combine bitcasts of predicate types with vector inserts/extracts of loads/stores (details)
  48. [mlir][sparse] fixed typo in sparse tensor type attribute alias (details)
  49. [ELF] Make dot in .tbss correct (details)
  50. [openmp] Add OMPT initialization in libomptarget (details)
  51. [ELF] Apply version script patterns to non-default version symbols (details)
  52. tsan: introduce kAccessFree (details)
  53. tsan: introduce kAccessExternalPC (details)
  54. tsan: move AccessType to tsan_defs.h (details)
  55. tsan: remove non-existent MemoryAccessRangeStep (details)
  56. [ELF] Combine foo@v1 and foo with the same versionId if both are defined (details)
  57. [clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts (details)
  58. [InstCombine] Fix vscale zext/sext optimization when vscale_range is unbounded. (details)
  59. [CSSPGO] Migrate and refactor the decoder of Pseudo Probe (details)
  60. [ELF] Fix typo. NFC (details)
  61. [OpenMP] Fix performance regression reported in bug #51235 (details)
  62. [OpenMP] Clean up for hidden helper task (details)
  63. [X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322). (details)
  64. [Bazel] Update build for ee7d20e846 (details)
  65. [InstrProfiling] Emit bias variable eagerly (details)
  66. [AArch64][GlobalISel] Widen G_FPTO*I before clamping (details)
  67. [AArch64][GlobalISel] Widen G_PHI before clamping it during legalization (details)
  68. [gn build] (manually) port ee7d20e84675e1d255d7ae59e3bccfd320cc090d (details)
  69. [gn build] Port ee7d20e84675 (details)
  70. [mlir][sparse] add doc to sparse tensor dialect passes (details)
  71. [RISCV] Remove the _COMMUTABLE and _TA versions of FMA and wide FMA vector instructions. (details)
  72. [DSE][NFC] Clean up DeadStoreElimination from unused variables (details)
  73. Revert "[AMDGPU] Handle functions in llvm's global ctors and dtors list" (details)
  74. Work around non-existence of ElfW(type) macro on FreeBSD (details)
  75. [hwasan] Add __hwasan_init constructor to runtime lib. (details)
  76. Revert "[SLP]Do not emit extra shuffle for insertelements vectorization." (details)
  77. [nfc] [lldb] Prevent needless copies of DataExtractor (details)
  78. [RISCV] Add test cases for conditional add/sub. NFC (details)
  79. [DAGCombiner][AMDGPU] Canonicalize constants to the RHS of MULHU/MULHS. (details)
  80. [OpenMPOpt] Expand SPMDization with guarding for target parallel regions (details)
  81. [SLP][NFC]Add tests for constants/undefs used in insertelements, NFC. (details)
  82. [gn build] Add cfi ignorelist to compiler-rt/lib (details)
  83. [MLIR][NFC] Get DiagnosticEngine as a reference in doc (details)
  84. [MemCpyOpt] Relax libcall checks (details)
  85. [flang] Support DFLOAT legacy extension intrinsic function (details)
  86. [flang] runtime: For Fw.d formatting, don't oscillate forever (details)
  87. [amdgpu] Add an enhanced conversion from i64 to f32. (details)
  88. [CodeGen] Add -align-loops (details)
  89. [lld] Remove unused LLD_REPOSITORY (details)
  90. [libc] add integration tests for scudo in libc (details)
  91. [mlir-lsp-server] Only use one MLIRContext per MLIRTextFile (details)
  92. [Bazel] Drop deprecated tblgen includes mechanism (details)
  93. [X86] Remove -x86-experimental-pref-loop-alignment in favor of -align-loops (details)
  94. [WebAssembly] Make result of 'catch' inst variadic (details)
  95. [llvm-nm][test] Avoid deprecated alias -M (--print-armap) (details)
  96. [OpenCL] allow generic address and non-generic defs for CL3.0 (details)
  97. [mlir][sparse] Remove comment w/ code in it (details)
  98. [gwpAsan] revert minor change (details)
  99. Apply -fmacro-prefix-map to __builtin_FILE() (details)
  100. [AArch64][GlobalISel] Legalize wide vector G_PHIs (details)
  101. Adding missing filter check to SourceMgrDiagnosticHandler::EmitDiagnostics (details)
  102. BPF: avoid NE/EQ loop exit condition (details)
  103. [CSSPGO] Remove used of PseudoProbeAttributes::Reserved (details)
  104. [libFuzzer] tests/examples for using libFuzzer for out-of-process targets (details)
  105. [Bazel] Add support for lld (details)
  106. [CMake][gn] lldMachO=>lldMachOOld, lldMachO2=>lldMachO (details)
  107. [mlir] Update comment in Region.h (details)
  108. [AVR] emit 'MCSA_Global' references to '__do_global_ctors' and '__do_global_dtors' (details)
  109. [Compiler-RT] On Apple Platforms switch to always emitting full debug info (details)
  110. Disable LibFuncs for stpcpy and stpncpy for Android < 21 (details)
  111. [mlir] Clean up includes in Transforms/Passes.h (details)
  112. [WebAssembly] Use `SDValue::getConstantOperandVal` (NFC) (details)
  113. [WebAssembly] Cleanup Emscripten SjLj tests (details)
Commit 432341d8a81afb95f12ca8e91fbbb4a4b526856f by stephen.neuendorffer
[mlir] Handle cases where transfer_read should turn into a scalar load

The existing vector transforms reduce the dimension of transfer_read
ops.  However, beyond a certain point, the vector op actually has
to be reduced to a scalar load, since we can't load a zero-dimension
vector.  This handles this case.

Note that in the longer term, it may be preferaby to support
zero-dimension vectors.  see
https://llvm.discourse.group/t/should-we-have-0-d-vectors/3097.

Differential Revision: https://reviews.llvm.org/D103432
The file was modifiedmlir/test/Dialect/Vector/vector-transfer-lowering.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
Commit 737e27f6236f18dcac53130242756ba0cc1dfe7d by esme.yi
[llvm-readobj][XCOFF] dump the string table only if the size is bigger than 4.
The file was modifiedllvm/test/tools/llvm-readobj/XCOFF/string-table.yaml
The file was modifiedllvm/tools/llvm-readobj/XCOFFDumper.cpp
Commit 8385de118443144518c9fba8b3d831d9076e746b by akuegel
[mlir][Bazel] Adjust BUILD.bazel file.

The dependency is needed after 1b00b94ffc2d60

Differential Revision: https://reviews.llvm.org/D107426
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Commit 486b6013f967ff80f8fa4d20bf5b93e94ce72aa0 by i
[Support] Initialize common options in `getRegisteredOptions`

This allows users accessing options in libSupport before invoking
`cl::ParseCommandLineOptions`, and also matches the behavior before
D105959.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D106334
The file was addedllvm/unittests/Support/CommandLineInit/CommandLineInitTest.cpp
The file was modifiedllvm/unittests/Support/CMakeLists.txt
The file was addedllvm/unittests/Support/CommandLineInit/CMakeLists.txt
The file was modifiedllvm/lib/Support/CommandLine.cpp
Commit 30fbb06979077740961ebc46853e28ab1f999f9d by sjoerd.meijer
[FuncSpec] Support specialising recursive functions

This adds support for specialising recursive functions. For example:

    int Global = 1;
    void recursiveFunc(int *arg) {
      if (*arg < 4) {
        print(*arg);
        recursiveFunc(*arg + 1);
      }
    }
    void main() {
      recursiveFunc(&Global);
    }

After 3 iterations of function specialisation, followed by inlining of the
specialised versions of recursiveFunc, the main function looks like this:

    void main() {
      print(1);
      print(2);
      print(3);
    }

To support this, the following has been added:
- Update the solver and state of the new specialised functions,
- An optimisation to propagate constant stack values after each iteration of
  function specialisation, which is necessary for the next iteration to
  recognise the constant values and trigger.

Specialising recursive functions is (at the moment) controlled by option
-func-specialization-max-iters and is opt-in for compile-time reasons. I.e.,
the default is -func-specialization-max-iters=1, but for the example above we
would need to use -func-specialization-max-iters=3. Future work is to see if we
can increase the default, or improve the cost-model/heuristics to control
compile-times.

Differential Revision: https://reviews.llvm.org/D106426
The file was modifiedllvm/lib/Transforms/IPO/FunctionSpecialization.cpp
The file was addedllvm/test/Transforms/FunctionSpecialization/function-specialization-recursive3.ll
The file was addedllvm/test/Transforms/FunctionSpecialization/function-specialization-recursive4.ll
The file was modifiedllvm/test/Transforms/FunctionSpecialization/function-specialization-recursive.ll
The file was addedllvm/test/Transforms/FunctionSpecialization/function-specialization-recursive2.ll
Commit 2f002817fb462d01d26374015421a24fa2a5a676 by andre.simoesdiasvieira
[libc] Fix Memory Benchmarks code after rename

Differential Revision: https://reviews.llvm.org/D107376
The file was modifiedlibc/benchmarks/LibcMemoryBenchmarkMain.cpp
Commit 16ff91ebccda1128c43ff3cee104e2c603569fb2 by sepavloff
Introduce intrinsic llvm.isnan

Clang has builtin function '__builtin_isnan', which implements C
library function 'isnan'. This function now is implemented entirely in
clang codegen, which expands the function into set of IR operations.
There are three mechanisms by which the expansion can be made.

* The most common mechanism is using an unordered comparison made by
  instruction 'fcmp uno'. This simple solution is target-independent
  and works well in most cases. It however is not suitable if floating
  point exceptions are tracked. Corresponding IEEE 754 operation and C
  function must never raise FP exception, even if the argument is a
  signaling NaN. Compare instructions usually does not have such
  property, they raise 'invalid' exception in such case. So this
  mechanism is unsuitable when exception behavior is strict. In
  particular it could result in unexpected trapping if argument is SNaN.

* Another solution was implemented in https://reviews.llvm.org/D95948.
  It is used in the cases when raising FP exceptions by 'isnan' is not
  allowed. This solution implements 'isnan' using integer operations.
  It solves the problem of exceptions, but offers one solution for all
  targets, however some can do the check in more efficient way.

* Solution implemented by https://reviews.llvm.org/D96568 introduced a
  hook 'clang::TargetCodeGenInfo::testFPKind', which injects target
  specific code into IR. Now only SystemZ implements this hook and it
  generates a call to target specific intrinsic function.

Although these mechanisms allow to implement 'isnan' with enough
efficiency, expanding 'isnan' in clang has drawbacks:

* The operation 'isnan' is hidden behind generic integer operations or
  target-specific intrinsics. It complicates analysis and can prevent
  some optimizations.

* IR can be created by tools other than clang, in this case treatment
  of 'isnan' has to be duplicated in that tool.

Another issue with the current implementation of 'isnan' comes from the
use of options '-ffast-math' or '-fno-honor-nans'. If such option is
specified, 'fcmp uno' may be optimized to 'false'. It is valid
optimization in general, but it results in 'isnan' always returning
'false'. For example, in some libc++ implementations the following code
returns 'false':

    std::isnan(std::numeric_limits<float>::quiet_NaN())

The options '-ffast-math' and '-fno-honor-nans' imply that FP operation
operands are never NaNs. This assumption however should not be applied
to the functions that check FP number properties, including 'isnan'. If
such function returns expected result instead of actually making
checks, it becomes useless in many cases. The option '-ffast-math' is
often used for performance critical code, as it can speed up execution
by the expense of manual treatment of corner cases. If 'isnan' returns
assumed result, a user cannot use it in the manual treatment of NaNs
and has to invent replacements, like making the check using integer
operations. There is a discussion in https://reviews.llvm.org/D18513#387418,
which also expresses the opinion, that limitations imposed by
'-ffast-math' should be applied only to 'math' functions but not to
'tests'.

To overcome these drawbacks, this change introduces a new IR intrinsic
function 'llvm.isnan', which realizes the check as specified by IEEE-754
and C standards in target-agnostic way. During IR transformations it
does not undergo undesirable optimizations. It reaches instruction
selection, where is lowered in target-dependent way. The lowering can
vary depending on options like '-ffast-math' or '-ffp-model' so the
resulting code satisfies requested semantics.

Differential Revision: https://reviews.llvm.org/D104854
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was addedllvm/test/CodeGen/PowerPC/ppc-fpclass.ll
The file was addedllvm/test/Transforms/InstCombine/fpclass.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was addedllvm/test/Transforms/InstSimplify/ConstProp/fpclassify.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was addedllvm/test/CodeGen/X86/x86-fpclass.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
The file was modifiedclang/test/CodeGen/aarch64-strictfp-builtins.c
The file was addedllvm/test/CodeGen/AArch64/aarch64-fpclass.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/test/CodeGen/X86/strictfp_builtins.c
The file was modifiedclang/test/CodeGen/strictfp_builtins.c
Commit d7b0e5525a4e809cf61a4e1c82f000af781cbab4 by Tim Northover
X86: fix frame offset calculation with mandatory tail calls

If there's a region of the stack reserved for potential tail call arguments
(only the case when we guarantee tail calls will be honoured), this is right
next to the incoming stored return address, not necessarily next to the
callee-saved area, so combining the two into a single figure leads to incorrect
offsets in some edge cases.
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
Commit e4977f9cb58ff7820d0287ba309490af57787749 by Raphael Isemann
[lldb] Partly revert "Allow range-based for loops over DWARFDIE's children"

As pointed out in D107434 by Walter, D103172 also changed two for loops that
were actually not just iterating over some DIEs but also using the iteration
variable later on for some other things. This patch reverts the respective
faulty parts of D103172.
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
Commit b1802d694c1cce753d4e54b5924c68c7621d9dc7 by david.spickett
[llvm][ExecutionEngine] Don't try to run tests on ARM64/Windows on Arm

We use CMAKE_SYSTEM_PROCESSOR to set the host_arch lit feature.
This is going to be the same value as CMAKE_HOST_SYSTEM_PROCESSOR,
which on windows is set to the value of the PROCESSOR_ARCHITECTURE
environment variable.

https://cmake.org/cmake/help/latest/variable/CMAKE_HOST_SYSTEM_PROCESSOR.html#cmake-host-system-processor

On Windows on Arm this is "ARM64", not "AArch64" as we currently
look for.

https://docs.microsoft.com/en-us/windows/win32/winprog64/wow64-implementation-details#environment-variables

Add ARM64 to the unsupported list.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D107361
The file was modifiedllvm/test/ExecutionEngine/lit.local.cfg
Commit 0092dbcd80f208f7becec002e70bad5b35a081cd by kimanh
[lldb] Fix lookup of .debug_loclists with split-dwarf

This patch fixes the lookup of locations in
.debug_loclists, if they are split in a .dwp file.

Mainly, we need to consider the cu index offsets.

Reviewed By: jankratochvil

Differential Revision: https://reviews.llvm.org/D107161
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
The file was addedlldb/test/Shell/SymbolFile/DWARF/x86/debug_loclists-dwp.s
Commit fc8dee1ebb9e3a660b18330888edad95ce893422 by llvm-dev
[X86] Split Subtarget ISA / Security / Tuning Feature Flags Definitions. NFC

Our list of slow/fast tuning feature flags has become pretty extensive and is randomly interleaved with ISA and Security (Retpoline etc.) flags, not even based on when the ISAs/flags were introduced, making it tricky to locate them. Plus we started treating tuning flags separately some time ago, so this patch tries to group the flags to match.

I've left them mostly in the same order within each group - I'm happy to rearrange them further if there are specific ISA or Tuning flags that you think should be kept closer together.

Differential Revision: https://reviews.llvm.org/D107370
The file was modifiedllvm/lib/Target/X86/X86.td
Commit 0c28a7c990c5218d6aec47c5052a51cba686ec5e by sepavloff
Revert "Introduce intrinsic llvm.isnan"

This reverts commit 16ff91ebccda1128c43ff3cee104e2c603569fb2.
Several errors were reported mainly test-suite execution time. Reverted
for investigation.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedclang/test/CodeGen/aarch64-strictfp-builtins.c
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was removedllvm/test/Transforms/InstSimplify/ConstProp/fpclassify.ll
The file was modifiedclang/test/CodeGen/strictfp_builtins.c
The file was removedllvm/test/Transforms/InstCombine/fpclass.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was removedllvm/test/CodeGen/AArch64/aarch64-fpclass.ll
The file was removedllvm/test/CodeGen/PowerPC/ppc-fpclass.ll
The file was modifiedllvm/lib/Analysis/ConstantFolding.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was removedllvm/test/CodeGen/X86/x86-fpclass.ll
The file was modifiedclang/test/CodeGen/X86/strictfp_builtins.c
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
Commit 7f163931b9421c61fe1859fd8b2d97e7f5a39c73 by springerm
[mlir] Fix CMake linker rules for ViewOpGraph.cpp

Differential Revision: https://reviews.llvm.org/D107439
The file was modifiedmlir/lib/Support/CMakeLists.txt
The file was modifiedmlir/lib/Transforms/CMakeLists.txt
Commit f968bd77bbcf142afdb74750e53485b044de3e5f by Raphael Isemann
Reland "[lldb/DWARF] Only match mangled name in full-name function lookup (with accelerators)"

Summary:

In the spirit of https://reviews.llvm.org/D70846, we only return functions with
matching mangled name from Apple/DebugNamesDWARFIndex::GetFunction if
eFunctionNameTypeFull is requested.

This speeds up lookup in the presence of large amount of class methods of the
same name (a typical examples would be constructors of templates with many
instantiations or overloaded operators).

Reviewers: labath, teemperor

Reviewed By: labath, teemperor

Subscribers: aprantl, arphaman, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D73191
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/x86/find-basic-function.cpp
The file was modifiedlldb/test/API/lang/cpp/printf/TestPrintf.py
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFIndex.cpp
Commit 13e145fe76c4c24c0f76115250b9249015fbf7ee by Tim Northover
X86: add test for realignment fix committed earlier.

Forgot "git add" for a new file.
The file was addedllvm/test/CodeGen/X86/swifttail-realign.ll
Commit 6f8c4340c2bafd7440b3c264a7977ce3cc17c465 by david.spickett
[llvm][MC] Disable cfi-version test for Windows on Arm

Like Windows on x86-64, Windows on arm64 uses structured
exception handling, so we don't emit .debug_frame.

See:
https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling?view=msvc-160

Reviewed By: ostannard

Differential Revision: https://reviews.llvm.org/D107440
The file was modifiedllvm/test/lit.cfg.py
The file was modifiedllvm/test/MC/ELF/cfi-version.ll
Commit d3faecbb7c04022f5cc62fe706cd9e5cf8343caf by dvyukov
tsan: minor MetaMap tweaks

1. Add some comments.
2. Use kInvalidStackID instead of literal 0.
3. Add more LIKELY/UNLIKELY.

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D107371
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.h
Commit 14e306fa4b0fb72710f2b696602fc356de59175d by dvyukov
tsan: use DCHECK instead of CHECK in atomic functions

Atomic functions are semi-hot in profiles.
The CHECKs verify values passed by compiler
and they never fired, so replace them with DCHECKs.

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D107373
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
Commit 636428c727cdcfe37b8e950e32d10f06fa4f5dfa by dvyukov
tsan: unify __cxa_guard_acquire and pthread_once implementations

Currently we effectively duplicate "once" logic for __cxa_guard_acquire
and pthread_once. Unify the implementations.

This is not a no-op change:
- constants used for pthread_once are changed to match __cxa_guard_acquire
   (__cxa_guard_acquire constants are tied to ABI, but it does not seem
   to be the case for pthread_once)
- pthread_once now also uses PotentiallyBlockingRegion annotations
- __cxa_guard_acquire checks thr->in_ignored_lib to skip user synchronization
It's unclear if these 2 differences are intentional or a mere sloppy inconsistency.
Since all tests still pass, let's assume the latter.

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D107359
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Commit 9102a16bef1aa8c780f440f8ac7d71090d1a96c1 by springerm
[mlir] Support drawing control-flow graphs in ViewOpGraph.cpp

* Add new pass option `print-data-flow-edges`, default value `true`.
* Add new pass option `print-control-flow-edges`, default value `false`.
* Remove `PrintCFGPass`. Same functionality now provided by
  `PrintOpPass`.

Differential Revision: https://reviews.llvm.org/D106342
The file was modifiedmlir/include/mlir/Transforms/Passes.h
The file was modifiedmlir/lib/Transforms/NormalizeMemRefs.cpp
The file was modifiedmlir/lib/Transforms/ViewOpGraph.cpp
The file was modifiedmlir/lib/Transforms/CMakeLists.txt
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was removedmlir/lib/Transforms/ViewRegionGraph.cpp
The file was removedmlir/include/mlir/Transforms/ViewRegionGraph.h
The file was modifiedmlir/test/Transforms/print-op-graph.mlir
Commit 0556138624edf48621dd49a463dbe12e7101f17d by Jan Svoboda
[clang][cli] Expose -fno-cxx-modules in cc1

For some use-cases, it might be useful to be able to turn off modules for C++ in `-cc1`. (The feature is implied by `-std=C++20`.)

This patch exposes the `-fno-cxx-modules` option in `-cc1`.

Reviewed By: arphaman

Differential Revision: https://reviews.llvm.org/D106864
The file was modifiedclang/include/clang/Driver/Options.td
The file was addedclang/test/Modules/cxx20-disable.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
Commit 0bc626d516a201953ef6a45be0d059d70672d7db by dvyukov
tsan: refactor guard_acquire/release

Introduce named consts for magic values we use.

Differential Revision: https://reviews.llvm.org/D107445
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Commit 2718ae397b29f339e65c1e3ca5e834b648732d20 by Jan Svoboda
[clang][deps] Substitute clang-scan-deps executable in lit tests

The lit tests for `clang-scan-deps` invoke the tool without going through the substitution system. While the test runner correctly picks up the `clang-scan-deps` binary from the build directory, it doesn't print its absolute path. When copying the invocations when reproducing test failures, this can result in `command not found: clang-scan-deps` errors or worse yet: pick up the system `clang-scan-deps`. This patch adds new local `%clang-scan-deps` substitution.

Reviewed By: lxfind, dblaikie

Differential Revision: https://reviews.llvm.org/D107155
The file was modifiedclang/test/lit.cfg.py
Commit e3f4c63e78b1ed54f0a35aeb30730e5c74bcfeed by dvyukov
tsan: don't use spinning in __cxa_guard_acquire/pthread_once

Currently we use passive spinning with internal_sched_yield to wait
in __cxa_guard_acquire/pthread_once. Passive spinning tends to degrade
ungracefully under high load. Use FutexWait/Wake instead.

Depends on D107359.

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D107360
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Commit f2128abec2030f6534d46f877e3ab2bcc3b5af4c by omair.javaid
[LLDB] Skip flaky tests on Arm/AArch64 Linux bots

Following LLDB tests fail randomly on LLDB Arm/AArch64 Linux buildbots.
We still not have a reliable solution for these tests to pass
consistently. I am marking them skipped for now.

TestBreakpointCallbackCommandSource.py
TestIOHandlerResize.py
TestEditline.py
TestGuiViewLarge.py
TestGuiExpandThreadsTree.py
TestGuiBreakpoints.py
The file was modifiedlldb/test/API/functionalities/breakpoint/breakpoint_callback_command_source/TestBreakpointCallbackCommandSource.py
The file was modifiedlldb/test/API/commands/gui/viewlarge/TestGuiViewLarge.py
The file was modifiedlldb/test/API/terminal/TestEditline.py
The file was modifiedlldb/test/API/iohandler/resize/TestIOHandlerResize.py
The file was modifiedlldb/test/API/commands/gui/expand-threads-tree/TestGuiExpandThreadsTree.py
The file was modifiedlldb/test/API/commands/gui/breakpoints/TestGuiBreakpoints.py
Commit 17e8ac0703e1a3b5e269e3535d862cad39e0cf43 by llvm-dev
[X86] Move FeatureFastBEXTR from bdver2 features to tuning

Noticed while looking at the feature flag renaming suggested in D107370
The file was modifiedllvm/lib/Target/X86/X86.td
Commit 8cd40ece70e59b86b6915f9b52fc8becba8cbe4f by llvm-dev
[X86] Rename X86 tuning feature flag FeatureHasFastGather -> FeatureFastGather

Match the naming style used by the other 'FeatureFast/FeatureSlow' tuning flags.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/lib/Target/X86/X86.td
Commit b6408fa169d6c12886af20bd44d6228f2272960c by springerm
[mlir] Include llvm/Support/Debug.h in Transforms/Passes.h

There are many downstream users of llvm::dbgs, which is defined in Debug.h. Before D106342, many users included that dependency transitively via the now deleted ViewRegionGraph.h. Adding it back to Transforms/Passes.h for convenience.

Differential Revision: https://reviews.llvm.org/D107451
The file was modifiedmlir/lib/Transforms/NormalizeMemRefs.cpp
The file was modifiedmlir/include/mlir/Transforms/Passes.h
Commit ff9958b70e959bf48f5d308fb4431c76d3984ae4 by david.green
[ARM] Test showing incorrect codegen when subreg liveness is enabled. NFC
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/subreg-liveness.mir
Commit eeddcba5254b62b7fef03f394820ff4314f2cf19 by david.green
[RDA] Attempt to make RDA subreg aware

This attempts to make more of RDA aware of potentially overlapping
subregisters. Some of this was already in place, with it iterating
through MCRegUnitIterators. This also replaces calls to
LiveRegs.contains(..) with !LiveRegs.available(..), and updates the
isValidRegUseOf and isValidRegDefOf to search subregs.

Differential Revision: https://reviews.llvm.org/D107351
The file was modifiedllvm/lib/CodeGen/ReachingDefAnalysis.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/subreg-liveness.mir
Commit b44eb5a149a3d78b164a3e9f5c9cf52b44ce0163 by springerm
[flang] Add missing FileSystem.h

This file was previously included transitively via `mlir/Transforms/Passes.h`, but the include has been removed from that file.

Differential Revision: https://reviews.llvm.org/D107455
The file was modifiedflang/tools/tco/tco.cpp
Commit 438f700b4d9e4fca1fd6fd932e53ac8ef1ec15ca by springerm
[mlir] Fix gcc-5 build in ViewOpGraph.cpp

Differential Revision: https://reviews.llvm.org/D107458
The file was modifiedmlir/lib/Transforms/ViewOpGraph.cpp
Commit f819e4c7d0f6efef3cc1042cc45582320bf6c0a2 by lebedev.ri
[X86] combineX86ShuffleChain(): canonicalize mask elts picking from splats

Given a shuffle mask, if it is picking from an input that is splat
given the current granularity of the shuffle, then adjust the mask
to pick from the same lane of the input as the mask element is in.
This may result in a shuffle being simplified into a blend.

I believe this is correct given that the splat detection matches the one
just above the new code,

My basic thought is that we might be able to get less regressions
by handling multiple insertions of the same value into a vector
if we form broadcasts+blend here, as opposed to D105390,
but i have not really thought this through,
and did not try implementing it yet.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D107009
The file was modifiedllvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v32.ll
The file was modifiedllvm/test/CodeGen/X86/sse41.ll
The file was modifiedllvm/test/CodeGen/X86/avx.ll
The file was modifiedllvm/test/CodeGen/X86/pr15296.ll
Commit 40650f27b5df95b2f96d25ea03976d8136804441 by tomas.matheson
[ARM][atomicrmw] Fix CMP_SWAP_32 expand assert

This assert is intended to ensure that the high registers are not
selected when it is passed to one of the thumb UXT instructions. However
it was triggering even for 32 bit where no UXT instruction is emitted.

Fixes PR51313.

Differential Revision: https://reviews.llvm.org/D107363
The file was modifiedllvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
The file was modifiedllvm/test/CodeGen/ARM/cmpxchg.mir
Commit 916cdc3d4b66cf9658280cccb69a56eb6b403cdf by lebedev.ri
[NFC][X86] combineX86ShuffleChain(): rename inner Mask to avoid future shadowing

I want to hoist `Mask` variable higher up,
but then it would clash with this one.
So let's rename this one first.

There are no other intentional changes here other than said rename.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 35c0848b570214ed2b2d96cca4dd62bb7ae725cd by lebedev.ri
[NFC][X86] combineX86ShuffleChain(): hoist Mask variable higher up

Having `NewMask` outside of an if and rebinding `BaseMask` `ArrayRef`
to it is confusing. Instead, just move the `Mask` vector higher up,
and change the code that earlier had no access to it but now does
to use `Mask` instead of `BaseMask`.

This has no other intentional changes.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit d42e70b3d315645e37f3b1455d39e68678e69525 by Reshabhkumar.Sharma
[AMDGPU] Handle functions in llvm's global ctors and dtors list

This patch introduces a new code object metadata field, ".kind"
which is used to add support for init and fini kernels.

HSAStreamer will use function attributes, "device-init" and
"device-fini" to distinguish between init and fini kernels from
the regular kernels and will emit metadata with ".kind" set to
"init" and "fini" respectively.

To reduce the number of init and fini kernels, the ctors and
dtors present in the llvm's global.ctors and global.dtors lists
are called from a single init and fini kernel respectively.

Reviewed by: yaxunl

Differential Revision: https://reviews.llvm.org/D105682
The file was addedllvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llc-pipeline.ll
The file was addedllvm/lib/Target/AMDGPU/AMDGPUCtorDtorLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
The file was addedllvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
The file was addedllvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ctor-dtor-list.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.h
Commit 785f37b2073f856f4b6b4eeeb3023d0f40e1e103 by kazu
[ADT] Drop unnecessary const from return types (NFC)

Identified with const-return-type-APInt.
The file was modifiedllvm/include/llvm/ADT/APInt.h
Commit 027d3b747e7d8e82d9cc35f8b3689fec5fd09779 by jay.foad
[AMDGPU] Generate checks for i64 to fp conversions

Differential Revision: https://reviews.llvm.org/D107429
The file was modifiedllvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
Commit 21ee38e24f9801a567306b2a88defacf6e589a8b by chris.jackson
[DebugInfo][LSR] Avoid crashes on large integer inputs

SCEV-based salvaging in LSR translates SCEVs to DIExpressions. SCEVs may
contain very large integers but the translation does not support
integers greater than 64 bits. This patch adds checks to ensure
conversions of these large integers is not attempted. A regression test
is added to ensure no such translation is attempted.

Reviewed by: StephenTozer

PR: https://bugs.llvm.org/show_bug.cgi?id=51329

Differential Revision: https://reviews.llvm.org/D107438
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was addedllvm/test/Transforms/LoopStrengthReduce/pr51329.ll
Commit ba5c4ac60090052836418dca7c7f1b7d7ed18dcc by jay.foad
[AMDGPU] Add cttz tests and globalisel checks for ctlz
The file was modifiedllvm/test/CodeGen/AMDGPU/ctlz.ll
The file was addedllvm/test/CodeGen/AMDGPU/cttz.ll
Commit b8f612e780e50cfb62bc0196b6367e4587949f88 by sd.fertile
[PowerPC][AIX] Packed zero-width bitfields do not affect alignment.

Zero-width bitfields on AIX pad out to the natral alignment boundary but
do not change the containing records alignment.

Differential Revision: https://reviews.llvm.org/D106900
The file was modifiedclang/lib/AST/RecordLayoutBuilder.cpp
The file was modifiedclang/test/Layout/aix-packed-bitfields.c
Commit 926975267175eeef921c6f84e25c93b00a359a05 by simon.wallis2
[AArch64] Fix assert AArch64TargetLowering::ReplaceNodeResults

Don't know how to custom expand this
UNREACHABLE executed at llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:16788

The fix is to provide missing expansions for:
  case ISD::STRICT_FP_TO_UINT:
  case ISD::STRICT_FP_TO_SINT:

A test case is provided.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D107452
The file was addedllvm/test/CodeGen/AArch64/fptosi-strictfp.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit f3eb5f900d2ae6c8e1c03d1b250415a7b7aa39b1 by Pushpinder.Singh
[AMDGPU][OpenMP] Wrap amdgcn declare variant inside ifdef

This fixes the issue https://bugs.llvm.org/show_bug.cgi?id=51337

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D107468
The file was modifiedclang/lib/Headers/openmp_wrappers/__clang_openmp_device_functions.h
Commit 478c71bf95d2e88297e01d450e0c10c847cb8037 by ajcbik
[mlir][amx] add doc to AMX dialect

Making sure the AMX dialect webpage reads better with a short introduction on the purpose of this dialect.

Reviewed By: grosul1, bondhugula

Differential Revision: https://reviews.llvm.org/D107419
The file was modifiedmlir/include/mlir/Dialect/AMX/AMX.td
Commit d9cc5d84e4d3bf45df1ef87e677e3ec1431b59b5 by bradley.smith
[AArch64][SVE] Combine bitcasts of predicate types with vector inserts/extracts of loads/stores

An insert subvector that is inserting the result of a vector predicate
sized load into undef at index 0, whose result is casted to a predicate
type, can be combined into a direct predicate load. Likewise the same
applies to extract subvector but in reverse.

The purpose of this optimization is to clean up cases that will be
introduced in a later patch where casts to/from predicate types from i8
types will use insert subvector, rather than going through memory early.

This optimization is done in SVEIntrinsicOpts rather than InstCombine to
re-introduce scalable loads as late as possible, to give other
optimizations the best chance possible to do a good job.

Differential Revision: https://reviews.llvm.org/D106549
The file was addedllvm/test/CodeGen/AArch64/sve-extract-vector-to-predicate-store.ll
The file was modifiedllvm/lib/Target/AArch64/SVEIntrinsicOpts.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-insert-vector-to-predicate-load.ll
Commit b4a1eab941bda4c56dca685749b59a99076caebe by ajcbik
[mlir][sparse] fixed typo in sparse tensor type attribute alias

Reviewed By: grosul1, rriddle

Differential Revision: https://reviews.llvm.org/D107472
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
Commit 9bd29a73d17add45234a35de5f6ad7ca8321f7f9 by i
[ELF] Make dot in .tbss correct

GNU ld doesn't support multiple SHF_TLS SHT_NOBITS output sections (it restores
the address after an SHF_TLS SHT_NOBITS section, so consecutive SHF_TLS
SHT_NOBITS sections will have conflicting address ranges).

That said, `threadBssOffset` implements limited support for consecutive SHF_TLS
SHT_NOBITS sections. (SHF_TLS SHT_PROGBITS following a SHF_TLS SHT_NOBITS can still be
incorrect.)

`.` in an output section description of an SHF_TLS SHT_NOBITS section is
incorrect. (https://lists.llvm.org/pipermail/llvm-dev/2021-July/151974.html)

This patch saves the end address of the previous tbss section in
`ctx->tbssAddr`, changes `dot` in the beginning of `assignOffset` so
that `.` evaluation will be correct.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D107208
The file was modifiedlld/test/ELF/linkerscript/tbss.s
The file was modifiedlld/ELF/LinkerScript.cpp
The file was modifiedlld/ELF/LinkerScript.h
Commit 3bc8ce5dd718beef0031bf4b070ac4026e6910d7 by protze
[openmp] Add OMPT initialization in libomptarget

When loading libomptarget, the init function in libomptarget/src/rtl.cpp
will search for the libomptarget_start_tool function using libdl.
libomptarget_start_tool will pass those OMPT callbacks related to target
constructs to libomptarget

Differential Revision: https://reviews.llvm.org/D99803
The file was modifiedopenmp/runtime/src/exports_so.txt
The file was modifiedopenmp/runtime/src/ompt-internal.h
The file was modifiedopenmp/runtime/src/ompt-general.cpp
The file was addedopenmp/libomptarget/src/ompt-target.h
The file was modifiedopenmp/libomptarget/src/CMakeLists.txt
The file was modifiedopenmp/runtime/src/ompt-event-specific.h
The file was modifiedopenmp/libomptarget/CMakeLists.txt
The file was addedopenmp/libomptarget/src/ompt-target.cpp
The file was modifiedopenmp/runtime/cmake/config-ix.cmake
The file was modifiedopenmp/runtime/src/include/omp-tools.h.var
The file was modifiedopenmp/libomptarget/src/rtl.cpp
Commit 7ed22a6fa90cbdc70d6806c1121a0c50c1978dce by i
[ELF] Apply version script patterns to non-default version symbols

Currently version script patterns are ignored for .symver produced
non-default version (single @) symbols. This makes such symbols
not localizable by `local:`, e.g.

```
.symver foo3_v1,foo3@v1
.globl foo_v1
foo3_v1:

ld.lld --version-script=a.ver -shared a.o
# In a.out, foo3@v1 is incorrectly exported.
```

This patch adds the support:

* Move `config->versionDefinitions[VER_NDX_LOCAL].patterns` to `config->versionDefinitions[versionId].localPatterns`
* Rename `config->versionDefinitions[versionId].patterns` to `config->versionDefinitions[versionId].nonLocalPatterns`
* Allow `findAllByVersion` to find non-default version symbols when `includeNonDefault` is true. (Note: `symtab` keys do not have `@@`)
* Make each pattern check both the unversioned `pat.name` and the versioned `${pat.name}@${v.name}`
* `localPatterns` can localize `${pat.name}@${v.name}`. `nonLocalPatterns` can prevent localization by assigning `verdefIndex` (before `parseSymbolVersion`).

---

If a user notices new `undefined symbol` errors with a version script containing
`local: *;`, the issue is likely due to a missing `global:` pattern.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D107234
The file was modifiedlld/ELF/Symbols.cpp
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/ELF/SymbolTable.h
The file was removedlld/test/ELF/version-script-extern.s
The file was addedlld/test/ELF/version-script-symver-extern.s
The file was modifiedlld/ELF/ScriptParser.cpp
The file was modifiedlld/ELF/SymbolTable.cpp
The file was removedlld/test/ELF/version-script-extern-wildcards.s
The file was modifiedlld/test/ELF/version-script-symver.s
The file was modifiedlld/test/ELF/version-script-noundef.s
The file was modifiedlld/ELF/Config.h
The file was removedlld/test/ELF/version-script-extern-exact.s
Commit d41233e9cf12b85b4f856fe6f4c881211b29534c by dvyukov
tsan: introduce kAccessFree

Add kAccessFree memory access flag (similar to kAccessVptr).
In preparation for MemoryAccess refactoring.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107464
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
Commit 2ddaffdc74ec4e17d2df93729a2f20ec773f08f5 by dvyukov
tsan: introduce kAccessExternalPC

Add kAccessExternal memory access flag that denotes
memory accesses with PCs that may have kExternalPCBit set.
In preparation for MemoryAccess refactoring.
Currently unused, but will allow to skip a branch.

Depends on D107464.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107465
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface.inc
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
Commit c2598be8bcf2cf27391b9e77f9b509e24788e7a1 by dvyukov
tsan: move AccessType to tsan_defs.h

It will be needed in more functions like ReportRace
(the plan is to pass it through MemoryAccess to ReportRace)
and this move will allow to split the huge tsan_rtl.h into parts
(e.g. move FastState/Shadow definitions to a separate header).

Depends on D107465.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107466
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_defs.h
Commit bdeb15c34eac9884f48a324004708e66ff76557b by dvyukov
tsan: remove non-existent MemoryAccessRangeStep

Probably was used for Go at some point...

Depends on D107466.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107467
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
Commit 66d4430492131a2205f159071c15e90c10e2fced by i
[ELF] Combine foo@v1 and foo with the same versionId if both are defined

Due to an assembler design flaw (IMO), `.symver foo,foo@v1` produces two symbols `foo` and `foo@v1` if `foo` is defined.

* `v1 {};` produces both `foo` and `foo@v1`, but GNU ld only produces `foo@v1`
* `v1 { foo; };` produces both `foo@@v1` and `foo@v1`, but GNU ld only produces `foo@v1`
* `v2 { foo; };` produces both `foo@@v2` and `foo@v1`, matching GNU ld. (Tested by symver.s)

This patch implements the GNU ld behavior by reusing the symbol redirection mechanism
in D92259. The new test symver-non-default.s checks the first two cases.

Without the patch, the second case will produce `foo@v1` and `foo@@v1` which
looks weird and makes foo unnecessarily default versioned.

Note: `.symver foo,foo@v1,remove` exists but the unfortunate `foo` will not go
away anytime soon.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D107235
The file was addedlld/test/ELF/symver-non-default.s
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/test/ELF/version-symbol-undef.s
The file was modifiedlld/test/ELF/version-script-symver.s
Commit e57e1e4e00264b77b2b35ad2bf419a48aecdd6bc by bradley.smith
[clang][AArch64][SVE] Avoid going through memory for fixed/scalable predicate casts

For fixed SVE types, predicates are represented using vectors of i8,
where as for scalable types they are represented using vectors of i1. We
can avoid going through memory for casts between these by bitcasting the
i1 scalable vectors to/from a scalable i8 vector of matching size, which
can then use the existing vector insert/extract logic.

Differential Revision: https://reviews.llvm.org/D106860
The file was modifiedclang/lib/CodeGen/CGCall.cpp
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-globals.c
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-call.c
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
Commit fe6ae81ef3644bf216c9ca8d2c90150cd9f83a57 by sander.desmalen
[InstCombine] Fix vscale zext/sext optimization when vscale_range is unbounded.

According to the LangRef, a (vscale_range) value of 0 means unbounded.

This patch additionally cleans up the test file vscale_sext_and_zext.ll.
The file was modifiedllvm/test/Transforms/InstCombine/vscale_sext_and_zext.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
Commit ee7d20e84675e1d255d7ae59e3bccfd320cc090d by hoy
[CSSPGO] Migrate and refactor the decoder of Pseudo Probe

Migrate pseudo probe decoding logic in llvm-profgen to MC, so other LLVM-base program could reuse existing codes. Redesign object layout of encoded and decoded pseudo probes.

Reviewed By: hoy

Differential Revision: https://reviews.llvm.org/D106861
The file was modifiedllvm/lib/MC/CMakeLists.txt
The file was modifiedllvm/include/llvm/MC/MCPseudoProbe.h
The file was modifiedllvm/tools/llvm-profgen/ProfiledBinary.cpp
The file was modifiedllvm/tools/llvm-profgen/PerfReader.h
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.cpp
The file was modifiedllvm/tools/llvm-profgen/ProfiledBinary.h
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.h
The file was modifiedllvm/lib/MC/MCPseudoProbe.cpp
The file was modifiedllvm/tools/llvm-profgen/PerfReader.cpp
The file was modifiedllvm/tools/llvm-profgen/CMakeLists.txt
The file was removedllvm/tools/llvm-profgen/PseudoProbe.cpp
The file was removedllvm/tools/llvm-profgen/PseudoProbe.h
Commit 0a6aad5991ad0230bd435e2ff12f3e4e9614de58 by i
[ELF] Fix typo. NFC
The file was modifiedlld/ELF/Driver.cpp
Commit 9f5d6ea52eb120ba370bf16ee0537602c6fc727e by tianshilei1992
[OpenMP] Fix performance regression reported in bug #51235

This patch fixes the "performance regression" reported in https://bugs.llvm.org/show_bug.cgi?id=51235. In fact it has nothing to do with performance. The root cause is, the stolen task is not allowed to execute by another thread because by default it is tied task. Since hidden helper task will always be executed by hidden helper threads, it should be untied.

Reviewed By: protze.joachim

Differential Revision: https://reviews.llvm.org/D107121
The file was modifiedopenmp/runtime/src/kmp_tasking.cpp
Commit 680c71b127a995389869f51eaef24c7e9d0b2505 by tianshilei1992
[OpenMP] Clean up for hidden helper task

This patch makes some clean up for code of hidden helper task.

Reviewed By: protze.joachim

Differential Revision: https://reviews.llvm.org/D107008
The file was modifiedopenmp/runtime/src/kmp_tasking.cpp
The file was modifiedopenmp/runtime/src/kmp.h
The file was modifiedopenmp/runtime/src/kmp_taskdeps.h
Commit 7a1a35a1d1ae2e69769505c9f39910067c53d53b by andrea.dibiagio
[X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322).

This fixes a bug where implicit uses of EFLAGS were not marked as ReadAdvance in
the RM/MR variants of ADC/SBB (PR51318)

This also fixes the absence of ReadAdvance for the register operand of
RMW arithmetic instructions (PR51322).

Differential Revision: https://reviews.llvm.org/D107367
The file was modifiedllvm/test/tools/llvm-mca/X86/BtVer2/adc-sequence-readadvance.s
The file was modifiedllvm/test/tools/llvm-mca/X86/BtVer2/rmw-adc-sequence-readadvance.s
The file was modifiedllvm/test/tools/llvm-mca/X86/BtVer2/rmw-add-sequence-readadvance.s
The file was modifiedllvm/lib/Target/X86/X86InstrArithmetic.td
Commit b0d58ddf87b4ddd004f485e2cedc0494df8099e0 by gcmn
[Bazel] Update build for ee7d20e846

Updates the Bazel configuration for
https://github.com/llvm/llvm-project/commit/ee7d20e84675. We need to
drop the dependency from llvm-tblgen to avoid a dependency cycle:

```
.-> @llvm-project//llvm:llvm-tblgen
|   @llvm-project//llvm:tblgen
|   @llvm-project//llvm:MC
|   @llvm-project//llvm:ProfileData
|   @llvm-project//llvm:Core
|   @llvm-project//llvm:attributes_gen
|   @llvm-project//llvm:include/llvm/IR/Attributes.inc
|   @llvm-project//llvm:attributes_gen__gen_attrs_genrule
`-- @llvm-project//llvm:llvm-tblgen
```

It appears this dep was not strictly necessary though. TableGen uses MC
headers but it can get those through Support, which also exports MC
headers due to layering issues.

Differential Revision: https://reviews.llvm.org/D107480
The file was modifiedutils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Commit 6660cec568504df47d9becb0c552c20577880df8 by phosek
[InstrProfiling] Emit bias variable eagerly

Rather than emitting the bias variable lazily as needed, emit it
eagerly. This allows profile runtime to refer to this variable
unconditionally without having to use the weak reference. The bias
variable is in a COMDAT so there'll never be more than one instance,
and if it's not needed, linker should be able to GC it, so the overhead
should be minimal.

Differential Revision: https://reviews.llvm.org/D107377
The file was modifiedllvm/include/llvm/Transforms/Instrumentation/InstrProfiling.h
The file was addedllvm/test/Instrumentation/InstrProfiling/bias-var.ll
The file was modifiedllvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
Commit 7d97de60b3ecd52e2a427dff661cdd1ca99617e9 by Jessica Paquette
[AArch64][GlobalISel] Widen G_FPTO*I before clamping

Going through our legalization rules and doing some cleanup.

Widening and then clamping is usually easier than clamping and then widening.

This allows us to legalize some weird types like s88.

Differential Revision: https://reviews.llvm.org/D107413
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
Commit d9279843b1bafcfb1f540d3093b86023025b6717 by Jessica Paquette
[AArch64][GlobalISel] Widen G_PHI before clamping it during legalization

This allows us to handle weird types like s88; we first widen to s128, then
clamp back down to s64.

https://godbolt.org/z/9xqbP46Mz

Also this makes it possible for GISel to legalize the case in pr48188.ll. It
now does the same thing as SDAG, although regalloc chooses different registers.

Differential Revision: https://reviews.llvm.org/D107417
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
The file was modifiedllvm/test/CodeGen/AArch64/pr48188.ll
Commit 43a43353f71a609031eab4bb4a8d40bc74dbb753 by i
[gn build] (manually) port ee7d20e84675e1d255d7ae59e3bccfd320cc090d
The file was modifiedllvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn
Commit 6dc4baf7b64b2e34f758a9132948f6409a8280d3 by llvmgnsyncbot
[gn build] Port ee7d20e84675
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-profgen/BUILD.gn
Commit 9cf69ec11d4e86e8c42b0b903d31e1cfa14791e0 by ajcbik
[mlir][sparse] add doc to sparse tensor dialect passes

completes my first pass of filling out missing doc parts on our webpage

Reviewed By: grosul1

Differential Revision: https://reviews.llvm.org/D107479
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
Commit 643ce70a6466f043ab41d4044d57b71f80b98874 by craig.topper
[RISCV] Remove the _COMMUTABLE and _TA versions of FMA and wide FMA vector instructions.

Use a tail policy operand instead. Inspired by the work in D105092,
but without the intrinsic interface changes.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D106512
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.cpp
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrFormats.td
The file was modifiedllvm/lib/Target/RISCV/RISCVMCInstLower.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
Commit 238139be095236ebcd4274b3de5a750262c969c3 by dawid_jurek
[DSE][NFC] Clean up DeadStoreElimination from unused variables

Differential Revision: https://reviews.llvm.org/D106446
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit dce35ef104099923e9a9053424c003c28029b9fb by Reshabhkumar.Sharma
Revert "[AMDGPU] Handle functions in llvm's global ctors and dtors list"

This reverts commit d42e70b3d315645e37f3b1455d39e68678e69525.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llc-pipeline.ll
The file was removedllvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
The file was modifiedllvm/docs/AMDGPUUsage.rst
The file was removedllvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ctor-dtor-list.ll
The file was removedllvm/lib/Target/AMDGPU/AMDGPUCtorDtorLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.h
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
The file was removedllvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt
Commit 440d9712ebf6d5faa898daa68045ff0c10859db3 by dimitry
Work around non-existence of ElfW(type) macro on FreeBSD

Fixes PR51331. On FreeBSD, the elf headers don't (yet) provide the
ElfW(type) macro. However, there is a similar set of macros in the
<sys/elf-generic.h> header, of which `__ElfN(type)` exactly matches the
indended purpose.

Reviewed By: gulfem

Differential Revision: https://reviews.llvm.org/D107388
The file was modifiedcompiler-rt/lib/profile/InstrProfilingPlatformLinux.c
Commit 0ebb75608759cc1ee1016699e15d03e8e3f30d14 by 31459023+hctim
[hwasan] Add __hwasan_init constructor to runtime lib.

Found by an Android toolchain upgrade, inherited module constructors
(like init_have_lse_atomics from the builtins) can sneak into the hwasan
runtime. If these inherited constructors call hwasanified libc
functions, then the HWASan runtime isn't setup enough, and the code
crashes.

Mark the initialized as a high-priority initializer to fix this.

Reviewed By: pcc, yabinc

Differential Revision: https://reviews.llvm.org/D107391
The file was modifiedcompiler-rt/lib/hwasan/hwasan.cpp
Commit 214f99b27c009c815884d82fded65c4d006b532e by a.bataev
Revert "[SLP]Do not emit extra shuffle for insertelements vectorization."

This reverts commit 871ea69803b1f231254ab0c560795a33b6ed0c77 to fix the
problem if the first vector is not just undef.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/arith-fp-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/value-bug-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/arith-fp.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/vectorize-free-extracts-inserts.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 14f443030c1acc4346589aee3c1c532dc00eae3a by jan.kratochvil
[nfc] [lldb] Prevent needless copies of DataExtractor

lldb_private::DataExtractor contains DataBufferSP m_data_sp which is
relatively expensive to copy (due to multi-threading locking).

llvm::DataExtractor does not have this problem as it uses StringRef
instead.

The copy constructor is explicit as otherwise it is easy to make
unintended modification of a local copy instead of a caller's instance
(D107470 but that is llvm::DataExtractor).

Reviewed By: clayborg

Differential Revision: https://reviews.llvm.org/D107485
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/CxxStringTypes.cpp
The file was modifiedlldb/unittests/DataFormatter/StringPrinterTests.cpp
The file was modifiedlldb/source/DataFormatters/StringPrinter.cpp
The file was modifiedlldb/source/Plugins/Process/elf-core/ProcessElfCore.h
The file was modifiedlldb/source/Plugins/Process/elf-core/RegisterUtilities.cpp
The file was modifiedlldb/include/lldb/DataFormatters/StringPrinter.h
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
The file was modifiedlldb/include/lldb/Utility/DataExtractor.h
The file was modifiedlldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
Commit 2dad7979909a02d480514f37c9e55f752c0aa0a5 by craig.topper
[RISCV] Add test cases for conditional add/sub. NFC

InstCombine canonicalizes c ? (x+y) : x to (c ? y : 0) + x. It
does the same for and/or/xor. We already reverse this transform
for those, but don't do add/sub yet.
The file was modifiedllvm/test/CodeGen/RISCV/select-binop-identity.ll
Commit c23405174a3f26c044498af411e139e5f104f998 by craig.topper
[DAGCombiner][AMDGPU] Canonicalize constants to the RHS of MULHU/MULHS.

This allows special constants like to 0 to be recognized. It's also
expected by isel patterns if a target had a mulh with immediate instructions.
The commuting done by tablegen won't commute patterns with immediates since it
expects DAGCombine to have done it.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D107486
The file was modifiedllvm/test/CodeGen/AMDGPU/srem64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/udiv64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sdiv64.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
Commit 29a3e3dd7bedb5cfd50277882cfc8d4b6b07ee2f by georgakoudis1
[OpenMPOpt] Expand SPMDization with guarding for target parallel regions

This patch expands SPMDization (converting generic execution mode to SPMD for target regions) by guarding code regions that should be executed only by the main thread. Specifically, it generates guarded regions, which only the main thread executes, and the synchronization with worker threads using simple barriers. For correctness, the patch aborts SPMDization for target regions if the same code executes in a parallel region, thus must be not be guarded. This check is implemented using the ParallelLevels AA.

Reviewed By: jhuber6

Differential Revision: https://reviews.llvm.org/D106892
The file was modifiedllvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll
The file was modifiedllvm/test/Transforms/OpenMP/remove_globalization.ll
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp
The file was modifiedllvm/test/Transforms/OpenMP/custom_state_machines.ll
The file was modifiedllvm/test/Transforms/OpenMP/spmdization.ll
The file was modifiedllvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll
The file was modifiedllvm/test/Transforms/OpenMP/replace_globalization.ll
Commit 8f465a0cfb7b2596768f749839dd53ab6a5e8dd3 by a.bataev
[SLP][NFC]Add tests for constants/undefs used in insertelements, NFC.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
Commit 41354942c5c3cd4b9ae59179feed701a98791160 by aeubanks
[gn build] Add cfi ignorelist to compiler-rt/lib

So that building the compiler-rt target also copies the cfi ignorelist

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D107411
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/BUILD.gn
Commit fb27e8c76e04e093dcd378b8a76341a7b6ed3b0c by rdzhabarov
[MLIR][NFC] Get DiagnosticEngine as a reference in doc

'mlir::DiagnosticEngine::DiagnosticEngine(const mlir::DiagnosticEngine&)' is implicitly deleted because the default definition would be ill-formed.

Reviewed By: rdzhabarov

Differential Revision: https://reviews.llvm.org/D107287
The file was modifiedmlir/docs/Diagnostics.md
Commit bb15861e149ac1ce01ed5bd87f760e9469b20a9d by nikita.ppv
[MemCpyOpt] Relax libcall checks

Rather than blocking the whole MemCpyOpt pass if the libcalls are
not available, only disable creation of new memset/memcpy intrinsics
where only load/stores were used previously. This only affects the
store merging and load-store conversion optimization. Other
optimizations are derived from existing intrinsics, which are
well-defined in the absence of libcalls -- not having the libcalls
just means that call simplification won't convert them to intrinsics.

This is a weaker variation of D104801, which dropped these checks
entirely. Ideally we would not couple emission of intrinsics to
libcall availability at all, but as the intrinsics may be legalized
to libcalls we need to be a bit careful right now.

Differential Revision: https://reviews.llvm.org/D106769
The file was modifiedllvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
The file was addedllvm/test/Transforms/MemCpyOpt/no-libcalls.ll
Commit 617be2756fd0e0d943d082e8f86309c4133ce64b by pklausler
[flang] Support DFLOAT legacy extension intrinsic function

Like the similar legacy extension FLOAT(), DFLOAT() represents a
conversion from default integer to DOUBLE PRECISION.  Rewrite
into a conversion operation.

Differential Revision: https://reviews.llvm.org/D107489
The file was modifiedflang/lib/Evaluate/intrinsics.cpp
The file was modifiedflang/docs/Extensions.md
The file was addedflang/test/Semantics/dfloat.f90
Commit 4876520eef34f517075fed9007dc8b3162d67d1a by pklausler
[flang] runtime: For Fw.d formatting, don't oscillate forever

The algorithm for Fw.d output will drive binary to decimal conversion for
an initial fixed number of digits, then adjust that number based on the
result's exposent.  For value close to a power of ten, this adjustment
process wouldn't terminate; e.g., formatting 9.999 as F10.2 would start
with 1e2, boost the digits to 2, get 9.99e1, decrease the digits, and loop.
Solve by refusing to boost the digits a second time.

Differential Revision: https://reviews.llvm.org/D107490
The file was modifiedflang/unittests/Runtime/NumericalFormatTest.cpp
The file was modifiedflang/lib/Decimal/binary-to-decimal.cpp
The file was modifiedflang/runtime/edit-output.cpp
Commit 5edc886e900b12286ad86268461a3013c329118d by michael.hliao
[amdgpu] Add an enhanced conversion from i64 to f32.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D107187
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/uint_to_fp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
Commit a1944386156dbbfae15dfc606a3728e08ac92cfe by i
[CodeGen] Add -align-loops

to `lib/CodeGen/CommandFlags.cpp`. It can replace
-x86-experimental-pref-loop-alignment=.

The loop alignment is only used by MachineBlockPlacement.
The implementation uses a new `llvm::TargetOptions` for now, as
an IR function attribute/module flags metadata may be overkill.

This is the llvm part of D106701.
The file was modifiedllvm/test/CodeGen/X86/innermost-loop-alignment.ll
The file was modifiedllvm/include/llvm/CodeGen/CommandFlags.h
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was addedllvm/test/CodeGen/RISCV/align-loops.ll
The file was modifiedllvm/lib/CodeGen/CommandFlags.cpp
The file was modifiedllvm/include/llvm/Target/TargetOptions.h
Commit bd484c994036c682c928b18ff06849d117c9819d by i
[lld] Remove unused LLD_REPOSITORY

Remnant after D72803.

Distributions who want to customize the string can customize
LLD_VERSION_STRING instead.

Reviewed By: #lld-macho, mstorsjo, thakis

Differential Revision: https://reviews.llvm.org/D107416
The file was modifiedlld/Common/Version.cpp
Commit 6ed60fb8a2600e38026b9a9b12fad763cc57c7b2 by michaelrj
[libc] add integration tests for scudo in libc

This change adds tests to make sure that SCUDO is being properly
included with llvm libc. This change also adds the toggles to properly
use SCUDO, as GWP-ASan is enabled by default and must be included for
SCUDO to function.

Reviewed By: sivachandra, hctim

Differential Revision: https://reviews.llvm.org/D106919
The file was addedlibc/test/integration/scudo/integration_test.cpp
The file was addedlibc/test/integration/CMakeLists.txt
The file was addedcompiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
The file was modifiedlibc/test/CMakeLists.txt
The file was modifiedcompiler-rt/lib/gwp_asan/CMakeLists.txt
The file was addedlibc/test/integration/scudo/CMakeLists.txt
The file was addedlibc/test/integration/scudo/gwp_asan_should_crash.cpp
The file was modifiedcompiler-rt/cmake/config-ix.cmake
The file was modifiedlibc/lib/CMakeLists.txt
The file was modifiedcompiler-rt/CMakeLists.txt
Commit 0bd297fce2798ce12490a5c67cefbc54061f6bdf by riddleriver
[mlir-lsp-server] Only use one MLIRContext per MLIRTextFile

A text file may be comprised of many different "chunks", when
the input file contains the `// -----` split markers. We don't
need to use a unique MLIRContext per chunk, as having
separate contexts is intended to allow for easy unloading of
unused data and all chunks have the same lifetime (tied to the
input file). This commit uses one context for the entire file,
greatly reducing memory consumption in certain situations (up
to 70%).

Differential Revision: https://reviews.llvm.org/D107488
The file was modifiedmlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp
Commit 981ad13ac65690fc32418af6f09a66b52a604904 by gcmn
[Bazel] Drop deprecated tblgen includes mechanism

Includes can now be fully managed via td_library and specified locally
to the tablegen files that require them. This has been deprecated for a
while and is not used upstream. I'm not aware of any downstream users
either.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D107389
The file was modifiedutils/bazel/llvm-project-overlay/mlir/tblgen.bzl
Commit 9c19b36f1c61fb282c2625c831555fb2f55e3df4 by i
[X86] Remove -x86-experimental-pref-loop-alignment in favor of -align-loops
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 31a71a393f65d9e07b5b0756fef9dd16690950ee by aheejin
[WebAssembly] Make result of 'catch' inst variadic

`catch` instruction can have any number of result values depending on
its tag, but so far we have only needed a single i32 return value for
C++ exception so the instruction was specified that way. But using the
instruction for SjLj handling requires multiple return values.

This makes `catch` instruction's results variadic and moves selection of
`throw` and `catch` instruction from ISelLowering to ISelDAGToDAG.
Moving `catch` to ISelDAGToDAG is necessary because I am not aware of
a good way to do instruction selection for variadic output instructions
in TableGen. This also moves `throw` because 1. `throw` and `catch`
share the same utility function and 2. there is really no reason we
should do that in ISelLowering in the first place. What we do is mostly
the same in both places, and moving them to ISelDAGToDAG allows us to
remove unnecessary mid-level nodes for `throw` and `catch` in
WebAssemblyISD.def and WebAssemblyInstrInfo.td.

This also adds handling for new `catch` instruction to AsmTypeCheck.

Reviewed By: dschuff, tlively

Differential Revision: https://reviews.llvm.org/D107423
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.td
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISD.def
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
Commit e1574c51c2655b78606ccffea8db5f63095851bd by i
[llvm-nm][test] Avoid deprecated alias -M (--print-armap)

-M was inappropriately added since -s is taken by Darwin nm.
-M is deprecated. Tests should use --print-armap instead.
The file was modifiedllvm/test/Object/X86/archive-symbol-table.s
The file was modifiedllvm/test/Object/archive-long-index.test
The file was modifiedllvm/test/Object/simple-archive.test
The file was modifiedllvm/test/Object/X86/archive-ir-asm.ll
The file was modifiedllvm/test/Object/nm-archive.test
The file was modifiedllvm/test/Object/archive-symtab.test
Commit 14cb67862a723027c6787baa263f5bf6e03ab01d by airlied
[OpenCL] allow generic address and non-generic defs for CL3.0

This allows both sets of definitions to exist on CL 3.0

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D107318
The file was modifiedclang/lib/Headers/opencl-c.h
Commit 0bd2d4c4b163303ff5211920bdb81328c1ac1f7f by gusss
[mlir][sparse] Remove comment w/ code in it

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D107484
The file was modifiedmlir/test/Integration/data/mttkrp_b.tns
Commit f135a91c72c5744bd40614ee4c0411be68baf16f by michaelrj
[gwpAsan] revert minor change

This change reverts a small cmake change that was causing buildbot
failures.

Differential Revision: https://reviews.llvm.org/D107510
The file was modifiedcompiler-rt/lib/gwp_asan/CMakeLists.txt
Commit 7df405e079c5045562c53f7a2504b85f423078be by i
Apply -fmacro-prefix-map to __builtin_FILE()

This matches the behavior of GCC.
Patch does not change remapping logic itself, so adding one simple smoke test should be enough.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D107393
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/include/clang/Lex/PreprocessorOptions.h
The file was modifiedclang/lib/Basic/LangOptions.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/include/clang/Basic/LangOptions.h
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/CodeGenCXX/builtin-source-location.cpp
The file was modifiedclang/lib/Lex/PPMacroExpansion.cpp
Commit ca2e0536527f0e0dfbab30a90529581e766ba2d9 by Jessica Paquette
[AArch64][GlobalISel] Legalize wide vector G_PHIs

Clamp the max number of elements when legalizing G_PHI. This allows us to
legalize some common fallbacks like 4 x s64.

Here's an example: https://godbolt.org/z/6YocsEYTd

Had to add -global-isel-abort=0 to legalize-phi.mir to account for the
G_EXTRACT_VECTOR_ELT from the 32 x s8 G_PHI.

Differential Revision: https://reviews.llvm.org/D107508
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir
Commit 50264ff88ab1ed40119f13d482b0cc8326c1e95d by riddleriver
Adding missing filter check to SourceMgrDiagnosticHandler::EmitDiagnostics

There is a case in EmitDiagnostics where the filter check is bypassed (when locationStack is empty).   Filter might also be bypassed when loc instead of showableLoc is added to the locationStack.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D106522
The file was modifiedmlir/lib/IR/Diagnostics.cpp
Commit e52946b9ababcbf8e6f40b1b15900ae2e795a1c6 by yhs
BPF: avoid NE/EQ loop exit condition

Kuniyuki Iwashima reported in [1] that llvm compiler may
convert a loop exit condition with "i < bound" to "i != bound", where
"i" is the loop index variable and "bound" is the upper bound.
In case that "bound" is not a constant, verifier will always have "i != bound"
true, which will cause verifier failure since to verifier this is
an infinite loop.

The fix is to avoid transforming "i < bound" to "i != bound".
In llvm, the transformation is done by IndVarSimplify pass.
The compiler checks loop condition cost (i = i + 1) and if the
cost is lower, it may transform "i < bound" to "i != bound".
This patch implemented getArithmeticInstrCost() in BPF TargetTransformInfo
class to return a higher cost for such an operation, which
will prevent the transformation for the test case
added in this patch.

[1] https://lore.kernel.org/netdev/1994df05-8f01-371f-3c3b-d33d7836878c@fb.com/

Differential Revision: https://reviews.llvm.org/D107483
The file was modifiedllvm/lib/Target/BPF/BPFTargetTransformInfo.h
The file was addedllvm/test/CodeGen/BPF/loop-exit-cond.ll
Commit 041b5251415d9c96c9535e6e780770ad066883fe by modimo
[CSSPGO] Remove used of PseudoProbeAttributes::Reserved

D106861 added usage of PseudoProbeAttributes::Reserved as TailCall however this usage hasn't been committed/reviewed. Removing this usage.

Testing
ninja check-all

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D107514
The file was modifiedllvm/include/llvm/MC/MCPseudoProbe.h
The file was modifiedllvm/lib/MC/MCPseudoProbe.cpp
Commit 597e407cf23b92db202732e6890561b2f2830a58 by kcc
[libFuzzer] tests/examples for using libFuzzer for out-of-process targets

[libFuzzer] tests/examples for using libFuzzer for out-of-process targets

Reviewed By: kostik

Differential Revision: https://reviews.llvm.org/D107498
The file was addedcompiler-rt/test/fuzzer/out-of-process-fuzz.test
The file was addedcompiler-rt/test/fuzzer/OutOfProcessFuzzTarget.cpp
The file was addedcompiler-rt/test/fuzzer/SanCovDump.cpp
Commit 693a95a69416e23a31e46d3d2c81e854688e606e by gcmn
[Bazel] Add support for lld

This patch adds a Bazel configuration to build lld. That includes a
BUILD.bazel file to export the libunwind headers for use by lld. Since
the lld target itself requires libxml2 (through WindowsManifest) it's
currently disabled on Buildkite and marked manual, but all the libraries
build.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D107414
The file was addedutils/bazel/llvm-project-overlay/lld/BUILD.bazel
The file was addedutils/bazel/llvm-project-overlay/libunwind/BUILD.bazel
Commit 7a6482216ff02f81ed02ff4936f1b22d4b5a9a6c by i
[CMake][gn] lldMachO=>lldMachOOld, lldMachO2=>lldMachO

Now that D95204 switched default to new Darwin backend, rename some CMake
targets to match.

Reviewed By: #lld-macho, smeenai, int3

Differential Revision: https://reviews.llvm.org/D107516
The file was modifiedllvm/utils/gn/secondary/lld/unittests/MachOTests/BUILD.gn
The file was modifiedlld/tools/lld/CMakeLists.txt
The file was modifiedllvm/utils/gn/secondary/lld/tools/lld/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/lld/lib/Driver/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/lld/unittests/DriverTests/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/lld/MachO/BUILD.gn
The file was modifiedlld/unittests/MachOTests/CMakeLists.txt
The file was modifiedlld/lib/Driver/CMakeLists.txt
The file was modifiedllvm/utils/gn/secondary/lld/lib/ReaderWriter/MachO/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/lld/unittests/BUILD.gn
The file was modifiedlld/MachO/CMakeLists.txt
The file was modifiedlld/lib/ReaderWriter/MachO/CMakeLists.txt
The file was modifiedlld/unittests/DriverTests/CMakeLists.txt
Commit ac7c7cbfdaf9d8fd7335fe2622fa825eed7535a2 by springerm
[mlir] Update comment in Region.h

The file in which `Region::viewGraph` is defined has changed. This should have been updated with D106342.

Differential Revision: https://reviews.llvm.org/D107517
The file was modifiedmlir/include/mlir/IR/Region.h
Commit 75abeb64cebd5a79e837e9ea54f19d0b2125cb28 by powerman1st
[AVR] emit 'MCSA_Global' references to '__do_global_ctors' and '__do_global_dtors'

Emit references to '__do_global_ctors' and '__do_global_dtors' to allow
constructor/destructor routines to run.

Reviewed by: MaskRay

Differential Revision: https://reviews.llvm.org/D107133
The file was modifiedllvm/lib/Target/AVR/AVRAsmPrinter.cpp
The file was modifiedllvm/lib/Target/AVR/MCTargetDesc/AVRTargetStreamer.cpp
The file was modifiedllvm/lib/Target/AVR/MCTargetDesc/AVRTargetStreamer.h
The file was addedllvm/test/CodeGen/AVR/ctors.ll
Commit fb0a929512c25bd9859498cde7d1c6c73f550d61 by Dan Liew
[Compiler-RT] On Apple Platforms switch to always emitting full debug info

Previously the build used `-gline-tables-only` when `COMPILER_RT_DEBUG`
was off (default) and `-g` when `COMPILER_RT_DEBUG` was on. The end
result of this meant that the release build of the Sanitizer runtimes
were difficult to debug (e.g. information about variables and function
arguments were missing).

Presumably the reason for preferring `-gline-tables-only` for release
builds was to save space. However, for Apple platforms this doesn't
matter because debug info lives in separate `.dSYM` files (which aren't
shipped) rather than in the shipped `.dylib` files.

Now on Apple platforms we always emit full debug info if the compiler
supports it and we emit a fatal error if `-g` isn't supported.

rdar://79223184

Differential Revision: https://reviews.llvm.org/D107501
The file was modifiedcompiler-rt/CMakeLists.txt
Commit 58481663692b55ca03f8b41ccb660dcbcebffc49 by nathan
Disable LibFuncs for stpcpy and stpncpy for Android < 21

These functions don't exist in android API levels < 21. A change in
llvm-12 (rG6dbf0cfcf789) caused Oz builds to emit this symbol assuming
it's available and thus is causing link errors. Simply disable it here.

Differential Revision: https://reviews.llvm.org/D107509
The file was modifiedllvm/lib/Analysis/TargetLibraryInfo.cpp
The file was modifiedllvm/test/Transforms/InstCombine/sprintf-1.ll
Commit 12b34e056cf19d9c2c2a7f180ba26991bba3f16c by springerm
[mlir] Clean up includes in Transforms/Passes.h

Differential Revision: https://reviews.llvm.org/D107520
The file was modifiedmlir/lib/Transforms/NormalizeMemRefs.cpp
Commit aa0b0fbbe6f80cce720c72240b870b74bf5b1e6f by aheejin
[WebAssembly] Use `SDValue::getConstantOperandVal` (NFC)

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D107499
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
Commit 9c3345ad1020bbd8ec61a07339c1d1e804ef3011 by aheejin
[WebAssembly] Cleanup Emscripten SjLj tests

- Remove a redundant test: there were `longjmp_only` and `only_longjmp`,
  which do the same thing
- Add `CHECK-LABEL` lines for function names

Reviewed By: tlively

Differential Revision: https://reviews.llvm.org/D107511
The file was modifiedllvm/test/CodeGen/WebAssembly/lower-em-sjlj.ll

Summary

  1. Add a libc x86_64 windows worker and a debug builder running on it (details)
  2. Add buildbot for OpenMP on AMDGPU (details)
Commit 7d9ffd49c6358b9f20ddff6f29c79e186ee1be33 by hedingarcia
Add a libc x86_64 windows worker and a debug builder running on it

Differential Revision: https://reviews.llvm.org/D106981
The file was modifiedbuildbot/osuosl/master/config/status.py
The file was modifiedbuildbot/osuosl/master/config/builders.py
The file was modifiedbuildbot/osuosl/master/config/workers.py
Commit bc9f85040092ec7a969821f38e73f1ba2d946b08 by gkistanova
Add buildbot for OpenMP on AMDGPU

Build OpenMP for AMDGPU target

Differential revision: https://reviews.llvm.org/D106928
The file was modifiedbuildbot/osuosl/master/config/status.py
The file was modifiedbuildbot/osuosl/master/config/builders.py
The file was modifiedbuildbot/osuosl/master/config/workers.py