Changes

Summary

  1. [CostModel][X86] Add CostKinds test coverage for ctpop intrinsics (details)
  2. [CostModel][X86] Add CostKinds test coverage for cttz intrinsics (details)
  3. [CostModel][X86] Add CostKinds test coverage for ctlz intrinsics (details)
  4. Fix Clang Sphinx docs build (details)
  5. [Metadata] Introduce MD_pcsections (details)
  6. [MachineInstr] Allow setting PCSections in ExtraInfo (details)
  7. [Object] Refactor code for extracting offload binaries (details)
  8. [OffloadPackager] Add ability to extract images from other file types (details)
  9. [llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64 (details)
  10. [SelectionDAG] Rename CallSiteDbgInfo to NodeExtraInfo (details)
  11. [SelectionDAG] Properly copy ExtraInfo on RAUW (details)
  12. Add parantheses to silence warning. (details)
  13. [AArch64] Additional tests for sinking splats to muls. NFC (details)
  14. Fix "[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64" compilation on Windows (details)
  15. Fix AMDGPU test failures due to "[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64" (details)
  16. [tsan] Replace mem intrinsics with calls to interceptors (details)
  17. Fix remaining test failures for "[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64" (details)
  18. [gn build] port 5dbc7cf7cac44 (details)
  19. [bazel] port 5dbc7cf7cac44 (details)
  20. Revert "[lldb][bindings] Fix module_access handling of regex" (details)
  21. Fix OpenMP Opt for target without a parallel region. (details)
  22. [InstCombine] add tests for add of select with 0 and negate arms; NFC (details)
  23. [InstCombine] add/move tests for add with select operands that simplify; NFC (details)
  24. [InstCombine] remove dead code for add (select cond, (sub), 0); NFC (details)
  25. Add docs for Mach-O lld (details)
  26. [CostModel][X86] Add CostKinds handling for ctpop ops (details)
  27. [clang] fix profiling of template arguments of template and declaration kind (details)
  28. [RISCV] Improve vector fround lowering by changing FRM. (details)
  29. [mlir][sparse] codegen for sparse alloc (details)
  30. Revert "[tsan] Replace mem intrinsics with calls to interceptors" (details)
  31. [mlir][sparse] Refactoring: renaming StorageNewOp to StorageOp (details)
  32. [ConstraintElimination] Replace pair with named struct (NFC). (details)
  33. [libc++] Avoid instantiating type_trait classes (details)
  34. [AArch64] Add an option to reserve physical registers from RA (details)
  35. Revert "[SCCP] convert signed div/rem to unsigned for non-negative operands" (details)
Commit f560e9cc2fdc1d293854ec282128fd5f4471b0af by llvm-dev
[CostModel][X86] Add CostKinds test coverage for ctpop intrinsics
The file was addedllvm/test/Analysis/CostModel/X86/ctpop-latency.ll
The file was addedllvm/test/Analysis/CostModel/X86/ctpop-sizelatency.ll
The file was addedllvm/test/Analysis/CostModel/X86/ctpop-codesize.ll
Commit ca5fcc7027fd74027660146060b2d7ba9787e7cd by llvm-dev
[CostModel][X86] Add CostKinds test coverage for cttz intrinsics
The file was addedllvm/test/Analysis/CostModel/X86/cttz-latency.ll
The file was addedllvm/test/Analysis/CostModel/X86/cttz-sizelatency.ll
The file was addedllvm/test/Analysis/CostModel/X86/cttz-codesize.ll
Commit 0431eb59dfa8f77e460c282dd15006b363d5dbd7 by llvm-dev
[CostModel][X86] Add CostKinds test coverage for ctlz intrinsics
The file was addedllvm/test/Analysis/CostModel/X86/ctlz-latency.ll
The file was addedllvm/test/Analysis/CostModel/X86/ctlz-sizelatency.ll
The file was addedllvm/test/Analysis/CostModel/X86/ctlz-codesize.ll
Commit e1ebe476e45a677535f8cae3cc9f7fb84f477fdd by aaron
Fix Clang Sphinx docs build

The CodeOwners.rst file needs to live in the same directory as the rest
of the documentation. This copies the file to the correct place when
making a Sphinx build but continues to leave the .rst file at the root
directory where it's easier for developers to find. This also ensures
that local doc builds using `make html` work as expected.
The file was modifiedclang/docs/CMakeLists.txt (diff)
Commit c70f6e1362e38f36dceca0342490d659aa45a1a5 by elver
[Metadata] Introduce MD_pcsections

Introduces MD_pcsections metadata kind. See added documentation for
more details.

Subsequent patches enable propagating PC sections metadata through code
generation to the AsmPrinter.

RFC: https://discourse.llvm.org/t/rfc-pc-keyed-metadata-at-runtime/64191

Reviewed By: dvyukov, vitalybuka

Differential Revision: https://reviews.llvm.org/D130875
The file was modifiedllvm/include/llvm/IR/FixedMetadataKinds.def (diff)
The file was modifiedllvm/lib/IR/MDBuilder.cpp (diff)
The file was modifiedllvm/unittests/IR/MDBuilderTest.cpp (diff)
The file was addedllvm/docs/PCSectionsMetadata.rst
The file was modifiedllvm/docs/Reference.rst (diff)
The file was modifiedllvm/include/llvm/IR/MDBuilder.h (diff)
Commit 42836e283fc58d5cebbcbb2e8eb7619d92fb9c2d by elver
[MachineInstr] Allow setting PCSections in ExtraInfo

Provide MachineInstr::setPCSection(), to propagate relevant metadata
through the backend. Use ExtraInfo to store the metadata.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D130876
The file was modifiedllvm/lib/CodeGen/MachineFunction.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/MachineFunction.h (diff)
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp (diff)
The file was modifiedllvm/unittests/CodeGen/MachineInstrTest.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h (diff)
Commit 5dbc7cf7cac4428e0876a94a4fca10fe60af7328 by jhuber6
[Object] Refactor code for extracting offload binaries

We currently extract offload binaries inside of the linker wrapper.
Other tools may wish to do the same extraction operation. This patch
simply factors out this handling into the `OffloadBinary.h` interface.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D132689
The file was modifiedllvm/lib/Object/CMakeLists.txt (diff)
The file was modifiedllvm/lib/Object/OffloadBinary.cpp (diff)
The file was modifiedclang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp (diff)
The file was modifiedllvm/include/llvm/Object/OffloadBinary.h (diff)
Commit a69404c0a294ce65432ce67d5f3e7dce28106496 by jhuber6
[OffloadPackager] Add ability to extract images from other file types

A previous patch added support for extracting images from offloading
binaries. Users may wish to extract these files from the file types they
are most commonly emebedded in, such as an ELF or bitcode. This can be
difficult for the user to do manually, as these could be stored in
different section names potentially. This patch addsp support for
extracting these file types.

Reviewed By: saiislam

Differential Revision: https://reviews.llvm.org/D132607
The file was modifiedclang/tools/clang-offload-packager/ClangOffloadPackager.cpp (diff)
The file was modifiedclang/test/Driver/offload-packager.c (diff)
Commit 2090e85fee9b2d2a1ca6402b5f44c7d41d1e353f by matthias.gehre
[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64

This adds the ExpandLargeDivRem to the default pass pipeline.
The limit at which it expands div/rem instructions is configured
via a new TargetTransformInfo hook (default: no expansion)
X86, Arm and AArch64 backends implement this hook to expand div/rem
instructions with more than 128 bits.

Differential Revision: https://reviews.llvm.org/D130076
The file was modifiedllvm/test/CodeGen/AArch64/O0-pipeline.ll (diff)
The file was removedllvm/test/CodeGen/X86/libcall-sret.ll
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h (diff)
The file was modifiedllvm/lib/CodeGen/TargetPassConfig.cpp (diff)
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/CodeGen/ExpandLargeDivRem.cpp (diff)
The file was addedllvm/test/CodeGen/AArch64/udivmodei5.ll
The file was modifiedllvm/test/CodeGen/AArch64/O3-pipeline.ll (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
The file was modifiedllvm/test/CodeGen/X86/i128-sdiv.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr38539.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/opt-pipeline.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/O0-pipeline.ll (diff)
The file was addedllvm/test/CodeGen/ARM/udivmodei5.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h (diff)
The file was modifiedllvm/test/CodeGen/ARM/O3-pipeline.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/i128-udiv.ll (diff)
The file was addedllvm/test/CodeGen/X86/udivmodei5.ll
Commit cc3faf422694201bc89bcfefa58722402f26b63d by elver
[SelectionDAG] Rename CallSiteDbgInfo to NodeExtraInfo

For information infrequently attached to SDNodes, it is useful to
provide a way to add this information out-of-line. This is already done
for call-site specific information.

Rename CallSiteDbgInfo to NodeExtraInfo in preparation of adding
additional information not necessarily related to call sites only.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D130880
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h (diff)
Commit 7d63983c65f9ad8439fc51ac70fc9cd215a94cff by elver
[SelectionDAG] Properly copy ExtraInfo on RAUW

During SelectionDAG legalization SDNodes with associated extra info may
be replaced with a new SDNode. Preserve associated extra info on
ReplaceAllUsesWith and remove entries in DeallocateNode.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D130881
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
The file was modifiedllvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h (diff)
Commit fe7c3b87ce7d6e4ba8972a9eb525c9697faba023 by Amara Emerson
Add parantheses to silence warning.
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp (diff)
Commit db818219c5b3f81625edff19f2ec4ab166ffcc3f by david.green
[AArch64] Additional tests for sinking splats to muls. NFC
The file was modifiedllvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll (diff)
Commit 7948d89afec30b87d0e5f395664776efdabef824 by matthias.gehre
Fix "[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64" compilation on Windows
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
Commit 6cc52d594f5cce574eda9822a20823942e48037e by matthias.gehre
Fix AMDGPU test failures due to "[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64"
The file was modifiedllvm/test/CodeGen/AMDGPU/llc-pipeline.ll (diff)
Commit 77654a65a373da9c4829de821e7b393ea811ee40 by Vitaly Buka
[tsan] Replace mem intrinsics with calls to interceptors

After https://reviews.llvm.org/rG463aa814182a23 tsan replaces llvm
intrinsics with calls to glibc functions. However this approach is
fragile, as slight changes in pipeline can return llvm intrinsics back.
In particular InstCombine can do that.

Msan/Asan already declare own version of these memory
functions for the similar purpose.

KCSAN, or anything that uses something else than compiler-rt, needs to
implement this callbacks.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D133268
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan.syms.extra (diff)
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp (diff)
The file was modifiedllvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp (diff)
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface.h (diff)
The file was modifiedllvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll (diff)
Commit af3758d678c0105c8cecb22aaf55a83017ae0384 by matthias.gehre
Fix remaining test failures for "[llvm/CodeGen] Enable the ExpandLargeDivRem pass for X86, Arm and AArch64"
The file was modifiedllvm/test/Transforms/ExpandLargeDivRem/srem129.ll (diff)
The file was modifiedllvm/test/Transforms/ExpandLargeDivRem/urem129.ll (diff)
The file was modifiedllvm/test/Transforms/ExpandLargeDivRem/sdiv129.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/O0-pipeline.ll (diff)
The file was modifiedllvm/test/CodeGen/RISCV/O3-pipeline.ll (diff)
The file was modifiedllvm/test/Transforms/ExpandLargeDivRem/udiv129.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/O3-pipeline.ll (diff)
Commit 7bace6f8e67d42e1263de1d79c03c7ad7c729718 by thakis
[gn build] port 5dbc7cf7cac44
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn (diff)
Commit a7c6cdc5cfee84726fbae9b9be8e4cd07698ce77 by benny.kra
[bazel] port 5dbc7cf7cac44
The file was modifiedutils/bazel/llvm-project-overlay/llvm/BUILD.bazel (diff)
Commit bd323e42c84476f26bd2f8447f0b0f0dfc204bcb by stilis
Revert "[lldb][bindings] Fix module_access handling of regex"

This reverts commit 75f05fccbbdd91393bdc7b6183b9dd2b1e859f8e.

This commit broke the windows lldb bot: https://lab.llvm.org/buildbot/#/builders/83/builds/23284
The file was modifiedlldb/bindings/interface/SBTarget.i (diff)
The file was modifiedlldb/test/API/python_api/target/TestTargetAPI.py (diff)
Commit 0b1160fdebf108be5e30d09826533f00aee01359 by doru.bercea
Fix OpenMP Opt for target without a parallel region.

Remove ctx redeclaration.

Format code.

Remove parallel check. Modify tests. Clean-up code.

Fix another test.

Move code to helper functions.

Format file.

Minor fixes.
The file was modifiedllvm/test/Transforms/OpenMP/always_inline_device.ll (diff)
The file was modifiedllvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll (diff)
The file was modifiedllvm/test/Transforms/OpenMP/single_threaded_execution.ll (diff)
The file was modifiedllvm/lib/Transforms/IPO/OpenMPOpt.cpp (diff)
The file was modifiedllvm/test/Transforms/OpenMP/spmdization_guarding_two_reaching_kernels.ll (diff)
Commit d4a4004c0f9d3070e6c192b9a5bc260bee62e8a8 by spatel
[InstCombine] add tests for add of select with 0 and negate arms; NFC
The file was modifiedllvm/test/Transforms/InstCombine/add.ll (diff)
Commit e028121ed0fefe0693cdc7ff59aabba931519170 by spatel
[InstCombine] add/move tests for add with select operands that simplify; NFC
The file was modifiedllvm/test/Transforms/InstCombine/add.ll (diff)
The file was modifiedllvm/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll (diff)
Commit ae117e1c1ba68da48c70f5cd8cb3c666fbdd1b77 by spatel
[InstCombine] remove dead code for add (select cond, (sub), 0); NFC

This pattern is handled more generally in SimplifySelectsFeedingBinaryOp().
Tests to confirm that added to the add.ll test file in the previous commit.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp (diff)
Commit 0f9590af273ffc6dea60e921c2454a4d2139bf1c by jezng
Add docs for Mach-O lld

I wasn't able to find any docs for Mach-O in `lld/docs`, so here's an attempt at adding basic docs. One of my goals here is to make it easy for users who are unfamiliar with linkers to successfully use lld.

Reviewed By: #lld-macho, int3

Differential Revision: https://reviews.llvm.org/D132893
The file was addedlld/docs/MachO/index.rst
The file was removedlld/MachO/ld64-vs-lld.rst
The file was addedlld/docs/MachO/ld64-vs-lld.rst
The file was modifiedlld/docs/index.rst (diff)
Commit 10e0f3e9481d1e88e55e033e2a608840d8545f3b by llvm-dev
[CostModel][X86] Add CostKinds handling for ctpop ops

This was achieved with an updated version of the 'cost-tables vs llvm-mca' script D103695 (although it still struggles with avx512 predicate numbers which had to be done manually)

Some of the pre-AVX values still aren't great - atom/slm worst case numbers for ctpop expansion really affect these (especially throughput/latency), so we need to clean them up in a more consistent way - its a pity we don't have models for more older cpus (merom/nehalem etc.) as other examples.
The file was modifiedllvm/test/Analysis/CostModel/X86/ctpop-sizelatency.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/ctpop-codesize.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/ctpop.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/ctpop-latency.ll (diff)
Commit acb767f5cda59302aa9100afcf6133d66779d42c by mizvekov
[clang] fix profiling of template arguments of template and declaration kind

Template arguments of template and declaration kind were being profiled
only by their canonical properties, which would cause incorrect
uniquing of constrained AutoTypes, leading to a crash in some cases.

This exposed some places in CheckTemplateArgumentList where non-canonical
arguments where being pushed into the resulting converted list.

We also throw in some asserts to catch early and explain the crashes.

Note that the fix for the 'declaration' kind is untestable at this point,
because there should be no cases right now in the AST where we try
to unique a non-canonical converted template argument.

This fixes GH55567.

Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>

Differential Revision: https://reviews.llvm.org/D133072
The file was modifiedclang/lib/AST/TemplateBase.cpp (diff)
The file was modifiedclang/lib/Sema/SemaTemplate.cpp (diff)
The file was modifiedclang/lib/AST/ASTContext.cpp (diff)
The file was modifiedclang/test/SemaTemplate/concepts.cpp (diff)
Commit 5d30565d807f66774d2c057c5a3e37e9e9fc2197 by craig.topper
[RISCV] Improve vector fround lowering by changing FRM.

This is a follow up to D133238 which did this for ceil/floor.

Reviewed By: arcbbb, frasercrmck

Differential Revision: https://reviews.llvm.org/D133335
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fround-sdnode.ll (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp (diff)
The file was modifiedllvm/test/Analysis/CostModel/RISCV/fround.ll (diff)
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll (diff)
Commit 0c7abd3924a6c11f30c9a7e62553d4970f0a5c4d by ajcbik
[mlir][sparse] codegen for sparse alloc

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D133241
The file was modifiedmlir/test/Dialect/SparseTensor/codegen.mlir (diff)
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp (diff)
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp (diff)
Commit c51a12d598e96d213eb16fc857c891e878733349 by Vitaly Buka
Revert "[tsan] Replace mem intrinsics with calls to interceptors"

Breaks
http://45.33.8.238/macm1/43944/step_4.txt
https://lab.llvm.org/buildbot/#/builders/70/builds/26926

This reverts commit 77654a65a373da9c4829de821e7b393ea811ee40.
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan.syms.extra (diff)
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp (diff)
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface.h (diff)
The file was modifiedllvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp (diff)
The file was modifiedllvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll (diff)
Commit 4c46a5d54d87ec3800021c71473145b65ac95fa4 by peiming
[mlir][sparse] Refactoring: renaming StorageNewOp to StorageOp

To address comment in https://reviews.llvm.org/D133241

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D133363
The file was modifiedmlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp (diff)
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp (diff)
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorPasses.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td (diff)
Commit 2fb68c0628e4e5d07c06164a42c0dd17f8ba16e7 by flo
[ConstraintElimination] Replace pair with named struct (NFC).

This slightly improves the readability and allows further extensions in
follow-ups.
The file was modifiedllvm/lib/Transforms/Scalar/ConstraintElimination.cpp (diff)
Commit 5fab33af7f083a0043112742027172e9f297c07f by nikolasklauser
[libc++] Avoid instantiating type_trait classes

Use `using` aliases to avoid instantiating lots of types

Reviewed By: ldionne, #libc

Spies: libcxx-commits, miyuki

Differential Revision: https://reviews.llvm.org/D132785
The file was modifiedlibcxx/include/__type_traits/is_member_pointer.h (diff)
The file was modifiedlibcxx/include/experimental/coroutine (diff)
The file was modifiedlibcxx/include/__hash_table (diff)
The file was modifiedlibcxx/include/__type_traits/remove_all_extents.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_copy_assignable.h (diff)
The file was modifiedlibcxx/include/__tuple/apply_cv.h (diff)
The file was modifiedlibcxx/include/__concepts/class_or_enum.h (diff)
The file was modifiedlibcxx/include/__memory/unique_ptr.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_move_constructible.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_nothrow_copy_assignable.h (diff)
The file was modifiedlibcxx/include/ext/hash_map (diff)
The file was modifiedlibcxx/include/__tuple/make_tuple_types.h (diff)
The file was modifiedlibcxx/include/valarray (diff)
The file was modifiedlibcxx/include/experimental/functional (diff)
The file was modifiedlibcxx/include/limits (diff)
The file was modifiedlibcxx/include/__type_traits/is_pointer.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_integral.h (diff)
The file was modifiedlibcxx/include/__type_traits/make_const_lvalue_ref.h (diff)
The file was modifiedlibcxx/include/__algorithm/move_backward.h (diff)
The file was modifiedlibcxx/include/__tree (diff)
The file was modifiedlibcxx/include/__type_traits/make_signed.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_member_function_pointer.h (diff)
The file was modifiedlibcxx/include/__algorithm/copy.h (diff)
The file was modifiedlibcxx/include/__memory/uninitialized_algorithms.h (diff)
The file was modifiedlibcxx/include/__algorithm/ranges_merge.h (diff)
The file was modifiedlibcxx/include/__memory/allocator_traits.h (diff)
The file was modifiedlibcxx/include/locale (diff)
The file was modifiedlibcxx/include/__functional/bind.h (diff)
The file was modifiedlibcxx/include/__tuple/sfinae_helpers.h (diff)
The file was modifiedlibcxx/include/__type_traits/remove_reference.h (diff)
The file was modifiedlibcxx/include/__random/is_seed_sequence.h (diff)
The file was modifiedlibcxx/include/__split_buffer (diff)
The file was modifiedlibcxx/include/__type_traits/is_null_pointer.h (diff)
The file was modifiedlibcxx/include/__algorithm/ranges_stable_partition.h (diff)
The file was modifiedlibcxx/include/__memory/pointer_traits.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_move_assignable.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_swappable.h (diff)
The file was modifiedlibcxx/include/__utility/forward.h (diff)
The file was modifiedlibcxx/include/__algorithm/set_difference.h (diff)
The file was modifiedlibcxx/include/__utility/move.h (diff)
The file was modifiedlibcxx/include/__functional/invoke.h (diff)
The file was modifiedlibcxx/include/__iterator/distance.h (diff)
The file was modifiedlibcxx/include/new (diff)
The file was modifiedlibcxx/include/__random/uniform_int_distribution.h (diff)
The file was modifiedlibcxx/include/variant (diff)
The file was modifiedlibcxx/include/scoped_allocator (diff)
The file was modifiedlibcxx/include/__memory/shared_ptr.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_trivially_move_constructible.h (diff)
The file was modifiedlibcxx/include/__type_traits/add_lvalue_reference.h (diff)
The file was modifiedlibcxx/include/__utility/in_place.h (diff)
The file was modifiedlibcxx/include/__node_handle (diff)
The file was modifiedlibcxx/include/list (diff)
The file was modifiedlibcxx/include/__type_traits/make_unsigned.h (diff)
The file was modifiedlibcxx/include/forward_list (diff)
The file was modifiedlibcxx/include/__type_traits/is_member_object_pointer.h (diff)
The file was modifiedlibcxx/include/__algorithm/uniform_random_bit_generator_adaptor.h (diff)
The file was modifiedlibcxx/include/__type_traits/add_rvalue_reference.h (diff)
The file was modifiedlibcxx/include/__type_traits/apply_cv.h (diff)
The file was modifiedlibcxx/include/__functional/function.h (diff)
The file was modifiedlibcxx/include/__coroutine/coroutine_handle.h (diff)
The file was modifiedlibcxx/include/__algorithm/stable_partition.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_nothrow_move_assignable.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_void.h (diff)
The file was modifiedlibcxx/include/experimental/propagate_const (diff)
The file was modifiedlibcxx/include/__type_traits/is_convertible.h (diff)
The file was modifiedlibcxx/include/__numeric/gcd_lcm.h (diff)
The file was modifiedlibcxx/include/__type_traits/remove_volatile.h (diff)
The file was modifiedlibcxx/include/experimental/simd (diff)
The file was modifiedlibcxx/include/__algorithm/move.h (diff)
The file was modifiedlibcxx/include/__algorithm/iterator_operations.h (diff)
The file was modifiedlibcxx/include/__memory/allocator_arg_t.h (diff)
The file was modifiedlibcxx/src/string.cpp (diff)
The file was modifiedlibcxx/include/__type_traits/is_nothrow_copy_constructible.h (diff)
The file was modifiedlibcxx/include/__type_traits/add_pointer.h (diff)
The file was modifiedlibcxx/include/__type_traits/remove_pointer.h (diff)
The file was modifiedlibcxx/include/optional (diff)
The file was modifiedlibcxx/include/__algorithm/ranges_partition.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_trivially_move_assignable.h (diff)
The file was modifiedlibcxx/include/__algorithm/ranges_partition_copy.h (diff)
The file was modifiedlibcxx/include/__iterator/move_iterator.h (diff)
The file was modifiedlibcxx/include/atomic (diff)
The file was modifiedlibcxx/include/__type_traits/remove_cvref.h (diff)
The file was modifiedlibcxx/include/__algorithm/half_positive.h (diff)
The file was modifiedlibcxx/include/__algorithm/partition.h (diff)
The file was modifiedlibcxx/include/__filesystem/path.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_floating_point.h (diff)
The file was modifiedlibcxx/include/__algorithm/ranges_iterator_concept.h (diff)
The file was modifiedlibcxx/include/__type_traits/can_extract_key.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_nothrow_move_constructible.h (diff)
The file was modifiedlibcxx/include/__type_traits/remove_const_ref.h (diff)
The file was modifiedlibcxx/include/__type_traits/decay.h (diff)
The file was modifiedlibcxx/include/__type_traits/remove_const.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_copy_constructible.h (diff)
The file was modifiedlibcxx/include/__type_traits/remove_extent.h (diff)
The file was modifiedlibcxx/include/future (diff)
The file was modifiedlibcxx/include/__type_traits/is_trivially_copy_assignable.h (diff)
The file was modifiedlibcxx/include/any (diff)
The file was modifiedlibcxx/include/tuple (diff)
The file was modifiedlibcxx/include/__iterator/iterator_traits.h (diff)
The file was modifiedlibcxx/include/__type_traits/remove_cv.h (diff)
The file was modifiedlibcxx/include/thread (diff)
The file was modifiedlibcxx/include/__type_traits/copy_cvref.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_reference_wrapper.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_destructible.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_trivially_copy_constructible.h (diff)
The file was modifiedlibcxx/include/__type_traits/is_nothrow_destructible.h (diff)
Commit 3cf4ab54476e549a787b1240a4fd2e9576822f17 by carrot
[AArch64] Add an option to reserve physical registers from RA

This patch adds an option --reserve-regs-for-regalloc, so we can reserve a list
of physical registers. These registers will not be used by register allocator,
but can still be used as ABI requests such as passing arguments to function
call.

Its main purpose is simulating high register pressure by reserving many physical
registers. So it will be much easier to test and debug register allocation
changes.

Differential Revision: https://reviews.llvm.org/D132717
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.h (diff)
The file was modifiedllvm/test/CodeGen/AArch64/arm64-platform-reg.ll (diff)
Commit 27e7db54eb2fdb1e29c83b4b0acf90d558eba141 by flo
Revert "[SCCP] convert signed div/rem to unsigned for non-negative operands"

This reverts commit fe1f3cfc2669aca387a45c8ce615b45c1db50fc6.

It looks like this commit breaks building llvm-test-suite.

To reproduce, run `opt -passes=ipsccp` on the IR below.

    @g = internal global i32 256, align 4

    define void @test() {
    entry:
      %0 = load i32, ptr @g, align 4
      %div = sdiv i32 %0, undef
      ret void
    }
The file was modifiedllvm/test/Transforms/SCCP/binaryops-range-special-cases.ll (diff)
The file was modifiedllvm/lib/Transforms/Scalar/SCCP.cpp (diff)
The file was modifiedllvm/test/Transforms/SCCP/divrem.ll (diff)
The file was modifiedllvm/test/Transforms/PhaseOrdering/srem.ll (diff)