Changes

Summary

  1. [CostModel][X86] Add partial CostKinds handling for funnelshifts/rotates (details)
  2. AArch64: add support for newer Apple CPUs (details)
  3. [mlir] Fix a cast that should be a dyn_cast. (details)
  4. [MemorySSA] Reset location size if IsGuaranteedLoopInvariant after phi tranlation (details)
  5. [clang] Rework IsTailPaddedMemberArray into isFlexibleArrayMemberExpr (details)
  6. [LLD] [ELF] Fix building with LLVM_LINK_LLVM_DYLIB since zstd was taken into use (details)
  7. [AST] Better recovery on an expression refers to an invalid decl. (details)
  8. Re-apply "Deferred Concept Instantiation Implementation" (details)
  9. [InstCombine] Use simplifyWithOpReplaced() for non-bool selects (details)
  10. MachineVerifier: Verify REG_SEQUENCE (details)
  11. [clang][docs] Fix supported element types for __builtin_reduce_(add|mul) (details)
Commit e030be64d8c43a56b60a90b70765fc795e177e9c by llvm-dev
[CostModel][X86] Add partial CostKinds handling for funnelshifts/rotates

This mainly just adds costs for the targets where we have actual funnelshift/rotate instructions (VBMI2/XOP etc.) - the cases where we expand still need addressing, although for many the default shift+or expansion, especially for uniform cases, isn't that bad.

This was achieved with the 'cost-tables vs llvm-mca' script D103695
The file was modifiedllvm/test/Analysis/CostModel/X86/fshl-sizelatency.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fshr-codesize.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fshl-codesize.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fshr-latency.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/intrinsic-cost-kinds.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fshl.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fshl-latency.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fshr.ll (diff)
The file was modifiedllvm/test/Analysis/CostModel/X86/fshr-sizelatency.ll (diff)
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll (diff)
Commit 677da09d0259d7530d32e85cb561bee15f0066e2 by Tim Northover
AArch64: add support for newer Apple CPUs

They're roughly ARMv8.6. This works in the .td file, but in
AArch64TargetParser.def, marking them v8.6 brings in support for the SM4
cryptographic hash and we don't actually have that. So TargetParser side
they're marked as v8.5, with the extra features (BF16 and I8MM added manually).

Finally, A16 supports the HCX extension in addition to v8.6. This has no
TargetParser implications.
The file was modifiedllvm/unittests/Support/TargetParserTest.cpp (diff)
The file was modifiedllvm/include/llvm/Support/AArch64TargetParser.def (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h (diff)
The file was modifiedclang/test/Misc/target-invalid-cpu-note.c (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64.td (diff)
Commit eaf20c4fc257db0bcbd97b0f39836a53eeb3039a by jreiffers
[mlir] Fix a cast that should be a dyn_cast.

This fixes a crash for certain IR, see the new test case for an
example.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D134424
The file was modifiedmlir/test/Dialect/SCF/one-shot-bufferize.mlir (diff)
The file was modifiedmlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp (diff)
Commit 2e9118f1e420a3ec4fd525374753121f2e215a23 by luxufan
[MemorySSA] Reset location size if IsGuaranteedLoopInvariant after phi tranlation

We set the Location size to beforeOrAfter if the Location value is not
guaranteed loop invariant. But in some cases, we need to reset the
location size if the location size is precise after phi tranlation of
location value. This will improve MemorySSA analysis results.

Differential Revision: https://reviews.llvm.org/D134161
The file was modifiedllvm/include/llvm/Analysis/MemorySSA.h (diff)
The file was modifiedllvm/test/Analysis/MemorySSA/phi-translation.ll (diff)
Commit dad36245a5c2e3779b4eede6fcbbddad19a2f01d by sguelton
[clang] Rework IsTailPaddedMemberArray into isFlexibleArrayMemberExpr

This fixes a bunch of FIXME within IsTailPaddedMemberArray related code.

As a side effect, this now also triggers a warning when trying to access a
"struct hack" member with an index above address space index range.

Differential Revision: https://reviews.llvm.org/D133108
The file was modifiedclang/test/Sema/unbounded-array-bounds.c (diff)
The file was modifiedclang/docs/ReleaseNotes.rst (diff)
The file was modifiedclang/lib/Sema/SemaChecking.cpp (diff)
Commit 525a400c7ca5725b4ab456b222176f580caf35e7 by martin
[LLD] [ELF] Fix building with LLVM_LINK_LLVM_DYLIB since zstd was taken into use

This fixes a regression since fa74144c64dff6b145b0b3fa9397f913ddaa87bf;
even if we're linking to the dylib (which handles all the dependencies
in LLVMSupport), we're now also directly referencing zstd from
lld/ELF, and thus need to explicitly express our dependency on it.
The file was modifiedlld/ELF/CMakeLists.txt (diff)
Commit e0cdafe8d4b2f1585f4756447b677fec37954ec4 by hokein.wu
[AST] Better recovery on an expression refers to an invalid decl.

Prior to the patch, we didn't build a DeclRefExpr if the Decl being
referred to is invalid, because many clang downstream AST consumers
assume it, violating it will cause many diagnostic regressions.

With this patch, we build a DeclRefExpr enven for an invalid decl (when the
AcceptInvalidDecl is true), and wrap it with a dependent-type
RecoveryExpr (to prevent follow-up semantic analysis, and diagnostic
regressions).

This is a revised version of https://reviews.llvm.org/D76831

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D121599
The file was modifiedclang/lib/Sema/SemaExpr.cpp (diff)
The file was modifiedclang/test/AST/ast-dump-recovery.cpp (diff)
The file was modifiedclang/test/SemaTemplate/instantiate-var-template.cpp (diff)
The file was modifiedclang/test/SemaTemplate/constraints.cpp (diff)
The file was modifiedclang/test/SemaTemplate/cxx2a-constraint-exprs.cpp (diff)
The file was modifiedclang/lib/Sema/SemaDecl.cpp (diff)
Commit babdef27c503c0bbbcc017e9f88affddda90ea4e by erich.keane
Re-apply "Deferred Concept Instantiation Implementation"

This reverts commit 95d94a67755620c0a2871ac6f056ca8e9731d5e9.

This implements the deferred concepts instantiation, which should allow
the libstdc++ ranges to properly compile, and for the CRTP to work for
constrained functions.

Since the last attempt, this has fixed the issues from @wlei and
@mordante.

Differential Revision: https://reviews.llvm.org/D126907
The file was modifiedclang/include/clang/AST/Decl.h (diff)
The file was modifiedclang/lib/Sema/TreeTransform.h (diff)
The file was modifiedclang/lib/Sema/SemaDecl.cpp (diff)
The file was modifiedclang/include/clang/AST/DeclBase.h (diff)
The file was modifiedclang/test/SemaTemplate/concepts.cpp (diff)
The file was modifiedclang/lib/AST/ASTContext.cpp (diff)
The file was modifiedclang/lib/AST/ASTImporter.cpp (diff)
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.order/class-template-partial-specializations.cpp (diff)
The file was addedclang/test/SemaTemplate/concepts-friends.cpp
The file was modifiedclang/lib/Sema/SemaConcept.cpp (diff)
The file was addedclang/test/SemaTemplate/deferred-concept-inst.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp (diff)
The file was modifiedclang/lib/Serialization/ASTReaderStmt.cpp (diff)
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp (diff)
The file was modifiedclang/include/clang/AST/ASTContext.h (diff)
The file was modifiedclang/lib/Sema/SemaTemplate.cpp (diff)
The file was modifiedclang/test/SemaTemplate/instantiate-requires-clause.cpp (diff)
The file was modifiedclang/docs/ReleaseNotes.rst (diff)
The file was modifiedclang/lib/Sema/SemaTemplateInstantiate.cpp (diff)
The file was addedclang/test/SemaTemplate/trailing-return-short-circuit.cpp
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp (diff)
The file was addedclang/test/Modules/concept_serialization.cpp
The file was modifiedclang/lib/Sema/SemaTemplateDeduction.cpp (diff)
The file was modifiedclang/lib/Sema/SemaOverload.cpp (diff)
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp (diff)
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.constr/non-function-templates.cpp (diff)
The file was modifiedclang/include/clang/Sema/Sema.h (diff)
The file was modifiedclang/lib/AST/Decl.cpp (diff)
The file was modifiedclang/test/SemaCXX/constrained-special-member-functions.cpp (diff)
The file was modifiedclang/test/CXX/temp/temp.constr/temp.constr.order/var-template-partial-specializations.cpp (diff)
The file was modifiedclang/include/clang/Sema/Template.h (diff)
Commit c2e76f914c9ac0dd15e4a8040a5e277333f91f97 by npopov
[InstCombine] Use simplifyWithOpReplaced() for non-bool selects

Perform the simplifyWithOpReplaced() fold even for non-bool
selects. This subsumes a number of recently added folds for
zext/sext of the condition.

We still need to manually handle variations with both sext/zext
and not, because simplifyWithOpReplaced() only performs one
level of replacements.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp (diff)
Commit 94ebd7d9ff1776bbc94ca6ac82a783fa9d4eaa72 by Matthew.Arsenault
MachineVerifier: Verify REG_SEQUENCE

Somehow there was no verification of this, other than an ad-hoc
assertion in TwoAddressInstructions.
The file was modifiedllvm/test/CodeGen/MIR/X86/subregister-index-operands.mir (diff)
The file was addedllvm/test/MachineVerifier/verify-reg-sequence.mir
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/load-store-opt-scc.mir (diff)
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/load-store-opt-dlc.mir (diff)
The file was modifiedllvm/lib/CodeGen/TwoAddressInstructionPass.cpp (diff)
Commit cf77333da986720e9aded4301d81a581e2be9611 by joeloser
[clang][docs] Fix supported element types for __builtin_reduce_(add|mul)

The docs mention that `__builtin_reduce_add` and `__builtin_reduce_mul` support
both integer and floating point element types, but only integer element types
are actually supported. See https://github.com/llvm/llvm-project/issues/57847,
and specifically,
https://github.com/llvm/llvm-project/blob/00874c48ea4d291908517afaab50d1dcbfb016c3/clang/lib/Sema/SemaChecking.cpp#L2631 for the fact that floating point element types are not supported yet.

Fix the docs to only mention support for integer element types.
The file was modifiedclang/docs/LanguageExtensions.rst (diff)