Changes

Summary

  1. [hwasan] Display causes in order of probability. (details)
  2. [InstCombine]Add a test for reductions after shuffles, NFC. (details)
  3. [LV] Fix crash when target instruction for sinking is dead. (details)
  4. [mlir] Remove SDBM (details)
  5. [mlir] Add support for LLVM's dso_local attr (details)
  6. Revert "[NFC] Remove shadowed variable in InnerLoopVectorizer::createInductionVariable" (details)
  7. [SCCP] Add tests with urem/srem with 2 constant operands. (details)
  8. ARM: fix vacuously true assertion to actually check what it should. NFC. (details)
  9. [lld/mac] Make symbol table order deterministic (details)
  10. [mlir][Linalg] NFC - Drop AliasInfo::existsNonDominatingRead (details)
  11. [NFC] Remove shadowed variable in InnerLoopVectorizer::createInductionVariable (details)
  12. [X86] Add cmov i33 sgt test case (details)
  13. [AVR] Fix a bug in prologue of ISR (details)
  14. [DebugInstrRef][3/3] Follow DBG_PHI instructions through LiveDebugValues (details)
  15. [SVE] Added CodeGen support for inserting an element into a predicate vector (details)
  16. Revert "[NFC] Remove shadowed variable in InnerLoopVectorizer::createInductionVariable" (details)
  17. [analyzer] Make CheckerManager::hasPathSensitiveCheckers() complete again (details)
Commit b458bb8c04cd5ed025884d424f386a00c9c6857e by fmayer
[hwasan] Display causes in order of probability.

A heap or global buffer that is far away from the faulting address is
unlikely to be the cause, especially if there is a potential
use-after-free as well, so we want to show it after the other
causes.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D104781
The file was modifiedcompiler-rt/test/hwasan/TestCases/heap-buffer-overflow.c
The file was modifiedcompiler-rt/test/hwasan/TestCases/use-after-free.c
The file was modifiedcompiler-rt/test/hwasan/TestCases/stack-uar.c
The file was modifiedcompiler-rt/test/hwasan/TestCases/thread-uaf.c
The file was modifiedcompiler-rt/lib/hwasan/hwasan_report.cpp
The file was modifiedcompiler-rt/test/hwasan/TestCases/stack-oob.c
The file was modifiedcompiler-rt/test/hwasan/TestCases/global.c
The file was addedcompiler-rt/test/hwasan/TestCases/use-after-free-and-overflow.c
Commit 2098c5dfbd621f5d51eba90810da083c1eb407fc by a.bataev
[InstCombine]Add a test for reductions after shuffles, NFC.
The file was addedllvm/test/Transforms/InstCombine/reduction-shufflevector.ll
Commit 47215e1c6250298aa9db59b3b06f832fcd23be01 by flo
[LV] Fix crash when target instruction for sinking is dead.

This patch fixes a crash when the target instruction for sinking is
dead. In that case, no recipe is created and trying to get the recipe
for it results in a crash. To ensure all sink targets are alive, find &
use the first previous alive instruction.

Note that the case where the sink source is dead is already handled.

Found by
https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=35320

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D104603
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
Commit 355216380b9c11e5d7a16ac20619cf16b1c0151c by zinenko
[mlir] Remove SDBM

This data structure and algorithm collection is no longer in use.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D105102
The file was removedmlir/lib/Dialect/SDBM/SDBMDialect.cpp
The file was modifiedmlir/unittests/CMakeLists.txt
The file was removedmlir/lib/Dialect/SDBM/SDBM.cpp
The file was removedmlir/unittests/SDBM/SDBMTest.cpp
The file was modifiedmlir/lib/Dialect/CMakeLists.txt
The file was removedmlir/test/SDBM/sdbm-api-test.cpp
The file was removedmlir/test/SDBM/CMakeLists.txt
The file was removedmlir/lib/Dialect/SDBM/SDBMExprDetail.h
The file was modifiedmlir/test/lit.cfg.py
The file was removedmlir/include/mlir/Dialect/SDBM/SDBM.h
The file was removedmlir/test/SDBM/lit.local.cfg
The file was removedmlir/unittests/SDBM/CMakeLists.txt
The file was removedmlir/lib/Dialect/SDBM/CMakeLists.txt
The file was removedmlir/include/mlir/Dialect/SDBM/SDBMDialect.h
The file was removedmlir/include/mlir/Dialect/SDBM/SDBMExpr.h
The file was modifiedmlir/include/mlir/InitAllDialects.h
The file was modifiedmlir/test/CMakeLists.txt
The file was modifiedmlir/test/mlir-opt/commandline.mlir
The file was removedmlir/lib/Dialect/SDBM/SDBMExpr.cpp
Commit 8ca04b05133b9fc1b891585e9dfd6e30790998ba by zinenko
[mlir] Add support for LLVM's dso_local attr

This patch brings support for setting runtime preemption specifiers of
LLVM's GlobalValues. In LLVM semantics, if the `dso_local` attribute
is not explicitly requested, then it is inferred based on linkage and
visibility. We model this same behavior with a UnitAttribute: if it is
present, then we explicitly request the GlobalValue to marked as
`dso_local`, otherwise we rely on the GlobalValue itself to make this
decision.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D104983
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
The file was modifiedmlir/test/Target/LLVMIR/llvmir.mlir
The file was modifiedmlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp
Commit 8a3365fba2e9f4489780c9c9a6c356748b72e8c1 by david.sherwood
Revert "[NFC] Remove shadowed variable in InnerLoopVectorizer::createInductionVariable"

This reverts commit dcfc2c3fac980b137415c17f2f19c06c3e2bd7fb.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 1092357ccdc9b12e1b129bf34819d16dbe14532f by flo
[SCCP] Add tests with urem/srem with 2 constant operands.

Reduced test case for PR49731.
The file was modifiedllvm/test/Transforms/SCCP/binaryops-range-special-cases.ll
Commit c82957e79236f9f5ef2598ab86138d43fd987932 by Tim Northover
ARM: fix vacuously true assertion to actually check what it should. NFC.
The file was modifiedllvm/lib/Target/ARM/ARMFrameLowering.cpp
Commit aed0a08c69cfb274a1e005e3bd9865ac15c2dfb7 by thakis
[lld/mac] Make symbol table order deterministic

SymtabSection::emitStabs() writes the symbol table in the order
of externalSymbols, which has the order of symtab->getSymbols(),
which is just the order symbols are added to the symbol table.

In practice, symbols in the symbol files of input .o files are
sorted, but since that's not guaranteed we sort them in
ObjFile::parseSymbols(). To make sure several symbols with the same
address keep the order they're in the input file, we have to use
stable_sort().

In practice, std::sort() on already-sorted inputs won't change the order
of just adjacent elements, and while in theory std::sort() could use a
random pivot, in practice the code should be deterministic as it was
previously too.

But now lld/test/MachO/stabs.s passes with LLVM_ENABLE_EXPENSIVE_CHECKS=ON
(the last test that was failing with that set).

Fixes a regression from D99972.

While here, remove an empty section in stabs.s and move
.subsections_via_symbols to the end where it usually is (this part no
behavior change).

Differential Revision: https://reviews.llvm.org/D105071
The file was modifiedlld/MachO/InputFiles.cpp
The file was modifiedlld/test/MachO/stabs.s
Commit b661d9f9c35e5d5689ec20b825de203c08404c9a by nicolas.vasilache
[mlir][Linalg] NFC - Drop AliasInfo::existsNonDominatingRead

The case where a non-dominating read can be found is captured by slightly generalizing `AliasInfo::wouldCreaateReadAfterWriteInterference`.

This simplification will make it easier to implement bufferization across function call.

APIs are also simplified were possible.

Differential revision: https://reviews.llvm.org/D104845
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
Commit 9dde51416209a5552156384b9c2b08b676818d70 by david.sherwood
[NFC] Remove shadowed variable in InnerLoopVectorizer::createInductionVariable

Avoid creating a IRBuilder stack variable with the same name as the
class member.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit f0d6c9156b129597f2215b4123ebaae8a3eb57a3 by llvm-dev
[X86] Add cmov i33 sgt test case

Suggested on D101074 - add a 'icmp sgt i64 %0, -2147483649' comparison that can fold to 'icmp sge i64 %0, -2147483648' on D101074 allowing i32 immediate folding
The file was modifiedllvm/test/CodeGen/X86/cmov.ll
Commit c85175c5f6a96e44b3b343fa7b26d66bbc0b4973 by powerman1st
[AVR] Fix a bug in prologue of ISR

The r1 register should be cleared in prologue of ISR as it is used
as constant zero.

Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D99467
The file was modifiedllvm/test/CodeGen/AVR/interrupts.ll
The file was modifiedllvm/lib/Target/AVR/AVRFrameLowering.cpp
Commit 010108bb2c88511f7bb4f432b9c365e6aef81468 by jeremy.morse
[DebugInstrRef][3/3] Follow DBG_PHI instructions through LiveDebugValues

This patch reads machine value numbers from DBG_PHI instructions (marking
where SSA PHIs used to be), and matches them up with DBG_INSTR_REF
instructions that refer to them. Essentially they are two separate parts of
a DBG_VALUE: the place to read the value (register and program position),
and where the variable is assigned that value.

Sometimes these DBG_PHIs can be duplicated, usually by tail duplication.
This corresponds to the SSA structure of the program being destroyed, and
the original PHI being split. When this happens: run LLVMs standard
SSAUpdater utility, to work out what values should appear in which blocks.
The majority of this patch is boilerplate to make use of SSAUpdater.

If there are any additional PHIs on the path between multiple DBG_PHIs and
their using DBG_INSTR_REF, their existance is validated, just in case a
value gets clobbered along the way (see dbg-phis-with-loops.mir for
several examples).

Differential Revision: https://reviews.llvm.org/D86814
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
The file was addedllvm/test/DebugInfo/MIR/InstrRef/dbg-phis-in-ldv.mir
The file was addedllvm/test/DebugInfo/MIR/InstrRef/dbg-phis-with-loops.mir
The file was addedllvm/test/DebugInfo/MIR/InstrRef/dbg-phis-merging-in-ldv.mir
Commit c3d3defd11a73d86f2ec0a5e1d8af36c5486be49 by Dylan.Fleming
[SVE] Added CodeGen support for inserting an element into a predicate vector

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D104722
The file was modifiedllvm/test/CodeGen/AArch64/sve-insert-element.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 9de63367d8a7ab9e2588de4eae5a5df6a1abd90f by david.sherwood
Revert "[NFC] Remove shadowed variable in InnerLoopVectorizer::createInductionVariable"

This reverts commit 9dde51416209a5552156384b9c2b08b676818d70.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 3dae01911b6902f00e80eb7ebdc2f55bb28f173e by balazs.benics
[analyzer] Make CheckerManager::hasPathSensitiveCheckers() complete again

It turns out that the CheckerManager::hasPathSensitiveCheckers() missed
checking for the BeginFunctionCheckers.
It seems like other callbacks are also missing:
- ObjCMessageNilCheckers
- BeginFunctionCheckers
- NewAllocatorCheckers
- PointerEscapeCheckers
- EndOfTranslationUnitCheckers

In this patch, I wanted to use a fold-expression, but until C++17
arrives we are left with the old-school method.

When I tried to write a unittest I observed an interesting behavior. I
subscribed only to the BeginFunction event, it was not fired.
However, when I also defined the PreCall with an empty handler, suddenly
both fired.
I could add this test demonstrating the issue, but I don't think it
would serve much value in a long run. I don't expect regressions for
this.

However, I think it would be great to enforce the completeness of this
list in a runtime check.
I could not come up with a solution for this though.

PS: Thank you @Szelethus for helping me debugging this.

Differential Revision: https://reviews.llvm.org/D105101

Reviewed by: vsavchenko
The file was modifiedclang/lib/StaticAnalyzer/Core/CheckerManager.cpp