Commit
3a696f6092effe6513b85f51510e51090e205715
by Dávid Bolvanský[InstCombine] rotate(X,Z) eq/ne rotate(Y,Z) ---> X eq/ne Y (PR51565)
```
---------------------------------------- define i1 @src(i8 %x, i8 %y, i8 %z) { %0: %f = fshl i8 %x, i8 %x, i8 %z %f2 = fshl i8 %y, i8 %y, i8 %z %r = icmp eq i8 %f, %f2 ret i1 %r } => define i1 @tgt(i8 %x, i8 %y, i8 %z) { %0: %r = icmp eq i8 %x, %y ret i1 %r } Transformation seems to be correct!
```
https://alive2.llvm.org/ce/z/qAZp8f
Solves PR51565
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D109271
|
 | llvm/test/Transforms/InstCombine/icmp-rotate.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp |
Commit
e03c8d309aa5f2551a31dd14941a71c300956d12
by i[AsmPrinter] Remove unneeded MCSubtargetInfo temporary after D14346. NFC
The temporary object was used as a workaround when the target parser may change STI. D14346 made the MCSubtargetInfo argument to createMCAsmParser const, so we no longer need the temporary object.
|
 | llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp |
Commit
2572c76ec907050f5a3f55f581db87128cca7670
by Dávid Bolvanský[NFC] Added testcases for new binop with select transformation
|
 | llvm/test/Transforms/InstCombine/binop-select.ll |
Commit
89f0587154bd66ca78963f5c5a07982e5e0b1ff0
by brad[CMake] Re-enable use --gc-sections on OpenBSD
Most archs have switched to lld.
|
 | llvm/cmake/modules/AddLLVM.cmake |
Commit
ab79ffdb74810b9f6636ca17d0c274b6c9f418d0
by nikita.ppv[verify-uselistorder] Support -force-opaque-pointers
By creating LLVMContext after parsing parameters.
|
 | llvm/test/Other/force-opaque-ptrs.ll |
 | llvm/tools/verify-uselistorder/verify-uselistorder.cpp |
Commit
d9ab62ca3d292c69d69701541b85efba0f195264
by jezng[lld-macho] Initialize LTO backend with diagnostic handler
Failing to do so results in `std::bad_function_call` being thrown when a pass tries to emit a diagnostic.
I've copied the relevant test over from LLD-ELF's test suite.
Reviewed By: #lld-macho, thevinster
Differential Revision: https://reviews.llvm.org/D109274
|
 | lld/MachO/LTO.cpp |
 | lld/test/MachO/lto-irmover-warning.ll |
Commit
dd028c359e09ed02aee8cdb2c2b54bcaea399560
by anton.a.afanasyev[SLP][Test] Add tests for PR47624 and PR49933
Add tests monitoring issues fix. They should be fixed when https://reviews.llvm.org/D57059 ("Initial support for the vectorization of the non-power-of-2 vectors") is landed.
|
 | llvm/test/Transforms/SLPVectorizer/X86/pr49933.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/pr47642.ll |
Commit
0a0f62e8d63621f415066d635a8e948146bc7b56
by aeubanks[test] Cleanup legacy PM tests in llvm/test/DebugInfo
|
 | llvm/test/DebugInfo/Generic/debuginfofinder-imported-global-variable.ll |
 | llvm/test/DebugInfo/Generic/debuginfofinder-multiple-cu.ll |
 | llvm/test/DebugInfo/Generic/debuginfofinder-inlined-cu.ll |
 | llvm/test/DebugInfo/Generic/debuginfofinder-forward-declaration.ll |
Commit
d896f22fdaadb9abb6654a52a79e7e45c8af66ec
by aeubanks[test] Cleanup legacy PM tests in llvm/test/Analyis/ScalarEvolution
|
 | llvm/test/Analysis/ScalarEvolution/2008-11-15-CubicOOM.ll |
 | llvm/test/Analysis/ScalarEvolution/ne-overflow.ll |
 | llvm/test/Analysis/ScalarEvolution/lt-overflow.ll |
 | llvm/test/Analysis/ScalarEvolution/avoid-infinite-recursion-0.ll |
 | llvm/test/Analysis/ScalarEvolution/2009-07-04-GroupConstantsWidthMismatch.ll |
 | llvm/test/Analysis/ScalarEvolution/2008-11-02-QuadraticCrash.ll |
 | llvm/test/Analysis/ScalarEvolution/avoid-assume-hang.ll |
 | llvm/test/Analysis/ScalarEvolution/pointer-sign-bits.ll |
Commit
bd020bbbd29e3a30f6697d6b077d28d79b3a3a9d
by aeubanks[test] Cleanup tests with -enable-new-pm in llvm/test/Analysis
|
 | llvm/test/Analysis/MemorySSA/pr45927.ll |
 | llvm/test/Analysis/CallGraph/do-nothing-intrinsic.ll |
 | llvm/test/Analysis/MemorySSA/debugvalue2.ll |
 | llvm/test/Analysis/MemorySSA/pr43427.ll |
 | llvm/test/Analysis/GlobalsModRef/comdat-ipo.ll |
 | llvm/test/Analysis/MemorySSA/loop_rotate_remove_trivial_phis.ll |
 | llvm/test/Analysis/MemorySSA/loop-rotate-disablebasicaa.ll |
 | llvm/test/Analysis/MemorySSA/pr43317.ll |
 | llvm/test/Analysis/MemorySSA/pr43438.ll |
 | llvm/test/Analysis/BasicAA/phi-values-usage.ll |
 | llvm/test/Analysis/MemorySSA/pr41640.ll |
 | llvm/test/Analysis/GlobalsModRef/dead-uses.ll |
 | llvm/test/Analysis/GlobalsModRef/no-escape.ll |
 | llvm/test/Analysis/MemorySSA/update_unroll.ll |
 | llvm/test/Analysis/MemorySSA/basicaa-memcpy.ll |
 | llvm/test/Analysis/BasicAA/store-promote.ll |
Commit
28868027f7529ba3de7f16a53710e7dae5d6f6ae
by minyihh[M68k][test] Migrate the remaining fixup and relaxation tests
Migrate the tests regarding fixup and relaxation on branch and call targets. This patch wraps up the migration from `test/CodeGen/M68k/Encoding` to `test/MC/M68k`.
|
 | llvm/test/MC/M68k/Relaxations/branch.s |
 | llvm/test/MC/M68k/Control/branch-pc-rel.s |
 | llvm/test/MC/M68k/Control/call-pc-rel.s |
 | llvm/test/CodeGen/M68k/Encoding/Control/call-pc-rel.mir |
 | llvm/test/CodeGen/M68k/Encoding/README.md |
 | llvm/test/CodeGen/M68k/Encoding/Relaxations/branch.mir |
 | llvm/test/CodeGen/M68k/Encoding/Control/branch-pc-rel.mir |
Commit
37e6a27da754e1a613b0f657c9ae91221237d66a
by aeubanks[test] Fixup tests with -analyze in llvm/test/Transforms
|
 | llvm/test/Transforms/SampleProfile/propagate.ll |
 | llvm/test/Transforms/SampleProfile/calls.ll |
 | llvm/test/Transforms/LoopDistribute/basic-with-memchecks.ll |
 | llvm/test/Transforms/LoopDistribute/basic.ll |
 | llvm/test/Transforms/InstCombine/infinite-loop-postdom.ll |
 | llvm/test/Transforms/SampleProfile/offset.ll |
 | llvm/test/Transforms/SampleProfile/discriminator.ll |
 | llvm/test/Transforms/SampleProfile/branch.ll |
 | llvm/test/Transforms/Util/PredicateInfo/ordering.ll |
 | llvm/test/Transforms/SampleProfile/profile-correlation-irreducible-loops.ll |
 | llvm/test/Transforms/LoopDeletion/update-scev.ll |
 | llvm/test/Transforms/LoopSimplify/preserve-scev.ll |
 | llvm/test/Transforms/IndVarSimplify/shrunk-constant.ll |
 | llvm/test/Transforms/PhaseOrdering/scev-custom-dl.ll |
 | llvm/test/Transforms/SampleProfile/fsafdo_test.ll |
 | llvm/test/Transforms/LICM/update-scev.ll |
 | llvm/test/Transforms/SampleProfile/fnptr.ll |
 | llvm/test/Transforms/PhaseOrdering/scev.ll |
 | llvm/test/Transforms/IndVarSimplify/loop_evaluate_2.ll |
 | llvm/test/Transforms/LoopDeletion/2017-07-11-incremental-dt.ll |
Commit
650bbc56203c947bb85176c40ca9c7c7a91c3c57
by llvm-project[OpenMP][OpenMPIRBuilder] Implement loop unrolling.
Recommit of 707ce34b06190e275572c3c46843036db1bab6d1. Don't introduce a dependency to the LLVMPasses component, instead register the required passes individually.
Add methods for loop unrolling to the OpenMPIRBuilder class and use them in Clang if `-fopenmp-enable-irbuilder` is enabled. The unrolling methods are:
* `unrollLoopFull` * `unrollLoopPartial` * `unrollLoopHeuristic`
`unrollLoopPartial` and `unrollLoopHeuristic` can use compiler heuristics to automatically determine the unroll factor. If possible, that is if no CanonicalLoopInfo is required to pass to another method, metadata for LLVM's LoopUnrollPass is added. Otherwise the unroll factor is determined using the same heurstics as user by LoopUnrollPass. Not requiring a CanonicalLoopInfo, especially with `unrollLoopHeuristic` allows greater flexibility.
With full unrolling and partial unrolling with known unroll factor, instead of duplicating instructions by the OpenMPIRBuilder, the full unroll is still delegated to the LoopUnrollPass. In case of partial unrolling the loop is first tiled using the existing `tileLoops` methods, then the inner loop fully unrolled using the same mechanism.
Reviewed By: jdoerfert, kiranchandramohan
Differential Revision: https://reviews.llvm.org/D107764
|
 | clang/lib/CodeGen/CGStmtOpenMP.cpp |
 | clang/test/OpenMP/irbuilder_unroll_partial_factor.c |
 | llvm/lib/Transforms/IPO/CMakeLists.txt |
 | llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h |
 | clang/test/OpenMP/irbuilder_unroll_partial_heuristic_for_collapse.c |
 | llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp |
 | llvm/lib/Analysis/LoopInfo.cpp |
 | clang/test/OpenMP/irbuilder_unroll_full.c |
 | clang/test/OpenMP/irbuilder_unroll_partial_heuristic.c |
 | clang/test/OpenMP/irbuilder_unroll_partial_heuristic_runtime_for.c |
 | clang/lib/Parse/ParseOpenMP.cpp |
 | clang/test/OpenMP/irbuilder_unroll_unroll_partial_factor.c |
 | llvm/lib/Frontend/OpenMP/CMakeLists.txt |
 | clang/test/OpenMP/irbuilder_unroll_heuristic.c |
 | clang/lib/Sema/SemaOpenMP.cpp |
 | clang/test/OpenMP/irbuilder_unroll_unroll_partial_heuristic.c |
 | clang/lib/CodeGen/CodeGenFunction.h |
 | llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp |
 | clang/test/OpenMP/irbuilder_unroll_partial_factor_for.c |
 | llvm/include/llvm/Analysis/LoopInfo.h |
 | clang/include/clang/Sema/Sema.h |
 | clang/test/OpenMP/irbuilder_unroll_partial_factor_for_collapse.c |
 | clang/test/OpenMP/irbuilder_unroll_partial_heuristic_constant_for.c |
Commit
7abd8f6c6eb233065f55d2f4894f39e4fea2a58c
by chennngwang[libc][Obvious] Fix typos
|
 | libc/benchmarks/RATIONALE.md |
 | libc/src/string/memory_utils/elements.h |
Commit
9b015383f1f1ccf2d69bfff223adce84be72a686
by chennngwang[libc][Obvious] Reorder CMakelists alphabetically.
|
 | libc/test/src/string/CMakeLists.txt |
 | libc/src/string/CMakeLists.txt |
Commit
7801d7963d4fa48f738394c40477eefa1f57eb89
by david.green[DAG] Add tests for select_cc and setcc with constant patterns.
|
 | llvm/test/CodeGen/AMDGPU/select-constant-xor.ll |
 | llvm/test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll |
 | llvm/test/CodeGen/RISCV/select-constant-xor.ll |
 | llvm/test/CodeGen/X86/select-constant-xor.ll |
 | llvm/test/CodeGen/AArch64/select-constant-xor.ll |
 | llvm/test/CodeGen/ARM/select-constant-xor.ll |
 | llvm/test/CodeGen/PowerPC/select-constant-xor.ll |
Commit
9c476172b93367d2cb88d7d3f4b1b5b456fa6020
by Dávid Bolvanský[InstCombine] stpcpy(d,s) -> strcpy(d,s) if the result is not used
|
 | llvm/test/Transforms/InstCombine/stpcpy-1.ll |
 | llvm/lib/Transforms/Utils/BuildLibCalls.cpp |
 | llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp |
 | llvm/test/Transforms/InstCombine/strcpy-nonzero-as.ll |
Commit
79845ed6dfc6511f999d4ada21d46d971f8dd724
by david.green[DAG] Fold setcc eq with ashr to compare to zero.
Pulled out of D109149, this folds set_cc seteq (ashr X, BW-1), -1 -> set_cc setlt X, 0 to prevent some regressions later on when folding select_cc setgt X, -1, C, ~C -> xor (ashr X, BW-1), C
Differential Revision: https://reviews.llvm.org/D109214
|
 | llvm/test/CodeGen/RISCV/select-constant-xor.ll |
 | llvm/test/CodeGen/X86/select-constant-xor.ll |
 | llvm/test/CodeGen/AMDGPU/select-constant-xor.ll |
 | llvm/test/CodeGen/PowerPC/select-constant-xor.ll |
 | llvm/test/CodeGen/AArch64/select-constant-xor.ll |
 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
 | llvm/test/CodeGen/ARM/select-constant-xor.ll |
Commit
8523fb96a63e9c517cb4d2d849fdde1ed65d3d26
by david.green[DAG] Fold select_cc setgt X, -1, C, ~C -> xor (ashr X, BW-1), C
Given a select_cc producing a constant and a invertion of the constant for a comparison more than zero, we can produce an xor with ashr instead, which produces smaller code. The ashr either sets all bits or clear all bits depending on if the value is negative. This is then xor'd with the constant to optionally negate the value. https://alive2.llvm.org/ce/z/DTFaBZ
This includes a OneUseCheck on the Cmp, which seems to make thinks a little worse and will be removed in a followup.
Differential Revision: https://reviews.llvm.org/D109149
|
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/test/CodeGen/RISCV/select-constant-xor.ll |
 | llvm/test/CodeGen/AMDGPU/select-constant-xor.ll |
 | llvm/test/CodeGen/ARM/select-constant-xor.ll |
 | llvm/test/CodeGen/AArch64/select-constant-xor.ll |
 | llvm/test/CodeGen/X86/select-constant-xor.ll |
 | llvm/test/CodeGen/PowerPC/select-constant-xor.ll |
 | llvm/test/CodeGen/X86/smul_fix_sat.ll |
 | llvm/test/CodeGen/X86/pr16031.ll |
Commit
9962ebaee5822556a8b5105796f258979c56af81
by llvm-dev[CostModel][X86] Add vXi32 multiply pattern tests
Add tests for vXi32 multiplies where the operands have been extended from vXi8/vXi16
|
 | llvm/test/Analysis/CostModel/X86/mul32.ll |
Commit
f114ef3731dfd79e8f235cc02ec9879c489ebf96
by llvm-dev[CostModel][X86] Add generic costs for vXi32 MUL -> v2Xi16 PMADDDW folds
Based off the improved fold in D108522
This should eventually allow us to replace the SLM only cost patterns with generic versions.
|
 | llvm/test/Analysis/CostModel/X86/mul32.ll |
 | llvm/test/Transforms/LoopVectorize/X86/mul_slm_16bit.ll |
 | llvm/lib/Target/X86/X86TargetTransformInfo.cpp |
 | llvm/test/Analysis/CostModel/X86/slm-arith-costs.ll |
Commit
1b83aaaefa1aedbf1a98a33533295b78f89a5b0b
by david.green[DAG] Remove oneuse check in select_cc setgt X, -1, C, ~C fold
This appears to produce better code, even if the condition may need to be replicated.
|
 | llvm/test/CodeGen/AMDGPU/fp_to_sint.ll |
 | llvm/test/CodeGen/PowerPC/select-constant-xor.ll |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/test/CodeGen/AMDGPU/fp_to_uint.ll |
 | llvm/test/CodeGen/ARM/select-constant-xor.ll |
 | llvm/test/CodeGen/X86/sshl_sat.ll |
 | llvm/test/CodeGen/PowerPC/smulfixsat.ll |
 | llvm/test/CodeGen/AArch64/select-constant-xor.ll |
 | llvm/test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll |
 | llvm/test/CodeGen/X86/smul_fix_sat.ll |
Commit
dfc46f02681447370a1ccbe340034e970bc7e572
by kazu[clang-tidy] Drop unnecessary const from return types (NFC)
Identified with readability-const-return-type.
|
 | clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.h |
 | clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp |
 | clang-tools-extra/clang-tidy/cppcoreguidelines/PreferMemberInitializerCheck.cpp |
Commit
a43853aecde71312decf6ac3ed11f5e442a7f183
by aeubanks[test] Remove -loop-guard-widening legacy PM tests
|
 | llvm/test/Transforms/GuardWidening/loop-schedule.ll |
 | llvm/test/Transforms/GuardWidening/basic-loop.ll |
Commit
86d1a0b30684f2ab8ec33f0b6fa3d05e4bada0c8
by aeubanks[test] Remove some legacy PM tests in llvm/test/Instrumentation
|
 | llvm/test/Instrumentation/HWAddressSanitizer/dbg-declare-tag-offset.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/atomic.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/abort-in-entry-block.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/chains.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/fuchsia.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/stack-depth-variable-declared-by-user.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/landingpad.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/basic.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/trace-pc-guard-inline-bool-flag.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/stack-depth.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/coff-pc-table-inline-bool-flag.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/no-func.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/kernel.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/dbg-value-tag-offset.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/with-calls.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/mem-intrinsics.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/inline-bool-flag.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/cmp-tracing-api-x86_64.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/basic-compat.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/globals.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/inline-8bit-counters.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/switch-tracing.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/tracing-comdat.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/div-tracing.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/coff-pc-table-inline-8bit-counters.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/interposable-symbol.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/postdominator_check.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/stack-safety-analysis.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/cmp-tracing-api-x86_32.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll |
 | llvm/test/Instrumentation/ThreadSanitizer/do-not-instrument-memory-access.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/const-cmp-tracing.ll |
 | llvm/test/Instrumentation/ThreadSanitizer/tsan_basic.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/unreachable-critedge.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/wineh.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/gep-tracing.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/coverage-dbg.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/trace-pc-guard-inline-8bit-counters.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/pc-table.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/coff-comdat.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/cmp-tracing.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/kernel-inline.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/coverage2-dbg.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/trace-pc-guard.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/backedge-pruning.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/coff-used-ctor.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/seh.ll |
 | llvm/test/Instrumentation/HWAddressSanitizer/personality.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/coverage.ll |
 | llvm/test/Instrumentation/SanitizerCoverage/tracing.ll |
Commit
0df277a13f6631dd7514cc6708b1b5b2fe35616f
by aeubanks[test] Remove some legacy PM tests in llvm/test/Instrumentation/AddressSanitizer
|
 | llvm/test/Instrumentation/AddressSanitizer/asan-optimize-callbacks.ll |
 | llvm/test/Instrumentation/AddressSanitizer/do-not-instrument-profiling-globals.ll |
 | llvm/test/Instrumentation/AddressSanitizer/musttail.ll |
 | llvm/test/Instrumentation/AddressSanitizer/global_metadata_windows.ll |
 | llvm/test/Instrumentation/AddressSanitizer/instrument_initializer_metadata.ll |
 | llvm/test/Instrumentation/AddressSanitizer/do-not-instrument-globals-linux.ll |
 | llvm/test/Instrumentation/AddressSanitizer/asan_address_space_attr.ll |
 | llvm/test/Instrumentation/AddressSanitizer/lifetime-throw.ll |
 | llvm/test/Instrumentation/AddressSanitizer/freebsd.ll |
 | llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_constant_address_space.ll |
 | llvm/test/Instrumentation/AddressSanitizer/global_addrspace.ll |
 | llvm/test/Instrumentation/AddressSanitizer/asan-vs-gvn.ll |
 | llvm/test/Instrumentation/AddressSanitizer/instrument-dynamic-allocas.ll |
 | llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll |
 | llvm/test/Instrumentation/AddressSanitizer/instrumentation-with-call-threshold.ll |
 | llvm/test/Instrumentation/AddressSanitizer/debug-info-global-var.ll |
 | llvm/test/Instrumentation/AddressSanitizer/adaptive_global_redzones.ll |
 | llvm/test/Instrumentation/AddressSanitizer/dynamic-shadow-darwin.ll |
 | llvm/test/Instrumentation/AddressSanitizer/AMDGPU/adaptive_constant_global_redzones.ll |
 | llvm/test/Instrumentation/AddressSanitizer/force-dynamic-shadow.ll |
 | llvm/test/Instrumentation/AddressSanitizer/stack-poisoning-and-lifetime-be.ll |
 | llvm/test/Instrumentation/AddressSanitizer/instrument_load_then_store.ll |
 | llvm/test/Instrumentation/AddressSanitizer/global_metadata.ll |
 | llvm/test/Instrumentation/AddressSanitizer/instrument-no-return.ll |
 | llvm/test/Instrumentation/AddressSanitizer/debug_info_noninstrumented_alloca2.ll |
 | llvm/test/Instrumentation/AddressSanitizer/no-globals.ll |
 | llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_lds.ll |
 | llvm/test/Instrumentation/AddressSanitizer/global_with_comdat.ll |
 | llvm/test/Instrumentation/AddressSanitizer/global_metadata_external_comdat.ll |
 | llvm/test/Instrumentation/AddressSanitizer/debug_info.ll |
 | llvm/test/Instrumentation/AddressSanitizer/twice.ll |
 | llvm/test/Instrumentation/AddressSanitizer/AMDGPU/adaptive_global_redzones.ll |
 | llvm/test/Instrumentation/AddressSanitizer/scale-offset.ll |
 | llvm/test/Instrumentation/AddressSanitizer/global_metadata_darwin.ll |
 | llvm/test/Instrumentation/AddressSanitizer/win-sorted-sections.ll |
 | llvm/test/Instrumentation/AddressSanitizer/global_metadata_array.ll |
 | llvm/test/Instrumentation/AddressSanitizer/hoist-argument-init-insts.ll |
 | llvm/test/Instrumentation/AddressSanitizer/instrument-stack.ll |
 | llvm/test/Instrumentation/AddressSanitizer/odr-check-ignore.ll |
 | llvm/test/Instrumentation/AddressSanitizer/X86/asm_cpuid.ll |
 | llvm/test/Instrumentation/AddressSanitizer/byval-args.ll |
 | llvm/test/Instrumentation/AddressSanitizer/ps4.ll |
 | llvm/test/Instrumentation/AddressSanitizer/debug_info_noninstrumented_alloca.ll |
 | llvm/test/Instrumentation/AddressSanitizer/win-string-literal.ll |
 | llvm/test/Instrumentation/AddressSanitizer/do-not-touch-comdat-global.ll |
 | llvm/test/Instrumentation/AddressSanitizer/do-not-instrument-internal-globals.ll |
 | llvm/test/Instrumentation/AddressSanitizer/localescape.ll |
 | llvm/test/Instrumentation/AddressSanitizer/instrument-section-invalid-c-ident.ll |
 | llvm/test/Instrumentation/AddressSanitizer/do-not-instrument-promotable-allocas.ll |
 | llvm/test/Instrumentation/AddressSanitizer/with-ifunc.ll |
 | llvm/test/Instrumentation/AddressSanitizer/global_cstring_darwin.ll |
 | llvm/test/Instrumentation/AddressSanitizer/basic.ll |
 | llvm/test/Instrumentation/AddressSanitizer/debug-info-alloca.ll |
 | llvm/test/Instrumentation/AddressSanitizer/stack_dynamic_alloca.ll |
 | llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_global_address_space.ll |
 | llvm/test/Instrumentation/AddressSanitizer/ubsan.ll |
 | llvm/test/Instrumentation/AddressSanitizer/do-not-instrument-netbsd-link_set.ll |
 | llvm/test/Instrumentation/AddressSanitizer/str-nobuiltin.ll |
 | llvm/test/Instrumentation/AddressSanitizer/do-not-instrument-sanitizers.ll |
 | llvm/test/Instrumentation/AddressSanitizer/asan-masked-load-store.ll |
 | llvm/test/Instrumentation/AddressSanitizer/do-not-touch-odr-global.ll |
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 | llvm/test/Instrumentation/AddressSanitizer/AMDGPU/global_metadata_addrspacecasts.ll |
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 | llvm/test/Instrumentation/AddressSanitizer/do-not-instrument-globals-darwin.ll |
 | llvm/test/Instrumentation/AddressSanitizer/stack-poisoning.ll |
 | llvm/test/Instrumentation/AddressSanitizer/byref-args.ll |
 | llvm/test/Instrumentation/AddressSanitizer/no_global_dtors.ll |
 | llvm/test/Instrumentation/AddressSanitizer/basic-msvc64.ll |
 | llvm/test/Instrumentation/AddressSanitizer/experiment-call.ll |
 | llvm/test/Instrumentation/AddressSanitizer/X86/asm_more_registers_than_available.ll |
 | llvm/test/Instrumentation/AddressSanitizer/local_alias.ll |
 | llvm/test/Instrumentation/AddressSanitizer/local_stack_base.ll |
 | llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_scratch.ll |
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 | llvm/test/Instrumentation/AddressSanitizer/AMDGPU/instrument-stack.ll |
 | llvm/test/Instrumentation/AddressSanitizer/do-not-touch-threadlocal.ll |
 | llvm/test/Instrumentation/AddressSanitizer/global_lto_merge.ll |
 | llvm/test/Instrumentation/AddressSanitizer/keep_going.ll |
 | llvm/test/Instrumentation/AddressSanitizer/test64.ll |
 | llvm/test/Instrumentation/AddressSanitizer/instrument_global.ll |
 | llvm/test/Instrumentation/AddressSanitizer/stack_layout.ll |
 | llvm/test/Instrumentation/AddressSanitizer/experiment.ll |
 | llvm/test/Instrumentation/AddressSanitizer/global_metadata_bitcasts.ll |
 | llvm/test/Instrumentation/AddressSanitizer/AMDGPU/no_redzones_in_lds_globals.ll |
 | llvm/test/Instrumentation/AddressSanitizer/asan-detect-invalid-pointer-pair.ll |
Commit
1a88bd68c17623c3ac8c9b75baa181bac271b494
by benny.kra[Bazel] Add missing dependency after 650bbc56203c947bb85176c40ca9c7c7a91c3c57
|
 | utils/bazel/llvm-project-overlay/llvm/BUILD.bazel |
Commit
8ce2675b1363ea0afa160e5fc564199857e8506c
by k[libc++][compare] Implement three_way_comparable[_with] concepts
Implementation of `three_way_comparable` and `three_way_comparable_with` concepts from <compare> header.
Please note that I have temporarily removed `<compare>` header from `<utility>` due to cyclic dependency that prevents using `<concepts>` header in `<compare>` one.
I tried to quickly resolve those issues including applying suggestions from @cjdb and dive deeper by myself but the problem seems more complicated that we thought initially.
I am in progress to prepare the patch with resolving this cyclic dependency between headers but for now I decided to put all that I have to the review to unblock people that depend on that functionality. At first glance the patch with resolving cyclic dependency is not so small (unless I find the way to make it smaller and cleaner) so I don't want to mix everything to one review.
Reviewed By: ldionne, cjdb, #libc, Quuxplusone
Differential Revision: https://reviews.llvm.org/D103478
|
 | libcxx/include/__compare/three_way_comparable.h |
 | libcxx/test/std/language.support/cmp/cmp.concept/three_way_comparable_with.compile.pass.cpp |
 | libcxx/include/CMakeLists.txt |
 | libcxx/include/module.modulemap |
 | libcxx/test/libcxx/diagnostics/detail.headers/compare/three_way_comparable.module.verify.cpp |
 | libcxx/test/std/language.support/cmp/cmp.concept/three_way_comparable.compile.pass.cpp |
 | libcxx/include/compare |
Commit
fa69ccd189694d0b992323738443ac05a2bcb9ca
by llvmgnsyncbot[gn build] Port 8ce2675b1363
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn |
Commit
5f48c144c58f6d23e850a1978a6fe05887103b17
by guopeilin1[AArch64][GlobalISel] Use ZExtValue for zext(xor) when invert tb(n)z
Currently, we use SExtValue to decide whether to invert tbz or tbnz. However, for the case zext (xor x, c), we should use ZExt rather than SExt otherwise we will generate totally opposite branches.
Reviewed By: paquette
Differential Revision: https://reviews.llvm.org/D108755
|
 | llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-xor-tbz-tbnz.mir |
Commit
0e03450ae4358e8a8242b73d493d96efea9d3ccf
by i[AArch64] Remove an uneeded !NeedsWinCFI check. NFC
|
 | llvm/lib/Target/AArch64/AArch64FrameLowering.cpp |
Commit
779368bd9fc61daff934cb4e8600585450a278e7
by marius.brehler[mlir][docs] Complement list of supported scf ops
|
 | mlir/docs/Dialects/emitc.md |
Commit
e15836361cdfeb3a717a2ebae94c68286111369b
by Saiyedul.Islam[clang-nvlink-wrapper] Add documentation in clang docs
Add documentation of clang-nvlink-wrapper tool in clang. Add it to the release notes of clang. Fix a small MSVC warning.
Differential Revision: https://reviews.llvm.org/D109225
|
 | clang/docs/ClangNvlinkWrapper.rst |
 | clang/docs/ReleaseNotes.rst |
 | clang/tools/clang-nvlink-wrapper/ClangNvlinkWrapper.cpp |
 | clang/docs/index.rst |
Commit
6c1ac141d3c98af9738bc77fcb55602cbff7751f
by ivan.zhechev[Flang] Ported test_errors.sh to Python
To enable Flang testing on Windows, shell scripts have to be ported to Python. In this patch the "test_errors.sh" script is ported to python ("test_errors.py"). The RUN line of existing tests was changed to make use of the python script.
Used python regex in place of awk/sed.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D107575
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 | flang/test/Semantics/resolve22.f90 |
 | flang/test/Semantics/implicit05.f90 |
 | flang/test/Semantics/null-init.f90 |
 | flang/test/Semantics/call09.f90 |
 | flang/test/Semantics/omp-reduction04.f90 |
 | flang/test/Semantics/omp-flush02.f90 |
 | flang/test/Semantics/omp-loop-association.f90 |
 | flang/test/Semantics/resolve82.f90 |
 | flang/test/Semantics/call16.f90 |
 | flang/test/Semantics/omp-parallel-shared03.f90 |
 | flang/test/Semantics/dosemantics09.f90 |
 | flang/test/Semantics/call20.f90 |
 | flang/test/Semantics/OpenACC/acc-update-validity.f90 |
 | flang/test/Semantics/selecttype01.f90 |
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 | flang/test/Semantics/resolve34.f90 |
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 | flang/test/Semantics/int-literals.f90 |
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 | flang/test/Semantics/blockconstruct03.f90 |
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 | flang/test/Semantics/OpenACC/acc-data.f90 |
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 | flang/test/Semantics/doconcurrent08.f90 |
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 | flang/test/Semantics/OpenACC/acc-host-data.f90 |
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 | flang/test/Semantics/num_images.f90 |
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 | flang/test/Semantics/random-seed.f90 |
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 | flang/test/Semantics/omp-taskgroup01.f90 |
 | flang/test/Semantics/io06.f90 |
 | flang/test/Semantics/omp-allocate-directive.f90 |
 | flang/test/Semantics/call03.f90 |
 | flang/test/Semantics/associated.f90 |
 | flang/test/Semantics/expr-errors03.f90 |
 | flang/test/Semantics/label11.f90 |
 | flang/test/Semantics/c_f_pointer.f90 |
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 | flang/test/Semantics/final01.f90 |
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 | flang/test/Semantics/init01.f90 |
 | flang/test/Semantics/resolve24.f90 |
 | flang/test/Semantics/omp-do09.f90 |
 | flang/test/Semantics/omp-reduction03.f90 |
 | flang/test/Semantics/implicit01.f90 |
 | flang/test/Semantics/resolve28.f90 |
 | flang/test/Semantics/resolve37.f90 |
 | flang/test/Semantics/resolve96.f90 |
 | flang/test/Semantics/OpenACC/acc-parallel-loop-validity.f90 |
 | flang/test/Semantics/resolve49.f90 |
 | flang/test/Semantics/stop01.f90 |
 | flang/test/Semantics/resolve57.f90 |
 | flang/test/Semantics/io02.f90 |
 | flang/test/Semantics/unpack.f90 |
 | flang/test/Semantics/omp-copyprivate02.f90 |
 | flang/test/Semantics/omp-parallel-shared04.f90 |
 | flang/test/Semantics/resolve88.f90 |
Commit
f6873786034ab752a50539badc0ce57ac11dda6c
by sichert[RuntimeDyld] Implemented relocation for ELF::R_X86_64_GOTPC32
Differential Revision: https://reviews.llvm.org/D95512
|
 | llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp |
Commit
a0a5964499816373c50d6d6a3a4b38c1b53f6714
by sichert[RuntimeDyld] Implemented relocation of TLS symbols in ELF
Differential Revision: https://reviews.llvm.org/D105466
|
 | llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp |
 | llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp |
 | llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp |
 | llvm/test/ExecutionEngine/RuntimeDyld/X86/TLS.s |
 | llvm/include/llvm/ExecutionEngine/RuntimeDyld.h |
 | llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.h |
Commit
915a8bb5ee596f38df0bc72564d57034fe57ae3c
by david.spickettRevert "[compiler-rt][Profile] Disable test on Arm/AArch64 Linux"
This reverts commit 8b86f8a3256a59cbaa12858cb0842025d48f549f.
The inconsistent behaviour has been fixed with 5e50d3073a5ead122a731580ded3f1cb3c21ee54.
|
 | compiler-rt/test/profile/ContinuousSyncMode/set-file-object.c |
Commit
58c188507f724feee181018bfb6a330be2c6ac9a
by pifon[mlir][linalg] Fix `FoldInitTensorWithDimOp` if dim(init_tensor) is static.
It looks like it was a typo. Instead of `*maybeConstantIndex`, `initTensorOp.getStaticSize(*maybeConstantIndex)` should be used to access the dim size of the tensor. There is a test for that in `canonicalize.mlir`, but it was working correctly because `ReplaceStaticShapeDims` was canonicalizing DimOp before `FoldInitTensorWithDimOp`. So, to make the patterns more "orthogonal", this case is disabled.
Differential Revision: https://reviews.llvm.org/D109247
|
 | mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp |
Commit
2706b1a6e2dfe79a5c17c7d6f99401d386a9355b
by fmayer[hwasan] Test use-after-scope with -fno-exceptions.
Reviewed By: hctim
Differential Revision: https://reviews.llvm.org/D109224
|
 | compiler-rt/test/hwasan/TestCases/use-after-scope-types.cpp |
Commit
cc9260a0fb7c42ac8a8bb87eac1e11900c25ed20
by Justas.Janickas[OpenCL] Supports optional generic address space semantics in C++ for OpenCL 2021
Adds support for a feature macro `__opencl_c_generic_adress_space` in C++ for OpenCL 2021 enabling a respective optional core feature from OpenCL 3.0. Testing is only performed in SemaOpenCL because generic address space functionality is yet to be implemented in C++ for OpenCL 2021.
This change aims to achieve compatibility between C++ for OpenCL 2021 and OpenCL 3.0.
Differential Revision: https://reviews.llvm.org/D108461
|
 | clang/test/SemaOpenCL/address-spaces.cl |
 | clang/test/SemaOpenCL/address-spaces-conversions-cl2.0.cl |
 | clang/lib/Basic/TargetInfo.cpp |
Commit
12fa608af44a80de8b655a8a984cd095908e7e80
by tianqing.wang[X86] Add CRC32 feature.
d8faf03807ac implemented general-regs-only for X86 by disabling all features with vector instructions. But the CRC32 instruction in SSE4.2 ISA, which uses only GPRs, also becomes unavailable. This patch adds a CRC32 feature for this instruction and allows it to be used with general-regs-only.
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D105462
|
 | llvm/test/CodeGen/X86/sse42-intrinsics-x86_64.ll |
 | llvm/lib/Target/X86/X86Subtarget.h |
 | clang/test/CodeGen/attr-target-x86.c |
 | clang/lib/Headers/ia32intrin.h |
 | llvm/lib/Target/X86/X86InstrSSE.td |
 | llvm/test/CodeGen/X86/crc32-target-feature.ll |
 | clang/lib/Headers/CMakeLists.txt |
 | clang/test/CodeGen/X86/x86-crc-builtins.c |
 | clang/lib/Basic/Targets/X86.cpp |
 | clang/test/Driver/x86-mcrc32.c |
 | llvm/lib/Target/X86/X86.td |
 | clang/lib/Headers/x86gprintrin.h |
 | clang/include/clang/Basic/BuiltinsX86_64.def |
 | llvm/test/CodeGen/X86/stack-folding-int-sse42.ll |
 | clang/docs/ClangCommandLineReference.rst |
 | clang/test/CodeGen/attr-target-crc32-x86.c |
 | clang/include/clang/Driver/Options.td |
 | llvm/test/CodeGen/X86/crc32-intrinsics-x86.ll |
 | clang/lib/Basic/Targets/X86.h |
 | llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86_64.ll |
 | clang/lib/Headers/crc32intrin.h |
 | clang/test/Preprocessor/x86_target_features.c |
 | llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel-x86_64.ll |
 | clang/test/Driver/x86-mgeneral-regs-only-crc32.c |
 | llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll |
 | clang/test/CodeGen/attr-cpuspecific.c |
 | clang/test/Driver/x86-target-features.c |
 | llvm/test/CodeGen/X86/function-subtarget-features.ll |
 | llvm/lib/Support/X86TargetParser.cpp |
 | llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.ll |
 | clang/lib/Headers/smmintrin.h |
 | llvm/lib/Target/X86/X86InstrFormats.td |
 | clang/include/clang/Basic/BuiltinsX86.def |
 | llvm/lib/Target/X86/X86InstrInfo.td |
 | llvm/include/llvm/Support/X86TargetParser.def |
 | llvm/lib/Support/Host.cpp |
 | llvm/test/CodeGen/X86/crc32-intrinsics-x86_64.ll |
Commit
edc8ce1ecf748eb4469be99f18ebcaa0cc5669af
by llvmgnsyncbot[gn build] Port 12fa608af44a
|
 | llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn |
Commit
d669cc73212a443e6681adcc39632ecbe227f099
by David CARLIER[Sanitizer] Intercept clock_getcpuid/pthread_getcpuid on netbsd.
Reviewed By: mgorny
Differential Revision: https://reviews.llvm.org/D109278
|
 | compiler-rt/test/sanitizer_common/TestCases/Posix/getcpuclockid.c |
 | compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h |
Commit
96f6785bc9fe3219e9486ff09b22b31fa0c73b34
by sander.desmalen[VectorUtils] Teach findScalarElement to return splat value.
If the vector is a splat of some scalar value, findScalarElement() can simply return the scalar value if it knows the requested lane is in the vector.
This is only needed for scalable vectors, because the InsertElement/ShuffleVector case is already handled explicitly for the fixed-width case.
This helps to recognize an InstCombine fold like: extractelt(bitcast(splat(%v))) -> bitcast(%v)
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D107254
|
 | llvm/lib/Analysis/VectorUtils.cpp |
 | llvm/test/Transforms/InstCombine/vscale_extractelement.ll |
Commit
fae0dfa6421ea6c02f86ba7292fa782e1e2b69d1
by qiucofan[Clang] Add __ibm128 type to represent ppc_fp128
Currently, we have no front-end type for ppc_fp128 type in IR. PowerPC target generates ppc_fp128 type from long double now, but there's option (-mabi=(ieee|ibm)longdouble) to control it and we're going to do transition from IBM extended double-double ppc_fp128 to IEEE fp128 in the future.
This patch adds type __ibm128 which always represents ppc_fp128 in IR, as what GCC did for that type. Without this type in Clang, compilation will fail if compiling against future version of libstdcxx (which uses __ibm128 in headers).
Although all operations in backend for __ibm128 is done by software, only PowerPC enables support for it.
There's something not implemented in this commit, which can be done in future ones:
- Literal suffix for __ibm128 type. w/W is suitable as GCC documented. - __attribute__((mode(IF))) should be for __ibm128. - Complex __ibm128 type.
Reviewed By: rjmccall
Differential Revision: https://reviews.llvm.org/D93377
|
 | clang/lib/AST/StmtPrinter.cpp |
 | clang/lib/CodeGen/CGDebugInfo.cpp |
 | clang/lib/CodeGen/CGExprScalar.cpp |
 | clang/lib/Parse/ParseExprCXX.cpp |
 | clang/lib/Sema/SemaDecl.cpp |
 | clang/lib/Index/USRGeneration.cpp |
 | clang/test/CodeGenCXX/ibm128-declarations.cpp |
 | clang/lib/Sema/DeclSpec.cpp |
 | clang/lib/AST/NSAPI.cpp |
 | clang/lib/AST/ItaniumMangle.cpp |
 | clang/lib/CodeGen/TargetInfo.cpp |
 | clang/include/clang-c/Index.h |
 | clang/include/clang/Sema/DeclSpec.h |
 | clang/lib/Basic/Targets/PPC.h |
 | clang/lib/AST/TypeLoc.cpp |
 | clang/lib/Basic/TargetInfo.cpp |
 | clang/lib/Parse/ParseExpr.cpp |
 | clang/lib/Sema/SemaTemplateVariadic.cpp |
 | clang/lib/Serialization/ASTReader.cpp |
 | clang/include/clang/AST/TypeLoc.h |
 | clang/test/CodeGen/ibm128-unsupported.c |
 | clang/lib/Serialization/ASTCommon.cpp |
 | clang/lib/AST/PrintfFormatString.cpp |
 | clang/include/clang/AST/ASTContext.h |
 | clang/include/clang/Basic/TargetInfo.h |
 | clang/lib/AST/MicrosoftMangle.cpp |
 | clang/lib/AST/Type.cpp |
 | clang/lib/Format/FormatToken.cpp |
 | clang/lib/CodeGen/ItaniumCXXABI.cpp |
 | clang/lib/CodeGen/CodeGenTypes.cpp |
 | clang/include/clang/AST/BuiltinTypes.def |
 | clang/lib/Parse/ParseDecl.cpp |
 | clang/test/Sema/128bitfloat.cpp |
 | clang/lib/Parse/ParseTentative.cpp |
 | clang/lib/Sema/Sema.cpp |
 | clang/tools/libclang/CXType.cpp |
 | clang/include/clang/Basic/Specifiers.h |
 | clang/include/clang/AST/Type.h |
 | clang/include/clang/Serialization/ASTBitCodes.h |
 | clang/lib/Sema/SemaType.cpp |
 | clang/bindings/python/clang/cindex.py |
 | clang/lib/Sema/SemaOverload.cpp |
 | clang/include/clang/Basic/TokenKinds.def |
 | clang/lib/AST/ASTContext.cpp |
 | clang/test/CodeGen/ibm128-cast.c |
 | clang/lib/Sema/SemaExpr.cpp |
Commit
37cbd817d3e2b8c673862e2eb262cad6dd3dd244
by mgorny[lldb] [llgs server] Support creating core dumps on NetBSD
Add a new SaveCore() process method that can be used to request a core dump. This is currently implemented on NetBSD via the PT_DUMPCORE ptrace(2) request, and enabled via 'savecore' extension.
Protocol-wise, a new qSaveCore packet is introduced. It accepts zero or more semicolon-separated key:value options, invokes the core dump and returns a key:value response. Currently the only option supported is "path-hint", and the return value contains the "path" actually used. The support for the feature is exposed via qSaveCore qSupported feature.
Differential Revision: https://reviews.llvm.org/D101285
|
 | lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp |
 | lldb/source/Plugins/Process/NetBSD/NativeProcessNetBSD.cpp |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h |
 | lldb/source/Utility/StringExtractorGDBRemote.cpp |
 | lldb/include/lldb/Host/common/NativeProcessProtocol.h |
 | lldb/source/Plugins/Process/NetBSD/NativeProcessNetBSD.h |
 | lldb/include/lldb/Utility/StringExtractorGDBRemote.h |
 | lldb/test/API/tools/lldb-server/TestGdbRemoteSaveCore.py |
Commit
7fa6b9f61058ff4839eb55d7fe8ec2f1e2493d5e
by benny.kra[lldb] Silence compiler warning after fae0dfa6421ea6c02f86ba7292fa782e1e2b69d1
lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp:4765:13: warning: enumeration value 'Ibm128' not handled in switch [-Wswitch] switch (llvm::cast<clang::BuiltinType>(qual_type)->getKind()) { ^
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 | lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp |
Commit
f330a4575229532c2130040ab680645022c6cea6
by sander.desmalen[AArch64] NFC: Regenerate CHECK lines for sve-masked-gather/scatter-legalize.ll
sve-masked-gather-legalize.ll said the check lines were generated by the update_llc_test_checks script, but that was not the case. This patch ensures both tests are generated with the script.
Change-Id: If6f0331ef01ace84017497a484161d1724ac0744
|
 | llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll |
 | llvm/test/CodeGen/AArch64/sve-masked-scatter-legalize.ll |
Commit
ac312a9d7c03f0be53834d3f295f1971aaf54649
by benny.kra[lldb] Silence compiler warnings from 37cbd817d3e2b8c673862e2eb262cad6dd3dd244
lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:3638:30: error: moving a temporary object prevents copy elision [-Werror,-Wpessimizing-move] return SendErrorResponse(std::move(ret.takeError())); ^ lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:3638:30: note: remove std::move call here return SendErrorResponse(std::move(ret.takeError())); ^~~~~~~~~~ ~ lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp:3622:8: error: unused variable 'cf' [-Werror,-Wunused-variable] bool cf = packet_str.consume_front("qSaveCore");
|
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp |
Commit
52f7cd23b4af84c9e195e9e2263b8ece8d233fe2
by Justas.Janickas[OpenCL] Fix condition macro name in test
|
 | clang/test/SemaOpenCL/access-qualifier.cl |
Commit
e6e8d25920c1f1cffb58c6b3d52c2b4abbb4c963
by pengfei.wang[X86][mingw] Modify the alignment of __m128/__m256/__m512 vector type for mingw
This is a follow up patch after D78564 and D108887.
Martin helped to confirm the alignment in GCC mingw is the same as the size of vector. https://reviews.llvm.org/D108887#inline-1040893
Reviewed By: mstorsjo
Differential Revision: https://reviews.llvm.org/D109265
|
 | clang/lib/CodeGen/TargetInfo.cpp |
 | clang/test/CodeGen/x86_32-align-linux.c |
Commit
b297531ece896fb9ec36f001a74aef144082602b
by david.truby[AArch64][sve] Prevent incorrect function call on fixed width vector
The isEssentiallyExtractHighSubvector function currently calls getVectorNumElements on a type that in specific cases might be scalable. Since this function only has correct behaviour at the moment on scalable types anyway, the function can just return false when given a fixed type.
Differential Revision: https://reviews.llvm.org/D109163
|
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/test/CodeGen/AArch64/sve-no-typesize-warnings.ll |
Commit
93c3e765ac99f6ce40cbe4340ab9967fb7593a0a
by ivan.zhechev[Flang] Port test_folding.sh to Python
To enable Flang testing on Windows, shells scripts have to be ported to Python. The following changes have been made: Ported `test_folding.sh` to Python; Additional changes to the tests themselves to use the new script.
LIBPGMATH support for testing not available at this point.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D108217
|
 | flang/test/Evaluate/folding01.f90 |
 | flang/test/Evaluate/test_folding.py |
 | flang/test/Evaluate/folding06.f90 |
 | flang/test/Evaluate/folding15.f90 |
 | flang/test/Evaluate/folding08.f90 |
 | flang/test/Evaluate/folding23.f90 |
 | flang/test/Evaluate/folding04.f90 |
 | flang/test/Evaluate/folding10.f90 |
 | flang/test/Evaluate/folding22.f90 |
 | flang/test/Evaluate/folding16.f90 |
 | flang/test/Evaluate/test_folding.sh |
 | flang/test/Evaluate/folding24.f90 |
 | flang/test/Evaluate/folding20.f90 |
 | flang/test/Evaluate/folding14.f90 |
 | flang/test/Evaluate/folding03.f90 |
 | flang/test/Evaluate/folding17.f90 |
 | flang/test/Evaluate/folding25.f90 |
 | flang/test/Evaluate/folding13.f90 |
 | flang/test/Evaluate/folding07.f90 |
 | flang/test/Evaluate/folding09.f90 |
 | flang/test/Evaluate/folding05.f90 |
 | flang/test/Evaluate/folding12.f90 |
 | flang/test/Evaluate/folding11.f90 |
 | flang/test/Evaluate/folding27.f90 |
 | flang/test/Evaluate/folding18.f90 |
 | flang/test/Evaluate/folding21.f90 |
 | flang/test/Evaluate/folding26.f90 |
 | flang/test/Evaluate/folding02.f90 |
Commit
79f9c79aaf84c831e660b9065ea15ab1d249927e
by victor.campos[AArch64][MC] Merge FeaturePMU into FeaturePerfMon
FeaturePMU was created in AArch64 to accommodate one missing system register, PMMIR_EL1, in commit ffcd7698aea7bcbb2b4edffc484793e1ff47b85d.
However, the Performance Monitors extension already had a target feature, which is called FeaturePerfMon. Therefore, FeaturePMU is redundant.
This patch removes FeaturePMU and merges its contents into FeaturePerfMon.
Reviewed By: dnsampaio
Differential Revision: https://reviews.llvm.org/D109246
|
 | llvm/test/MC/Disassembler/AArch64/basic-a64-instructions.txt |
 | llvm/lib/Target/AArch64/AArch64Subtarget.h |
 | llvm/test/MC/AArch64/armv8.4a-pmu.s |
 | llvm/test/MC/Disassembler/AArch64/armv8.4a-pmu.txt |
 | llvm/lib/Target/AArch64/AArch64.td |
 | llvm/lib/Target/AArch64/AArch64SystemOperands.td |
 | llvm/lib/Target/AArch64/AArch64InstrInfo.td |
 | llvm/test/MC/AArch64/basic-a64-instructions.s |
Commit
dc453dcf760e6d558da3a4d7fff301baa5f37aba
by ivan.zhechev[Flang] Port test_modfile.sh to Python
To enable Flang testing on Windows, shell scripts have to be ported to Python. The following changes have been made: "test_modfile.sh" has been ported to Python, and the relevant tests relying on it.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D107956
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 | flang/test/Semantics/modfile28.f90 |
 | flang/test/Semantics/modfile05.f90 |
 | flang/test/Semantics/modfile26.f90 |
 | flang/test/Semantics/modfile19.f90 |
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 | flang/test/Semantics/modfile30.f90 |
 | flang/test/Semantics/modfile20.f90 |
 | flang/test/Semantics/modfile25.f90 |
 | flang/test/Semantics/test_modfile.py |
 | flang/test/Semantics/modfile09.f90 |
 | flang/test/Semantics/modfile08.f90 |
 | flang/test/Semantics/modfile38.f90 |
 | flang/test/Semantics/modfile17.f90 |
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 | flang/test/Semantics/modfile04.f90 |
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 | flang/test/Semantics/modfile23.f90 |
 | flang/test/Semantics/modfile24.f90 |
 | flang/test/Semantics/modfile01.f90 |
 | flang/test/Semantics/modfile14.f90 |
 | flang/test/Semantics/modfile36.f90 |
 | flang/test/Semantics/modfile06.f90 |
 | flang/test/Semantics/modfile16.f90 |
 | flang/test/Semantics/test_modfile.sh |
 | flang/test/Semantics/modfile13.f90 |
 | flang/test/Semantics/modfile07.f90 |
 | flang/test/Semantics/modfile10.f90 |
 | flang/test/Semantics/modfile21.f90 |
 | flang/test/Semantics/modfile39.f90 |
 | flang/test/Semantics/modfile03.f90 |
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 | flang/test/Semantics/modfile15.f90 |
 | flang/test/Semantics/modfile31.f90 |
 | flang/test/Semantics/modfile29.f90 |
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 | flang/test/Semantics/modfile27.f90 |
Commit
a73973c9d4616679569010d800f89be650dafcb7
by spatel[InstCombine] add test for shift-trunc-shift with extra uses; NFC
The transform doesn't check for extra uses, so we have more instructions than we started with.
|
 | llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-shl.ll |
Commit
982a15cb3fa0ea06fc7d24ebf56249cff06e268b
by spatel[InstCombine] early exit to reduce indentation; NFC
|
 | llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp |
Commit
fbb78668f2ee4a7ce390d9a5749168c5be26874e
by spatel[InstCombine] fix one-use condition for shift transform
This transform is written in a confusing style, and I suspect it is at fault for a more serious bug noted in PR51567.
But it's been around forever, so I'm making the minimal change to fix another bug - it could increase instructions because it was not checking uses.
|
 | llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-shl.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp |
Commit
c85f450619f74c9befc519b748d0cf0649f07518
by spatel[InstCombine] refactor to reduce indent; NFC
This transform should be updated to use better variable names and code comments. It could also create the shift-of-shift directly instead of relying on another combine for that.
|
 | llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp |
Commit
0d83e7203479d6bc7368d5b94351e4907c2afafc
by spatel[InstCombine] fix infinite loop from shift transform
I'm not sure if there is a better way or another bug still here, but this is enough to avoid the loop from: https://llvm.org/PR51657
The test requires multiple blocks and datalayout to trigger the problem path.
|
 | llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp |
 | llvm/test/Transforms/InstCombine/shift-amount-reassociation-with-truncation-shl.ll |
Commit
118997d8e931dcb4c6e972611a7e4febcc33a061
by paulsson[SelectionDAGBuilder] Bugfix in visitInlineAsm()
In case of a virtual register tied to a phys-def, the register class needs to be computed. Make sure that this works generally also with fast regalloc by using TLI.getRegClassFor() whenever possible, and make only the case of 'Untyped' use getMinimalPhysRegClass().
Fixes https://bugs.llvm.org/show_bug.cgi?id=51699.
Review: Ulrich Weigand Differential Revision: https://reviews.llvm.org/D109291
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 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |
 | llvm/test/CodeGen/X86/20210831-inlineasm.ll |
Commit
8883db90d1abbf9b7855ebaf829b75d7fee99da6
by andrzej.warzynski[flang][plugins] Make `PluginParseTreeAction` an abstract class
There's no point in providing a default implementation for `PluginParseTreeAction`. This patch makes it abstract forcing users to specialise it in order to use it.
Differential Revision: https://reviews.llvm.org/D108518
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 | flang/include/flang/Frontend/FrontendActions.h |
Commit
3322354bfcae4ce03675f7597e68d99243d63f69
by kazu[Support] Qualify auto (NFC)
Identified with readability-qualified-auto.
|
 | llvm/include/llvm/Support/Error.h |
 | llvm/include/llvm/Support/FormatVariadic.h |
 | llvm/include/llvm/Support/YAMLTraits.h |
 | llvm/lib/Support/VirtualFileSystem.cpp |
 | llvm/include/llvm/Support/Allocator.h |
 | llvm/lib/Support/SpecialCaseList.cpp |
 | llvm/lib/Support/TimeProfiler.cpp |
Commit
25fbbc5936c0e05095618f4b80b303227fbb708b
by mgorny[lldb] Support SaveCore() from gdb-remote client
Extend PluginManager::SaveCore() to support saving core dumps via Process plugins. Implement the client-side part of qSaveCore request in the gdb-remote plugin, that creates the core dump on the remote host and then uses vFile packets to transfer it.
Differential Revision: https://reviews.llvm.org/D101329
|
 | lldb/include/lldb/Target/Process.h |
 | lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h |
 | lldb/test/API/functionalities/process_save_core/TestProcessSaveCore.py |
 | lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp |
 | lldb/source/Core/PluginManager.cpp |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp |
Commit
821954f97c6b978cca72cb412e98d35caee4cac3
by dblaikieDebugInfo: Add a FIXME/suggestion about using sibling/parent index to DWARFDebugInfoEntry
As a reminder if someone comes looking to improve iteration or parent navigation performance of DWARFDebugInfoEntry.
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 | llvm/include/llvm/DebugInfo/DWARF/DWARFDebugInfoEntry.h |
Commit
bf5a31bb9a900b5b2dcc1e035e426a5dbd9ba9a2
by craig.topper[X86] Pre-commit test cases for D109295. NFC
|
 | llvm/test/CodeGen/X86/avx512vl-logic.ll |
Commit
d4da4b80258c56f5f88f2ecbfbf6315c2842e76c
by Dávid Bolvanský[NFC] Added tests for D109283
|
 | llvm/test/Transforms/InstCombine/icmp-rotate.ll |
Commit
bd4b1b5f6d52154c1fbefabf8acdd1eb6d55235f
by andrew.litteken[IRSim] Adding support for recognizing branch similarity
The current IRSimilarityIdentifier does not try to find similarity across blocks, this patch provides a mechanism to compare two branches against one another, to find similarity across basic blocks, rather than just within them.
This adds a step in the similarity identification process that labels all of the basic blocks so that we can identify the relative branching locations. Within an IRSimilarityCandidate we use these relative locations to determine whether if the branching to other relative locations in the same region is the same between branches. If they are, we consider them similar.
We do not consider the relative location of the branch if the target branch is outside of the region. In this case, both branches must exit to a location outside the region, but the exact relative location does not matter.
Reviewers: paquette, yroux
Differential Revision: https://reviews.llvm.org/D106989
|
 | llvm/test/Transforms/IROutliner/illegal-cleanup.ll |
 | llvm/lib/Transforms/IPO/IROutliner.cpp |
 | llvm/include/llvm/Analysis/IRSimilarityIdentifier.h |
 | llvm/test/Transforms/IROutliner/region-end-of-module.ll |
 | llvm/test/Transforms/IROutliner/illegal-landingpad.ll |
 | llvm/test/Analysis/IRSimilarityIdentifier/basic.ll |
 | llvm/lib/Analysis/IRSimilarityIdentifier.cpp |
 | llvm/test/tools/llvm-sim/single-sim-file.test |
 | llvm/test/tools/llvm-sim/single-sim.test |
 | llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp |
 | llvm/test/Transforms/IROutliner/illegal-branches.ll |
 | llvm/test/Transforms/IROutliner/illegal-catchpad.ll |
 | llvm/test/Analysis/IRSimilarityIdentifier/different.ll |
Commit
4a0ba4180b3655aa39c68648c7a12ce9a1cec99a
by benny.kra[lldb] Fix pessimizing move warning
lldb/source/Core/PluginManager.cpp:695:21: warning: moving a temporary object prevents copy elision [-Wpessimizing-move] return Status(std::move(ret.takeError())); ^ lldb/source/Core/PluginManager.cpp:695:21: note: remove std::move call here return Status(std::move(ret.takeError())); ^~~~~~~~~~ ~
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 | lldb/source/Core/PluginManager.cpp |
Commit
e1e4bf174b09bcd4b25cd624f177537890bff785
by spatel[DAGCombine] Prevent the transform of combine for multi-use operand
The test is based on a miscompile example in: https://llvm.org/PR51321
Differential Revision: https://reviews.llvm.org/D107692
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 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/test/CodeGen/AArch64/arm64-srl-and.ll |
Commit
8d54c8a0c3d7d4a50186ae7087780c6082e5bb46
by nikita.ppv[SCEV] Fix applyLoopGuards() with range check idiom (PR51760)
Due to a typo, this replaced %x with umax(C1, umin(C2, %x + C3)) rather than umax(C1, umin(C2, %x)). This didn't make a difference for the existing tests, because the result is only used for range calculation, and %x will usually have an unknown starting range, and the additional offset keeps it unknown. However, if %x already has a known range, we may compute a result range that is too small.
|
 | llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll |
 | llvm/lib/Analysis/ScalarEvolution.cpp |
Commit
ac5a5af19d3bd56635c9ea3a6ec51152df9497ee
by david.green[ARM] Add tests for MVE narrowing intrinsic demand bits.
|
 | llvm/test/Transforms/InstCombine/ARM/mve-narrow.ll |
Commit
4f1e410a1ba10007aa96b274f92e2a6526de84d9
by i[X86] Simplify two hasFP(F). NFC
|
 | llvm/lib/Target/X86/X86FrameLowering.cpp |
Commit
76529b446859af4623aa739bc6cea5cc7829dee9
by i[X86] Simplify condition guarding emitCalleeSavedFrameMoves. NFC
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 | llvm/lib/Target/X86/X86FrameLowering.cpp |
Commit
da3ef8b7561249fa167e8f0150f56275541bdfdf
by craig.topper[X86] Handle inverted inputs when matching VPTERNLOG from 2 binary ops.
This is a more general version of D109273. Though it doesn't peek through bitcasts or rearange broadcasts.
Reviewed By: LuoYuanke
Differential Revision: https://reviews.llvm.org/D109295
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 | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp |
 | llvm/test/CodeGen/X86/avx512vl-logic.ll |
Commit
c57c4f888c5e826765db64b7cf5f77c9709c4a6f
by springerm[mlir][linalg] linalg.tiled_loop peeling
Differential Revision: https://reviews.llvm.org/D108270
|
 | mlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp |
 | mlir/include/mlir/Dialect/SCF/Transforms.h |
 | mlir/test/Dialect/Linalg/tiled-loop-peeling.mlir |
 | mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp |
 | mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h |
 | mlir/lib/Dialect/Linalg/Transforms/Loops.cpp |
Commit
878c2a42ec6c83f88618ee24af02b6d82db9c28e
by Jinsong Ji[RuntimeDyld] Guard UsedTLSStorage to x86 ELF only
UsedTLSStorage is only used in allocateTLSSection, guarded in x87 ELF only. So clang will emit error with -Werror on.
.../llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp:288:12: error: private field 'UsedTLSStorage' is not used [-Werror,-Wunused-private-field] unsigned UsedTLSStorage = 0; ^
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 | llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp |
Commit
8e5c1b039eaf2697621d8f613fb9054533642add
by yeluo[OpenMP][libomptarget] Change synchronize_ty return type to int32_t
Plugins always return int32_t. Stay consistent with other functions which return error status.
Differential Revision: https://reviews.llvm.org/D109341
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 | openmp/libomptarget/src/rtl.h |
Commit
95299019e35b21a790a2f797bede1af98d84fcb5
by ty1208chiang[clang] Add '-ast-dump-filter=' support
Before this patch, we only support syntax like `clang -cc1 -ast-dump -ast-dump-filter main a.c` or `clang -Xclang -ast-dump -Xclang -ast-dump-filter -Xclang main a.c` when using ast-dump-filter.
It is helpful to also support `-ast-dump-filter=` syntax, so we can do something like `clang -cc1 -ast-dump -ast-dump-filter=main a.c` or `clang -Xclang -ast-dump -Xclang -ast-dump-filter=main a.c`
It is more cleaner when passing arguments through `-Xclang` in this case.
Also, **clang-check** do support this syntax, and I think people might be confiused when they found they can't use `ast-dump-filter` with clang.
|
 | clang/include/clang/Driver/Options.td |
Commit
c3aecf87d5b97c3d3580457164e7fe4a19c4221a
by yeluo[OpenMP][libomptarget] Change device vector elements to unique_ptr type
Using std::vector<DeviceTy> requires implementing copy constructor and copied assign operator for DeviceTy. Indeed DeviceTy should never be copied. After changing to std::vector<std::unique_ptr<DeviceTy>>, All the unsafe copy constructor and copy assign operator implementations can be removed. Compilers mark them deleted due to mutex or underlying objects and this is the desired behavior.
Differential Revision: https://reviews.llvm.org/D109276
|
 | openmp/libomptarget/src/interface.cpp |
 | openmp/libomptarget/src/device.h |
 | openmp/libomptarget/src/omptarget.cpp |
 | openmp/libomptarget/src/device.cpp |
 | openmp/libomptarget/src/api.cpp |
 | openmp/libomptarget/src/rtl.cpp |
Commit
c2810f2c1655593a48791327e9563417caf2e261
by zeratul976[clangd] Omit type hints that are too long
Differential Revision: https://reviews.llvm.org/D108972
|
 | clang-tools-extra/clangd/unittests/InlayHintTests.cpp |
 | clang-tools-extra/clangd/InlayHints.cpp |
Commit
3e03d92e2f4ad150469646c1b140ae6abb256c82
by zeratul976[clangd] Omit default template arguments from type hints
Differential Revision: https://reviews.llvm.org/D108975
|
 | clang-tools-extra/clangd/unittests/InlayHintTests.cpp |
 | clang-tools-extra/clangd/InlayHints.cpp |
Commit
131f7bac63b8cc1700bbae908bdac60f438e69d1
by courbet[llvm-exegesis] Add unit test in preparation for DD109275
|
 | llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp |
Commit
20f890696f10c13342bc1806f4ac9abb63d3153f
by powerman1st[ARM][test] Add new tests for (mul (add r, c0), c1)
Reviewed By: RKSimon, dmgreen
Differential Revision: https://reviews.llvm.org/D109123
|
 | llvm/test/CodeGen/ARM/addimm-mulimm.ll |
Commit
63ca9371c7b4eb8fff01d998963cf901b658c7d4
by powerman1st[ARM] Implement target hook function to decide folding (mul (add x, c1), c2)
Prevent the folding in DAGCombine if it leads to worse code.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D109124
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 | llvm/lib/Target/ARM/ARMISelLowering.cpp |
 | llvm/lib/Target/ARM/ARMISelLowering.h |
 | llvm/test/CodeGen/Thumb/urem-seteq-illegal-types.ll |
 | llvm/test/CodeGen/ARM/addimm-mulimm.ll |
 | llvm/test/CodeGen/ARM/urem-seteq-illegal-types.ll |
Commit
4787ef3d0f0abfdc041d418aba28a7e6473f0766
by brad[compiler-rt] Document that builtins is known to work on OpenBSD.
Differential Revision: https://reviews.llvm.org/D109346
|
 | compiler-rt/www/index.html |
Commit
0954e2b2d0383584ee6ebad24e0637b98999e993
by bradMention OpenBSD in the documentation
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 | libcxx/docs/index.rst |
 | llvm/docs/GettingStarted.rst |
Commit
ffcaa80f7e430d7daf6191061e5ac85a2ba6774c
by luxufan[RuntimeDyld] Don't use bitwise operation on SymbolRef::Type
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D109292
|
 | llvm/lib/ExecutionEngine/RuntimeDyld/JITSymbol.cpp |
Commit
a40599c97bd31871526d2399e8d545daa89ef702
by fraser[SelectionDAG][VP] Fix MemSDNode::getBasePtr
Found while working on D108987. When interpreting VP nodes as `MemSDNode` nodes, this function would return the incorrect indices. This was due to `VP_GATHER` and having no "passthru", and both `VP_GATHER` and `VP_SCATTER` having their mask operands *after* the base pointer, unlike `MGATHER` and `MSCATTER`.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D109308
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 | llvm/include/llvm/CodeGen/SelectionDAGNodes.h |
Commit
da9ed3dc719bbe0dbe8d4d8b7e6e2061532392fe
by weiwei64[AArch64] Avoid adding duplicate implicit operands when expanding pseudo insts.
When expanding pseudo insts, in order to create a new machine instr, we use BuildMI, which will add implicit operands by default. And transferImpOps will also copy implicit operands from old ones. Finally, duplicate implicit operands are added to the same inst. Sometimes this can cause correctness issues. Like below inst, renamable $w18 = nsw SUBSWrr renamable $w30, renamable $w14, implicit-def dead $nzcv After expanding, it will become $w18 = SUBSWrs renamable $w13, renamable $w14, 0, implicit-def $nzcv, implicit-def dead $nzcv A redundant implicit-def $nzcv is added, but the dead flag is missing.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D109069
|
 | llvm/test/CodeGen/AArch64/expand-subs-pseudo.mir |
 | llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp |
Commit
c33e296be1daa621f5933f3729a0ce51172f1505
by Justas.Janickas[OpenCL] Disallows static kernel functions in C++ for OpenCL
It is disallowed in OpenCL C to declare static kernel functions and C++ for OpenCL is expected to inherit such behaviour. Error is now correctly reported in C++ for OpenCL when declaring a static kernel function.
Differential Revision: https://reviews.llvm.org/D109150
|
 | clang/test/SemaOpenCL/storageclass-cl20.cl |
 | clang/lib/Sema/SemaDecl.cpp |
Commit
03512ae9bf31b725d8233c03094fd463b5f46285
by lebedev.ri[exegesis][X86] ParallelSnippetGenerator: don't accidentally create serialized instructions
In the case of no tied variables, we pick random defs, and then random uses that don't alias with defs we just picked. Sounds good, except that an X86 instruction may have implicit reg uses, e.g. for `MULX` it's `EDX`/`RDX`: `Intel SDM, 4-162 Vol. 2B MULX — Unsigned Multiply Without Affecting Flags` > Performs an unsigned multiplication of the implicit source operand (EDX/RDX) and the specified source operand > (the third operand) and stores the low half of the result in the second destination (second operand), the high half > of the result in the first destination operand (first operand), without reading or writing the arithmetic flags.
And indeed, every once in a while `llvm-exegesis` happened to pick EDX as a def while measuring throughput, and producing garbage output: ``` $ ./bin/llvm-exegesis -num-repetitions=1000000 -mode=inverse_throughput -repetition-mode=min --loop-body-size=4096 -dump-object-to-disk=false -opcode-name=MULX32rr --max-configs-per-opcode=65536 --- mode: inverse_throughput key: instructions: - 'MULX32rr EDX R11D R12D' config: '' register_initial_values: - 'R12D=0x0' - 'EDX=0x0' cpu_name: znver3 llvm_triple: x86_64-unknown-linux-gnu num_repetitions: 1000000 measurements: - { key: inverse_throughput, value: 4.00014, per_snippet_value: 4.00014 } error: '' info: instruction has no tied variables picking Uses different from defs assembled_snippet: 415441BC00000000BA00000000C4C223F6D4C4C223F6D4C4C223F6D4C4C223F6D4415CC3415441BC00000000BA0000000049B80200000000000000C4C223F6D4C4C223F6D44983C0FF75F0415CC3 ... ``` ``` $ ./bin/llvm-exegesis -num-repetitions=1000000 -mode=inverse_throughput -repetition-mode=min --loop-body-size=4096 -dump-object-to-disk=false -opcode-name=MULX32rr --max-configs-per-opcode=65536 --- mode: inverse_throughput key: instructions: - 'MULX32rr R13D EDX ECX' config: '' register_initial_values: - 'ECX=0x0' - 'EDX=0x0' cpu_name: znver3 llvm_triple: x86_64-unknown-linux-gnu num_repetitions: 1000000 measurements: - { key: inverse_throughput, value: 3.00013, per_snippet_value: 3.00013 } error: '' info: instruction has no tied variables picking Uses different from defs assembled_snippet: 4155B900000000BA00000000C4626BF6E9C4626BF6E9C4626BF6E9C4626BF6E9415DC34155B900000000BA0000000049B80200000000000000C4626BF6E9C4626BF6E94983C0FF75F0415DC3 ... ``` Oops! Not only does that not look fun, i did hit that pitfail during AMD Zen 3 enablement. While i have since then addressed this in rGd4d459e7475b4bb0d15280f12ed669342fa5edcd, i suspect there may be other buggy results lying around, so we should at least stop producing them.
Reviewed By: courbet
Differential Revision: https://reviews.llvm.org/D109275
|
 | llvm/tools/llvm-exegesis/lib/ParallelSnippetGenerator.cpp |
 | llvm/unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp |
Commit
f4dee8cb82d199f843b0ca7e9846470f3912f593
by fraser[RISCV][VP] Custom lower VP_SCATTER and VP_GATHER
This patch adds support for the `VP_SCATTER` and `VP_GATHER` nodes by lowering them to RVV's `vsox`/`vlux` instructions, respectively. This process is almost identical to the existing `MSCATTER`/`MGATHER` support.
One extra change was made to `SelectionDAGLegalize` so that `VP_SCATTER`'s operation action is derived from its stored "value" operand rather than its return type (which is always the chain).
Reviewed By: craig.topper, rogfer01
Differential Revision: https://reviews.llvm.org/D108987
|
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll |
 | llvm/lib/Target/RISCV/RISCVISelLowering.h |
 | llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp |
 | llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll |
Commit
a823bdf3ab78748c9ff19ef5c55681af79785c65
by fraser[RISCV][VP] Custom lower VP_STORE and VP_LOAD
This patch adds support for the vector-predicated `VP_STORE` and `VP_LOAD` nodes. We do this in the same way we lower `MSTORE` and `MLOAD`: to regular load/store instructions via intrinsics.
One necessary change was made to `SelectionDAGLegalize` so that `VP_STORE` nodes' operation actions are taken from the stored "value" operands, in the same vein as `STORE` or `MSTORE`.
Reviewed By: craig.topper, rogfer01
Differential Revision: https://reviews.llvm.org/D108999
|
 | llvm/test/CodeGen/RISCV/rvv/vpstore.ll |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/lib/Target/RISCV/RISCVISelLowering.h |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpload.ll |
 | llvm/test/CodeGen/RISCV/rvv/vpload.ll |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpstore.ll |
Commit
36527cbe02c401671098c35b1a99853e01c291a9
by Mirko.Brkusanin[AMDGPU][GlobalISel] Legalize memcpy family of intrinsics
Legalize G_MEMCPY, G_MEMMOVE, G_MEMSET and G_MEMCPY_INLINE.
Corresponding intrinsics are replaced by a loop that uses loads/stores in AMDGPULowerIntrinsics pass unless their length is a constant lower then MemIntrinsicExpandSizeThresholdOpt (default 1024). Any G_MEM* instruction that reaches legalizer should have a const length argument and should be expanded into appropriate number of loads + stores.
Differential Revision: https://reviews.llvm.org/D108357
|
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll |
 | llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-memcpy-inline.mir |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir |
 | llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir |
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll |
 | llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll |
 | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir |
Commit
0a07ae6ebfffb77243787f941d02f281a0041762
by llvm-dev[KnownBits] Add support for X*X self-multiplication
Add KnownBits handling and unit tests for X*X self-multiplication cases which guarantee that bit1 of their results will be zero - see PR48683.
https://alive2.llvm.org/ce/z/NN_eaR
The next step will be to add suitable test coverage so this can be enabled in ValueTracking/DAG/GlobalISel - currently only a single Analysis/ScalarEvolution test is affected.
Differential Revision: https://reviews.llvm.org/D108992
|
 | llvm/lib/Support/KnownBits.cpp |
 | llvm/unittests/Support/KnownBitsTest.cpp |
 | llvm/include/llvm/Support/KnownBits.h |
Commit
3fa4cff97480e47fad77e54b287061c492ab9ea8
by bradMention OpenBSD in the documentation
|
 | libcxx/docs/UsingLibcxx.rst |
Commit
08144b83187bd3856cd7b3b7a0fef71dbc2253aa
by Dávid Bolvanský[NFC] Added test for stpcpy -> strcpy transformation with AS != 0
|
 | llvm/test/Transforms/InstCombine/strcpy-nonzero-as.ll |
Commit
6a9e2764f64ae63fd66fd15c5451de33fe3da08a
by llvm-dev[llvm-exegesis] Analysis tests should run even without libpfm (PR51687)
Move inverse_throughput, latency and uops to sub-directories (like we already do for lbr), which require libpfm, so we can relax the lit limits for analysis tests in the x86 root directory.
Differential Revision: https://reviews.llvm.org/D109353
|
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-BSF16rm.s |
 | llvm/test/tools/llvm-exegesis/X86/latency-LEA64_32r.s |
 | llvm/test/tools/llvm-exegesis/X86/latency/latency-SQRTSSr.s |
 | llvm/test/tools/llvm-exegesis/X86/latency/latency-SBB8rr.s |
 | llvm/test/tools/llvm-exegesis/X86/latency-SETCCr-cond-codes-sweep.s |
 | llvm/test/tools/llvm-exegesis/X86/lit.local.cfg |
 | llvm/test/tools/llvm-exegesis/X86/uops-LEA64r.s |
 | llvm/test/tools/llvm-exegesis/X86/latency/latency-LEA64_32r.s |
 | llvm/test/tools/llvm-exegesis/X86/latency-SBB8rr.s |
 | llvm/test/tools/llvm-exegesis/X86/latency/latency-CMOV32rr.s |
 | llvm/test/tools/llvm-exegesis/X86/inverse_throughput-by-opcode-name.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-ADD32mi8.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-XCHG64rr.s |
 | llvm/test/tools/llvm-exegesis/X86/latency/latency-LEA64r.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-POPCNT32rr.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-misspelled-div.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-BTR64mr.s |
 | llvm/test/tools/llvm-exegesis/X86/latency-SQRTSSr.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-by-opcode-name.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-XCHG64rr.s |
 | llvm/test/tools/llvm-exegesis/X86/latency/latency-SETCCr-cond-codes-sweep.s |
 | llvm/test/tools/llvm-exegesis/X86/max-configs.test |
 | llvm/test/tools/llvm-exegesis/X86/latency/max-configs.test |
 | llvm/test/tools/llvm-exegesis/X86/uops-ADD32rm.s |
 | llvm/test/tools/llvm-exegesis/X86/latency/latency-IN16rr.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-BEXTR32rm.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-FLDENVm.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/lit.local.cfg |
 | llvm/test/tools/llvm-exegesis/X86/uops-CMOV16rm-noreg.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-CMOV16rm-noreg.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-FLDENVm.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-VFMADDSS4rm.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-ADD32mr.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-STD.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-ADD32rm.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-BSF16rm.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-VFMADDSS4rm.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-BTR64mr.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-ADD_F32m.s |
 | llvm/test/tools/llvm-exegesis/X86/uops-ADD32mi8.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-POPCNT32rr.s |
 | llvm/test/tools/llvm-exegesis/X86/latency/lit.local.cfg |
 | llvm/test/tools/llvm-exegesis/X86/uops-ADD32mr.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-ADD_F32m.s |
 | llvm/test/tools/llvm-exegesis/X86/inverse_throughput/lit.local.cfg |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-STD.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-by-opcode-name.s |
 | llvm/test/tools/llvm-exegesis/X86/latency-by-opcode-name.s |
 | llvm/test/tools/llvm-exegesis/X86/latency-IN16rr.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-LEA64r.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-misspelled-div.s |
 | llvm/test/tools/llvm-exegesis/X86/latency-LEA64r.s |
 | llvm/test/tools/llvm-exegesis/X86/latency/latency-by-opcode-name.s |
 | llvm/test/tools/llvm-exegesis/X86/uops/uops-BEXTR32rm.s |
 | llvm/test/tools/llvm-exegesis/X86/inverse_throughput/inverse_throughput-by-opcode-name.s |
 | llvm/test/tools/llvm-exegesis/X86/latency-CMOV32rr.s |
Commit
5dcf4b4fe018355706325d7a0a22893ac0c9340a
by david.sherwood[SVE][NFC] Add SVE cost model tests for gathers/scatters
We previously didn't have any tests to defend the cost model for gathers and scatters using SVE without a vscale_range attribute. I've added tests to existing files:
Analysis/CostModel/AArch64/sve-gather.ll Analysis/CostModel/AArch64/sve-scatter.ll
Differential Revision: https://reviews.llvm.org/D109055
|
 | llvm/test/Analysis/CostModel/AArch64/sve-gather.ll |
 | llvm/test/Analysis/CostModel/AArch64/sve-scatter.ll |
Commit
c24da72fa434c074782c92bf17ac1e5504f67507
by nawrin.sultana[OpenMP] Change monotonicity of dynamic schedule
This patch changes the default monotonicity of dynamic schedule from monotonic to non-monotonic when no modifier is specified.
Differential Revision: https://reviews.llvm.org/D109026
|
 | openmp/runtime/src/kmp_dispatch.cpp |
Commit
448d47f7438e5ca4a5cd4a77e5e78cd62333e487
by sander.desmalen[AArch64][SVE] Implement all-inactive predicate with PFALSE.
Instead of using a WHILE XZR, XZR instruction, just emit a PFALSE.
Reviewed By: david-arm
Differential Revision: https://reviews.llvm.org/D109311
|
 | llvm/test/CodeGen/AArch64/sve-zeroinit.ll |
 | llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares-with-imm.ll |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
Commit
73c00d40bd49ae022f6fbba7200f05facb533e3b
by kadircet[clang][Driver] Pick the last --driver-mode in case of multiple ones
This was an accidental behaviour change in D106789 and this patch restores it back to original state.
Differential Revision: https://reviews.llvm.org/D109361
|
 | clang/lib/Driver/Driver.cpp |
 | clang/unittests/Driver/ToolChainTest.cpp |
Commit
056b409cebf9005d6f007d198906241acd346e7d
by llvm-dev[llvm-exegesis][x86] Limit llvm-exegesis analysis tests to x86_64 triple hosts
Attempting to fix an issue with test failures on arm m1 apple macintoshes reported on D109353
|
 | llvm/test/tools/llvm-exegesis/X86/lit.local.cfg |
Commit
8c0a1940c1d8aa7283ec7dadbfa09aef99e739eb
by anton.a.afanasyev[AggresiveInstCombine] Add wrapper calls for `KnownBits` computing
Precommit before `AssumptionCache` adding: reviews.llvm.org/D109141
Differential Revision: https://reviews.llvm.org/D109288
|
 | llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombineInternal.h |
 | llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp |
Commit
388b7a1502b110ff17d27c0aef9ed699b4facff9
by anton.a.afanasyev[AggressiveInstCombine][Test] Add test for assumptions
|
 | llvm/test/Transforms/AggressiveInstCombine/trunc_assume.ll |
Commit
d1f9b216776d8d9fb85fb17b52066a1246e18a10
by anton.a.afanasyev[AggressiveInstCombine] Add `AssumptionCache` to aggressive instcombine
Add support for @llvm.assume() to TruncInstCombine allowing optimizations based on these intrinsics while computing known bits.
|
 | llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp |
 | llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombineInternal.h |
 | llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp |
 | llvm/test/Transforms/AggressiveInstCombine/trunc_assume.ll |
Commit
fb3879506214ba15246dfaff204435b20ac54ef8
by llvm-dev[X86] X86InstrFMA.td - remove unused template parameters. NFC.
Identified in D109359
|
 | llvm/lib/Target/X86/X86InstrFMA.td |
Commit
b50a60c234433545fc1c9b39f193373f560ea869
by llvm-dev[X86] X86InstrVecCompiler.td - remove unused template parameters. NFC.
Identified in D109359
|
 | llvm/lib/Target/X86/X86InstrVecCompiler.td |
Commit
0d48ee27749c79b260ce8ce0d047b52aef8a3435
by llvm-dev[X86] X86InstrSSE.td - remove unused template parameters. NFC.
Identified in D109359
|
 | llvm/lib/Target/X86/X86InstrSSE.td |
Commit
5263bf583a26f3f99c2ac34843e89d210bb4fe26
by Mirko.Brkusanin[AMDGPU][GlobalISel] Legalization of G_ROTL and G_ROTR
Add implementation for the legalization of G_ROTL and G_ROTR machine instructions. They are very similar to funnel shift instructions, the only difference is funnel shifts have 3 operands, whereas rotate instructions have two operands, the first being the register that is being rotated and the second being the number of shifts. The legalization of G_ROTL/G_ROTR is just lowering them into funnel shift instructions if they are legal.
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D105347
|
 | llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h |
 | llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-rotl-rotr.mir |
Commit
6c4b634da6191b2fa10e833a9393115b83e768d1
by Mirko.Brkusanin[AMDGPU][GlobalISel] Legalize G_MUL for non-standard types
Legalizing G_MUL for non-standard types (like i33) generated an error. Putting minScalar and maxScalar instead of clampScalar. Also using new rule, instead of widening to the next power of 2, widen to the next multiple of the passed argument (32 in this case), so instead of widening i65 to i128, we widen it to i96.
Patch by: Mateja Marjanovic
Differential Revision: https://reviews.llvm.org/D109228
|
 | llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll |
 | llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h |
 | llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir |
 | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
 | llvm/lib/CodeGen/GlobalISel/LegalizeMutations.cpp |
Commit
640beb38e7710b939b3cfb3f4c54accc694b1d30
by michael.hliao[amdgpu] Enable selection of `s_cselect_b64`.
Differential Revision: https://reviews.llvm.org/D109159
|
 | llvm/test/CodeGen/AMDGPU/selectcc.ll |
 | llvm/test/CodeGen/AMDGPU/addrspacecast.ll |
 | llvm/test/CodeGen/AMDGPU/extract_vector_elt-i64.ll |
 | llvm/test/CodeGen/AMDGPU/uint_to_fp.f64.ll |
 | llvm/lib/Target/AMDGPU/SIISelLowering.cpp |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.cpp |
 | llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll |
 | llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll |
 | llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll |
 | llvm/test/CodeGen/AMDGPU/sint_to_fp.f64.ll |
 | llvm/test/CodeGen/AMDGPU/dagcombine-select.ll |
 | llvm/test/CodeGen/AMDGPU/extract_vector_elt-f64.ll |
 | llvm/test/CodeGen/AMDGPU/select64.ll |
 | llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll |
 | llvm/test/CodeGen/AMDGPU/load-select-ptr.ll |
 | llvm/test/CodeGen/AMDGPU/llvm.mulo.ll |
 | llvm/lib/Target/AMDGPU/SOPInstructions.td |
 | llvm/lib/Target/AMDGPU/SIInstrInfo.h |
 | llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll |
Commit
5e71839f7793b3ab94e928654a493cb3d7216176
by peter.smith[MC] Add MCSubtargetInfo to MCAlignFragment
In preparation for passing the MCSubtargetInfo (STI) through to writeNops so that it can use the STI in operation at the time, we need to record the STI in operation when a MCAlignFragment may write nops as padding. The STI is currently unused, a further patch will pass it through to writeNops.
There are many places that can create an MCAlignFragment, in most cases we can find out the STI in operation at the time. In a few places this isn't possible as we are in initialisation or finalisation, or are emitting constant pools. When possible I've tried to find the most appropriate existing fragment to obtain the STI from, when none is available use the per module STI.
For constant pools we don't actually need to use EmitCodeAlign as the constant pools are data anyway so falling through into it via an executable NOP is no better than falling through into data padding.
This is a prerequisite for D45962 which uses the STI to emit the appropriate NOP for the STI. Which can differ per fragment.
Note that involves an interface change to InitSections. It is now called initSections and requires a SubtargetInfo as a parameter.
Differential Revision: https://reviews.llvm.org/D45961
|
 | llvm/lib/Target/Mips/MipsAsmPrinter.cpp |
 | llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp |
 | llvm/lib/MC/MCParser/MasmParser.cpp |
 | llvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp |
 | llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp |
 | llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFStreamer.cpp |
 | llvm/lib/MC/MCParser/AsmParser.cpp |
 | llvm/include/llvm/MC/MCFragment.h |
 | llvm/lib/Target/ARM/ARMMCInstLower.cpp |
 | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp |
 | llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp |
 | llvm/lib/MC/MCStreamer.cpp |
 | llvm/include/llvm/MC/MCWinCOFFStreamer.h |
 | llvm/include/llvm/MC/MCObjectStreamer.h |
 | llvm/lib/MC/MCWinCOFFStreamer.cpp |
 | llvm/tools/llvm-mc/llvm-mc.cpp |
 | llvm/tools/llvm-ml/Disassembler.cpp |
 | clang/tools/driver/cc1as_main.cpp |
 | llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp |
 | llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp |
 | llvm/lib/MC/MCELFStreamer.cpp |
 | llvm/lib/Target/ARM/ARMAsmPrinter.cpp |
 | llvm/lib/MC/MCAsmStreamer.cpp |
 | llvm/include/llvm/MC/MCELFStreamer.h |
 | llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp |
 | llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp |
 | llvm/lib/MC/ConstantPools.cpp |
 | llvm/unittests/DebugInfo/DWARF/DWARFExpressionCopyBytesTest.cpp |
 | llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp |
 | llvm/lib/Target/X86/X86MCInstLower.cpp |
 | llvm/tools/llvm-mc/Disassembler.cpp |
 | llvm/lib/Target/Hexagon/HexagonTargetStreamer.h |
 | llvm/include/llvm/MC/MCStreamer.h |
 | llvm/lib/MC/MCObjectStreamer.cpp |
Commit
e63455d5e0e5d148215a61c0e4d10f00aaf6eb56
by peter.smith[MC] Use local MCSubtargetInfo in writeNops
On some architectures such as Arm and X86 the encoding for a nop may change depending on the subtarget in operation at the time of encoding. This change replaces the per module MCSubtargetInfo retained by the targets AsmBackend in favour of passing through the local MCSubtargetInfo in operation at the time.
On Arm using the architectural NOP instruction can have a performance benefit on some implementations.
For Arm I've deleted the copy of the AsmBackend's MCSubtargetInfo to limit the chances of this causing problems in the future. I've not done this for other targets such as X86 as there is more frequent use of the MCSubtargetInfo and it looks to be for stable properties that we would not expect to vary per function.
This change required threading STI through MCNopsFragment and MCBoundaryAlignFragment.
I've attempted to take into account the in tree experimental backends.
Differential Revision: https://reviews.llvm.org/D45962
|
 | llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h |
 | llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp |
 | llvm/lib/Target/M68k/MCTargetDesc/M68kAsmBackend.cpp |
 | llvm/lib/MC/MCStreamer.cpp |
 | llvm/unittests/DebugInfo/DWARF/DWARFExpressionCopyBytesTest.cpp |
 | llvm/include/llvm/MC/MCObjectStreamer.h |
 | llvm/test/MC/ARM/subtarget-nop.s |
 | llvm/lib/MC/MCAssembler.cpp |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h |
 | llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp |
 | llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp |
 | llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp |
 | llvm/test/CodeGen/ARM/subtarget-align.ll |
 | llvm/include/llvm/MC/MCFragment.h |
 | llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp |
 | llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h |
 | llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp |
 | llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp |
 | llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp |
 | llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp |
 | llvm/include/llvm/MC/MCStreamer.h |
 | llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendDarwin.h |
 | llvm/lib/MC/MCObjectStreamer.cpp |
 | llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp |
 | llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h |
 | llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp |
 | llvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp |
 | llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendWinCOFF.h |
 | llvm/include/llvm/MC/MCAsmBackend.h |
 | llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp |
 | llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp |
 | llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp |
 | llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp |
 | llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackendELF.h |
 | llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h |
 | llvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp |
 | llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp |
Commit
bd576e5ac0fc097c16f5c2a900d5c243289a2a8b
by sander.desmalen[AArch64][SVE] Improve extract_subvector for predicates.
Using PUNPKLO/HI instead of ZIP1/ZIP2, because that avoids having to generate a predicate with all lanes inactive (PFALSE).
Reviewed By: CarolineConcatto
Differential Revision: https://reviews.llvm.org/D109312
|
 | llvm/test/CodeGen/AArch64/sve-split-load.ll |
 | llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td |
 | llvm/test/CodeGen/AArch64/sve-split-fcvt.ll |
 | llvm/test/CodeGen/AArch64/sve-masked-scatter.ll |
 | llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll |
 | llvm/test/CodeGen/AArch64/sve-masked-scatter-legalize.ll |
 | llvm/test/CodeGen/AArch64/sve-split-store.ll |
Commit
821262eef210af8675b794fe7efe6d2ed6f81d3a
by zinenko[mlir] Fix GPU LaunchFunc conversion to the LLVM dialect
The conversion has been incorrectly using the operands of the original operation instead of the converted operands provided to the matchAndRewrite call. This may lead to spurious materializations and generally invalid IR if the producer of the original operands is deleted in the process of conversion.
Reviewed By: csigg
Differential Revision: https://reviews.llvm.org/D109356
|
 | mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp |
Commit
b3b9b297a0d2b572f2232c3ca926a1be45040395
by lebedev.ri[NFC][exegesis] Add test for the following patch
|
 | llvm/test/tools/llvm-exegesis/X86/analysis-naive-clusterization-same-opcode-different-sched-class.test |
Commit
e030f808ec69ce84f04c434ab6782d2628b71ef6
by lebedev.ri[Exegesis] Native clusterization: sub-partition by sched class id
Currently native clusterization simply groups all benchmarks by the opcode of key instruction, but that is suboptimal in certain cases, e.g. where we can already tell that the particular instructions already resolve into different sched classes.
|
 | llvm/tools/llvm-exegesis/lib/Clustering.cpp |
 | llvm/tools/llvm-exegesis/lib/Analysis.h |
 | llvm/tools/llvm-exegesis/llvm-exegesis.cpp |
 | llvm/tools/llvm-exegesis/lib/Clustering.h |
 | llvm/tools/llvm-exegesis/lib/Analysis.cpp |
 | llvm/test/tools/llvm-exegesis/X86/analysis-naive-clusterization-same-opcode-different-sched-class.test |
Commit
c364dcbf1fd81c6291e935564fce2d9ebb97a3d0
by hansAdd llvm-ml to LLVM_TOOLCHAIN_TOOLS (PR50536)
so that it gets installed in LLVM_INSTALL_TOOLCHAIN_ONLY builds, such as used by the Windows installer.
Differential revision: https://reviews.llvm.org/D109358
|
 | llvm/cmake/modules/AddLLVM.cmake |
Commit
61d8e2719351ad0277a13d57c160962ba2d54976
by jingu.kang[test] precommit a test for D109354
|
 | llvm/test/Transforms/LoopBoundSplit/bug51766.ll |
Commit
042a6564d3656b5268fe9e2e2dad8e9726467710
by Jinsong Ji[PowerPC] Guard XSRSP in P8 for FastISel
This is exposed by enabling FastIsel on 64bit AIX. We are generating XSRSP regardless of the arch, which may be wrong when -mcpu=pwr7.
The fix is to guard the generation in P8 only.
Reviewed By: qiucf
Differential Revision: https://reviews.llvm.org/D109365
|
 | llvm/test/CodeGen/PowerPC/fast-isel-rsp.ll |
 | llvm/lib/Target/PowerPC/PPCFastISel.cpp |
Commit
f8d2cd1428f58c36f1ccddaf24e52864a0f2c117
by llvm-dev[X86] Add missing domain to avx512_ord_cmp_sae comis sae patterns
It doesn't appear to be possible to generate this from tests atm, but it matches what we do in sse12_ord_cmp
Fixes unused template arg identified in D109359
|
 | llvm/lib/Target/X86/X86InstrAVX512.td |
Commit
4da5a446f818cd979868d830eced9770a886a5b6
by Jonas Devlieghere[lldb] Update crashlog.py to accept multiple results from mdfind
mdfind can return multiple results, some of which are not even dSYM bundles, but Xcode archives (.xcrachive).
Currently, we end up concatenating the paths, which is obviously bogus. This patch not only fixes that, but now also skips paths that don't have a Contents/Resources/DWARF subdirectory.
rdar://81270312
Differential revision: https://reviews.llvm.org/D109263
|
 | lldb/examples/python/crashlog.py |
Commit
761835521cdb0fe42bb3d550e7fd65aede1ac56a
by spatel[InstCombine] add tests for smear-a-set-bit; NFC
Possible follow-ups from patterns discussed in D109155.
|
 | llvm/test/Transforms/InstCombine/sext.ll |
Commit
a97efde54e6ccbd1b56ec1ae1b7899988ac240a0
by david.spickett[lldb] Add missing newline to stderr output on failed attach
|
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp |
Commit
621e437e0357b342e9c1827044744bda05901489
by Louis Dionne[libc++] Provide 'buildhost=<platform> feature for the tests.
The target platform could differ from the host platform for the cross platform builds. Some tests are depended on the build host features and they need to determine a proper platform environment.
This commit adds a build host platform name feature for the libc++ tests in format `buildhost=<platform>`, such as `buildhost=linux`, `buildhost=darwin`, `buildhost=windows`, etc.
The Windows host gets two features: one `buildhost=windows` and another based on Windows "sub-system", such as `buildhost=win32`, `buildhost=cygwin`, etc.
Differential Revision: https://reviews.llvm.org/D102045
|
 | libcxx/utils/libcxx/test/features.py |
Commit
4a226529e2cf73be57fb45f511b708414ec3427d
by wei.huang[PowerPC] Fixed the crash due to early if conversion with fixed CR fields
This patch adds a fix to do early if conversion to select when conditional branch not using physical register to prevent the crash when expanding ISEL instruction.
Reviewed By: lei, kamaub, PowerPC
Differential revision: https://reviews.llvm.org/D108302
|
 | llvm/lib/Target/PowerPC/PPCInstrInfo.cpp |
 | llvm/test/CodeGen/PowerPC/ifcvt_cr_field.ll |
Commit
81d3ac0cf2cb4b356843c74ccf5641fb5eb362fe
by andrew.litteken[IROutliner] Adding outlining for single entry/single exit multiblock regions
Using the similarity found from the IRSimilarity Identifier, we take regions with structural similarity, and deduplicate them into a separate function. The Code Extractor is able to provide most of this functionality.
For simplicity, we start by only outlining regions with a single entry and single exit branch, this reduces the complexity in handling phi nodes outside the region, and handling many sets of outputs for each of the different exit blocks.
Reviewer: paquette
Differential Revision: https://reviews.llvm.org/D106990
|
 | llvm/lib/Transforms/IPO/IROutliner.cpp |
 | llvm/include/llvm/Analysis/IRSimilarityIdentifier.h |
 | llvm/test/Transforms/IROutliner/outlining-basic-branches.ll |
 | llvm/test/Transforms/IROutliner/region-end-of-module.ll |
 | llvm/test/Transforms/IROutliner/outlining-multiple-exits.ll |
 | llvm/test/Transforms/IROutliner/opt-remarks.ll |
 | llvm/include/llvm/Transforms/IPO/IROutliner.h |
 | llvm/test/Transforms/IROutliner/outlining-across-branch.ll |
Commit
3b5f318f5d2df423afd3b5dddd824fc9a66db17b
by Dávid Bolvanský[InstCombine] ror/rol(X, RotAmt) == C --> X == rol/ror(C, RotAmt) (PR51567)
``` ---------------------------------------- define i1 @src(i32 %0) { %1: %2 = fshl i32 %0, i32 %0, i32 25 %3 = icmp eq i32 %2, 5 ret i1 %3 } => define i1 @tgt(i32 %0) { %1: %2 = icmp eq i32 %0, 640 ret i1 %2 } Transformation seems to be correct! ```
https://alive2.llvm.org/ce/z/GdY8Jm
Solves PR51567
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D109283
|
 | llvm/test/Transforms/InstCombine/icmp-rotate.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp |
Commit
f348f30d6fe9898e1789657dda1e30d6243abd58
by pklausler[flang] Fix GetHostProcedure() for main program
It only worked for internal procedures of subprograms, but must also allow for internal procedures of the main program. This broke the use of host-associated implicitly-typed symbols in specification expressions of internal procedures.
Differential Revision: https://reviews.llvm.org/D109262
|
 | flang/lib/Semantics/resolve-names.cpp |
Commit
5c6338de16ad67f3fe1a4ceb753718db8b712034
by kazu[RISCV] Fix "set but not used" warnings
|
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
Commit
5648f7170e6b1c59c9adc96c3ca24b21b0a83173
by kazu[Analysis, Target, Transforms] Construct SmallVector with iterator ranges (NFC)
|
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
 | llvm/lib/Analysis/ScalarEvolution.cpp |
 | llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp |
 | llvm/lib/Transforms/Scalar/LoopUnswitch.cpp |
 | llvm/lib/Analysis/InstructionSimplify.cpp |
 | llvm/lib/Transforms/Utils/LoopRotationUtils.cpp |
Commit
224f51d879b5060b5a4f57b2774f6f49a5e8951b
by hansang.bae[OpenMP] Add interface for 5.1 scope construct
The new interface only marks begin/end of a scope construct for corresponding OMPT events, and we can use existing interfaces for reduction operations.
Differential Revision: https://reviews.llvm.org/D108062
|
 | openmp/runtime/src/kmp_csupport.cpp |
 | openmp/runtime/src/kmp.h |
 | openmp/runtime/src/dllexports |
Commit
9eda4721121824cdff8caf6b2c4b716ee0911d3d
by llvm-dev[X86] X86InstrAVX512.td - remove unused template parameters. NFC.
Identified in D109359
|
 | llvm/lib/Target/X86/X86InstrAVX512.td |
Commit
0e627c93be8c87c4ccc245ff86457a7b4f581144
by arames[NFC][support] Extract `IsHashableData` out of class
Extract `HashBuilder::IsHashableData` out of class; it does not depend on template parametres.
Reviewed By: dexonsmith
Differential Revision: https://reviews.llvm.org/D109205
|
 | llvm/include/llvm/Support/HashBuilder.h |
Commit
e6597dbae84034ce8ef97802584039b723adb526
by mascasaGreedy set cover implementation of `Merger::Merge`
Extend the existing single-pass algorithm for `Merger::Merge` with an algorithm that gives better results. This new implementation can be used with a new **set_cover_merge=1** flag.
This greedy set cover implementation gives a substantially smaller final corpus (40%-80% less testcases) while preserving the same features/coverage. At the same time, the execution time penalty is not that significant (+50% for ~1M corpus files and far less for smaller corpora). These results were obtained by comparing several targets with varying size corpora.
Change `Merger::CrashResistantMergeInternalStep` to collect all features from each file and not just unique ones. This is needed for the set cover algorithm to work correctly. The implementation of the algorithm in `Merger::SetCoverMerge` uses a bitvector to store features that are covered by a file while performing the pass. Collisions while indexing the bitvector are ignored similarly to the fuzzer.
Reviewed By: morehouse
Differential Revision: https://reviews.llvm.org/D105284
|
 | compiler-rt/lib/fuzzer/FuzzerDriver.cpp |
 | compiler-rt/lib/fuzzer/FuzzerMerge.h |
 | compiler-rt/lib/fuzzer/FuzzerFlags.def |
 | compiler-rt/lib/fuzzer/FuzzerFork.cpp |
 | compiler-rt/test/fuzzer/set_cover_merge.test |
 | compiler-rt/lib/fuzzer/FuzzerMerge.cpp |
 | compiler-rt/lib/fuzzer/FuzzerInternal.h |
 | compiler-rt/lib/fuzzer/tests/FuzzerUnittest.cpp |
Commit
c3c9312f7049e8a9b1bf05db877b4b39df897416
by arames[Support] Automatically support `hash_value` when `HashBuilder` support is available.
Use the `HBuilder` interface to provide default implementations of `llvm::hash_value`.
Reviewed By: dexonsmith
Differential Revision: https://reviews.llvm.org/D109024
|
 | llvm/include/llvm/Support/HashBuilder.h |
 | llvm/unittests/ADT/HashingTest.cpp |
Commit
b841ae55e56392d5dfb4ce2ee7ef7cf56f2b81f9
by zinenko[mlir] Fix SplatOp lowering to the LLVM dialect
The lowering has been incorrectly using the operands of the original op instead of rewritten operands provided to matchAndRewrite call. This may lead to spurious materializations and generally invalid IR.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D109355
|
 | mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp |
Commit
ea04bf302cf8f32bef62208e123d9d0cb99fa55c
by thakis[lldb] Alphabetize some CMake files a bit better
No observable behavior change, but makes the generated Plugins.def a bit easier to read.
Differential Revision: https://reviews.llvm.org/D109367
|
 | lldb/source/Plugins/SymbolFile/CMakeLists.txt |
 | lldb/source/Plugins/ObjectFile/CMakeLists.txt |
 | lldb/source/Plugins/SymbolVendor/CMakeLists.txt |
Commit
c9e9635ffef781c32a839a77d122d7930edfc9b2
by pklausler[flang] evaluate: Fold SQRT, HYPOT, & CABS
Implement IEEE Real::SQRT() operation, then use it to also implement Real::HYPOT(), which can then be used directly to implement Complex::ABS().
Differential Revision: https://reviews.llvm.org/D109250
|
 | flang/include/flang/Evaluate/real.h |
 | flang/test/Evaluate/folding28.f90 |
 | flang/include/flang/Evaluate/complex.h |
 | flang/lib/Evaluate/real.cpp |
 | flang/lib/Evaluate/intrinsics-library.cpp |
 | flang/lib/Evaluate/fold-real.cpp |
Commit
d0eeb64be5848a7832d13db9d69904db281d02e8
by ndesaulniers[X86ISelLowering] avoid emitting libcalls to __mulodi4()
Similar to D108842, D108844, and D108926.
__has_builtin(builtin_mul_overflow) returns true for 32b x86 targets, but Clang is deferring to compiler RT when encountering long long types. This breaks ARCH=i386 + CONFIG_BLK_DEV_NBD=y builds of the Linux kernel that are using builtin_mul_overflow with these types for these targets.
If the semantics of __has_builtin mean "the compiler resolves these, always" then we shouldn't conditionally emit a libcall.
This will still need to be worked around in the Linux kernel in order to continue to support these builds of the Linux kernel for this target with older releases of clang.
Link: https://bugs.llvm.org/show_bug.cgi?id=28629 Link: https://bugs.llvm.org/show_bug.cgi?id=35922 Link: https://github.com/ClangBuiltLinux/linux/issues/1438
Reviewed By: lebedev.ri, RKSimon
Differential Revision: https://reviews.llvm.org/D108928
|
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/smul_fix_sat.ll |
 | llvm/test/CodeGen/X86/xmulo.ll |
 | llvm/test/CodeGen/X86/overflow-intrinsic-optimizations.ll |
Commit
84169fb67e94036dac70467c3d421746e8057478
by joeloser93[libc++][NFC] Test span is nothrow trivially destructible
Add tests showing `span` is trivially_destructible and nothrow_destructible. Note that we do not need to explicitly default the destructor in `span`.
Reviewed By: ldionne, Mordante, #libc
Differential Revision: https://reviews.llvm.org/D109286
|
 | libcxx/test/std/containers/views/span.cons/span.dtor.compile.pass.cpp |
Commit
dadbe88a1387e7b1fe4417fa4b64234ffc83c878
by arthur.j.odwyer[libc++] Fix std::to_address(array).
There were basically two bugs here:
When C++20 `to_address` is called on `int arr[10]`, then `const _Ptr&` becomes a reference to a const array, and then we dispatch to `__to_address<const int(&)[10]>`, which, oops, gives us a `const int*` result instead of an `int*` result. Solution: We need to provide the two standard-specified overloads of `std::to_address` in exactly the same way that we provide two overloads of `__to_address`.
When `__to_address` is called on a pointer type, `__to_address(const _Ptr&)` is disabled so we successfully avoid trying to instantiate pointer_traits of that pointer type. But when it's called on an array type, it's not disabled for array types, so we go ahead and instantiate pointer_traits<int[10]>, which goes boom. Solution: We need to disable `__to_address(const _Ptr&)` for both pointer and array types. Also disable it for function types, so that they get the nice error message; and put a test on it.
Differential Revision: https://reviews.llvm.org/D109331
|
 | libcxx/test/std/utilities/memory/pointer.conversion/to_address_on_function.verify.cpp |
 | libcxx/test/std/utilities/memory/pointer.conversion/to_address.pass.cpp |
 | libcxx/test/libcxx/utilities/memory/pointer.conversion/to_address_on_function.verify.cpp |
 | libcxx/test/libcxx/utilities/memory/pointer.conversion/to_address_on_funcptr.verify.cpp |
 | libcxx/test/std/utilities/memory/pointer.conversion/to_address_on_funcptr.verify.cpp |
 | libcxx/include/__memory/pointer_traits.h |
 | libcxx/test/libcxx/utilities/memory/pointer.conversion/to_address.pass.cpp |
Commit
0a5ebc692b93f43c3b61e7571254f8c5e234597a
by arthur.j.odwyer[libc++] Remove a stray `const` on ranges::data and ranges::ssize. NFCI.
These are specced as `inline constexpr auto`; the extra `const` isn't doing anything except being inconsistent with the other CPOs. Now all the implemented CPOs can be detected by git grep 'inline constexpr auto.*fn' ../libcxx/include/ and I think that's beautiful.
|
 | libcxx/include/__ranges/size.h |
 | libcxx/include/__ranges/data.h |
Commit
35fa7b8ad83e6cddb38190818df3c6688b3c2313
by lebedev.riReland "[InstCombine] Recognize `((x * y) s/ x) !=/== y` as an signed multiplication overflow check (PR48769)"
This reverts commit 91f7a4fff75179e75d38b692715ae69471668b5e, relanding commit 13ec913bdf500e2354cc55bf29e2f5d99e0c709e.
The original commit was reverted because of (essentially) https://bugs.llvm.org/show_bug.cgi?id=35922 which has now been addressed by d0eeb64be5848a7832d13db9d69904db281d02e8.
|
 | llvm/test/Transforms/InstCombine/signed-mul-lack-of-overflow-check-via-mul-sdiv.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineInternal.h |
 | llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp |
 | llvm/test/Transforms/InstCombine/signed-mul-overflow-check-via-mul-sdiv.ll |
Commit
b81fc14f2da1800432e864c27abb01c1a219a97e
by aeubanks[NFC][InstCombine] Make check for sret in a vararg function clearer
We're trying to get the parameter index of sret and see if it's part of a function's varargs.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D109335
|
 | llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp |
Commit
6300e4ac5806c9255c68c6fada37b2ce70efc524
by maks[llvm-objdump] Fix 'llvm-objdump -dr' for executables with relocations
Print relocations interleaved with disassembled instructions for executables with relocatable sections, e.g. those built with "-Wl,-q".
Differential Revision: https://reviews.llvm.org/D109016
|
 | llvm/test/tools/llvm-objdump/X86/elf-disassemble-relocs-exec.test |
 | llvm/tools/llvm-objdump/llvm-objdump.cpp |
Commit
abd80ecf6ed8f013b8c78fb00a2637dfc81e50cb
by i[ELF][test] Improve gitBitcodeMachineKind tests
|
 | lld/test/ELF/lto/ppc64le.ll |
 | lld/test/ELF/lto/riscv32.ll |
 | lld/test/ELF/lto/riscv.ll |
 | lld/test/ELF/lto/aarch64.ll |
 | lld/test/ELF/lto/ppc.ll |
 | lld/test/ELF/lto/riscv64.ll |
Commit
34528c32d23f98312434bb8d67510bef616e5b44
by andrew.kaylorCopy Elementtype Attribute to IR at Link step
Copying IR during linking causes a type mismatch due to the field being missing in IRMover/Valuemapper. Adds the full range of typed attributes including elementtype attribute in the copy functions.
Patch by Chenyang Liu
Differential Revision: https://reviews.llvm.org/D108796
|
 | llvm/test/Linker/elementtype-struct-1.ll |
 | llvm/lib/Linker/IRMover.cpp |
 | llvm/test/Linker/Inputs/elementtype-struct-2.ll |
 | llvm/lib/Transforms/Utils/ValueMapper.cpp |
Commit
58db5f6e959419aaca20798835d75d3646b99293
by nikita.ppv[ConstFold] Support opaque pointers in constexpr GEPs
Support opaque pointers in SymbolicallyEvaluateGEP() by using the value type of a GlobalValue base or falling back to i8 if there isn't one. We don't unconditionally generate i8 GEPs here because that would lose inrange attribues, and because some optimizations on globals currently rely on GEP types (e.g. the globals SROA mentioned in the comment).
Differential Revision: https://reviews.llvm.org/D109297
|
 | llvm/lib/Analysis/ConstantFolding.cpp |
 | llvm/test/Transforms/InstCombine/force-opaque-ptr.ll |
Commit
7f54009a1fd8c7ea422bd58b45ba5cdc73a3a55e
by aeubanksAdd missing overloads for Function::addRetAttr(s)
|
 | llvm/include/llvm/IR/Function.h |
 | llvm/lib/IR/Function.cpp |
Commit
f5832eaaadc5382a4385e63d25f5ce08bc7a516c
by nikita.ppv[UseListOrder] Fix use list order for function operands
Functions can have a personality function, as well as prefix and prologue data as additional operands. Unused operands are assigned a dummy value of i1* null. This patch addresses multiple issues in use-list order preservation for these:
* Fix verify-uselistorder to also enumerate the dummy values. This means that now use-list order values of these values are shuffled even if there is no other mention of i1* null in the module. This results in failures of Assembler/call-arg-is-callee.ll, Assembler/opaque-ptr.ll and Bitcode/use-list-order2.ll. * The use-list order prediction in ValueEnumerator does not take into account the fact that a global may use a value more than once and leaves uses in the same global effectively unordered. We should be comparing the operand number here, as we do for the more general case. * While we enumerate all operands of a function together (which seems sensible to me), the bitcode reader would first resolve prefix data for all function, then prologue data for all functions, then personality functions for all functions. Change this to resolve all operands for a given function together instead.
Differential Revision: https://reviews.llvm.org/D109282
|
 | llvm/tools/verify-uselistorder/verify-uselistorder.cpp |
 | llvm/lib/Bitcode/Writer/ValueEnumerator.cpp |
 | llvm/lib/Bitcode/Reader/BitcodeReader.cpp |
 | llvm/test/Assembler/function-operand-uselistorder.ll |
Commit
2cfe1a09d1023af90c5270325623e64ad57fc5b8
by yeluo[OpenMP][libomptarget][NFC] Change checkDeviceAndCtors return type to bool.
What is exactly needed is only a boolean. Pulling OFFLOAD_SUCCESS/FAIL only adds confusion.
Differential Revision: https://reviews.llvm.org/D109303
|
 | openmp/libomptarget/src/private.h |
 | openmp/libomptarget/src/interface.cpp |
 | openmp/libomptarget/src/omptarget.cpp |
Commit
ae8507b0df738205a6b9e3795ad34672b7499381
by vtjnash[X86] Don't clobber EBX in stackprobes
On X86, the stackprobe emission code chooses the `R11D` register, which is illegal on i686. This ends up wrapping around to `EBX`, which does not get properly callee-saved within the stack probing prologue, clobbering the register for the callers.
We fix this by explicitly using `EAX` as the stack probe register.
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D109203
|
 | llvm/test/CodeGen/X86/stack-clash-large.ll |
 | llvm/lib/Target/X86/X86FrameLowering.cpp |
Commit
4b053416812f56ad661b650762d20ff4c9849f66
by aeubanksDon't check if the result of hasAttrSomewhere is non-zero in CallBase::getReturnedArgOperand()
Index is 0 when the return value has the returned attribute. But the return value cannot have the returned attribute, so the check is pointless.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D109334
|
 | llvm/lib/IR/Instructions.cpp |
Commit
cfe02847496b856aa1628cae854997833043ec32
by thakis[gn build] Add build files for LLDB
This is enough to get the lit-based tests to pass on macOS.
Doesn't yet add build targets for: - Any LLDB unit tests - swig bindings - various targets not needed by lit tests
LLDB has many dependency cycles, something GN doesn't allow. For that reason, I've omitted some dependency edges. Hopefully we can clean up the cycles one day.
LLDB has a public/private header distinction, but mostly ignores it. Many libraries include private headers from other modules.
Since LLDB is the first target the LLVM/GN build that uses Objective-C++ code, add some machinery to the toolchain file to handle that.
Differential Revision: https://reviews.llvm.org/D109185
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 | llvm/utils/gn/secondary/lldb/source/Plugins/SymbolFile/Symtab/BUILD.gn |
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 | llvm/utils/gn/secondary/lldb/source/Plugins/Language/ObjCPlusPlus/BUILD.gn |
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Commit
08d56432ad8cea452a03ffd9b69faf642cf1901c
by Louis Dionne[libc++][NFC] Add missing synopsis for node handles
This was manually taken from https://llvm.org/D100311.
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 | libcxx/include/__node_handle |
Commit
b3e9ba605ffee87be463040dbc007d4b6b8f5510
by thakis[gn build] Attempt to fix linux build after cfe02847496b856aa
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 | llvm/utils/gn/secondary/lldb/tools/lldb-server/BUILD.gn |
Commit
6be7f5c354557b661494f94be616d2a8c91a6a1d
by thakis[gn build] Add a file that should have been in cfe02847496b856aa
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 | llvm/utils/gn/secondary/lldb/source/Plugins/Architecture/Arm/BUILD.gn |
Commit
f549977397f5d68d91174e32f47aae9bc5e293f1
by lebedev.ri[NFC][X86] Adjust multi-use tests in clear-highbits.ll, add pat. d tests
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 | llvm/test/CodeGen/X86/clear-highbits.ll |
Commit
d5166f86a33d718437a1f1d75a9d0efbe5f36e1f
by thakis[gn build] Try to fix mac/arm build after cfe02847496b856aa
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 | llvm/utils/gn/secondary/lldb/tools/lldb-server/BUILD.gn |
Commit
f514fb587c3345d6f5c40866cf092c81f8692065
by thakis[gn build] Try to fix mac/intel build after cfe02847496b
The public header lldb/include/lldb/Host/XML.h includes libxml/xmlreader.h, so this must be a public dep.
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 | llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn |
Commit
f504431f03a35739d33402c880aa2c7a9a8fd79f
by lebedev.ri[NFC][X86] Adjust multi-use tests in clear-lowbits.ll, add 'misc' tests
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 | llvm/test/CodeGen/X86/clear-lowbits.ll |
Commit
7023cefe61913fefd82eb7ee463a2c8d01faf1ae
by david.green[AArch64][Global ISel] Add sext/zext of vector extract improvements
This patch adds improvements for sext/zext of a vector extract in Global ISel.
For example, this piece of code:
define i64 @si64(<4 x i32> %0, i32 %1) { %3 = extractelement <4 x i32> %0, i64 1 %s = sext i32 %3 to i64 ret i64 %s }
Used to have this lowering: si64: mov s0, v0.s[1] fmov w8, s0 sxtw x0, w8 ret
Whereas this patch makes it lower to this: si64: smov x0, v0.h[0] ret
Differential Revision: https://reviews.llvm.org/D108137
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 | llvm/test/CodeGen/AArch64/GlobalISel/select-extract-vector-elt-with-extend.mir |
 | llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/select-extract-vector-elt.mir |
 | llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp |
 | llvm/test/CodeGen/AArch64/extract-sext-zext.ll |
Commit
2307bd3caf299d197d563d3ab06596ded0ff7430
by lebedev.ri[NFC][X86] Adjust multi-use tests in extract-lowbits.ll
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 | llvm/test/CodeGen/X86/extract-lowbits.ll |
Commit
af9f32132865e7a16f46973e7fb542faf09bd04e
by lebedev.ri[X86] Move newly-added tests into the right file
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 | llvm/test/CodeGen/X86/clear-highbits.ll |
 | llvm/test/CodeGen/X86/clear-lowbits.ll |
Commit
9565457aad3459339c9dbd5064a8a2708fc032a9
by spatel[InstCombine] add tests for icmp with 'or' ops; NFC
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 | llvm/test/Transforms/InstCombine/icmp-or.ll |
Commit
a3c1669b1717545e16e33c0d7c147355f4912faa
by spatel[InstCombine] fold icmp equality with 'or' mask ops
This could go either direction since the instruction count is the same either way, but there are a few reasons to prefer this: 1. We already do the related transform with 'and' (see just above the new code). 2. We try (too hard) to compensate for not having this and possibly other folds in transformZExtICmp(), and that leads to bugs like https://llvm.org/PR51762 . 3. Codegen looks better across a variety of targets.
https://alive2.llvm.org/ce/z/uEgn4P
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 | llvm/test/Transforms/InstCombine/icmp-or.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp |
Commit
6da594596b8f4b9bfac136e484e7de5ca335c945
by gcmn[MLIR][docs] Clarify language in pass restrictions
Right now all but the last bullet are relying on applied "must not" that isn't there and the last bullet is a "must".
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D109389
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 | mlir/docs/PassManagement.md |
Commit
ee903a207b767566b4a65f5519c545cccba28d28
by joker.ephImprove error message when creating an op that isn't registered in the context
This prints a more helpful error for folks who aren't intrinsically familiar with the system.
Differential Revision: https://reviews.llvm.org/D109378
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 | mlir/include/mlir/IR/Builders.h |
Commit
965906997865a470e1e5751bad6856a2f6375829
by listmail[SCEV] Further clarify comments regarding UB and zero stride
Follow on to D109029. I realized we had no mention of mustprogrress in the comment (as it prexisted mustprogress in the codebase). In the process of adding it, I tweaked the preconditions into something I think is more clear. Note that mustprogress is checked in the code.
Differential Revision: https://reviews.llvm.org/D109091
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 | llvm/lib/Analysis/ScalarEvolution.cpp |
Commit
08ba87fa4b940b676e70288cc4e528aacb14c09f
by ro[Support] Implement getMainExecutable on Solaris
Many `flang` tests currently `FAIL` on Solaris because the module files aren't found. I could trace this to `sys::fs::getMainExecutable` not being implemented.
This patch does this and fixes all affected `flang` tests.
Tested on `amd64-pc-solaris2.11`.
Differential Revision: https://reviews.llvm.org/D109374
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 | llvm/lib/Support/Unix/Path.inc |
Commit
d4071b2777f372719c752a0fea560b7bf7319e5b
by thakis[gn build] Try to fix win build after cfe02847496b856aa
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 | llvm/utils/gn/build/BUILD.gn |
Commit
b32506cb869f67298117b2e34cc4dd5cfeeec808
by thakisRevert "[gn build] Add a file that should have been in cfe02847496b856aa"
This reverts commit 6be7f5c354557b661494f94be616d2a8c91a6a1d. We'll need this file eventually, but it in fact shouldn't have been in cfe02847496b856aa. It's currently unreferenced.
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 | llvm/utils/gn/secondary/lldb/source/Plugins/Architecture/Arm/BUILD.gn |
Commit
2bf8be79b10cc41064bdbe3d001c48669027ccfe
by sivachandra[libc][NFC] Add fenv and string headers to x86_64 headers list.
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 | libc/config/linux/x86_64/headers.txt |
Commit
d02e12fadffdd045edfb2885ff9ff105ada3acc8
by ajcbik[mlir][sparse] fix typos
Perhaps one of these days I will actually learn how to spell opaque....
Reviewed By: bixia
Differential Revision: https://reviews.llvm.org/D109391
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 | mlir/lib/ExecutionEngine/SparseUtils.cpp |
Commit
43a263f570dbe88524ab3689bc994df60c531310
by pklausler[flang] Implement semantic checks for ELEMENTAL subprograms
Adds missing semantic checks for ELEMENTAL functions and subroutines, their dummy arguments, and their results from F'2018 15.8.1 C15100-15102.
Differential Revision: https://reviews.llvm.org/D109380
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 | flang/test/Evaluate/folding28.f90 |
 | flang/test/Semantics/assign03.f90 |
 | flang/test/Semantics/elemental01.f90 |
 | flang/test/Semantics/typeinfo01.f90 |
 | flang/test/Semantics/resolve83.f90 |
 | flang/test/Semantics/final02.f90 |
 | flang/lib/Semantics/check-declarations.cpp |
 | flang/test/Semantics/associated.f90 |
Commit
eeabd90efd2697d186adf4ef9200fb01a5c67de2
by aeubanks[NFC] Cleanup off by one indexes in CallBase::dataOperandHasImpliedAttr()
Verified that previously nothing was calling dataOperandHasImpliedAttr() with AttributeList::ReturnIndex even though we had a code path for it.
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D109390
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 | llvm/include/llvm/IR/InstrTypes.h |
Commit
dcde8fdeeb3ebda6fe6a23d933fbe5caee01c088
by Artem Dergachev[clang-tidy] bugprone-infinite-loop: Fix false positives with volatile addresses.
Low-level code may occasionally deal with direct access by concrete addresses such as 0x1234. Values at these addresses act like globals: they can change at any time. They typically wear volatile qualifiers.
Suppress all warnings on loops with conditions that involve casting anything to a pointer-to-...-pointer-to-volatile type.
The closely related bugprone-redundant-branch-condition check doesn't seem to be affected. Add a test just in case.
Differential Revision: https://reviews.llvm.org/D108808
|
 | clang-tools-extra/clang-tidy/bugprone/InfiniteLoopCheck.cpp |
 | clang-tools-extra/test/clang-tidy/checkers/bugprone-redundant-branch-condition.cpp |
 | clang-tools-extra/test/clang-tidy/checkers/bugprone-infinite-loop.cpp |
Commit
39e2e3bddbf459d16b00969af1415ebee11fcbdc
by aeubanks[NFC][C API] Make LLVMSetInstrParamAlignment's index param type LLVMAttributeIndex
It's the same as unsigned, but clearer in intent.
|
 | llvm/lib/IR/Core.cpp |
 | llvm/bindings/go/llvm/ir.go |
 | llvm/include/llvm-c/Core.h |
Commit
a1d522939c64aac01d51d7518da9559220e55206
by aheejin[WebAssembly] Error out on indirect uses of setjmp
Both Wasm & Emscripten SjLj handling has a restriction that `setjmp` cannot be called indirectly. I thought we have been erroring out on indirect uses of `setjmp`, but some recent CL disrupted the logic and we are not erroring out anymore.
We currently 1. Collect functions that contain `setjmp` calls in `SetjmpUsers`. This only counts direct calls: https://github.com/llvm/llvm-project/blob/8f77dc459e31aad6daab89a124fa92067916274c/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp#L869-L878 2. Run `runSjLjOnFunction` only on those `SetjmpUsers`. Within `runSjLjOnFunction`, if we see an indirect use of `setjmp`, we error out: https://github.com/llvm/llvm-project/blob/8f77dc459e31aad6daab89a124fa92067916274c/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp#L1218-L1221
So if there are only indirect setjmp calls within the module, `SetjmpUsers` will be empty, and `runSjLjOnFunction` is not even entered once. And the indirect `setjmp` call will error out at link time. So in this CL we check for the indirect uses of `setjmp` upfront before we enter `runSjLjOnFunction`.
Also this currently errors out on `invoke @setjmp`, which can only occur when using Wasm EH + Wasm SjLj within a function. We recently added Wasm SjLj support but we don't support using Wasm EH + Wasm SjLj in the same function yet. We plan to add this support very soon, so I don't think it's worth creating another test file just for this. (This is an error test so it needs its own file)
Reviewed By: dschuff
Differential Revision: https://reviews.llvm.org/D109375
|
 | llvm/test/CodeGen/WebAssembly/lower-em-sjlj-indirect-setjmp.ll |
 | llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp |
Commit
6b53817e713ca02415e710e5c7b0d2a643d93889
by david.green[AArch64] Regenerate some test checks. NFC
|
 | llvm/test/CodeGen/AArch64/sibling-call.ll |
 | llvm/test/CodeGen/AArch64/vector-fcopysign.ll |
 | llvm/test/CodeGen/AArch64/vcvt-oversize.ll |
Commit
6cdca906c79fb4e0eae940f11d585c1b08358104
by listmail[SCEV] Use no-self-wrap flags infered from exit structure to compute trip count
The basic problem being solved is that we largely give up when encountering a trip count involving an IV which is not an addrec. We will fall back to the brute force constant eval, but that doesn't have the information about the fact that we can't cycle back through the same set of values.
There's a high level design question of whether this is the right place to handle this, and if not, where that place is. The major alternative here would be to return a conservative upper bound, and then rely on two invocations of indvars to add the facts to the narrow IV, and then reconstruct SCEV. (I have not implemented the alternative and am not 100% sure this would work out.) That's arguably more in line with existing code, but I find this substantially easier to reason about. During review, no one expressed a strong opinion, so we went with this one.
Differential Revision: D108651
|
 | llvm/lib/Analysis/ScalarEvolution.cpp |
 | llvm/test/Analysis/ScalarEvolution/trip-count-implied-addrec.ll |
Commit
79c00d3f544078f6510b26971699a8c776021a72
by Yuanfang Chen[NPM] Make AddDiscriminators pass required
This is to make sure the pass is not skipped at O0 where optnone is applied to functions by default.
|
 | llvm/include/llvm/Transforms/Utils/AddDiscriminators.h |
 | llvm/test/Transforms/AddDiscriminators/basic.ll |
Commit
61d1cce2f83571c00f76144d42a2dea2cb3ab1ca
by Yuanfang ChenPR45881: Properly use CXXThisOverride for templated lambda
- `this` used in lambda expression parameter declarations needs no capture. - Set up CXXThisOverride for default template arguments of a lambda.
A similar fix to this is c3d2ebb60f604.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D102531
|
 | clang/test/SemaCXX/cxx1z-lambda-star-this.cpp |
 | clang/lib/Sema/SemaExprCXX.cpp |
 | clang/lib/Sema/SemaTemplate.cpp |
 | clang/lib/Sema/SemaTemplateDeduction.cpp |
 | clang/test/SemaCXX/cxx20-lambda-decltype-this.cpp |
Commit
9f5993d110d69728674e4b0e4786f078484d62f1
by mnadeem[NFC] Recommit "Regenerate SVE ACLE intrinsics tests"" 2nd try
This reverts 61ddc3d3db9b6c6b163774c7ce9f4d611cbd7c80 to reapply 91eda9c30f33da6ec6da70b59a5f5da6c6397039 after fixing the " |& " causing failures on windows.
Change-Id: Ib646c803b2274f0f24f9a8932de7aa97003529c5
|
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfalse.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c |
 | clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c |
 | clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c |
Commit
68b9d8ed7abe4046992ae1557990edfbb3a772bc
by mizvekov[clang] fix transformation of template arguments of 'auto' type constraints
See PR48617.
When assigning the new template arguments to the new TypeLoc, we were looping on the argument count of the original TypeLoc instead of the new one, which can be different when packs are present.
Signed-off-by: Matheus Izvekov <mizvekov@gmail.com>
Reviewed By: rsmith
Differential Revision: https://reviews.llvm.org/D109406
|
 | clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.spec.auto/p6.cpp |
 | clang/lib/Sema/TreeTransform.h |
Commit
9d7d34c7691ad89cb0d7529e6a0064026acd6dca
by pengfei.wang[X86][MS] Fix the aligement mismatch of vector variable arguments on Win32
The alignment of vector variable arguments in callee side is 4, which is aligned with MSVC. But the caller aligns them to the size of vector arguments. It results in run fails. This patch fixes this problem by trimming it to 4 bytes for variable arguments on Win32.
Fixed vector arguments are passed by pointer on Win32. So they don't have the problem.
I don't find a doc in MSDN for this calling conversion, so I did several experiments here: https://godbolt.org/z/n1zn1Gx1z
Reviewed By: rnk
Differential Revision: https://reviews.llvm.org/D108887
|
 | llvm/test/CodeGen/X86/vaargs-win32.ll |
 | llvm/lib/Target/X86/X86CallingConv.td |
 | llvm/test/CodeGen/X86/win32-spill-xmm.ll |
Commit
f0460fa4eb719f621fc0ec971d55b530d90a58e1
by powerman1st[AArch64] Improve target hook function to decide folding (mul (add x, c1), c2)
Prevent the folding if it leads to worse code.
Reviewed By: dmgreen, kda
Differential Revision: https://reviews.llvm.org/D108871
|
 | llvm/lib/Target/AArch64/AArch64ISelLowering.h |
 | llvm/test/CodeGen/AArch64/urem-seteq-nonzero.ll |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/test/CodeGen/AArch64/addimm-mulimm.ll |
Commit
b0d4d969e22efd282047e51b7927c1ab53eccf32
by powerman1st[AVR] Add support for the tinyAVR 0-series and tinyAVR 1-series
Reviewed By: Dylan McKay, Ben Shi
Differential Revision: https://reviews.llvm.org/D103136
|
 | clang/test/Misc/target-invalid-cpu-note.c |
 | clang/lib/Basic/Targets/AVR.cpp |
 | llvm/lib/Target/AVR/AVRDevices.td |
Commit
8eb617d719bdc6a4ed7773925d2421b9bbdd4b7a
by wmi[SampleFDO] Allow forward compatibility when adding a new section for extbinary format.
Currently when we add a new section in the profile format and generate a profile containing the new section, older compiler which reads the new profile will issue an error. The forward incompatibility can cause unnecessary churn when extending the profile. This patch removes the incompatibility when adding a new section for extbinary format.
Differential Revision: https://reviews.llvm.org/D109398
|
 | llvm/include/llvm/ProfileData/SampleProfReader.h |
 | llvm/test/tools/llvm-profdata/forward-compatible.test |
 | llvm/test/tools/llvm-profdata/Inputs/unknown.section.extbin.profdata |
 | llvm/include/llvm/ProfileData/SampleProf.h |
Commit
aa4dfba522538019740268bd0c018e1674adb1c9
by i[ELF] Infer EM_HEXAGON in getBitcodeMachineKind
|
 | lld/ELF/InputFiles.cpp |
 | lld/test/ELF/lto/hexagon.ll |
Commit
b2a885df0d30b11973864dcd3ddeaff8bd1ddef5
by i[ProfileData] Fix Clang -Wcovered-switch-default after D109398
|
 | llvm/include/llvm/ProfileData/SampleProf.h |
Commit
813235947d07890ea55a6de039261d0c409c8b42
by i[CMake] Don't add -Wnon-virtual-dtor if affected by GCC PR102168
See the discussion on https://reviews.llvm.org/rG4852c770fe8703145dd2a35395985646ce57a454 The GCC behavior (https://gcc.gnu.org/PR102168) seems unhelpful.
Unconditional -Wnon-virtual-dtor led to other unnecessary workarounds like 6df09d6ccbc0cb72d3278cafb592e9bc0e6b84a1
This patches uses a variant of the 4bb5f44c701402462cb93ef00d46d52382f39f11 check to detect GCC PR102168.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D109404
|
 | llvm/cmake/modules/HandleLLVMOptions.cmake |
Commit
ca867ef47b8aebc2d8167049544954e78eeeb9e8
by iRevert GCC -Wnon-virtual-dtor workarounds "[SCEV] Fix GCC -Wnon-virtual-dtor" & "[SampleFDO] Fix -Wnon-virtual-dtor"
This reverts commits 4852c770fe8703145dd2a35395985646ce57a454 and 6df09d6ccbc0cb72d3278cafb592e9bc0e6b84a1.
After D109404, -Wnon-virtual-dtor will not be added when the host compiler is GCC.
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 | llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h |
 | llvm/include/llvm/Analysis/ScalarEvolution.h |
Commit
29d054bf126870706f909a821895770bd9af42b3
by mkazantsev[SimplifyCFG] Preserve knowledge about guarding condition by adding assume
This improvement adds "assume" after removal of branch basing on UB in successor block.
Consider the following example:
``` pred: x = ... cond = x > 10 br cond, bb, other.succ
bb: phi [nullptr, pred], ... // other possible preds load(phi) // UB if we came from pred
other.succ: // here we know that x <= 10, but this knowledge is lost // after the branch is turned to unconditional unless we // preserve it with assume. ```
If we remove the branch basing on knowledge about UB in a successor block, then the fact that x <= 10 is other.succ might be lost if this condition is not inferrable from any dominating condition. To preserve this knowledge, we can add assume intrinsic with (possibly inverted) branch condition.
Patch by Dmitry Bakunevich!
Differential Revision: https://reviews.llvm.org/D109054 Reviewed By: lebedev.ri
|
 | llvm/lib/Transforms/Utils/SimplifyCFG.cpp |
 | llvm/test/Transforms/SimplifyCFG/tautological-conditional-branch.ll |
Commit
52f739c4ae02f0ac6f6cea866fcc7c78eed82e39
by i[ProfileData] Actually fix Clang -Wcovered-switch-default after D109398
The Clang attribute `enum_extensibility(open)` (2017) is too new. Just use a cast.
|
 | llvm/include/llvm/ProfileData/SampleProf.h |
Commit
981f7d563aa8ab3ed693d55c055b193adff4bba5
by sander.desmalen[AArch64] Implement extract_subvector for predicates.
This patch implements extract_subvector for predicate types when the input type is more than twice the size of the subvector that is being extracted.
Reviewed By: CarolineConcatto
Differential Revision: https://reviews.llvm.org/D109314
|
 | llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td |
 | llvm/test/CodeGen/AArch64/sve-extract-vector.ll |
Commit
fe6dbe7e9512ffc8c2c180d389ab1dc8027abba2
by i[WebAssembly][test] Fix lower-em-sjlj-indirect-setjmp.ll after D109375
|
 | llvm/test/CodeGen/WebAssembly/lower-em-sjlj-indirect-setjmp.ll |
Commit
c5a74c0890f41e339c13e2a32cc89828c1451768
by martin[libcxx] [test] Simplify get_temp_file_name() for mingw
Use the same codepaths as for MSVC. Mingw-w64 does have the _mktemp_s function; on Vista and newer, msvcrt.dll does contain the function, which ends up called. (Same thing in the UCRT.) In older versions of msvcrt.dll (older than what libc++ supports), mingw-w64 provides a fallback implementation.
This effectively reverts 23323e25f896cf44e6d4519ef38f066e45fe408f (and d07e5c23b40078dcae13f76b091c9e18763ae44a). That commit tried to fix unspecified MinGW build breakage.
This reduces the risk of temp name collisions between processes (when running multiple tests in parallel); the path returned by GetTempFileName can easily collide with other similar paths. (_mktemp_s on the other hand tries to avoid such clashes by using the process id as part of the uniqueness seed.)
This avoids stray random failures in fstreams tests in mingw configurations.
Differential Revision: https://reviews.llvm.org/D98526
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 | libcxx/test/support/platform_support.h |
Commit
89786c2b992c3cb4c4a230542d2af34ec2915a08
by cullen.rhodes[AArch64][SME] Fix imm bug in mov vector to tile aliases
Also fixes a warning mentioned in D109359.
Reviewed By: sdesmalen
Differential Revision: https://reviews.llvm.org/D109363
|
 | llvm/lib/Target/AArch64/SMEInstrFormats.td |
 | llvm/test/MC/AArch64/SME/mova-diagnostics.s |
Commit
a42bc456c180124a136f16919922ccc30880bfe7
by david.green[AArch64] Regenerate some test checks. NFC
|
 | llvm/test/CodeGen/AArch64/nontemporal.ll |
 | llvm/test/CodeGen/AArch64/sitofp-fixed-legal.ll |
 | llvm/test/CodeGen/AArch64/tst-br.ll |
 | llvm/test/CodeGen/AArch64/neg-imm.ll |
 | llvm/test/CodeGen/AArch64/select_fmf.ll |
 | llvm/test/CodeGen/AArch64/neon-mov.ll |
Commit
b07803ee2a97fdcf4ed6494d8d6593bf985a5150
by mgorny[lldb] [Process/FreeBSD] Support SaveCore() using PT_COREDUMP
Differential Revision: https://reviews.llvm.org/D109326
|
 | lldb/test/API/tools/lldb-server/TestGdbRemoteSaveCore.py |
 | lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.h |
 | lldb/test/API/functionalities/process_save_core/TestProcessSaveCore.py |
 | lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp |
Commit
39a2449ea1333886a9c9104b5afb4ff9c4932403
by mgorny[lldb] [Commands] Fix reporting errors in 'platform file read/write'
Fix 'platform file read' and 'platform file write' commands to correctly detect erraneous return and report it as such. Currently, errors were implicitly printed as a return value of -1, and the commands were assumed to be successful.
Differential Revision: https://reviews.llvm.org/D107665
|
 | lldb/test/API/functionalities/gdb_remote_client/TestGDBRemotePlatformFile.py |
 | lldb/source/Commands/CommandObjectPlatform.cpp |
Commit
8872c9d1ca2189c55fda0246890b42f67a460598
by mgorny[lldb] [gdb-server] Add tests for more vFile packets
Differential Revision: https://reviews.llvm.org/D107821
|
 | lldb/test/API/tools/lldb-server/TestGdbRemotePlatformFile.py |
Commit
2c5568a6a99cec9bb7c6c1f982f4da975088d73c
by fraser[LegalizeTypes][VP] Add promotion support for binary VP ops
This patch extends the preliminary support for vector-predicated (VP) operation legalization to include promotion of illegal integer vector types.
Integer promotion of binary VP operations is relatively simple and piggy-backs on the non-VP logic, but passing the two extra mask and VP operands through to the promoted operation.
Tests have been added to the RISC-V target to cover the basic scenarios for integer promotion for both fixed- and scalable-vector types.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D108288
|
 | llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vor-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h |
 | llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll |
 | llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp |
 | llvm/test/CodeGen/RISCV/rvv/vand-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll |
Commit
c01b76e733d6e5e2d21e4277dceaa1f319794c6a
by mgorny[lldb] Support "eflags" register name in generic reg fallback
Enhance the generic register fallback code to support "eflags" register name in addition to "rflags", as the former is used by gdbserver. This permits lldb-server to recognize the generic flags register when interfacing with gdbserver-style target.xml (i.e. without generic="" attributes), and therefore aligns ABI plugins' AugmentRegisterInfo() between lldb-server and gdbserver.
Differential Revision: https://reviews.llvm.org/D108548
|
 | lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp |
 | lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp |
 | lldb/source/Plugins/Process/Utility/DynamicRegisterInfo.cpp |
Commit
caabf2a445bd7d00844cd623db5348423d458dd7
by david.green[AArch64] Regenerate some test checks. NFC
This patch just reruns the update_llc_test_checks script on the AArch64 tests claiming to be updated by the script, cleaning up the output.
|
 | llvm/test/CodeGen/AArch64/pow.75.ll |
 | llvm/test/CodeGen/AArch64/unwind-preserved.ll |
 | llvm/test/CodeGen/AArch64/stack-guard-remat-bitcast.ll |
 | llvm/test/CodeGen/AArch64/named-vector-shuffle-reverse-sve.ll |
 | llvm/test/CodeGen/AArch64/machine-outliner-thunk.ll |
 | llvm/test/CodeGen/AArch64/strqu.ll |
 | llvm/test/CodeGen/AArch64/sve2-intrinsics-int-arith-imm.ll |
 | llvm/test/CodeGen/AArch64/load-combine-big-endian.ll |
 | llvm/test/CodeGen/AArch64/sve2-unary-movprfx.ll |
 | llvm/test/CodeGen/AArch64/sve-unary-movprfx.ll |
 | llvm/test/CodeGen/AArch64/fp16_intrinsic_lane.ll |
 | llvm/test/CodeGen/AArch64/sve-select.ll |
 | llvm/test/CodeGen/AArch64/f16-imm.ll |
 | llvm/test/CodeGen/AArch64/aarch64-dup-ext-crash.ll |
 | llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-imm.ll |
 | llvm/test/CodeGen/AArch64/shift-mod.ll |
Commit
7fb66d4035960b3c2797eae73d79b8478ff0348e
by fraser[MemCpyOpt] Fix a variety of scalable-type crashes
This patch fixes a variety of crashes resulting from the `MemCpyOptPass` casting `TypeSize` to a constant integer, whether implicitly or explicitly.
Since the `MemsetRanges` requires a constant size to work, all but one of the fixes in this patch simply involve skipping the various optimizations for scalable types as cleanly as possible.
The optimization of `byval` parameters, however, has been updated to work on scalable types in theory. In practice, this optimization is only valid when the length of the `memcpy` is known to be larger than the scalable type size, which is currently never the case. This could perhaps be done in the future using the `vscale_range` attribute.
Some implicit casts have been left as they were, under the knowledge they are only called on aggregate types. These should never be scalably-sized.
Reviewed By: nikic, tra
Differential Revision: https://reviews.llvm.org/D109329
|
 | llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp |
 | llvm/include/llvm/Transforms/Scalar/MemCpyOptimizer.h |
 | llvm/test/Transforms/MemCpyOpt/vscale-crashes.ll |
Commit
98380762c3b734c23d206182605ab9e035c93caa
by Saiyedul.Islam[clang-offload-bundler] Make Bundle Entry ID backward compatible
Earlier BundleEntryID used to be <OffloadKind>-<Triple>-<GPUArch>. This used to work because the clang-offload-bundler didn't need GPUArch explicitly for any bundling/unbundling action. With unbundleArchive it needs GPUArch to ensure compatibility between device specific code objects. D93525 enforced triples to have separators for all 4 components irrespective of number of components, like "amdgcn-amd-amdhsa--". It was required to to correctly parse a possible 4th environment component or a GPU. But, this condition is breaking backward compatibility with archive libraries compiled with compilers older than D93525.
This patch allows triples to have any number of components with and without extra separator for empty environment field. Thus, both the following bundle entry IDs are same: openmp-amdgcn-amd-amdhsa--gfx906 openmp-amdgcn-amd-amdhsa-gfx906
Reviewed By: yaxunl, grokos
Differential Revision: https://reviews.llvm.org/D106809
|
 | clang/test/Driver/clang-offload-bundler.c |
 | clang/lib/Driver/ToolChains/Clang.cpp |
 | clang/docs/ClangOffloadBundler.rst |
 | clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp |
 | clang/test/Driver/hip-rdc-device-only.hip |
 | clang/test/Driver/hip-toolchain-rdc-separate.hip |
Commit
93b09a2a5d787beda3252a8c2662d19a44527881
by eleviant[LiveDebugValues] Handle spills of indirect debug values correctly
When handling register spill for indirect debug value LiveDebugValues pass doesn't add DW_OP_deref operator which may in some cases cause debugger to return value address, instead of value while machine register holding that address is spilled.
Differential revision: https://reviews.llvm.org/D109142
|
 | llvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir |
 | llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp |
Commit
a1e8b754ebb082dfd493ad19b86fa53676938351
by sjoerd.meijer[FuncSpec] Fix test case: only run funcspec and not any other passes. NFC.
|
 | llvm/test/Transforms/FunctionSpecialization/function-specialization.ll |
Commit
d8d24c64fe21948d0d4faf60e7a0ce6ba21b0b1a
by david.green[DAG] Fix GT -> GE condition when creating SetCC
79845ed6dfc6511f99 folded some setcc(ashr) conditions to setcc, but got the condition for NE incorrect, using GT where it should be using GE.
|
 | llvm/test/CodeGen/AArch64/select-constant-xor.ll |
 | llvm/test/CodeGen/RISCV/select-constant-xor.ll |
 | llvm/test/CodeGen/X86/select-constant-xor.ll |
 | llvm/test/CodeGen/AMDGPU/select-constant-xor.ll |
 | llvm/test/CodeGen/ARM/select-constant-xor.ll |
 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
 | llvm/test/CodeGen/PowerPC/select-constant-xor.ll |
Commit
88a203120790ff273d545c6f8f05e2b66c5ed9e3
by sjoerd.meijer[FuncSpec] Fix typo in option description. NFC.
|
 | llvm/lib/Transforms/IPO/FunctionSpecialization.cpp |
Commit
35cc4ad3541623fc3823e54849adcfbe1a7c6318
by llvm-dev[X86] Add AVX2 test coverage to combine-concatvectors.ll
This will be useful as part of D109348
|
 | llvm/test/CodeGen/X86/combine-concatvectors.ll |
Commit
b026ce9c8a81a3be4cd2212a97e8b5d609631334
by peter.smith[MC] Add Subtarget for MAsmParser call to emitCodeAlignment
The call to emitCodeAlignment was missing a STI which is required after D45962.
emitCodeAlignment has a default parameter of 0 for MaxBytesToEmit. Explicitly passing 0 here was interpreted as as nullptr for the STI. This could possibly be avoided by taking STI as a const reference in emitCodeAlignment.
Differential Revision: https://reviews.llvm.org/D109425
|
 | llvm/lib/MC/MCParser/MasmParser.cpp |
Commit
1524b0154116e2a404dba12c7f9f64c5c8533955
by uday[MLIR] Add loop coalesce utility for affine.for
Add loop coalesce utility for affine.for. This expects loops to have been normalized a-priori. This works for both constant as well non constant upper bounds having single/multiple result upper bound affine map.
With contributions from Arnab Dutta and Uday Bondhugula.
Reviewed By: bondhugula, ayzhuang
Differential Revision: https://reviews.llvm.org/D108126
|
 | mlir/lib/Transforms/LoopCoalescing.cpp |
 | mlir/lib/Transforms/Utils/LoopUtils.cpp |
 | mlir/test/Transforms/loop-coalescing.mlir |
 | mlir/include/mlir/Transforms/LoopUtils.h |
Commit
4e0ea2cf2e7c5f04c526f5476eff70280f3c0871
by Louis Dionne[libc++] Use enable_if_t instead of _EnableIf
I just ran into a compiler error involving __bind_back and some overloads that were being disabled with _EnableIf. I noticed that the error message was quite bad and did not mention the reason for the overload being excluded. Specifically, the error looked like this:
candidate template ignored: substitution failure [with _Args = <ContiguousView>]: no member named '_EnableIfImpl' in 'std::_MetaBase<false>'
Instead, when using enable_if or enable_if_t, the compiler is clever and can produce better diagnostics, like so:
candidate template ignored: requirement 'is_invocable_v< std::__bind_back_op<1, std::integer_sequence<unsigned long, 0>>, std::ranges::views::__transform::__fn &, std::tuple<PlusOne> &, ContiguousView>' was not satisfied [with _Args = <ContiguousView>]
Basically, it tries to do a poor man's implementation of concepts, which is already a lot better than simply complaining about substitution failure.
Hence, this commit uses enable_if_t instead of _EnableIf whenever possible. That is both more straightforward than using the internal helper, and also leads to better error messages in those cases.
I understand the motivation for _EnableIf's implementation was to improve compile-time performance, however I believe striving to improve error messages is even more important for our QOI, hence this patch. Furthermore, it is unclear that _EnableIf actually improved compile-time performance in any noticeable way (see discussion in the review for details).
Differential Revision: https://reviews.llvm.org/D108216
|
 | libcxx/include/array |
 | libcxx/include/queue |
 | libcxx/include/type_traits |
 | libcxx/include/stack |
 | libcxx/include/__functional/not_fn.h |
 | libcxx/include/deque |
 | libcxx/include/optional |
 | libcxx/include/set |
 | libcxx/include/__memory/construct_at.h |
 | libcxx/include/map |
 | libcxx/include/unordered_map |
 | libcxx/include/__functional/perfect_forward.h |
 | libcxx/include/__functional/bind_back.h |
 | libcxx/include/forward_list |
 | libcxx/include/__functional/bind_front.h |
 | libcxx/include/list |
 | libcxx/include/unordered_set |
 | libcxx/include/vector |
 | libcxx/include/bit |
 | libcxx/include/cmath |
 | libcxx/include/string |
Commit
2c6d90d7410b77798699ff2fff4182d83db79164
by mgorny[lldb] [Commands] Remove 'append' from 'platform file open' mode
Remove File::eOpenOptionAppend from the mode used by 'platform file open' command. According to POSIX, O_APPEND causes all successive writes to be done at the end of the file. This effectively makes the offset argument to 'platform file write' meaningless.
Furthermore, apparently O_APPEND is not implemented reliably everywhere. The Linux manpage for pwrite(2) suggests that Linux does respect O_APPEND there while according to POSIX it should not, so the actual behavior would be dependent on how the vFile:pwrite packet is implemented on the server.
Ideally, the mode used for opening flags would be provided via options. However, changing the default mode seems to be a reasonable intermediate solution.
Differential Revision: https://reviews.llvm.org/D107664
|
 | lldb/test/API/functionalities/gdb_remote_client/TestGDBRemotePlatformFile.py |
 | lldb/source/Commands/CommandObjectPlatform.cpp |
Commit
d40108e0af08389a791c7b6783f416486068be96
by Andrey.Churbanov[OpenMP] libomp: runtime part of omp_all_memory task dependence implementation.
New omp_all_memory task dependence type is implemented. Library recognizes the new type via either (dependence_address == NULL && dependence_flag == 0x80) or (dependence_address == SIZE_MAX). A task with new dependence type depends on each preceding task with any dependence type (kind of a dependence barrier).
Differential Revision: https://reviews.llvm.org/D108574
|
 | openmp/runtime/src/kmp_taskdeps.h |
 | openmp/runtime/test/tasking/kmp_task_depend_all.c |
 | openmp/runtime/src/kmp_taskdeps.cpp |
 | openmp/runtime/src/kmp.h |
 | openmp/runtime/test/tasking/kmp_taskwait_depend_all.c |
Commit
5639946d896ef0d6aafb92290c235b106e1b5495
by spatel[InstCombine] remove unnecessary instructions from test; NFC
|
 | llvm/test/Transforms/InstCombine/zext.ll |
Commit
b041b613e6fff713fc9ad6dbc73024286fb2fc93
by spatel[InstCombine] add test for zext with 'or' op; NFC
|
 | llvm/test/Transforms/InstCombine/zext.ll |
Commit
219a1d217dd95f98612f7ac5d8f25b737c7f5e8b
by gchatelet[libc] Fix running benchmarks under msan/asan
asan/msan intercepts `aligned_malloc` and misbehave when the requested alignment is greater than 512. https://github.com/llvm/llvm-project/blob/b041b613e6fff713fc9ad6dbc73024286fb2fc93/compiler-rt/lib/asan/asan_allocator.cpp#L430-L431
|
 | libc/benchmarks/LibcMemoryBenchmark.h |
Commit
dea76ccaf40f1762915213d0ea91d0c707705683
by arjunpitchanathan[MLIR] FlatAffineConstraints: Refactored computation of explicit representation for identifiers
This patch refactors the existing implementation of computing an explicit representation of an identifier as a floordiv in terms of other identifiers and exposes this computation as a public function.
The computation of this representation is required to support local identifiers in PresburgerSet subtract, complement and isEqual.
Reviewed By: bondhugula, arjunp
Differential Revision: https://reviews.llvm.org/D106662
|
 | mlir/unittests/Analysis/AffineStructuresTest.cpp |
 | mlir/include/mlir/Analysis/AffineStructures.h |
 | mlir/lib/Analysis/AffineStructures.cpp |
Commit
608338cca579900a85f60a501adf6fa3789999c5
by Andrey.Churbanov[OpenMP][NFC] Added comment on OpenMP 5.0 task affinity pilot implementation
|
 | clang/docs/OpenMPSupport.rst |
Commit
d2189b5c4b011201f784ed7f503287c543076f91
by david.spickett[lldb] Remove unused GDBRemoteCommunicationClient::SendAttach function
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D109427
|
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h |
Commit
480a5a2d96c59572a1900d42aca50953ddc11055
by Saleem AbdulrasoolIR: move the declaration of `VerifyDomInfo` (NFC)
This moves the declaration of `VerifyDomInfo` into `llvm/IR/Dominators.h` from `llvm/Support/Debug.h`. Although this is a debugging utility, the definition of the symbol is in LLVMIR, not in LLVMSupport. This moves the declaration to the containing modules' header.
Reviewed By: rnk, mehdhi_amini
Differential Revision: https://reviews.llvm.org/D109395
|
 | llvm/include/llvm/IR/Dominators.h |
 | llvm/include/llvm/Support/Debug.h |
Commit
bcfbb3f9ec83b775183ce464f1ce169e844312d9
by kazu[IR] Construct SmallVector with iterator ranges (NFC)
Note that arg_operands has been deprecated in favor of args.
|
 | llvm/lib/IR/AutoUpgrade.cpp |
Commit
c172f1ad39cbc1f4b3aa2d57c18dbe4c986151b9
by andrew.litteken[IROutliner] Adding supports for multiple exits
When we start outlining across branches, there is the possibility that we will have two different blocks with different output locations, or a single branch that goes to two blocks outside of the region that is being outlined. While the CodeExtractor provides most of the mechanisms by using the return value of the extracted function as the input to a switch statement to correctly branch to the correct location, we need special handling for different output schemas to each location.
This is done by repeating the existing storing scheme for each different exit block. We have a map from the return values used, to the basic block that is used to store the outputs for that particular exit block within the outlined function. Then if needed, we create a switch statement for each return block to branch to the correct set of stored outputs.
Reviewers: paquette
Differential Revision: https://reviews.llvm.org/D106993
|
 | llvm/test/Transforms/IROutliner/outlining-multiple-exits.ll |
 | llvm/lib/Transforms/IPO/IROutliner.cpp |
 | llvm/test/Transforms/IROutliner/outlining-multiple-exits-one-output-set.ll |
 | llvm/test/Transforms/IROutliner/outlining-exits-to-phi-node.ll |
 | llvm/test/Transforms/IROutliner/outlining-multiple-exits-diff-outputs.ll |
Commit
50467c0852d0f1b46829c45b597c1f5b2dd29893
by a.v.lapshin[llvm-objcopy][NFC] Refactor CopyConfig structure - categorize options.
This patch continues refactoring done by D99055. It puts format specific options into the correponding CopyConfig structures.
Differential Revision: https://reviews.llvm.org/D102277
|
 | llvm/tools/llvm-objcopy/CommonConfig.h |
 | llvm/tools/llvm-objcopy/ConfigManager.cpp |
 | llvm/tools/llvm-objcopy/MachO/MachOObjcopy.h |
 | llvm/tools/llvm-objcopy/ELF/ELFConfig.h |
 | llvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp |
 | llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp |
 | llvm/tools/llvm-objcopy/MachO/MachOConfig.h |
Commit
aecd75f0953e01881c874da20cc2ec8fdf525577
by Saleem AbdulrasoolAnalysis: move declaration of variables to a more suitable location
This moves 2 variable declarations from `llvm/Support/Debug.h` to a more appropriate home in the headers for `LLVMAnalysis`. These variables are defined in `LLVMAnalysis` rather than in `LLVMSupport` and although they control debugging behavior, the declarations being colocated in the same library's headers is both easier to locate and aids correctly describing the library's interfaces.
Reviewed By: rnk, mehdi_amini, aeubanks
Differential Revision: https://reviews.llvm.org/D109396
|
 | llvm/include/llvm/Analysis/MemorySSA.h |
 | llvm/include/llvm/Support/Debug.h |
 | llvm/include/llvm/Analysis/LoopInfo.h |
Commit
a30dbbe9241fa72580638eb08468d3e6a39cf2b0
by mascasaRedistribute energy for Corpus
I found that the initial corpus allocation of fork mode has certain defects. I designed a new initial corpus allocation strategy based on size grouping. This method can give more energy to the small seeds in the corpus and increase the throughput of the test.
Fuzzbench data (glibfuzzer is -fork_corpus_groups=1): https://www.fuzzbench.com/reports/experimental/2021-08-05-parallel/index.html
Reviewed By: morehouse
Differential Revision: https://reviews.llvm.org/D105084
|
 | compiler-rt/lib/fuzzer/FuzzerFlags.def |
 | compiler-rt/lib/fuzzer/FuzzerOptions.h |
 | compiler-rt/test/fuzzer/fork_corpus_groups.test |
 | compiler-rt/lib/fuzzer/FuzzerFork.cpp |
 | compiler-rt/lib/fuzzer/FuzzerDriver.cpp |
Commit
1f161919065fbfa2b39b8f373553a64b89f826f8
by craig.topper[RISCV] Add an GPR def to the Zvlseg SPILL/RELOAD pseudos
The expansion of these pseudos creates ADD instructions. Those ADDs modify a GPR so that it is no longer contains the same value as the input base pointer. Therefore, I believe we should have a GPR as a Def on these instructions and expansion should get the destination register for the ADDs from that operand.
At least in our tests here this works out so that register scavenging picks the same register as the base pointer.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D109405
|
 | llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
 | llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp |
 | llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir |
 | llvm/lib/Target/RISCV/RISCVInstrInfo.cpp |
Commit
0852f8706b769c5e648defd40ff825a553d3cd98
by lebedev.ri[X86] X86DAGToDAGISel::matchBitExtract(): support 'num high bits to clear' pattern
Currently, we only deal with the case where we can match the number of low bits to be kept, i.e.: ``` x & ((1 << y) - 1) ``` will extract low `y` bits of `x`.
But what will ``` x & (-1 >> y) ``` do?
Logically, it will extract `bitwidth(x) - y` low bits, i.e.: ``` x & ~(-1 << (bitwidth(x)-y)) ``` ... except we can't do such a transformation in IR in general, because if we wanted to extract all the bits `(-1 >> 0)` is fine, but `-1 << bitwidth(x)` would be `poison`: https://alive2.llvm.org/ce/z/BKJZfw,
Yet, here with BMI's BEXTR and BMI2's BZHI we don't have any such problems with edge-cases. So what we can do is: https://alive2.llvm.org/ce/z/gm5M2B
As briefly discussed with @craig.topper, this appears to be not worse than what we'd end up with currently (a pair of shifts): * https://godbolt.org/z/nsPb8bejs (direct data dependency, sequential execution) * https://godbolt.org/z/7bj3zeh1d (no direct data dependency, parallel execution)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D107923
|
 | llvm/test/CodeGen/X86/clear-highbits.ll |
 | llvm/lib/Target/X86/X86ISelDAGToDAG.cpp |
Commit
373b7622c1e1bf66e01db0758a121b47c283874b
by benny.kra[IROutliner] Remove unused variable. NFC.
|
 | llvm/lib/Transforms/IPO/IROutliner.cpp |
Commit
b04c09c07cfa073984b94dc1c8041201f43274d4
by craig.topper[RISCV] Use V0 instead of VMV0: for mask vectors in isel patterns.
This is consistent with the RVV intrinsic patterns. This has been shown to prevent some "ran out of registers" errors in our internal testing.
Unfortunately, there are some regressions on LMUL=8 tests in here. I think the lack of registers with LMUL=8 just makes it very hard to schedule correctly.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D109245
|
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll |
 | llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td |
 | llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll |
 | llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll |
 | llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td |
 | llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll |
Commit
f428625e2b91dc54c4ca9652ab6fdabb25304f00
by ndesaulniers[ISEL][BitTestBlock] pre-commit test for D109103
Upload a test that shows ISEL taking a SwitchInst that has an unreachable BB for a default target being lowered to an unconditional jump off the end of a function.
Link: https://bugs.llvm.org/show_bug.cgi?id=50080 Link: https://github.com/ClangBuiltLinux/linux/issues/679 Link: https://github.com/ClangBuiltLinux/linux/issues/1440
Reviewed By: craig.topper, hans
Differential Revision: https://reviews.llvm.org/D109106
|
 | llvm/test/CodeGen/X86/switch-bit-test-unreachable-default.ll |
 | llvm/test/CodeGen/X86/SwitchLowering.ll |
Commit
71841146b6222ef7eea06b9facd94d0e0c29c62b
by Dan LiewFix `asan/TestCases/Darwin/scrible.cpp` to work on platforms where `long` is not 64-bits.
Previously the test was failing on platforms where `long` was less than 64-bits wide (e.g. older WatchOS simulators and arm64_32) because the `padding` field was too small.
The test currently relies on the `my_object->isa` being scribbled or left unmodified after `my_object` is freed. However, this was not the case because the `isa` pointer intersected with `ChunkHeader::free_context_id`. `free_context_id` starts at the beginning of user memory but it only initialized once the memory is freed. This caused the `isa` pointer to change after it was freed leading to the test crashing.
To fix this the `padding` field has been made explicitly 64-bits wide (same size as `ChunkHeader::free_context_id`).
rdar://75806757
Differential Revision: https://reviews.llvm.org/D109409
|
 | compiler-rt/test/asan/TestCases/Darwin/scribble.cpp |
Commit
6f1f30a95708e847745cbe6b3703be67c16f9847
by joker.ephAdd sanity check in MLIR ODS to catch case where two operands have the same name
This is making a tablegen crash into a more friendly error.
Differential Revision: https://reviews.llvm.org/D109449
|
 | mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp |
Commit
aca14c8cf169bcd1b51f8074c422959cc19b6779
by craig.topper[RISCV] Remove unused tablegen template parameters. NFC
Identified in D109359
|
 | llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td |
 | llvm/lib/Target/RISCV/RISCVInstrInfoV.td |
 | llvm/lib/Target/RISCV/RISCVRegisterInfo.td |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
Commit
ac4896e2f37296ef47aa6f03723d275de23180f7
by Jessica Paquette[GlobalISel] Add G_ROTL and G_ROTR to right_identity_zero
Similar to `DAGCombiner::visitRotate`.
This makes `rotl_bitwidth_cst` in postlegalizercombiner-rotate.mir reduce down to a COPY. Modify the checkline to make sure that only rotate_out_of_range runs there.
Differential Revision: https://reviews.llvm.org/D109264
|
 | llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-trivial-arith.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/postlegalizercombiner-rotate.mir |
 | llvm/include/llvm/Target/GlobalISel/Combine.td |
Commit
c189ec2e3f33b5805a1eaa48fe71a60d0a2f55ed
by Saleem AbdulrasoolSupport: hoist `extern template` declarations
Precede the `extern template` declaration prior to use. This is helpful as it prevents the compiler from having to worry about instantiating the template as it will be provided for. This is particularly important for Windows where `__declspec(dllexport)` will traverses inheritance clauses resulting in an incorrect application of dll interface to declarations.
|
 | llvm/include/llvm/Support/CommandLine.h |
Commit
42431b8207a50e2810c9fe2051226e71adb8fc9a
by clattner[tests] Make testsuite more resilient to "order of constant" changes. NFC.
|
 | mlir/test/Dialect/GPU/all-reduce.mlir |
 | mlir/test/Dialect/Linalg/loops.mlir |
 | mlir/test/Dialect/Math/polynomial-approximation.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_lower.mlir |
 | mlir/test/Dialect/Linalg/generalize-pad-tensor.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_2d.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_out.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_lower_inplace.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_3d.mlir |
 | mlir/test/Dialect/Linalg/bufferize.mlir |
 | mlir/test/Dialect/Vector/vector-contract-transforms.mlir |
 | mlir/test/Dialect/GPU/all-reduce-max.mlir |
 | mlir/test/Dialect/SPIRV/Transforms/canonicalize.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_1d.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_int_ops.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_lower_col.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_perm.mlir |
 | mlir/test/Dialect/SparseTensor/sparse_fp_ops.mlir |
 | mlir/test/Dialect/Shape/canonicalize.mlir |
Commit
c00cb52854e7cb33c07217e4acac859e13abb239
by craig.topper[RISCV] Pre-commit tests for D109394. NFC
|
 | llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll |
Commit
16bf43398a62604e6a4146deeb1c43dfa1e78e04
by arthur.j.odwyer[libc++] Comma-operator-proof a lot of algorithm/container code.
Detected by evil-izing the widely used `MoveOnly` testing type. I had to patch some tests that were themselves using its comma operator, but I think that's a worthwhile cost in order to catch more places in our headers that needed comma-proofing.
The trick here is that even `++ptr, SomeClass()` can find a comma operator by ADL, if `ptr` is of type `Evil*`. (A comma between two operands of non-class-or-enum type is always treated as the built-in comma, without ADL. But if either operand is class-or-enum, then ADL happens for _both_ operands' types.)
Differential Revision: https://reviews.llvm.org/D109414
|
 | libcxx/include/list |
 | libcxx/test/std/containers/sequences/deque/deque.modifiers/insert_iter_iter.pass.cpp |
 | libcxx/test/std/containers/sequences/deque/deque.modifiers/push_back_rvalue.pass.cpp |
 | libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/move.pass.cpp |
 | libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/move_alloc.pass.cpp |
 | libcxx/test/std/containers/sequences/deque/deque.modifiers/push_front_rvalue.pass.cpp |
 | libcxx/test/std/containers/sequences/deque/deque.modifiers/insert_rvalue.pass.cpp |
 | libcxx/test/support/MoveOnly.h |
 | libcxx/include/__memory/uninitialized_algorithms.h |
 | libcxx/include/__hash_table |
 | libcxx/include/__split_buffer |
 | libcxx/include/string |
 | libcxx/include/vector |
 | libcxx/include/__algorithm/stable_sort.h |
 | libcxx/include/deque |
 | libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/assign_move.pass.cpp |
Commit
26e492e134c006c63b3d9f9f9eabdeba014b1d2c
by Yaxun.Liu[HIP] Warn capture this pointer in device lambda
HIP currently diagnose capture of this pointer in device lambda in host member functions. If this pointer points to managed memory, it can be used in both device and host functions. Under this situation, capturing this pointer in device lambda functions in host member functions is valid usage. Change the diagnostic about capturing this pointer to warning.
Reviewed by: Artem Belevich
Differential Revision: https://reviews.llvm.org/D108493
|
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/test/SemaCUDA/lambda.cu |
 | clang/lib/Sema/SemaCUDA.cpp |
Commit
a99fb86c655660601ac0c3ef2ee65fd92f26e3c6
by aardappel[WebAssembly] Change WebAssemblyMCLowerPrePass to ModulePass
It was a FunctionPass before, which subverted its purpose to collect ALL symbols before MCLowering, depending on how LLVM schedules function passes. Fixes https://bugs.llvm.org/show_bug.cgi?id=51555
Differential Revision: https://reviews.llvm.org/D109202
|
 | llvm/test/MC/WebAssembly/stack-ptr-mclower.ll |
 | llvm/lib/Target/WebAssembly/WebAssemblyMCLowerPrePass.cpp |
 | llvm/lib/Target/WebAssembly/WebAssembly.h |
Commit
3f875134a7ce7285f4d5484fc0551b14076463e6
by kstoimenov[asan] Fixed the jump to use the 4 byte offset version.
This should have been the 4 byte version in the first place. Unfortunatelly there is no easy way to add a test as both the 1 byte and 4 byte version are printed as 'jmp' in the assembly code.
Reviewed By: kda
Differential Revision: https://reviews.llvm.org/D109453
|
 | llvm/lib/Target/X86/X86MCInstLower.cpp |
Commit
4331f19d8b9ac8101d55073834b35814afce4e5a
by ndesaulniers[ISEL][BitTestBlock] omit additional bit test when default destination is unreachable
Otherwise we end up with an extra conditional jump, following by an unconditional jump off the end of a function. ie.
bb.0: BT32rr .. JCC_1 %bb.4 ... bb.1: BT32rr .. JCC_1 %bb.2 ... JMP_1 %bb.3 bb.2: ... bb.3.unreachable: bb.4: ...
Should be equivalent to: bb.0: BT32rr .. JCC_1 %bb.4 ... JMP_1 %bb.2 bb.1: bb.2: ... bb.3.unreachable: bb.4: ...
This can occur since at the higher level IR (Instruction) SwitchInsts are required to have BBs for default destinations, even when it can be deduced that such BBs are unreachable.
For most programs, this isn't an issue, just wasted instructions since the unreachable has been statically proven.
The x86_64 Linux kernel when built with CONFIG_LTO_CLANG_THIN=y fails to boot though once D106056 is re-applied. D106056 makes it more likely that correlation-propagation (CVP) can deduce that the default case of SwitchInsts are unreachable. The x86_64 kernel uses a binary post processor called objtool, which emits this warning:
vmlinux.o: warning: objtool: cfg80211_edmg_chandef_valid()+0x169: can't find jump dest instruction at .text.cfg80211_edmg_chandef_valid+0x17b
I haven't debugged precisely why this causes a failure at boot time, but fixing this very obvious jump off the end of the function fixes the warning and boot problem.
Link: https://bugs.llvm.org/show_bug.cgi?id=50080 Fixes: https://github.com/ClangBuiltLinux/linux/issues/679 Fixes: https://github.com/ClangBuiltLinux/linux/issues/1440
Reviewed By: hans
Differential Revision: https://reviews.llvm.org/D109103
|
 | llvm/test/CodeGen/X86/switch-bit-test-unreachable-default.ll |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |
 | llvm/test/CodeGen/X86/SwitchLowering.ll |
 | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp |
 | llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp |
Commit
c38ab8275e715e686db9120796f26dbd47440656
by Amara Emerson[GlobalISel] Use a typedef for builder function matchinfos for brevity. NFC.
|
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
Commit
303b27f21b98a45621d39f941c88c7e30d69fbe7
by apl[lldb] Delete IRExecutionUnit::SearchSpec
IRExecutionUnit::SearchSpec is a struct that encapsulates information needed to look for a symbol. Specifically, it is comprised of a name represented with a ConstString and a FunctionNameType mask. Because the mask is unused (effectively always set to eFunctionNameTypeFull), we can remove the mask and replace all uses with eFunctionNameTypeFull. After doing that, SearchSpec is effectively a wrapper around a ConstString.
As an aside, SearchSpec is similar in purpose to Module::LookupInfo. I briefly considered replacing uses of SearchSpec with LookupInfo, but the current code only cares about symbol names (treating them as eFunctionNameTypeFull). This code does care about language type, so LookupInfo may be appropriate for IRExecutionUnit in the future.
Differential Revision: https://reviews.llvm.org/D109384
|
 | lldb/source/Expression/IRExecutionUnit.cpp |
 | lldb/include/lldb/Expression/IRExecutionUnit.h |
Commit
e5673564a06b7792c6aa9afe3d82f8b2203f975e
by leonardchan[compiler-rt][Fuchsia] Support building + running compiler-rt tests on fuchsia's host toolchain
Differential Revision: https://reviews.llvm.org/D109199
|
 | clang/cmake/caches/Fuchsia-stage2.cmake |
Commit
6b9a3ec3a260053e4ae63e07372672b62de97eaf
by jhuber6[OpenMP] Do not SPMDize generic regions with no parallel
This patch changes SPMDization to not trigger for regions with no parallelism. Otherwise, this will introduce unnecessary barriers that will slow the single-threaded region down.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D109438
|
 | llvm/test/Transforms/OpenMP/get_hardware_num_threads_in_block_fold.ll |
 | llvm/lib/Transforms/IPO/OpenMPOpt.cpp |
 | llvm/test/Transforms/OpenMP/always_inline_device.ll |
 | llvm/test/Transforms/OpenMP/is_spmd_exec_mode_fold.ll |
Commit
0087bb4a9a733e8f22a9f2a0b1c113236d7da917
by andrew.litteken[IROutliner] Using canonical values to find corresponding values. (NFC)
D104143 introduced canonical value numbering between regions, which allows for the easy identification of items across a region, eliminating the need in the outliner to create parallel lists of instructions for each region, and replace output values in a less convoluted way.
Additionally, in a future commit, the output values will not necessarily be recorded values from the region itself, it could be a combination value where the actual value being output is a PHINode instead. This new method allows us to handle the replacement of the output value to the stored value with the corresponding item in the same place for both normal output values, and PHINode outputs instead of handling the different types of outputs in different locations.
Reviewers: paquette, roelofs
Differential Revision: https://reviews.llvm.org/D108656
|
 | llvm/include/llvm/Transforms/IPO/IROutliner.h |
 | llvm/lib/Transforms/IPO/IROutliner.cpp |
Commit
056d024235f057e1c933a30aabb66e827f957279
by leonardchan[compiler-rt] Use COMPILER_RT_TEST_CXX_COMPILER for linking compiler-rt tests
Before, COMPILER_RT_TEST_COMPILER was used which pointed to a C compiler. While it is incorrect to assume either of these is the default compiler, using the C++ one allows for linking cpp tests.
Differential Revision: https://reviews.llvm.org/D109207
|
 | compiler-rt/cmake/Modules/AddCompilerRT.cmake |
Commit
e170cf506170eda58449ffb80a94659be9fad81a
by leonardchan[compiler-rt][fuzzer] Do not link in libc++ in tests and disable exceptions
Differential Revision: https://reviews.llvm.org/D109208
|
 | compiler-rt/lib/fuzzer/tests/CMakeLists.txt |
Commit
ff77c4eac79c0c1e4d49ec32a88d0e8c0b24abd7
by mascasa[libFuzzer] Add missing argument to CrashResistantMerge.
Fixes a build error caused by a bad merge conflict resolution for https://reviews.llvm.org/D105084.
|
 | compiler-rt/lib/fuzzer/FuzzerFork.cpp |