SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-zorg.git)

Summary

  1. [zorg] Add buildbot for HIP (details)
Commit c531f51254be7309a3c698db86512ed4a90fa94b by enye.shi
[zorg] Add buildbot for HIP

Build HIP tests from llvm-test-suite using AMDGPU.
Will be extended to build external repo.

Reviewed by: gkistanova

Differential Revision: https://reviews.llvm.org/D99894
The file was modifiedbuildbot/osuosl/master/config/status.py
The file was modifiedbuildbot/osuosl/master/config/builders.py
The file was modifiedbuildbot/osuosl/master/config/workers.py

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [InstCombine] Fixed crash when setting align attr for memalign (details)
  2. Reland "[Clang] Propagate guaranteed alignment for malloc and others" (details)
  3. [InstCombine][NFC] add tests for printf("%s", str) --> puts(str)/noop transformation. (details)
  4. [InstCombine] Fixed newly added tests; NFC (details)
  5. [llvm][NFC] Fix assert indentation (details)
  6. AMDGPU: Fix assert on inline asm on gfx90a (details)
  7. [X86] combineSetCCAtomicArith - pull out repeated ops. NFCI. (details)
  8. [lld-macho] Have tests default to targeting macos 10.15 (details)
  9. [InstCombine] Added tests for PR50096; NFC (details)
  10. [OpenCL] Fix typo in the test. (details)
  11. [OpenMP] Replace global InfoLevel with a reference to an internal one. (details)
  12. [TableGen] [docs] Improve description of NAME in Programmer's Reference (details)
  13. [X86] Add Win32/64 mulo test coverage (details)
  14. [TableGen] Correct some comments in the TableGen parser [NFC] (details)
  15. [AMDGPU] Save WWM registers in functions (details)
  16. [Hexagon] Remove redundant HVX intrinsic selection patterns, NFC (details)
  17. [AMDGPU][NFC] Update auto-gen test (details)
  18. Revert "[AMDGPU] Save WWM registers in functions" (details)
  19. [AMDGPU] Fix typo in implicit operand lists (details)
  20. [AArch64][SVE] Fix bug in lowering of fixed-length integer vector divides (details)
  21. [TTI] Fix ScalarizationCost initialization. (details)
  22. [TTI] NFC: Use InstructionCost to store ScalarizationCost in IntrinsicCostAttributes. (details)
  23. [TTI] NFC: Change getAddressComputationCost to return InstructionCost (details)
  24. [TTI] NFC: Change getGEPCost to return InstructionCost (details)
  25. [TTI] NFC: Change getMemcpyCost to return InstructionCost (details)
  26. [TTI] NFC: Change getScalingFactorCost to return InstructionCost (details)
  27. [TTI] NFC: Change getIntImmCost[Inst|Intrin] to return InstructionCost (details)
  28. [flang] Switch from %f18 to %flang_fc1 in a test (details)
  29. [AST] Sort introspection results without instantiating other data (details)
  30. [Analyzer][StdLibraryFunctionsChecker] Describe arg constraints (details)
  31. fix comment typo to cycle bots (details)
  32. [CostModel][X86] Improve v2f32 fadd reduction cost (details)
  33. [cmake] Configure policy CMP0116 (details)
  34. [PowerPC] Add vec_ctsl and vec_ctul to altivec.h (details)
  35. [TableGen] [docs] Improve BNF for the 'multiclass' statement [NFC] (details)
  36. [AMDGPU] Save WWM registers in functions (details)
  37. [libcxx] Fixed build break on buildbots with -Werror (details)
  38. [Clang] Allow the combination of loader_uninitialized and address spaces (details)
  39. [OpenMP] Avoid reading uninitialized parallel level values (details)
  40. [VPlan] Add GraphTraits impl to traverse through VPRegionBlock. (details)
  41. scudo: Store header on deallocation before retagging memory. (details)
  42. [RISCV] Have assembler check that the temp register is different than dest register for vmsgeu.vx pseudo. (details)
  43. [RISCV] Remove GetVRegNoV0 from the output register class of masked compare pseudo instructions. (details)
  44. Drop a REQUIRES: lldb on a dexter regression test (details)
  45. [libc++] Rewrite the tuple constructors to be strictly Standards conforming (details)
  46. [AST] Update tests to query for introspection support (details)
  47. [NFC] Use hasSection instead of getSection().empty() (details)
  48. Mark type test intrinsics as speculatable to fix inline cost (details)
  49. [PR49761] Fix variadic arg handling in matcher (details)
  50. [Scudo] Use GWP-ASan's aligned allocations and fixup postalloc hooks. (details)
  51. [InstCombine] add test for ctpop; NFC (details)
  52. [InstCombine] fold 'not' of ctpop in parity pattern (details)
  53. Revert "[X86][AMX] Try to hoist AMX shapes' def" (details)
  54. [OpenMP] Fix -Wdeprecated-copy (details)
  55. [hwasan] Remove untagging of kernel-consumed memory (details)
  56. [CSSPGO]  Fix incorrect prorating indirect call distribution factor that leads to target count loss. (details)
  57. scudo: Work around gcc 8 conversion warning. (details)
  58. [lld/mac] Support more flags for --reproduce (details)
  59. [mlir] Add block arguments for input/output operands of 'linalg.tiled_loop`. (details)
  60. [Docs] Updated LLVM_TARGETS_TO_BUILD section in GettingStarted.rst (details)
  61. [InstCombine] X - usub.sat(X, Y) => umin(X, Y) (details)
  62. [clangd] Allow AST request without range (details)
  63. [libcxx][nfc] Add license to `pointer_comparison_test_helper.h` (details)
  64. [mlir][tosa] Add tosa.resize lowering to linalg generic (details)
  65. [PowerPC] Provide XL-compatible builtins in altivec.h (details)
  66. [SCEV] Add loop guard tests for ugt/uge predicates (NFC) (details)
  67. [WebAssembly] Finalize wasm_simd128.h intrinsics (details)
  68. Enable AST introspection on non-X86 (details)
  69. Thread safety analysis: Simplify intersectAndWarn (NFC) (details)
  70. [CSSPGO] Fix missing debug info of dangling pseudo probe (details)
  71. [utils] Disable -Wdeprecated-copy for googlemock/gtest (details)
  72. [lld-macho]][nfc] Fix some typos + rephrase a comment (details)
  73. [lld-macho] Fix use-after-free in loadDylib() (details)
  74. [RISCV] Only expose one interface for getContainerForFixedLengthVector in the RISCVTargetLowering class (details)
  75. [RISCV] Move getLMULForFixedLengthVector out of RISCVSubtarget. (details)
  76. Implement N3644 "Null Forward Pointers" in _LIBCPP_DEBUG mode. (details)
  77. Require asserts for test that uses debug flag (details)
  78. Revert "[Scudo] Use GWP-ASan's aligned allocations and fixup postalloc hooks." (details)
  79. [clang][amdgpu] Use implicit code object version (details)
Commit 5f77e7708aa76a250d649845acf408b9564b514f by Dávid Bolvanský
[InstCombine] Fixed crash when setting align attr for memalign
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/test/Transforms/InstCombine/deref-alloc-fns.ll
Commit 2cae7025c1d9e83d971f670c9a66497a8c1094ec by Dávid Bolvanský
Reland "[Clang] Propagate guaranteed alignment for malloc and others"

This relands commit 6914a0ed2b30924b188968e59a83efa07ac5fe57. Crash in InstCombine was fixed.
The file was modifiedclang/lib/CodeGen/CGCall.cpp
The file was addedclang/test/CodeGen/alloc-fns-alignment.c
The file was modifiedclang/include/clang/Basic/TargetInfo.h
Commit 05c912a439cc5ef0f76888e59188582f35fdc0bc by Dávid Bolvanský
[InstCombine][NFC] add tests for printf("%s", str) --> puts(str)/noop transformation.

Split off from D100724.

Reviewed By: xbolva00

Differential Revision: https://reviews.llvm.org/D101149
The file was modifiedllvm/test/Transforms/InstCombine/printf-2.ll
Commit 8a9fbaa0715baf9461dae899f8f20fc564917230 by Dávid Bolvanský
[InstCombine] Fixed newly added tests; NFC
The file was modifiedllvm/test/Transforms/InstCombine/printf-2.ll
Commit e60d6e91e196d91a1b9bfcc93d9f43946ea29299 by tbaeder
[llvm][NFC] Fix assert indentation

This triggers GCC's misleading-indentation checker.
The file was modifiedllvm/lib/Transforms/Scalar/MergeICmps.cpp
Commit b58332774f85efc1d7b88cd7985a93b63bf8de74 by Matthew.Arsenault
AMDGPU: Fix assert on inline asm on gfx90a

This was assuming all mayLoad instructions have one def.
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was addedllvm/test/CodeGen/AMDGPU/swdev282079.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/swdev282079.mir
Commit 7b32e8b96a29e7c90521019915fe73634354cb5c by llvm-dev
[X86] combineSetCCAtomicArith - pull out repeated ops. NFCI.

Reduces diff in D101074
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit fd28f71872f74cfa23f676e87e1c27c4431d6dfa by jezng
[lld-macho] Have tests default to targeting macos 10.15

D101114 enforced proper version checks, which exposed a variety of version
mismatch issues in our tests. We previously changed the test inputs to
target 10.0, which was the simpler thing to do, but we should really
just have our lit.local.cfg default to targeting 10.15, which is what is done
here. We're not likely to ever have proper support for the older versions
anyway, as that would require more work for unclear benefit; for instance,
llvm-mc seems to generate a different compact unwind format for older macOS
versions, which would cause our compact-unwind.s test to fail.

Targeting 10.15 by default causes the following behavioral changes:
* `__mh_execute_header` is now a section symbol instead of an absolute symbol
* LC_BUILD_VERSION gets emitted instead of LC_VERSION_MIN_MACOSX. The former is
  32 bytes in size whereas the latter is 16 bytes, so a bunch of hardcoded
  address offsets in our tests had to be updated.
* >= 10.6 executables are PIE by default

Note that this diff was stacked atop of a local revert of most of the test
changes in rG8c17a875150f8e736e8f9061ddf084397f45f4c5, to make review easier.

Reviewed By: #lld-macho, oontvoo

Differential Revision: https://reviews.llvm.org/D101119
The file was modifiedlld/test/MachO/compact-unwind-generated.test
The file was modifiedlld/test/MachO/compact-unwind.s
The file was modifiedlld/test/MachO/local-got.s
The file was modifiedlld/test/MachO/x86-64-stubs.s
The file was modifiedlld/test/MachO/lc-linker-option.ll
The file was modifiedlld/test/MachO/lto-object-path.ll
The file was modifiedlld/test/MachO/objc.s
The file was modifiedlld/test/MachO/linkonce.ll
The file was modifiedlld/test/MachO/load-command-sequence.s
The file was modifiedlld/test/MachO/lit.local.cfg
The file was modifiedlld/test/MachO/lto-archive.ll
The file was modifiedlld/test/MachO/map-file.s
The file was modifiedlld/test/MachO/module-asm.ll
The file was modifiedlld/test/MachO/invalid/compact-unwind-personalities.s
The file was modifiedlld/test/MachO/symtab.s
The file was modifiedlld/test/MachO/internalize.ll
The file was modifiedlld/test/MachO/invalid/invalid-relocation-pcrel.yaml
The file was modifiedlld/test/MachO/x86-64-relocs.s
The file was modifiedlld/test/MachO/export-trie.s
The file was modifiedlld/test/MachO/invalid/compact-unwind-bad-reloc.s
The file was modifiedlld/test/MachO/x86-64-reloc-unsigned.s
The file was modifiedlld/test/MachO/lto-save-temps.ll
The file was modifiedlld/test/MachO/mh-header-link.s
The file was modifiedlld/test/MachO/t.s
The file was modifiedlld/test/MachO/invalid/invalid-relocation-length.yaml
Commit 2912f42f8439184ff7bb723d43a20778195058d4 by Dávid Bolvanský
[InstCombine] Added tests for PR50096; NFC
The file was modifiedllvm/test/Transforms/InstCombine/ctpop.ll
Commit fcb45b544d3da87e0aab895eaac7903197a6c58c by anastasia.stulova
[OpenCL] Fix typo in the test.
The file was modifiedclang/test/SemaOpenCL/func.cl
Commit 59b68490122ae6ef92b1ebe45e8a5f2f7d88a401 by huberjn
[OpenMP] Replace global InfoLevel with a reference to an internal one.

Summary:
This patch improves the implementation of D100774 by replacing the global
variable introduced with a function that returns a reference to an internal
one. This removes the need to define the variable in every plugin that uses it.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D101102
The file was modifiedopenmp/libomptarget/plugins/generic-elf-64bit/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/remote/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/include/Debug.h
The file was modifiedopenmp/libomptarget/src/interface.cpp
The file was modifiedopenmp/libomptarget/plugins/cuda/src/rtl.cpp
Commit 6a067cdb06a0d7afd2d74ec7303a97403bc096ec by Paul C. Anagnostopoulos
[TableGen] [docs] Improve description of NAME in Programmer's Reference

Also use "parent class" consistently and add a note about the term.

Differential Revision: https://reviews.llvm.org/D100867
The file was modifiedllvm/docs/TableGen/ProgRef.rst
Commit c2da0cdff5683550b0ceb8739c862dc0e4e9b204 by llvm-dev
[X86] Add Win32/64 mulo test coverage

Part of an investigation to solve the windows regressions caused by rG13ec913bdf50
The file was modifiedllvm/test/CodeGen/X86/xmulo.ll
Commit 9d609adcb0b595972e3384c2172bb205677b02fc by Paul C. Anagnostopoulos
[TableGen] Correct some comments in the TableGen parser [NFC]

Differential Revision: https://reviews.llvm.org/D101088
The file was modifiedllvm/lib/TableGen/TGParser.cpp
Commit 91464c30bfcf731ccb7f9d6ef6d26e8c1657a6e6 by sebastian.neubauer
[AMDGPU] Save WWM registers in functions

The values of registers in inactive lanes needs to be saved during
function calls.

Save all registers used for whole wave mode, similar to how it is done
for VGPRs that are used for SGPR spilling.

Differential Revision: https://reviews.llvm.org/D99429
The file was modifiedllvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
The file was addedllvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Commit 8ebdb58aac01484c68106f7566e6d163955ba540 by kparzysz
[Hexagon] Remove redundant HVX intrinsic selection patterns, NFC

Deleted HexagonMapAsm2IntrinV65.gen.td that wasn't included anywhere,
moved V6_vrmpy*_rtt* patterns to HexagonIntrinsics.td.

Touch CMakeLists.txt to force re-cmake (somehow the unused file was
listed as a dependency in the generated makefiles).
The file was modifiedllvm/lib/Target/Hexagon/CMakeLists.txt
The file was modifiedllvm/lib/Target/Hexagon/HexagonIntrinsics.td
The file was removedllvm/lib/Target/Hexagon/HexagonMapAsm2IntrinV65.gen.td
Commit 83a3395b30d2158067ad31e9a7a3e0adfff74139 by Piotr Sobczak
[AMDGPU][NFC] Update auto-gen test

Most likely the "glc" was not added to the test when
the volatile loads started generating those bits.
The file was modifiedllvm/test/CodeGen/AMDGPU/multilevel-break.ll
Commit 22d99cb63f9688039598ed2815424854663fbf48 by sebastian.neubauer
Revert "[AMDGPU] Save WWM registers in functions"

This reverts commit 91464c30bfcf731ccb7f9d6ef6d26e8c1657a6e6.

Seems to break tests on windows.
The file was modifiedllvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
The file was removedllvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Commit 5802cbefc1bffce10ecd0611f08f8433283cdeeb by jay.foad
[AMDGPU] Fix typo in implicit operand lists

Several tests had a typo where they mentioned sgpr17 twice instead of
sgpr17 and sgpr27. This had a significant effect on the
"scavenge_sgpr_pei_no_sgprs" tests because there was actually an sgpr
available, namely sgpr27.

Differential Revision: https://reviews.llvm.org/D100960
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
Commit c19c0ad6813d05802d4f9e7a7d25b897beb87525 by joe.ellis
[AArch64][SVE] Fix bug in lowering of fixed-length integer vector divides

The function AArch64TargetLowering::LowerFixedLengthVectorIntDivideToSVE
previously assumed the operands were full vectors, but this is not
always true. This function would produce bogus if the division operands
are not full vectors, resulting in miscompiles when dividing 8-bit or
16-bit vectors.

The fix is to perform an extend + div + truncate for non-full vectors,
instead of the usual unpacking and unzipping logic. This is an additive
change which reduces the non-full integer vector divisions to a pattern
recognised by the existing lowering logic.

For future reference, an example of code that would miscompile before
this patch is below:

     1  int8_t foo(unsigned N, int8_t *a, int8_t *b, int8_t *c) {
     2      int8_t result = 0;
     3      for (int i = 0; i < N; ++i) {
     4          result += (a[i] / b[i]) / c[i];
     5      }
     6      return result;
     7  }

Differential Revision: https://reviews.llvm.org/D100370
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-rem.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit f79d055791f938236309620d5118556cd8fcbfe2 by daniil.fukalov
[TTI] Fix ScalarizationCost initialization.

In cases when ScalarizationCostPassed has no value, UINT_MAX is actually used
for cost estimation in `return ScalarCalls * ScalarCost + ScalarizationCost`.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D101099
The file was modifiedllvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
Commit 9ab17a60ebf7145bd02578024b76a6191a4fdec5 by daniil.fukalov
[TTI] NFC: Use InstructionCost to store ScalarizationCost in IntrinsicCostAttributes.

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Reviewed By: samparker

Differential Revision: https://reviews.llvm.org/D101151
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
Commit e0edfa052fdb984efb6a746fcbbdc3519433757e by sander.desmalen
[TTI] NFC: Change getAddressComputationCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential Revision: https://reviews.llvm.org/D100561
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
Commit 9ba07f37f8e0641dfc6360ad4a67e0be0bd58267 by sander.desmalen
[TTI] NFC: Change getGEPCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential Revision: https://reviews.llvm.org/D100562
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
Commit 008a072ded63e3342fab94f4923bf3acdac6780e by sander.desmalen
[TTI] NFC: Change getMemcpyCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential Revision: https://reviews.llvm.org/D100563
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
Commit 43ace8b5ce07a90b3562bbd0488f88e6290627c4 by sander.desmalen
[TTI] NFC: Change getScalingFactorCost to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential Revision: https://reviews.llvm.org/D100564
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.h
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
Commit f9a50f04bacdbb4dde147e8994443377f33e5f46 by sander.desmalen
[TTI] NFC: Change getIntImmCost[Inst|Intrin] to return InstructionCost

This patch migrates the TTI cost interfaces to return an InstructionCost.

See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html

Differential Revision: https://reviews.llvm.org/D100565
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.h
The file was modifiedllvm/lib/Transforms/Scalar/ConstantHoisting.cpp
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
Commit 2f67267a93c87261414a4aa4c6cb9d20a489a0df by andrzej.warzynski
[flang] Switch from %f18 to %flang_fc1 in a test

This patch updates the final test that can be shared between the old and
the new Flang drivers and that has not been ported yet. %f18 (always
expanded as `f18`) is replaced with %flang_fc1 (expanded as either `f18`
or `flang-new -fc1`, depending on `FLANG_BUILD_NEW_DRIVER`).

This test should've been updated in https://reviews.llvm.org/D100309,
but I missed it then. That's because this test contains non-ascii
characters and `grep -I %f18` (as well as other grep-like tools) skips
it because it's interpreted as a data/binary file. In fact, it's just a
text file with non-ascii chars.

Since this is an obvious omission from D100309 (reviewed, accepted and
merged), I'm sending this without a review to reduce the noise on
Phabricator.
The file was modifiedflang/test/Evaluate/folding05.f90
Commit 35918bcb6f507cb3d28f80ab4408125ba292400c by steveire
[AST] Sort introspection results without instantiating other data

Avoid string allocation in particular, but also avoid attempting to
impose any particular ordering based on formatted results.

Differential Revision: https://reviews.llvm.org/D101054
The file was modifiedclang/lib/Tooling/NodeIntrospection.cpp
Commit a7cb951fa40df14d98c51059194ae42855b96a08 by gabor.marton
[Analyzer][StdLibraryFunctionsChecker] Describe arg constraints

In this patch, I provide a detailed explanation for each argument
constraint. This explanation is added in an extra 'note' tag, which is
displayed alongside the warning.
Since these new notes describe clearly the constraint, there is no need
to provide the number of the argument (e.g. 'Arg3') within the warning.
However, I decided to keep the name of the constraint in the warning (but
this could be a subject of discussion) in order to be able to identify
the different kind of constraint violations easily in a bug database
(e.g. CodeChecker).

Differential Revision: https://reviews.llvm.org/D101060
The file was addedclang/test/Analysis/std-c-library-functions-arg-constraints-notes.cpp
The file was modifiedclang/test/Analysis/std-c-library-functions-arg-constraints.c
The file was modifiedclang/test/Analysis/std-c-library-functions-arg-constraints.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
Commit fcf59cc917e093980389dd6d124c544ea345fcbf by thakis
fix comment typo to cycle bots
The file was modifiedlld/ELF/Arch/AVR.cpp
Commit 043bc88dbada3efd8bc811efc9fef610f57d47f4 by llvm-dev
[CostModel][X86] Improve v2f32 fadd reduction cost

This was being reported as a similar cost to v4f32 when its a lot cheaper (just a shufps+addps).
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/reduce-fadd.ll
Commit 638d84b60b7e7b7fa9099939ab4de2ec1e0c52c3 by davelee.com
[cmake] Configure policy CMP0116

Using `cmake` >=3.20 results in many warnings about this new policy. This change silences the warnings by explicitly declaring use of the "OLD" behavior.

This policy currently affects only one place: the `tablegen()` function in `TableGen.cmake`.

Differential Revision: https://reviews.llvm.org/D101083
The file was modifiedllvm/CMakeLists.txt
Commit 6725b90a02c6d2696385c0328bd000516913ce4b by nemanja.i.ibm
[PowerPC] Add vec_ctsl and vec_ctul to altivec.h

These are added for compatibility with XLC. They are similar to
vec_cts and vec_ctu except that the result is a doubleword vector
regardless of the parameter type.
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedclang/test/CodeGen/builtins-ppc-vsx.c
The file was modifiedllvm/test/CodeGen/PowerPC/builtins-ppc-elf2-abi.ll
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td
Commit d9187f50b98f14df55a1d9a675b39e7367ac3b43 by Paul C. Anagnostopoulos
[TableGen] [docs] Improve BNF for the 'multiclass' statement [NFC]
The file was modifiedllvm/docs/TableGen/ProgRef.rst
Commit 3366d8115366866a3a14de925b37dea637025919 by sebastian.neubauer
[AMDGPU] Save WWM registers in functions

The values of registers in inactive lanes needs to be saved during
function calls.

Save all registers used for whole wave mode, similar to how it is done
for VGPRs that are used for SGPR spilling.

Differential Revision: https://reviews.llvm.org/D99429

Reapply with fixed tests on window.
The file was addedllvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
Commit 3b71de41cc7c79ca03b0d3a5d7fd383abebf4167 by Dávid Bolvanský
[libcxx] Fixed build break on buildbots with -Werror
The file was modifiedlibcxx/utils/libcxx/test/params.py
Commit cbe8b57a675537183eaf8c32eaa6087cea3fc5da by johannes
[Clang] Allow the combination of loader_uninitialized and address spaces

When an object is allocated in a non-default address space we do not
need to check for a constructor if it is not initialized and has a
trivial constructor (which we won't call then).

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D100929
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/test/CodeGen/attr-loader-uninitialized.c
The file was modifiedclang/test/OpenMP/declare_target_codegen.cpp
The file was modifiedclang/test/Sema/attr-loader-uninitialized.cpp
Commit 17330a3cb13aed9743f3f60eb8310c06aa34f1ca by johannes
[OpenMP] Avoid reading uninitialized parallel level values

In a last minute change request for a2dbfb6b72db we introduced a
read of the uninitialized parallel level value in SPMD-mode.
We go back to initializing the array early and checking for an
adjusted level.

Found by the miniqmc unit tests:
  https://cdash.qmcpack.org/CDash/viewTest.php?onlyfailed&buildid=203434

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D101123
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/omptarget.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/parallel.cu
Commit 89c4dda076e29bb085426a621ea5797ced599f03 by flo
[VPlan] Add GraphTraits impl to traverse through VPRegionBlock.

This patch adds a new iterator to traverse through VPRegionBlocks and a
GraphTraits specialization using the iterator to traverse through
VPRegionBlocks.

Because there is already a GraphTraits specialization for VPBlockBase *
and co, a new VPBlockRecursiveTraversalWrapper helper is introduced.
This allows us to provide a new GraphTraits specialization for that
type. Users can use the new recursive traversal by using this wrapper.

The graph trait visits both the entry block of a region, as well as all
its successors. Exit blocks of a region implicitly have their parent
region's successors. This ensures all blocks in a region are visited
before any blocks in a successor region when doing a reverse post-order
traversal of the graph.

Reviewed By: a.elovikov

Differential Revision: https://reviews.llvm.org/D100175
The file was modifiedllvm/unittests/Transforms/Vectorize/VPlanTest.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
Commit 0a5576ecf05f810065b6562605f1cbe78fee2988 by peter
scudo: Store header on deallocation before retagging memory.

From a cache perspective it's better to store the header immediately
after loading it. If we delay this operation until after we've
retagged it's more likely that our header will have been evicted from
the cache and we'll need to fetch it again in order to perform the
compare-exchange operation.

For similar reasons, store the deallocation stack before retagging
instead of afterwards.

Differential Revision: https://reviews.llvm.org/D101137
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
Commit fae1d31c09172313f96e16791e823ef4b6badc5d by craig.topper
[RISCV] Have assembler check that the temp register is different than dest register for vmsgeu.vx pseudo.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D101015
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
The file was modifiedllvm/test/MC/RISCV/rvv/invalid.s
Commit 3064a63b2b330a229d0b236472549dc832ce1701 by craig.topper
[RISCV] Remove GetVRegNoV0 from the output register class of masked compare pseudo instructions.

Theses instructions are allowed to write v0 when they are masked.
We'll still never use v0 because of the earlyclobber constraint so
this doesn't really help anything. It just makes the definitions
correct.

While I was there remove an unused multiclass I noticed.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D101118
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll
Commit 7deb970efb0f1a7ccb04740710f683e00e005eae by jeremy.morse
Drop a REQUIRES: lldb on a dexter regression test

As this is a test that actually gets to operating the debugger, it
needs to be limited to scenarios where the debugger is available.

(We'll file this in the set of things Dexter doesn't handle gracefully..)
The file was modifieddebuginfo-tests/dexter/feature_tests/subtools/test/label_another_line.cpp
Commit a3ab5120fd572215afeac190757834a041dda73a by Louis Dionne
[libc++] Rewrite the tuple constructors to be strictly Standards conforming

This nasty patch rewrites the tuple constructors to match those defined
by the Standard. We were previously providing several extensions in those
constructors - those extensions are removed by this patch.

The issue with those extensions is that we've had numerous bugs filed
against us over the years for problems essentially caused by them. As a
result, people are unable to use tuple in ways that are blessed by the
Standard, all that for the perceived benefit of providing them extensions
that they never asked for.

Since this is an API break, I communicated it in the release notes.
I do not foresee major issues with this break because I don't think the
extensions are too widely relied upon, but we can ship it and see if we
get complaints before the next LLVM release - that will give us some
amount of information regarding how much use these extensions have.

Differential Revision: https://reviews.llvm.org/D96523
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/const_Types.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/alloc_move_pair.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/alloc_convert_move.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/alloc_copy.pass.cpp
The file was removedlibcxx/test/libcxx/utilities/tuple/tuple.tuple/tuple.cnstr/enable_reduced_arity_initialization_extension.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/alloc.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/test_lazy_sfinae.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/alloc_move.pass.cpp
The file was modifiedlibcxx/docs/ReleaseNotes.rst
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/PR27684_contains_ref_to_incomplete_type.pass.cpp
The file was removedlibcxx/test/libcxx/utilities/tuple/tuple.tuple/tuple.cnstr/disable_reduced_arity_initialization_extension.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/PR23256_constrain_UTypes_ctor.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/PR31384.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/deduct.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/PR22806_constrain_tuple_like_ctor.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/UTypes.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/PR20855_tuple_ref_binding_diagnostics.pass.cpp
The file was modifiedlibcxx/include/tuple
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/alloc_const_Types.pass.cpp
The file was modifiedlibcxx/include/type_traits
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/alloc_convert_copy.pass.cpp
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/alloc_const_pair.pass.cpp
The file was modifiedlibcxx/docs/UsingLibcxx.rst
The file was removedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/tuple_array_template_depth.pass.cpp
The file was addedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/default.lazy.verify.cpp
Commit df82fa8d9ba6891c0ad1061fc452ea9f271d8ad4 by steveire
[AST] Update tests to query for introspection support
The file was modifiedclang/unittests/Introspection/IntrospectionTest.cpp
Commit 3da0aeea080f84ebc5e3059403f799469b93b773 by snehasishk
[NFC] Use hasSection instead of getSection().empty()

Use the optimized check hasSection() instead of calling
getSection().empty(). Originally suggested in D101004, but was dropped
in the commit.
The file was modifiedllvm/lib/CodeGen/MachineFunctionSplitter.cpp
Commit 10b781fb033ee8d8a02e1050976b3832ad50542a by tejohnson
Mark type test intrinsics as speculatable to fix inline cost

There is already code in InlineCost.cpp to identify and ignore ephemeral
values (llvm.assume intrinsics and other side-effect free instructions
only feeding the assumes). However, because llvm.type.test intrinsics
were not marked speculatable, they and any instructions specifically
feeding the type test (typically a bitcast) were being counted towards
the instruction cost when inlining. This was causing profile matching
issues in some cases when enabling -fwhole-program-vtables for whole
program devirtualization.

According to the language reference, the speculatable attribute means:
"the function does not have any effects besides calculating its result
and does not have undefined behavior". I see no reason why type tests
cannot be marked with this attribute.

There are 2 test changes:

llvm/test/Transforms/Inline/ephemeral.ll: I added a type test intrinsic
here to verify the fix. Also, I found the test was not actually testing
what it originally intended. Many of the existing instructions were
optimized away by -Oz, and the cost of inlining was negative due to the
benefit of removing the call. So I changed the test to simply invoke the
inline pass and check the number of instructions computed by InlineCost.
I also fixed an instruction that was not actually used anywhere.

llvm/test/Transforms/SimplifyCFG/no-md-sink.ll needed to be made more
robust to code changes that reordered the metadata.

Differential Revision: https://reviews.llvm.org/D101180
The file was modifiedllvm/test/Transforms/SimplifyCFG/no-md-sink.ll
The file was modifiedllvm/test/Transforms/Inline/ephemeral.ll
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
Commit cae3b70cebc1b7b762a8b466cafca2d4189e72a7 by Chris.Hamilton
[PR49761] Fix variadic arg handling in matcher

Mishandling of variadic arguments in a function call caused a crash
(runtime assert fail) in bugprone-infinite-loop tidy checker.  Fix
is to limit argument matching to the lesser of the number of variadic
params in the prototype or the number of actual args in the call.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D101108
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/bugprone-infinite-loop.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
Commit a683abe5c026cffff12a943564f4cb1b20972abf by 31459023+hctim
[Scudo] Use GWP-ASan's aligned allocations and fixup postalloc hooks.

This patch does a few cleanup things:
1. The non-standalone scudo has a problem where GWP-ASan allocations
may not meet alignment requirements where Scudo was requested to have
alignment >= 16. Use the new GWP-ASan API to fix this.
2. The standalone variant loses some debugging information inside of
GWP-ASan because we ask GWP-ASan to allocate an aligned size in the
frontend. This means reports end up with 'UaF on a 16-byte allocation'
for a 1-byte allocation with 16-byte alignment. Also use the new API to
fix this.
3. Add post-alloc hooks for GWP-ASan intercepted allocations, and add
stats tracking for GWP-ASan allocations.
4. Add a small test that checks the alignment of the frontend
allocator, so that it can be used under GWP-ASan torture mode.
5. Add GWP-ASan torture mode as a testing configuration to catch these
regressions.

Depends on D94830, D95889.

Reviewed By: cryptoad

Differential Revision: https://reviews.llvm.org/D95884
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp
The file was modifiedcompiler-rt/lib/scudo/scudo_allocator.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
The file was modifiedcompiler-rt/test/scudo/standalone/CMakeLists.txt
The file was addedcompiler-rt/test/scudo/standalone/unit/gwp_asan/lit.site.cfg.py.in
Commit d5175005abe15b041021f36de20cb5fde9a0685c by spatel
[InstCombine] add test for ctpop; NFC

Goes with 2912f42a / PR50096.
The file was modifiedllvm/test/Transforms/InstCombine/ctpop.ll
Commit e10d7d455d4ec0dccab9a74764a8988e1301069f by spatel
[InstCombine] fold 'not' of ctpop in parity pattern

As discussed in https://llvm.org/PR50096 , we could
convert the 'not' into a 'sub' and see the same
fold. That's because we already have another demanded
bits optimization for 'sub'.

We could add a related transform for
odd-number-of-type-bits, but that seems unlikely
to be practical.

https://alive2.llvm.org/ce/z/TWJZXr
The file was modifiedllvm/test/Transforms/InstCombine/ctpop.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
Commit caea37b37e6aa8b0c1bb21526ad2d216b46a4b10 by 31459023+hctim
Revert "[X86][AMX] Try to hoist AMX shapes' def"

This reverts commit 90118563ad0f133c696e070ad72761fa0daa4517.

Reason: Broke the MSan buildbots.
https://lab.llvm.org/buildbot/#/builders/5/builds/6967/steps/9/logs/stdio

More details can be found in the original phabricator review:
https://reviews.llvm.org/D101067
The file was modifiedllvm/test/CodeGen/X86/AMX/amx-sched.ll
The file was modifiedllvm/lib/Target/X86/X86PreTileConfig.cpp
Commit a92dbadffe4ff81cbae7303b0f3e723e26fa77b1 by i
[OpenMP] Fix -Wdeprecated-copy
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.h
Commit f1a47181f5c6b3d5ef4040ab889c3aa0cfdae297 by 31459023+hctim
[hwasan] Remove untagging of kernel-consumed memory

Now that page aliasing for x64 has landed, we don't need to worry about
passing tagged pointers to libc, and thus D98875 removed it.
Unfortunately, we still test on aarch64 devices that don't have the
kernel tagged address ABI (https://reviews.llvm.org/D98875#2649269).

All the memory that we pass to the kernel in these tests is from global
variables. Instead of having architecture-specific untagging mechanisms
for this memory, let's just not tag the globals.

Reviewed By: eugenis, morehouse

Differential Revision: https://reviews.llvm.org/D101121
The file was modifiedcompiler-rt/test/hwasan/TestCases/Linux/reuse-threads.cpp
The file was modifiedcompiler-rt/test/hwasan/TestCases/Linux/decorate-proc-maps.c
The file was removedcompiler-rt/test/hwasan/TestCases/Linux/utils.h
The file was modifiedcompiler-rt/test/hwasan/TestCases/Linux/release-shadow.c
Commit 5f2d7300733b9eb6f4c60be89a16628f63c74443 by hoy
[CSSPGO]  Fix incorrect prorating indirect call distribution factor that leads to target count loss.

Pseudo probe distribution factor is used to scale down profile samples to avoid misleading the counts inference due to the usage of "maximum" in `getBlockWeight`. For callsites, the scaling down can come from code duplication prior to the sample profile loader (prelink or postlink), or due to the indirect call promotion in sample loader inliner. This patch fixes an issue in sample loader ICP where the leftover indirect callsite scaling down causes the loss of non-promoted call target samples unexpectedly. While the scaling down is to favor BFI/BPI with accurate an callsite count, it doesn't fit in the current distribution factor that represents code duplication changes. Ideally,  we would need two factors, one is for code duplication, the other is for ICP. However this seems over complicated. I'm going to trade one usage (callsite counts) for the other (call target counts).

Seeing perf win on one benchmark (mcf) of SPEC2017 with others unchanged.

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D100993
The file was modifiedllvm/test/Transforms/SampleProfile/pseudo-probe-icp-factor.ll
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
Commit f2819ee6cc46c89d049e8dca205c269e7c40cdc2 by peter
scudo: Work around gcc 8 conversion warning.

Should fix:
https://lab.llvm.org/buildbot#builders/99/builds/2953
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
Commit a61891d491bdd991f837d02fedf66c99e69c9a1f by thakis
[lld/mac] Support more flags for --reproduce

I went through the callers of `readFile()` and `addFile()` in Driver.cpp
and checked that the options that use them all get rewritten in the
--reproduce response file. -(un)exported_symbols_list and -bundle_loader
weren't, so add them.

Also spruce up the test for reproduce a bit and actually try linking
with the exptracted repro archive.

Motivated by the response file in PR50098 complaining abou the
-exported_symbols_list path being wrong :)

Differential Revision: https://reviews.llvm.org/D101182
The file was modifiedlld/test/MachO/reproduce.s
The file was modifiedlld/MachO/DriverUtils.cpp
Commit 5291a7a3c70c578fe3797b1116a8f74990f3750a by pifon
[mlir] Add block arguments for input/output operands of 'linalg.tiled_loop`.

Differential Revision: https://reviews.llvm.org/D101186
The file was modifiedmlir/test/Dialect/Linalg/canonicalize.mlir
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was modifiedmlir/include/mlir/IR/OpImplementation.h
The file was modifiedmlir/lib/Parser/Parser.cpp
Commit 0764c8af7631483fbfd2641ba58f450f00059588 by shivam98.tkg
[Docs] Updated LLVM_TARGETS_TO_BUILD section in GettingStarted.rst

Updated LLVM_TARGETS_TO_BUILD  under https://llvm.org/docs/GettingStarted.html#local-llvm-configuration.

Differential Revision: https://reviews.llvm.org/D101101
The file was modifiedllvm/docs/GettingStarted.rst
Commit 9aee07abd0cacc960bb06870ce3eedd20545b28b by Dávid Bolvanský
[InstCombine] X - usub.sat(X, Y) => umin(X, Y)

Pattern regressed in LLVM 9 with the introduction of usub.sat.

Fixes https://bugs.llvm.org/show_bug.cgi?id=42178#c2

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D101184
The file was modifiedllvm/test/Transforms/InstCombine/saturating-add-sub.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
Commit 81dae18dff7fe8c2783c7b73e5c08167d6c60b47 by sam.mccall
[clangd] Allow AST request without range

If no range is given, return the translation unit AST.
This is useful for tooling operations that require e.g. the full path to
a node.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D101057
The file was modifiedclang-tools-extra/clangd/unittests/DumpASTTests.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/DumpAST.h
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
The file was modifiedclang-tools-extra/clangd/Protocol.h
The file was modifiedclang-tools-extra/clangd/DumpAST.cpp
The file was addedclang-tools-extra/clangd/test/ast-no-range.test
Commit d7bd62a64e440366eaebde75f202f7f737c77507 by zoecarver
[libcxx][nfc] Add license to `pointer_comparison_test_helper.h`
The file was modifiedlibcxx/test/support/pointer_comparison_test_helper.h
Commit 97c571abbcea2b540511ae5a874da05bf77e5e5d by rob.suderman
[mlir][tosa] Add tosa.resize lowering to linalg generic

Includes tests and implementation for both integer and floating point values.
Both nearest neighbor and bilinear interpolation is included.

Differential Revision: https://reviews.llvm.org/D101009
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
The file was modifiedmlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Commit 19b29b1ed1baa3c91a8e48204a8fb229bf07f548 by nemanja.i.ibm
[PowerPC] Provide XL-compatible builtins in altivec.h

There are some interfaces in altivec.h that are not compatible
between Clang and XL (although Clang is compatible with GCC).
Currently, we have found 3 but there may be others.

Clang/GCC signatures:

vector double vec_ctf(vector signed long long)
vector double vec_ctf(vector unsigned long long)
vector signed long long vec_cts(vector double)
vector unsigned long long vec_ctu(vector double)

XL signatures:

vector float vec_ctf(vector signed long long)
vector float vec_ctf(vector unsigned long long)
vector signed int vec_cts(vector double)
vector unsigned int vec_ctu(vector double)

This patch provides the XL behaviour under the __XL_COMPAT_ALTIVEC__
macro for users that rely on XL behaviour.

Differential revision: https://reviews.llvm.org/D101130
The file was addedclang/test/CodeGen/builtins-ppc-xlcompat.c
The file was modifiedclang/lib/Headers/altivec.h
Commit 2f6405ec809c68d2f9ad702968268ed526c7a125 by nikita.ppv
[SCEV] Add loop guard tests for ugt/uge predicates (NFC)
The file was modifiedllvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
Commit 502f54049d17f5a107f833596fb2c31297a99773 by tlively
[WebAssembly] Finalize wasm_simd128.h intrinsics

Adds new intrinsics for instructions that are in the final SIMD spec but did not
previously have intrinsics. Also updates the names of existing intrinsics to
reflect the final names of the underlying instructions in the spec. Keeps the
old names as deprecated functions to ease the transition to the new names.

Differential Revision: https://reviews.llvm.org/D101112
The file was modifiedclang/include/clang/Basic/BuiltinsWebAssembly.def
The file was modifiedclang/test/CodeGen/builtins-wasm.c
The file was modifiedclang/test/Headers/wasm.c
The file was modifiedclang/lib/Headers/wasm_simd128.h
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit 94340dd5bb23fb7c4bc7d91d5ac0608eb25660a8 by steveire
Enable AST introspection on non-X86
The file was modifiedclang/lib/Tooling/CMakeLists.txt
Commit 572fe087765626529d63eaaefb2e1c5ba277f756 by aaron.puchert
Thread safety analysis: Simplify intersectAndWarn (NFC)

Instead of conditionally overwriting a nullptr and then branching on its
nullness, just branch directly on the original condition. Then we can
make both pointers (non-null) references instead.
The file was modifiedclang/lib/Analysis/ThreadSafety.cpp
Commit 3d1aecbd285709f58168b3ad65c06da4b42132a9 by wlei
[CSSPGO] Fix missing debug info of dangling pseudo probe

While doing speculative execution opt, it conservatively drops all insn's debug info in the merged `ThenBB`(see the loop at line 2384) including the dangling probe. The missing debug info of the dangling probe will cause the wrong inference computation.

So we should avoid dropping the debug info from pseudo probe, this change try to fix this by moving the to-be dangling probe to the merging target BB before the debug info is dropped.

Reviewed By: hoy, wenlei

Differential Revision: https://reviews.llvm.org/D101195
The file was addedllvm/test/Transforms/SampleProfile/pseudo-probe-dangle2.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 9658d045926545e62cc3f963fe611d7c5d0c9d98 by Dávid Bolvanský
[utils] Disable -Wdeprecated-copy for googlemock/gtest

Simple fix for build breakage. Feel free to fix all places (quite a lot).
The file was modifiedllvm/utils/unittest/googletest/include/gtest/internal/gtest-param-util-generated.h
The file was modifiedllvm/utils/unittest/googlemock/include/gmock/gmock-matchers.h
Commit 035eb6d154a1f4827eabc29d02d17e69fc939202 by jezng
[lld-macho]][nfc] Fix some typos + rephrase a comment

I was a bit confused by the comment because I thought that "Tests
that..." was describing the tests contained within the same file.

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D101160
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was modifiedlld/test/MachO/private-extern.s
Commit 3fe5c3b0189f51868493bbbc6768ef3afbdfb492 by jezng
[lld-macho] Fix use-after-free in loadDylib()

We were taking a reference to a value in `loadedDylibs`, which in turn
called `make<DylibFile>()`, which could then recursively call
`loadDylibs`, which would then potentially resize `loadedDylibs` and
invalidate that reference.

Fixes PR50101.

Reviewed By: #lld-macho, oontvoo

Differential Revision: https://reviews.llvm.org/D101175
The file was modifiedlld/MachO/DriverUtils.cpp
The file was modifiedlld/MachO/InputFiles.h
Commit baa107f018a94763d829daa534b4b1bf98219306 by craig.topper
[RISCV] Only expose one interface for getContainerForFixedLengthVector in the RISCVTargetLowering class

We can have RISCVISelDAGToDAG.cpp call the VT only version by
finding the RISCVTargetLowering object via the Subtarget.

Make the static versions just global static functions in
RISCVISelLowering that can be called by static functions in that
file.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Commit bcf321015b10b02dc1e9f6a67017713344501610 by craig.topper
[RISCV] Move getLMULForFixedLengthVector out of RISCVSubtarget.

Make it a static function RISCVISelLowering, the only place it
is used.

I think I'm going to make this return a fractional LMULs in some
cases so I'm sorting out where it should live before I start
making changes.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVSubtarget.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVSubtarget.h
Commit bbc6893b11cd85147543e84351176da7c3869cc4 by arthur.j.odwyer
Implement N3644 "Null Forward Pointers" in _LIBCPP_DEBUG mode.

This functionality is tested in std/containers/sequences/vector/iterators.pass.cpp
(and similarly for all containers, but vector is the only one to be tested that
uses debug iterators).

Differential Revision: https://reviews.llvm.org/D100881
The file was modifiedlibcxx/src/debug.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/string.iterators/iterators.pass.cpp
Commit 38959c4624345d7e6b7d726d87c79c083298b189 by tejohnson
Require asserts for test that uses debug flag

In 10b781fb033ee8d8a02e1050976b3832ad50542a this test was changed to use
the -debug-only flag, which means it now requires asserts aka a
non-release compiler.
The file was modifiedllvm/test/Transforms/Inline/ephemeral.ll
Commit 643ccf6e4b85ad1edae48e64c178bf6b00991a96 by 31459023+hctim
Revert "[Scudo] Use GWP-ASan's aligned allocations and fixup postalloc hooks."

This reverts commit a683abe5c026cffff12a943564f4cb1b20972abf.

Broke the upstream buildbots:
https://lab.llvm.org/buildbot/#/builders/37/builds/3731/steps/16/logs/stdio
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
The file was removedcompiler-rt/test/scudo/standalone/unit/gwp_asan/lit.site.cfg.py.in
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp
The file was modifiedcompiler-rt/test/scudo/standalone/CMakeLists.txt
The file was modifiedcompiler-rt/lib/scudo/scudo_allocator.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
Commit fc88d927e30de93bf75aef8cd2a835675fe904bc by jonathanchesterfield
[clang][amdgpu] Use implicit code object version

[clang][amdgpu] Use implicit code object version

At present, clang always passes amdhsa-code-object-version on to -cc1. That is
great for certainty over what object version is being used when debugging.

Unfortunately, the command line argument is in AMDGPUBaseInfo.cpp in the amdgpu
target. If clang is used with an llvm compiled with DLLVM_TARGETS_TO_BUILD
that excludes amdgpu, this will be diagnosed (as discovered via D98658):

- Unknown command line argument '--amdhsa-code-object-version=4'

This means that clang, built only for X86, can be used to compile the nvptx
devicertl for openmp but not the amdgpu one. That would shortly spawn fragile
logic in the devicertl cmake to try to guess whether the clang used will work.

This change omits the amdhsa-code-object-version parameter when it matches the
default that AMDGPUBaseInfo.cpp specifies, with a comment to indicate why. As
this is the only part of clang's codegen for amdgpu that depends on the target
in the back end it suffices to build the openmp runtime on most (all?) systems.

It is a non-functional change, though observable in the updated tests and when
compiling with -###. It may cause minor disruption to the amd-stg-open branch.

Revision of D98746, builds on refactor in D101077

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D101095
The file was modifiedclang/test/Driver/hip-device-compile.hip
The file was modifiedclang/test/Driver/hip-host-cpu-features.hip
The file was modifiedclang/test/Driver/hip-toolchain-rdc-static-lib.hip
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.h
The file was modifiedclang/test/Driver/hip-toolchain-opt.hip
The file was modifiedclang/test/Driver/hip-toolchain-mllvm.hip
The file was modifiedclang/test/Driver/hip-toolchain-rdc.hip
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/Driver/hip-toolchain-no-rdc.hip
The file was modifiedclang/test/Driver/hip-autolink.hip
The file was modifiedclang/test/Driver/hip-code-object-version.hip
The file was modifiedclang/test/Driver/hip-target-id.hip
The file was modifiedclang/test/Driver/hip-rdc-device-only.hip
The file was modifiedclang/test/Driver/hip-toolchain-rdc-separate.hip