Changes from Git (git http://labmaster3.local/git/llvm-project.git)


  1. [trace] Dedup different source lines when dumping instructions + refactor (details)
  2. [ORC] Reintroduce the ORC C API test. (details)
  3. [gn build] Port f2018d6c16d1 (details)
  4. [GreedyRA] Add support for invoke statepoint with tied-defs. (details)
  5. [MLIR][SCF] Combine adjacent scf.if with same condition (details)
  6. [libcxx][ranges] Add `random_access_{iterator,range}`. (details)
  7. [InstCombine] Precommit tests for D101807 (NFC) (details)
  8. [InstCombine] Fold more select of selects using isImpliedCondition (details)
  9. [libcxx][ranges] Add ranges::size CPO. (details)
  10. [libcxx][ranges] Add ranges::ssize CPO. (details)
  11. Fix typo, arvm7 -> armv7 (details)
  12. [gn build] Port 600686d75f55 (details)
  13. [lldb/Symbol] Fix column breakpoint `move_to_nearest_code` match (details)
  14. [dfsan] Turn off all dfsan test cases on non x86_64 OSs (details)
  15. [lldb/Test] Disable testBreakpointByLineAndColumnNearestCode on Windows (details)
  16. [clang][TargetCXXABI] Fix -Wreturn-type warning (NFC) (details)
  17. [llvm-objdump] Add -M {att,intel} & deprecate --x86-asm-syntax={att,intel} (details)
  18. [mlir][ArmSVE] Add basic arithmetic operations (details)
  19. [AMDGPU] Select V_CVT_*16_F16 more often (details)
  20. [RISCV] Cap legal fixed-length vectors to 256-element types (details)
  21. Require asserts for clang/test/Headers/wasm.c (details)
  22. [DOCS] Added example for G_EXTRACT and G_INSERT (details)
  23. [mlir] Use ReassociationIndices instead of affine maps in linalg.reshape. (details)
  24. [RISCV][VP] Lower VP ISD nodes to RVV instructions (details)
  25. [RISCV][VP][NFC] Add tests for VP_AND, VP_XOR, VP_OR (details)
  26. [RISCV][VP][NFC] Add tests for VP_SHL and VP_LSHR (details)
  27. [MLIR] Rename free function `verify` on OffsetSizeAndStrideOpInterface (details)
Commit ade59d530964e28498051ab20e44cbf6594be595 by walter erquinigo
[trace] Dedup different source lines when dumping instructions + refactor

When dumping the traced instructions in a for loop, like this one

  4:  for (int a = 0; a < n; a++)
  5:    do something;

there might be multiple LineEntry objects for line 4, but with different address ranges. This was causing the dump command to dump something like this:

  a.out`main + 11 at main.cpp:4
    [1] 0x0000000000400518    movl   $0x0, -0x8(%rbp)
    [2] 0x000000000040051f    jmp    0x400529                  ; <+28> at main.cpp:4
  a.out`main + 28 at main.cpp:4
    [3] 0x0000000000400529    cmpl   $0x3, -0x8(%rbp)
    [4] 0x000000000040052d    jle    0x400521                  ; <+20> at main.cpp:5

which is confusing, as main.cpp:4 appears twice consecutively.

This diff fixes that issue by making the line entry comparison strictly about the line, column and file name. Before it was also comparing the address ranges, which we don't need because our output is strictly about what the user sees in the source.

Besides, I've noticed that the logic that traverses instructions and calculates symbols and disassemblies had too much coupling, and made my changes harder to implement, so I decided to decouple it. Now there are two methods for iterating over the instruction of a trace. The existing one does it on raw load addresses, but the one provides a SymbolContext and an InstructionSP, and does the calculations efficiently (not as efficient as possible for now though), so the caller doesn't need to care about these details. I think I'll be using that iterator to reconstruct the call stacks.

I was able to fix a test with this change.

Differential Revision:
The file was modifiedlldb/include/lldb/Target/Trace.h
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.cpp
The file was modifiedlldb/source/Plugins/Trace/intel-pt/TraceIntelPT.h
The file was modifiedlldb/source/Core/AddressRange.cpp
The file was modifiedlldb/include/lldb/Core/AddressRange.h
The file was modifiedlldb/source/Target/Trace.cpp
The file was modifiedlldb/test/API/commands/trace/
Commit f2018d6c16d118779d35f3705c74a31c1855ca56 by Lang Hames
[ORC] Reintroduce the ORC C API test.

This test was removed in 51495fd285 due to broken bots. Its reintroduction is
expected to trigger failures on some builders. The test has been modified to
print error messages in full, which should aid in tracking these down.
The file was addedllvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
The file was modifiedllvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
Commit 88ec05b654758fecfe7147064dce84a09e2e20a8 by llvmgnsyncbot
[gn build] Port f2018d6c16d1
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/
Commit 9f631d14c638cc473101cd127697d037a33206a1 by serguei.katkov
[GreedyRA] Add support for invoke statepoint with tied-defs.

statepoint instruction uses tied-def registers to represent live gc value which
is use and def at the same time on a call.
At the same time invoke statepoint instruction is a last split point which can throw and
jump to landing pad.
As a result we have instructon which is last split point with tied-defs registers and
we need to teach Greedy RA to work with it.

The option -use-registers-for-gc-values-in-landing-pad controls whether statepoint lowering
will generate tied-defs for invoke statepoint and is off by default now.

To resolve all issues the following changes has been done.
1) Last Split point for invoke statepoint should be statepoint itself

If statepoint has a def it is a relocated gc pointer and it should be available in landing pad.
So we cannot split interval after statepoint at end of basic block.

2) Do not split interval on tied-def

If end of interval for overlap utility is a use which has tied-def we
should not split interval on this instruction due to in this case use
and def may have different registers and it breaks tied-def property.

3) Take into account Last Split Point for enterIntvAtEnd

If the use after Last Split Point is a def so it should be tied-def and
we can take the def of the tied-use as ParentVNI and thus
tied-use and tied-def will be live in resulting interval.

4) Handle the case when def is after LIP in InlineSpiller

If def of LI is after last insertion point of basic block we cannot hoist in this BB.

The example of such instruction is invoke statepoint where def represents the
relocated live gc pointer. Invoke is a last insertion point and its def is located after it.
In this case there is no place to insert spill and we bail out.

5) Fix removeBackCopies to account empty copies

RegAssignMap cannot hold empty interval, so do not set stop
to kill value if it produces empty interval.

This can happen if we remove back-copy and right before that we have another

For example, for parent %0 we can get
%1 = COPY %0
%2 = COPY %0
while we removing %2 we cannot set kill for %1 due to its empty.

6) Do not hoist copy to BB if its def is after LSP

If the parent def is a LastSplitPoint or later we cannot hoist copy to this basic block
because inserted copy (or re-materialization) will be located before the def.

All parts have been reviewed separately as follows:

Reviewers: reames, rnk, void, MatzeB, wmi, qcolombet
Reviewed By: reames, qcolombet
Subscribers: llvm-commits
Differential Revision:
The file was addedllvm/test/CodeGen/X86/statepoint-invoke-ra-remove-back-copies.mir
The file was addedllvm/test/CodeGen/X86/statepoint-invoke-ra-inline-spiller.mir
The file was modifiedllvm/test/CodeGen/X86/statepoint-invoke-ra.mir
The file was addedllvm/test/CodeGen/X86/statepoint-invoke-ra-hoist-copies.mir
The file was modifiedllvm/lib/CodeGen/SplitKit.cpp
The file was addedllvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
The file was modifiedllvm/lib/CodeGen/InlineSpiller.cpp
The file was modifiedllvm/lib/CodeGen/SplitKit.h
Commit f4a2dbfe29031f02c02d6045159f22785dd611cf by gh
[MLIR][SCF] Combine adjacent scf.if with same condition

Differential Revision:
The file was modifiedmlir/include/mlir/Dialect/SCF/
The file was modifiedmlir/lib/Dialect/SCF/SCF.cpp
The file was modifiedmlir/test/Dialect/SCF/canonicalize.mlir
Commit 6ffc41b014f304a76f9a7eab39c122e0a9d7fcb8 by zoecarver
[libcxx][ranges] Add `random_access_{iterator,range}`.

Differential Revision:
The file was modifiedlibcxx/test/std/containers/views/span.iterators/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multiset/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/set/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/array/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/string.view/string.view.iterators/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multiset/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/include/iterator
The file was modifiedlibcxx/test/std/ranges/range.refinements/subsumption.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multimap/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/input.output/filesystems/class.path/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/predef.iterators/reverse.iterators/iterator_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/ranges/range.refinements/random_access_range.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector.bool/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/map/iterator_concept_conformance.compile.pass.cpp
The file was addedlibcxx/test/std/iterators/iterator.requirements/iterator.concepts/iterator.concept.random.access/random_access_iterator.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/deque/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/string.iterators/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/basic.string/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector.bool/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/array/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/include/__ranges/concepts.h
The file was modifiedlibcxx/test/std/iterators/iterator.requirements/iterator.concepts/iterator.concept.bidir/subsumption.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/set/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/vector/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/multimap/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/strings/string.view/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/associative/map/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/deque/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/list/iterator_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/sequences/list/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/containers/views/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/test/std/re/re.results/range_concept_conformance.compile.pass.cpp
The file was modifiedlibcxx/include/__iterator/concepts.h
The file was addedlibcxx/test/libcxx/iterators/iterator.concepts/iterator.concept.random.access/subsumption.compile.pass.cpp
Commit a71d666d189ed3b176b20c361604c7ec30d25621 by aqjune
[InstCombine] Precommit tests for D101807 (NFC)
The file was modifiedllvm/test/Transforms/InstCombine/select-safe-transforms.ll
Commit 1fef5c88a69e0ede57e3867af72ac769dd11add1 by aqjune
[InstCombine] Fold more select of selects using isImpliedCondition

This is a simple folding that does these:

select x_inv, true, (select y, x, false)
select x_inv, true, y

select (select y, x, false), true, x_inv
select y, true, x_inv

Reviewed By: spatel

Differential Revision:
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
The file was modifiedllvm/test/Transforms/InstCombine/select-safe-transforms.ll
Commit 600686d75f552dcecd9ef83aa8d3163c620f4429 by zoecarver
[libcxx][ranges] Add ranges::size CPO.

The begining of [range.prim].

Differential Revision:
The file was modifiedlibcxx/include/type_traits
The file was addedlibcxx/test/std/ranges/range.access/range.prim/size.pass.cpp
The file was addedlibcxx/include/__ranges/size.h
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/include/ranges
Commit 6f1b10df916f2d538dd56da2d9976169708d2ac3 by zoecarver
[libcxx][ranges] Add ranges::ssize CPO.

Based on D101079.

Differential Revision:
The file was modifiedlibcxx/include/__ranges/size.h
The file was addedlibcxx/test/std/ranges/range.access/range.prim/ssize.pass.cpp
The file was modifiedlibcxx/include/ranges
The file was modifiedlibcxx/test/std/ranges/range.access/range.prim/size.pass.cpp
Commit 3a62d4fde88544125ce9ceff990db108ee91148a by brad
Fix typo, arvm7 -> armv7
The file was modifiedlldb/tools/driver/Driver.cpp
The file was modifiedlldb/docs/man/lldb.rst
Commit 72cefd50e552ce4e44f98d44779b326191204143 by llvmgnsyncbot
[gn build] Port 600686d75f55
The file was modifiedllvm/utils/gn/secondary/libcxx/include/
Commit 35ecfda01ccd19e1222c065056f68bbd2575e4ac by medismail.bennani
[lldb/Symbol] Fix column breakpoint `move_to_nearest_code` match

This patch fixes the column symbol resolution when creating a breakpoint
with the `move_to_nearest_code` flag set.

In order to achieve this, the patch adds column information handling in
the `LineTable`'s `LineEntry` finder. After experimenting a little, it
turns out the most natural approach in case of an inaccurate column match,
is to move backward and match the previous `LineEntry` rather than going
forward like we do with simple line breakpoints.

The patch also reflows the function to reduce code duplication.

Finally, it updates the `BreakpointResolver` heuristic to align it with
the `LineTable` method.


Differential Revision:

Signed-off-by: Med Ismail Bennani <>
The file was modifiedlldb/source/Symbol/LineTable.cpp
The file was modifiedlldb/include/lldb/Symbol/LineTable.h
The file was modifiedlldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/
The file was modifiedlldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/Makefile
The file was addedlldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/main.cpp
The file was modifiedlldb/source/Breakpoint/BreakpointResolver.cpp
The file was removedlldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/main.c
Commit 79debe8d7b5897d6c8efaa8cd9846a3b4533d57f by jianzhouzh
[dfsan] Turn off all dfsan test cases on non x86_64 OSs enables sanitizer allocator.
This broke all test cases on non x86-64.
The file was modifiedcompiler-rt/test/dfsan/event_callbacks.c
The file was modifiedcompiler-rt/test/dfsan/sigaction.c
The file was modifiedcompiler-rt/test/dfsan/struct.c
The file was modifiedcompiler-rt/test/dfsan/dump_labels.c
The file was modifiedcompiler-rt/test/dfsan/propagate.c
The file was modifiedcompiler-rt/test/dfsan/basic.c
The file was modifiedcompiler-rt/test/dfsan/interceptors.c
The file was modifiedcompiler-rt/test/dfsan/vararg.c
The file was modifiedcompiler-rt/test/dfsan/fncall.c
The file was modifiedcompiler-rt/test/dfsan/label_count.c
The file was modifiedcompiler-rt/test/dfsan/write_callback.c
The file was modifiedcompiler-rt/test/dfsan/flags.c
The file was modifiedcompiler-rt/test/dfsan/trace-cmp.c
The file was modifiedcompiler-rt/test/dfsan/flush.c
The file was modifiedcompiler-rt/test/dfsan/threaded_flush.c
The file was modifiedcompiler-rt/test/dfsan/pair.cpp
The file was modifiedcompiler-rt/test/dfsan/release_shadow_space.c
The file was modifiedcompiler-rt/test/dfsan/fast16labels.c
Commit 9775582e347c08f79f84748d143eb8c2e4258afb by medismail.bennani
[lldb/Test] Disable testBreakpointByLineAndColumnNearestCode on Windows

Signed-off-by: Med Ismail Bennani <>
The file was modifiedlldb/test/API/functionalities/breakpoint/breakpoint_by_line_and_column/
Commit cab3c6c6c48ed0da0f047bdc1a337d991c78ad8c by nullptr.cpp
[clang][TargetCXXABI] Fix -Wreturn-type warning (NFC)

GCC warning:
In file included from /llvm-project/clang/include/clang/Basic/LangOptions.h:22,
                 from /llvm-project/clang/include/clang/Frontend/CompilerInvocation.h:16,
                 from /llvm-project/clang/lib/Frontend/CompilerInvocation.cpp:9:
/llvm-project/clang/include/clang/Basic/TargetCXXABI.h: In static member function ‘static bool clang::TargetCXXABI::isSupportedCXXABI(const llvm::Triple&, clang::TargetCXXABI::Kind)’:
/llvm-project/clang/include/clang/Basic/TargetCXXABI.h:114:3: warning: control reaches end of non-void function [-Wreturn-type]
  114 |   };
      |   ^
The file was modifiedclang/include/clang/Basic/TargetCXXABI.h
Commit e510860656bb81bd90ae3cf8bb5ef4dc8cd33c18 by i
[llvm-objdump] Add -M {att,intel} & deprecate --x86-asm-syntax={att,intel}

The internal `cl::opt` option --x86-asm-syntax sets the AsmParser and AsmWriter
dialect. The option is used by llc and llvm-mc tests to set the AsmWriter dialect.

This patch adds -M {att,intel} as GNU objdump compatible aliases (PR43413).

Note: the dialect is initialized when the MCAsmInfo is constructed.
`MCInstPrinter::applyTargetSpecificCLOption` is called too late and its MCAsmInfo
reference is const, so changing the `cl::opt` in
`MCInstPrinter::applyTargetSpecificCLOption` is not an option, at least without
large amount of refactoring.

Reviewed By: hoy, jhenderson, thakis

Differential Revision:
The file was modifiedllvm/test/tools/llvm-objdump/X86/elf-disassemble-symbololize-operands.yaml
The file was modifiedllvm/docs/CommandGuide/llvm-objdump.rst
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was addedllvm/test/tools/llvm-objdump/X86/syntax-mode.s
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
Commit 001d601ac4fb1ee02d4bb3990f2f5a8afacd4932 by zinenko
[mlir][ArmSVE] Add basic arithmetic operations

While we figure out how to best add Standard support for scalable
vectors, these instructions provide a workaround for basic arithmetic
between scalable vectors.

Reviewed By: nicolasvasilache

Differential Revision:
The file was modifiedmlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
The file was modifiedmlir/test/Target/LLVMIR/arm-sve.mlir
The file was modifiedmlir/lib/Dialect/ArmSVE/Transforms/LegalizeForLLVMExport.cpp
The file was modifiedmlir/include/mlir/Dialect/ArmSVE/
The file was modifiedmlir/test/Dialect/ArmSVE/roundtrip.mlir
Commit a1ed39df96bc5b98bd5a83c7d2c1a385c03133e5 by jay.foad
[AMDGPU] Select V_CVT_*16_F16 more often

Improve the code generation of fp_to_sint
and fp_to_uint for integer on 16-bits.

Differential Revision:

Patch by Julien Pagès!
The file was modifiedllvm/test/CodeGen/AMDGPU/fptosi.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fp_to_uint.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/fptoui.f16.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
Commit cd6a52fedefe263565b81fbee9d5d3278e1e63cb by fraser
[RISCV] Cap legal fixed-length vectors to 256-element types

Previously, RISC-V would make legal all fixed-length vectors types whose
size are less than or equal to some function of the minimum value of
VLEN and the maximum-permissible LMUL grouping.

Due to vector legalization issues, this patch instead caps the legal
fixed-length vector types to those with 256 elements. This value was
chosen because it is the longest vector length which has corresponding
MVTs across all supported element types.

Reviewed By: craig.topper

Differential Revision:
The file was modifiedllvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit 4f4aa7b78df5544b0a1c07ee98475939c1175990 by hans
Require asserts for clang/test/Headers/wasm.c

The test doesn't pass in no-asserts builds, see comment on
The file was modifiedclang/test/Headers/wasm.c
Commit e4eec519370b7bf42f31d51f7730e5c91cb53d18 by shivam98.tkg
 [DOCS] Added example for G_EXTRACT and G_INSERT

Reviewed By: xgupta, gargaroff

Differential Revision:
The file was modifiedllvm/docs/GlobalISel/GenericOpcode.rst
Commit 2865d114f953a0c05df2663f4569704c9fe35eb0 by pifon
[mlir] Use ReassociationIndices instead of affine maps in linalg.reshape.

Differential Revision:
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/
The file was modifiedmlir/test/Dialect/Linalg/reshape_linearization_fusion.mlir
The file was modifiedmlir/test/Dialect/Linalg/reshape_fusion.mlir
The file was modifiedmlir/test/Dialect/Linalg/llvm.mlir
The file was modifiedmlir/test/EDSC/builder-api-test.cpp
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was modifiedmlir/test/Dialect/Linalg/drop-unit-extent-dims.mlir
The file was modifiedmlir/test/Dialect/Linalg/canonicalize.mlir
The file was modifiedmlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
The file was modifiedmlir/test/Dialect/Linalg/fusion-push-reshape.mlir
Commit 6f17613bfb95583f96a35ed589b67f07c5b028ab by fraser
[RISCV][VP] Lower VP ISD nodes to RVV instructions

This patch supports all of the current set of VP integer binary
intrinsics by lowering them to to RVV instructions. It does so by using
the existing RISCVISD *_VL custom nodes as an intermediate layer. Both
scalable and fixed-length vectors are supported by using this method.

One notable change to the existing vector codegen strategy is that
scalable all-ones and all-zeros mask SPLAT_VECTORs are now lowered to
RISCVISD VMSET_VL and VMCLR_VL nodes to match their fixed-length
BUILD_VECTOR counterparts. This allows them to reuse the existing
"all-ones" VL patterns.

To reduce the size of the phabricator diff, some tests are intentionally
left out and will be added later if the patch is accepted.

Reviewed By: craig.topper

Differential Revision:
The file was addedllvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/
The file was addedllvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
The file was modifiedllvm/lib/Target/RISCV/
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was addedllvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
Commit 3fbcf07a99eccc90b99afcd78d94bf31c01f7329 by fraser
[RISCV][VP][NFC] Add tests for VP_AND, VP_XOR, VP_OR

As agreed in D101826, these are follow-up tests for the RISC-V VP
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vor-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vand-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
Commit 491a3d135993d22589c1a154217fdb24510d35d1 by fraser
[RISCV][VP][NFC] Add tests for VP_SHL and VP_LSHR

As agreed in D101826, these are follow-up tests for the RISC-V VP
support. Tests for VP_ASHR were landed as part of D101826.
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
Commit 62851ea7ea2ca59766daab878c5c68629734cb4d by uday
[MLIR] Rename free function `verify` on OffsetSizeAndStrideOpInterface

Using a free function verify(<Op>) is error prone. Rename it.

Differential Revision:
The file was modifiedmlir/lib/Interfaces/ViewLikeInterface.cpp
The file was modifiedmlir/include/mlir/Interfaces/ViewLikeInterface.h
The file was modifiedmlir/include/mlir/Interfaces/