SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-zorg.git)

Summary

  1. [clangd] Update gRPC dependency for remote index tests (details)
Commit cf3881f300f973e6dcc12d2c25dff626290642aa by kbobyrev
[clangd] Update gRPC dependency for remote index tests

Context https://github.com/clangd/clangd/pull/783
The file was modifiedbuildbot/google/docker/buildbot-clangd-ubuntu-clang/Dockerfile

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [AArch64] Combine vector shift instructions in SelectionDAG (details)
  2. Force visibility of llvm::Any to external (details)
  3. [CostModel][AArch64] Add missing costs for getShuffleCost with scalable vectors (details)
  4. [WebAssembly] Ignore filters in Emscripten EH landingpads (details)
  5. [mlir] Add Python bindings for vector dialect (details)
  6. [mlir][Linalg] Drop spurious usage of OperationFolder (details)
  7. [CodeGen] Add support for widening INSERT_SUBVECTOR operands (details)
  8. [RISCV] Add legality check for vectorizing reduction (details)
  9. [X86][AVX] Don't scrub pointer math in avx-vperm2x128.ll (details)
  10. libsanitizer: Guard cyclades inclusion in sanitizer (details)
  11. [NFC][SimplifyCFG] Autogenerate checklines in a few tests for ease of updates (details)
  12. [NFC][PruneEH] Autogenerate checklines in a few tests for ease of updates (details)
  13. [NFC][CHR] Autogenerate checklines in a few tests for ease of updates (details)
  14. [llvm-objcopy] Refactor CopyConfig structure. (details)
  15. [gn build] Port 081c62501e4f (details)
  16. [AArch64] Add extra codegen tests. NFC (details)
  17. [llvm-strip] Add support for '--' for delimiting options from input files (details)
  18. [NFC][Coroutines] Autogenerate a few tests for ease of further updates (details)
  19. Reapply "[clang][deps] Support inferred modules" (details)
  20. [llvm][sve] Lowering for VLS MLOAD/MSTORE (details)
  21. [CostModel][X86][AVX2] Improve 256-bit vector non-uniform shifts costs (details)
  22. [mlir] Add EqualOp and NotEqualOp to complex dialect. (details)
  23. [CodeGen] Add support for widening the result of EXTRACT_SUBVECTOR (details)
  24. [mlir] Add conversion from complex to standard dialect for EqualOp. (details)
  25. [ARM] Extra tests for MVE vhadd and vmulh. NFC (details)
  26. [SPARCv9] allow stw as alias for st (details)
  27. [clang] Invalidate a non-dependent-type RecordDecl when it has any dependent-type base class specifier. (details)
  28. Fix LIT failure on native aix (details)
  29. [TableGen] [Clang] Clean up arm_mve.td file. (details)
  30. [Debugify][Original DI] Test dbg var loc preservation (details)
  31. Revert "libsanitizer: Guard cyclades inclusion in sanitizer" (details)
  32. [test] Fix pre-ra-sched.c to check for error message from stderr (details)
  33. Revert "[Debugify][Original DI] Test dbg var loc preservation" (details)
  34. [AST] Store regular ValueDecl* in BindingDecl (NFC) (details)
  35. [flang][docs] Update driver sync-up call link (details)
  36. [libc++] Switch a few CI jobs to the minimal Lit configuration (details)
  37. [libomptarget] Disable test bug49334 on amdgpu (details)
  38. [libc++] Remove workaround for PR28391 (ODR violations with ASAN) (details)
  39. [libc++] Fix documentation build failure (details)
  40. [ARM][AArch64] SLSHardening: make non-comdat thunks possible (details)
  41. [lldb][NFC] Add more Float16 unit tests (details)
  42. [libomptarget][amdgpu] Remove majority of fatal errors (details)
  43. Correct some thread safety analysis diagnostics; NFC. (details)
  44. [mlir][Linalg] NFC - Drop Linalg EDSC usage (details)
  45. [SLP]Try to vectorize tiny trees with shuffled gathers of extractelements. (details)
  46. [lldb] Adjust DumpDataExtractorTest.Formats for Windows (details)
  47. [GlobalOpt] adjust test to show load problems; NFC (details)
  48. [GlobalOpt] recompute alignments for loads and stores of updated globals (details)
  49. [CodeGen][AArch64][SVE] Canonicalize intrinsic rdffr{ => _z} (details)
  50. [flang] simplify derived type info table format (details)
  51. [DebugInfo] Handle DIArgList in FastISel or GlobalIsel (details)
  52. When vector is found as a type or non-type id, check if it is really the altivec vector token. (details)
  53. [IR][AutoUpgrade] Drop alignment from non-pointer parameters and returns (details)
  54. [WebAssembly] Fix PIC/GOT codegen for wasm64 (details)
  55. [RISCV] Ensure shuffle splat operands are type-legal (details)
  56. [PowerPC] Add fix to partword atomic operations (details)
  57. Add support for DWARF embedded source to llvm-symbolizer. (details)
  58. libsanitizer: Remove cyclades inclusion in sanitizer (details)
  59. [X86][Atom] Fix vector fadd/fcmp/fmul resource/throughputs (details)
  60. [ORC-RT] Add string_view and span utilities for use by the ORC runtime. (details)
  61. [scudo] Disable secondary cache-unmap tests on arm32. (details)
  62. [PGO] Don't reference functions unless value profiling is enabled (details)
  63. [RISCV] Ensure small mask BUILD_VECTORs aren't expanded (details)
  64. [scudo] Add supported architectures. (details)
Commit a647100b4320923b0e9d156cc3872b3be470ad98 by andrew.savonichev
[AArch64] Combine vector shift instructions in SelectionDAG

bswap.v2i16 + sitofp in LLVM IR generate a sequence of:

  - REV32 + USHR for bswap.v2i16
  - SHL + SSHR + SCVTF for sext to v2i32 and scvt

The shift instructions are excessive as noted in PR24820, and they can
be optimized to just SSHR.

Differential Revision: https://reviews.llvm.org/D102333
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/aarch64-bswap-ext.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
Commit 3d3abc22b3ef189813a3b9061c2a90ba86a32f44 by sguelton
Force visibility of llvm::Any to external

llvm::Any::TypeId::Id relies on the uniqueness of the address of a static
variable defined in a template function. hidden visibility implies vague linkage
for that variable, which does not guarantee the uniqueness of the address across
a binary and a shared library. This totally breaks the implementation of
llvm::Any.

Ideally, setting visibility to llvm::Any::TypeId::Id should be enough,
unfortunately this doesn't work as expected and we lack time (before 12.0.1
release) to understand why setting the visibility to llvm::Any does work.

See https://gcc.gnu.org/wiki/Visibility and
https://gcc.gnu.org/onlinedocs/gcc/Vague-Linkage.html
for more information on that topic.

Differential Revision: https://reviews.llvm.org/D101972
The file was modifiedllvm/include/llvm/ADT/Any.h
Commit 9199b6535df17c719c980beb3883c956f9d5f809 by caroline.concatto
[CostModel][AArch64] Add missing costs for getShuffleCost with scalable vectors

Differential Revision: https://reviews.llvm.org/D102490
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/AArch64/sve-shuffle-broadcast.ll
The file was modifiedllvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
Commit 412a3381f721452fb6cd33bc30e7700102639e3f by aheejin
[WebAssembly] Ignore filters in Emscripten EH landingpads

We have been handling filters and landingpads incorrectly all along. We
pass clauses' (catches') types to `__cxa_find_matching_catch` in JS glue
code, which returns the thrown pointer and sets the selector using
`setTempRet0()`.

We apparently have been doing the same for filters' (exception specs')
types; we pass them to `__cxa_find_matching_catch` just the same way as
clauses. And `__cxa_find_matching_catch` treats all given types as
clauses. So it is a little surprising; maybe we intended to do something
from the JS side and didn't end up doing?

So anyway, I don't think supporting exception specs in Emscripten EH is
a priority, but this can actually cause incorrect results for normal
catches when functions are inlined and the inlined spec type has a
parent-child relationship with the catch's type.

---

The below is an example of a bug that can happen when inlining and class
hierarchy is mixed. If you are busy you can skip this part:
```
struct A {};
struct B : A {};

void bar() throw (B) { throw B(); }

void foo() {
  try {
    bar();
  } catch (A &) {
    fputs ("Expected result\n", stdout);
  }
}
```

In the unoptimized code, `bar`'s landingpad will have a filter for `B`
and `foo`'s landingpad will have a clause for `A`. But when `bar` is
inlined into `foo`, `foo`'s landingpad has both a filter for `B` and a
clause for `A`, and it passes the both types to
`__cxa_find_matching_catch`:
```
__cxa_find_matching_catch(typeinfo for B, typeinfo for A)
```
`__cxa_find_matching_catch` thinks both are clauses, and looks at the
first type `B`, which belongs to a filter. And the thrown type is `B`,
so it thinks the first type `B` is caught. But this makes it return an
incorrect selector, because it is supposed to catch the exception using
the second type `A`, which is a parent of `B`. As a result, the `foo` in
the example program above does not print "Expected result" but just
throws the exception to the caller. (This wouldn't have happened if `A`
and `B` are completely disjoint types, such as `float` and `int`)

Fixes https://bugs.llvm.org/show_bug.cgi?id=50357.

Reviewed By: dschuff, kripken

Differential Revision: https://reviews.llvm.org/D102795
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/lower-em-exceptions.ll
Commit 4cd1b66dffb06695b4eaf725df8c402347e39bf0 by springerm
[mlir] Add Python bindings for vector dialect

Also add a minimal test case for vector.print.

Differential Revision: https://reviews.llvm.org/D102826
The file was addedmlir/python/mlir/dialects/VectorOps.td
The file was modifiedmlir/python/mlir/dialects/CMakeLists.txt
The file was addedmlir/python/mlir/dialects/vector.py
The file was addedmlir/test/python/dialects/vector.py
Commit ef33c6e3ceb01ee573b70f63bf12c2dcdf84f26a by nicolas.vasilache
[mlir][Linalg] Drop spurious usage of OperationFolder

Instead, use createOrFold builders which result in more static information available.

Differential Revision: https://reviews.llvm.org/D102832
The file was modifiedmlir/test/lib/Dialect/Linalg/TestLinalgTransforms.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/EDSC/FoldedIntrinsics.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/test/Dialect/Linalg/transform-patterns.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
Commit d07d5c1b061bf7139e32b954d64259b7fe829953 by david.sherwood
[CodeGen] Add support for widening INSERT_SUBVECTOR operands

When attempting to return something like a <vscale x 1 x i32>
type from a function we end up trying to widen the vector by
inserting a <vscale x 1 x i32> subvector into an undefined
<vscale x 4 x i32> vector. However, during legalisation we
then attempt to widen the INSERT_SUBVECTOR operands and hit
an error in WidenVectorOperand.

This patch adds a new WidenVecOp_INSERT_SUBVECTOR function
that currently only supports inserting subvectors into undefined
vectors.

Differential Revision: https://reviews.llvm.org/D102501
The file was modifiedllvm/test/CodeGen/AArch64/sve-insert-vector.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-vector-splat.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Commit 1595994b2825a396f650dd8dab8c72a3d71cbc8e by luke957
[RISCV] Add legality check for vectorizing reduction

Check if it is legal to vectorize reduction.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D99509
The file was addedllvm/test/Transforms/LoopVectorize/RISCV/scalable-reductions.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
Commit 10e88972ee2be2cbb6967ec6dadebd38dcf3f022 by llvm-dev
[X86][AVX] Don't scrub pointer math in avx-vperm2x128.ll

This will make it easier to track address offsets in folded loads/broadcasts of subvectors
The file was modifiedllvm/test/CodeGen/X86/avx-vperm2x128.ll
Commit f7c5351552387bd43f6ca3631016d7f0dfe0f135 by tamar.christina
libsanitizer: Guard cyclades inclusion in sanitizer

The Linux kernel has removed the interface to cyclades from
the latest kernel headers[1] due to them being orphaned for the
past 13 years.

libsanitizer uses this header when compiling against glibc, but
glibcs itself doesn't seem to have any references to cyclades.

Further more it seems that the driver is broken in the kernel and
the firmware doesn't seem to be available anymore.

As such since this is breaking the build of libsanitizer (and so the
GCC bootstrap[2]) I propose to remove this.

[1] https://lkml.org/lkml/2021/3/2/153
[2] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100379

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D102059
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
Commit 8294e94ad3e0d580f4aafc2534b53feb50da066e by lebedev.ri
[NFC][SimplifyCFG] Autogenerate checklines in a few tests for ease of updates
The file was modifiedllvm/test/Transforms/SimplifyCFG/unprofitable-pr.ll
The file was modifiedllvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest-two-preds-cost.ll
Commit 7e3d0a5d0f375307e681a79606baa1008b40f6a4 by lebedev.ri
[NFC][PruneEH] Autogenerate checklines in a few tests for ease of updates
The file was modifiedllvm/test/Transforms/PruneEH/ipo-nounwind.ll
Commit eeeeff0d7bbb0b881213be24c0e33de6b755fe64 by lebedev.ri
[NFC][CHR] Autogenerate checklines in a few tests for ease of updates
The file was modifiedllvm/test/Transforms/PGOProfile/chr.ll
Commit 081c62501e4f0aad4ab31de52f871f98403073ad by a.v.lapshin
[llvm-objcopy] Refactor CopyConfig structure.

This patch prepares llvm-objcopy to move its implementation
into a separate library. To make it possible it is necessary
to minimize internal dependencies.

Differential Revision: https://reviews.llvm.org/D99055
The file was modifiedllvm/tools/llvm-objcopy/llvm-objcopy.h
The file was modifiedllvm/tools/llvm-objcopy/ELF/Object.h
The file was addedllvm/tools/llvm-objcopy/ConfigManager.h
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOObjcopy.h
The file was addedllvm/tools/llvm-objcopy/wasm/WasmConfig.h
The file was addedllvm/tools/llvm-objcopy/COFF/COFFConfig.h
The file was removedllvm/tools/llvm-objcopy/CopyConfig.cpp
The file was modifiedllvm/tools/llvm-objcopy/ELF/ELFObjcopy.cpp
The file was modifiedllvm/tools/llvm-objcopy/wasm/WasmObjcopy.cpp
The file was addedllvm/tools/llvm-objcopy/ConfigManager.cpp
The file was removedllvm/tools/llvm-objcopy/ELF/ELFConfig.cpp
The file was addedllvm/tools/llvm-objcopy/MachO/MachOConfig.h
The file was modifiedllvm/tools/llvm-objcopy/CMakeLists.txt
The file was modifiedllvm/tools/llvm-objcopy/llvm-objcopy.cpp
The file was modifiedllvm/tools/llvm-objcopy/ELF/ELFObjcopy.h
The file was addedllvm/tools/llvm-objcopy/MultiFormatConfig.h
The file was modifiedllvm/tools/llvm-objcopy/COFF/COFFObjcopy.cpp
The file was removedllvm/tools/llvm-objcopy/CopyConfig.h
The file was modifiedllvm/tools/llvm-objcopy/COFF/COFFObjcopy.h
The file was modifiedllvm/tools/llvm-objcopy/wasm/WasmObjcopy.h
The file was modifiedllvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp
The file was modifiedllvm/tools/llvm-objcopy/ELF/ELFConfig.h
The file was addedllvm/tools/llvm-objcopy/CommonConfig.h
Commit 2d8cb8205ab77dd5f1396ed46c62d4799f5a46b9 by llvmgnsyncbot
[gn build] Port 081c62501e4f
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
Commit 0f88328867f4a309a558d1064e2cbb936e240629 by david.green
[AArch64] Add extra codegen tests. NFC

This adds some extra codegen tests for abs and hadd, regenerating some
of the existing tests with updated check lines.
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vabs.ll
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vhadd.ll
The file was modifiedllvm/test/CodeGen/AArch64/neg-abs.ll
Commit 1fb5278882e4abf7172b9f6d66404c8febe38ea6 by serguei.n.dmitriev
[llvm-strip] Add support for '--' for delimiting options from input files

This will allow to use llvm-strip with file names that begin with dashes.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D102825
The file was modifiedllvm/tools/llvm-objcopy/ConfigManager.cpp
The file was modifiedllvm/test/tools/llvm-objcopy/dash-dash.test
The file was modifiedllvm/test/tools/llvm-objcopy/tool-help-message.test
Commit 4a35c51c655852d03de6da6ccf743d40a935b293 by lebedev.ri
[NFC][Coroutines] Autogenerate a few tests for ease of further updates
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon-once-value.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon-resume-values.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon-alloca.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-swifterror.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon-value.ll
Commit 7defab082070adf3d04b326ba160b029394edc7c by Jan Svoboda
Reapply "[clang][deps] Support inferred modules"

This reverts commit 76b8754d and ensures the PCM files are created in the correct directory (not in the current working directory).
The file was addedclang/test/ClangScanDeps/Inputs/frameworks/Inferred.framework/Frameworks/Sub.framework/Headers/Sub.h
The file was addedclang/test/ClangScanDeps/Inputs/frameworks/Inferred.framework/Headers/Inferred.h
The file was addedclang/test/ClangScanDeps/modules-inferred-explicit-build.m
The file was addedclang/utils/module-deps-to-rsp.py
The file was addedclang/test/ClangScanDeps/Inputs/modules_inferred_cdb.json
The file was addedclang/test/ClangScanDeps/Inputs/frameworks/System.framework/Modules/module.modulemap
The file was addedclang/test/ClangScanDeps/Inputs/frameworks/module.modulemap
The file was addedclang/test/ClangScanDeps/Inputs/frameworks/System.framework/Headers/System.h
The file was modifiedclang/test/ClangScanDeps/modules-full.cpp
The file was modifiedclang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
The file was addedclang/test/ClangScanDeps/modules-inferred.m
Commit bf3b6cf9208166cc5a2980f56265d8123f0e09bf by david.truby
[llvm][sve] Lowering for VLS MLOAD/MSTORE

This adds custom lowering for the MLOAD and MSTORE ISD nodes when
passed fixed length vectors in SVE. This is done by converting the
vectors to VLA vectors and using the VLA code generation.

Fixed length extending loads and truncating stores currently produce
correct code, but do not use the built in extend/truncate in the
load and store instructions. This will be fixed in a future patch.

Differential Revision: https://reviews.llvm.org/D101834
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was addedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
Commit 62fca69a704cc4883736698b781f63f59e7fa7b2 by llvm-dev
[CostModel][X86][AVX2] Improve 256-bit vector non-uniform shifts costs

Haswell, Excavator and early Ryzen all have slower 256-bit non-uniform vector shifts (confirmed on AMDSoG/Agner/instlatx64 and llvm models) - so bump the worst case costs accordingly.

Noticed while investigating PR50364
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/fshl.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/div.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/fshr.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/rem.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
Commit a28fe17d7315f72b802b4ac4b4bc1603ffe7a23b by akuegel
[mlir] Add EqualOp and NotEqualOp to complex dialect.
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
The file was modifiedmlir/lib/Dialect/Complex/IR/ComplexOps.cpp
The file was modifiedmlir/test/Dialect/Complex/ops.mlir
Commit a21bff0673a1d593588c69e2ed2f557af40faa2d by david.sherwood
[CodeGen] Add support for widening the result of EXTRACT_SUBVECTOR

When trying to return a type such as <vscale x 1 x i32> from a
function we crash in DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR
when attempting to get the fixed number of elements in the vector.

For the simple case we are dealing with, i.e. extracting
<vscale x 1 x i32> from index 0 of input vector <vscale x 4 x i32>
we can simply rely upon existing code that just returns the input.

Differential Revision: https://reviews.llvm.org/D102605
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/test/CodeGen/AArch64/sve-extract-vector.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-int-arith.ll
Commit ac00cb0d2ad58914dd1cf52087ed29cd9834601a by akuegel
[mlir] Add conversion from complex to standard dialect for EqualOp.

This adds the straightforward conversion for EqualOp
(two complex numbers are equal if both the real and the imaginary part are equal).

Differential Revision: https://reviews.llvm.org/D102840
The file was modifiedmlir/test/Conversion/ComplexToStandard/full-conversion.mlir
The file was modifiedmlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
The file was modifiedmlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
Commit bdd82c3f51c2c3a75840a3579a29b641b325a364 by david.green
[ARM] Extra tests for MVE vhadd and vmulh. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmulh.ll
The file was addedllvm/test/CodeGen/Thumb2/mve-vhadd.ll
Commit 80836ee519eb79ac263a84891511c23a416c8565 by joerg
[SPARCv9] allow stw as alias for st

Strictly speaking, the architecture manual no longer uses the st
mnemonic, but that's a much more intrusive change for little gain.

Differential Revision: https://reviews.llvm.org/D96313
The file was modifiedllvm/test/MC/Sparc/sparcv9-instructions.s
The file was modifiedllvm/lib/Target/Sparc/SparcInstrAliases.td
Commit 80c1adfd18b5308422827f8372c28cc2ecfaa015 by hokein.wu
[clang] Invalidate a non-dependent-type RecordDecl when it has any dependent-type base class specifier.

This happens during the error-recovery, and it would esacpe all
dependent-type check guards in getTypeInfo/constexpr-evaluator code
paths, which lead to crashes.

Differential Revision: https://reviews.llvm.org/D102773
The file was modifiedclang/test/SemaTemplate/temp_class_spec.cpp
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
Commit d74b6635ef38d123793f025a2ea1ef28153d803a by Xiangling.Liao
Fix LIT failure on native aix

On AIX, char bitfields have the same alignment as unsigned int.
Reference: https://reviews.llvm.org/D87029

Differential Revision: https://reviews.llvm.org/D102715
The file was modifiedclang/test/Sema/struct-packed-align.c
Commit fa6e87cc5a21f885a4f6d0c7a51ad0f40022f5c8 by Paul C. Anagnostopoulos
[TableGen] [Clang] Clean up arm_mve.td file.

Differential Revision: https://reviews.llvm.org/D102238
The file was modifiedclang/include/clang/Basic/arm_mve.td
Commit 76f375f3d9d6902820ffc21200e454926748c678 by djtodoro
[Debugify][Original DI] Test dbg var loc preservation

This is an improvement of [0]. This adds checking of
original llvm.dbg.values()/declares() instructions in
optimizations.

We have picked a real issue that has been found with
this (actually, picked one variable location missing
from [1] and resolved the issue), and the result is
the fix for that -- D100844.

Before applying the D100844, using the options from [0]
(but with this patch applied) on the compilation of GDB 7.11,
the final HTML report for the debug-info issues can be found
at [1] (please scroll down, and look for
"Summary of Variable Location Bugs"). After applying
the D100844, the numbers has improved a bit -- please take
a look into [2].

[0] https://llvm.org/docs/HowToUpdateDebugInfo.html\
[1] https://djolertrk.github.io/di-check-before-adce-fix/
[2] https://djolertrk.github.io/di-check-after-adce-fix/

Differential Revision: https://reviews.llvm.org/D100845
The file was modifiedllvm/unittests/Transforms/Utils/DebugifyTest.cpp
The file was modifiedllvm/utils/llvm-original-di-preservation.py
The file was modifiedllvm/test/tools/llvm-original-di-preservation/Inputs/expected-sample.html
The file was modifiedllvm/include/llvm/Transforms/Utils/Debugify.h
The file was modifiedllvm/docs/HowToUpdateDebugInfo.rst
The file was modifiedllvm/lib/Transforms/Utils/Debugify.cpp
Commit 0d3619864c6fb7402e323597e6f946bb74b76c7d by tamar.christina
Revert "libsanitizer: Guard cyclades inclusion in sanitizer"

This reverts commit f7c5351552387bd43f6ca3631016d7f0dfe0f135.

To investigate a test failure.
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
Commit 603818b97c795114f66a6fc13e8a5f0e54b49a13 by hubert.reinterpretcast
[test] Fix pre-ra-sched.c to check for error message from stderr

The test previous accidentally passed because it was looking for a lack
of specific input from the binary(!) output being sent to stdout.
The file was modifiedclang/test/CodeGen/pre-ra-sched.c
Commit 0ae3c1d4d7c32fd4c14f1b584b18904ecfab5b14 by djtodoro
Revert "[Debugify][Original DI] Test dbg var loc preservation"

This reverts commit 76f375f3d9d6902820ffc21200e454926748c678.

This will be pushed again, after investigating a test failure:
https://lab.llvm.org/buildbot/#/builders/16/builds/11254
The file was modifiedllvm/include/llvm/Transforms/Utils/Debugify.h
The file was modifiedllvm/utils/llvm-original-di-preservation.py
The file was modifiedllvm/docs/HowToUpdateDebugInfo.rst
The file was modifiedllvm/lib/Transforms/Utils/Debugify.cpp
The file was modifiedllvm/test/tools/llvm-original-di-preservation/Inputs/expected-sample.html
The file was modifiedllvm/unittests/Transforms/Utils/DebugifyTest.cpp
Commit a5c2ec96e5f9f14b31b705e40bcb267257612316 by aaronpuchert
[AST] Store regular ValueDecl* in BindingDecl (NFC)

We were always storing a regular ValueDecl* as decomposition declaration
and haven't been using the opportunity to initialize it lazily.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D99455
The file was modifiedclang/include/clang/AST/DeclCXX.h
The file was modifiedclang/lib/AST/DeclCXX.cpp
Commit 941269133e77498693a584aab0ecaad4695904cc by andrzej.warzynski
[flang][docs] Update driver sync-up call link

The old invitation has expired, so I've created a new one and update the
link in the docs accordingly.
The file was modifiedflang/docs/GettingInvolved.md
Commit b274728b1a6fdd8a31988e593c2a59a6ff3f9a0a by Louis Dionne
[libc++] Switch a few CI jobs to the minimal Lit configuration

Eventually, this should become the default way of running the tests.
For now, only move a few CI nodes to it, and keep a node that runs the
legacy configuration.

Differential Revision: https://reviews.llvm.org/D97565
The file was modifiedlibcxx/test/CMakeLists.txt
The file was modifiedlibcxx/test/configs/libcxx-trunk-static.cfg.in
The file was modifiedlibcxx/test/configs/libcxx-trunk-shared.cfg.in
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
The file was modifiedlibcxx/cmake/caches/Generic-static.cmake
The file was modifiedlibcxx/utils/ci/run-buildbot
Commit ea68ad6e269587d6675c955a8df0161b9d4d63f1 by jonathanchesterfield
[libomptarget] Disable test bug49334 on amdgpu

[libomptarget] Disable test bug49334 on amdgpu

Hangs on amdgpu, do not know why. Disable to unblock build.

Reviewed By: ye-luo

Differential Revision: https://reviews.llvm.org/D102017
The file was modifiedopenmp/libomptarget/test/offloading/bug49334.cpp
Commit cb82e8ea33e3546414b5ef15335c57611d1e04f2 by Louis Dionne
[libc++] Remove workaround for PR28391 (ODR violations with ASAN)

This is not an issue anymore since we don't build the libc++ dylib with
C++14 anymore (see https://llvm.org/PR28391) for details.

Differential Revision: https://reviews.llvm.org/D102106
The file was modifiedlibcxx/utils/libcxx/test/config.py
Commit 5c26f895b66263803074870f82965e71cfc0444f by Louis Dionne
[libc++] Fix documentation build failure
The file was modifiedlibcxx/docs/OneRangesProposalStatus.csv
Commit 801ab71032e157eb7bcd38efeb6486742a7c53bb by daniel.kiss
[ARM][AArch64] SLSHardening: make non-comdat thunks possible

Linker scripts might not handle COMDAT sections. SLSHardeing adds
new section for each __llvm_slsblr_thunk_xN. This new option allows
the generation of the thunks into the normal text section to handle these
exceptional cases.
,comdat or ,noncomdat can be added to harden-sls to control the codegen.
-mharden-sls=[all|retbr|blr],nocomdat.

Reviewed By: kristof.beyls

Differential Revision: https://reviews.llvm.org/D100546
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was modifiedclang/lib/Driver/ToolChains/Arch/AArch64.cpp
The file was modifiedllvm/include/llvm/CodeGen/IndirectThunks.h
The file was modifiedllvm/lib/Target/AArch64/AArch64SLSHardening.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
The file was modifiedllvm/lib/Target/ARM/ARM.td
The file was modifiedclang/lib/Driver/ToolChains/Arch/ARM.cpp
The file was modifiedllvm/test/CodeGen/AArch64/speculation-hardening-sls.ll
The file was modifiedclang/test/Driver/sls-hardening-options.c
The file was modifiedllvm/lib/Target/ARM/ARMSLSHardening.cpp
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.h
The file was modifiedllvm/test/CodeGen/ARM/speculation-hardening-sls.ll
Commit 48780527dd6820698f3537f5ebf76499030ee349 by Raphael Isemann
[lldb][NFC] Add more Float16 unit tests
The file was modifiedlldb/unittests/Core/DumpDataExtractorTest.cpp
Commit d18fb09c693970d1fad09e1ca4b595524af0c842 by jonathanchesterfield
[libomptarget][amdgpu] Remove majority of fatal errors

[libomptarget][amdgpu] Remove majority of fatal errors

Replaces most calls to exit() with returning an error to the library entry
point. Minor changes to error handling for clear bugs, remove some dead code.

Each exit() call site replaced is either in a library entry point or a
function that already returns error codes on some paths. The existing handling
is not well tested but replacing exit() with a fallback path should be a strict
improvement.

Remaining two early exit points are an abort() from a callback and exit() from
within msgpack. Fixes for those are less obvious and left for a later patch.

Reviewed By: pdhaliwal

Differential Revision: https://reviews.llvm.org/D102346
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/data.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/internal.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/utils.cpp
Commit beb5a3a298a1bb2687b421cb960d36a5e9b3ad43 by aaron
Correct some thread safety analysis diagnostics; NFC.

The diagnostics were not following the usual style rules.
The file was modifiedclang/test/SemaCXX/warn-thread-safety-verbose.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
Commit 4519ca3d2e56fee3d9b83a8228db5d5605680d4a by nicolas.vasilache
[mlir][Linalg] NFC - Drop Linalg EDSC usage

Drop the Linalg dialect EDSC subdirectory and update all uses.

Differential Revision: https://reviews.llvm.org/D102848
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOpsSpec.tc
The file was modifiedmlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was removedmlir/lib/Dialect/Linalg/EDSC/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Generalization.cpp
The file was modifiedmlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/EDSC/FoldedIntrinsics.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTypes.h
The file was modifiedmlir/lib/CAPI/Dialect/Linalg.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
The file was removedmlir/lib/Dialect/Linalg/EDSC/Builders.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Utils/CMakeLists.txt
The file was removedmlir/include/mlir/Dialect/Linalg/EDSC/Builders.h
The file was modifiedmlir/lib/Dialect/Linalg/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/test/mlir-linalg-ods-gen/test-linalg-ods-yaml-gen.yaml
The file was modifiedmlir/test/mlir-linalg-ods-gen/test-linalg-ods-gen.tc
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was removedmlir/include/mlir/Dialect/Linalg/EDSC/Intrinsics.h
Commit 182162b61629f039e7aafc3f7eaab9cc64a81c83 by a.bataev
[SLP]Try to vectorize tiny trees with shuffled gathers of extractelements.

If we gather extract elements and they actually are just shuffles, it
might be profitable to vectorize them even if the tree is tiny.

Differential Revision: https://reviews.llvm.org/D101460
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/ext-trunc.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 8ebaa195015dfd56f8413c43aa8f6d78ea7e6b30 by Raphael Isemann
[lldb] Adjust DumpDataExtractorTest.Formats for Windows

Not sure if that's the ostringstream or our conversion code, but this is
returning the wrong results on Windows.
The file was modifiedlldb/unittests/Core/DumpDataExtractorTest.cpp
Commit ee4055cf23e7c7c5e2b91aefbbf10aa23754ade9 by spatel
[GlobalOpt] adjust test to show load problems; NFC

Goes with D102552
The file was modifiedllvm/test/Transforms/GlobalOpt/globalsra-align.ll
Commit f34311c4024d07246128352241ff360173c68f87 by spatel
[GlobalOpt] recompute alignments for loads and stores of updated globals

GlobalOpt can slice structs/arrays and change GEPs in the process,
but it was not updating alignments for load/store users. This
eventually causes the crashing seen in:
https://llvm.org/PR49661
https://llvm.org/PR50253

On x86, this required SLP+codegen to create an aligned vector
store on an invalid address. The bugs would be easier to
demonstrate on a target with stricter alignment requirements.

I'm not sure if this is a complete solution. The alignment
updating code is adapted from InstCombine, so I assume that
part is tested and good.

Differential Revision: https://reviews.llvm.org/D102552
The file was modifiedllvm/test/Transforms/GlobalOpt/globalsra-align.ll
The file was modifiedllvm/lib/Transforms/IPO/GlobalOpt.cpp
The file was modifiedllvm/test/Transforms/GlobalOpt/externally-initialized-global-ctr.ll
Commit 2d574a110440597eefe1b2a8b6144e4e89c21d05 by peter.waller
[CodeGen][AArch64][SVE] Canonicalize intrinsic rdffr{ => _z}

Follow up to D101357 / 3fa6510f6.
Supersedes D102330.

Goal: Use flags setting rdffrs instead of rdffr + ptest.

Problem: RDFFR_P doesn't have have a flags setting equivalent.

Solution: in instcombine, canonicalize to RDFFR_PP at the IR level, and
rely on RDFFR_PP+PTEST => RDFFRS_PP optimization in
AArch64InstrInfo::optimizePTestInstr.

While here:

* Test that rdffr.z+ptest generates a rdffrs.
* Use update_{test,llc}_checks.py on the tests.
* Use sve attribute on functions.

Differential Revision: https://reviews.llvm.org/D102623
The file was modifiedllvm/test/CodeGen/AArch64/sve-intrinsics-ffr-manipulation.ll
The file was modifiedclang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was addedllvm/test/Transforms/InstCombine/AArch64/sve-intrinsics-rdffr-predication.ll
Commit 943839870a0be356c40629c75d4583976cb9e812 by jperier
[flang] simplify derived type info table format

- Replace class(*) member by a c_ptr member to avoid having to handle
  polymorphic components in the type info table generation. Polymorphic
  entity handling will require these very tables to be lowered properly.
  Note: keep the init as NullPointer/Designators. This is technically
  invalid Fortran, the init should have c_ptr type. But wrapping this
  in a C_LOC intrinsic call would make runtime generation and lowering
  more complex with no real benefits.

- ComponentIterator is crashing when used on the generated derived
  types in GetScope. This patch makes GetScope more robust, but it
  is not entirely clear to me why this is only happening with the
  generated derived types.

- The type of generated character globals was incorrect because
  Scope::FindType was matching character types with different
  length. Add a CharacterTypeSpec == operator to fix this.

Differential Revision: https://reviews.llvm.org/D102768
The file was modifiedflang/include/flang/Semantics/type.h
The file was modifiedflang/include/flang/Semantics/tools.h
The file was modifiedflang/test/Semantics/typeinfo01.f90
The file was modifiedflang/module/__fortran_type_info.f90
Commit cf725dde9cb7379496f896f465f3faad511c331b by stephen.tozer
[DebugInfo] Handle DIArgList in FastISel or GlobalIsel

Currently, variadic dbg.values (i.e. those using a DIArgList as part of
their location) are not handled properly by FastISel or GlobalISel, and
will produce invalid DBG_VALUE instructions if they encounter them. This
patch fixes this issue by emitting undef DBG_VALUE instructions for
variadic dbg.values, so that no incorrect instruction is produced and
any prior variable location is terminated.

This is simply a quick-fix to prevent errors; a correct implementation
should come later for these ISel pipelines to ensure that we do not drop
debug information unnecessarily.

Differential Revision: https://reviews.llvm.org/D102500
The file was modifiedllvm/lib/CodeGen/SelectionDAG/FastISel.cpp
The file was modifiedllvm/test/DebugInfo/X86/debug_value_list_selectiondag.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
Commit 136ced498ba84f6b6126051626e319f18ba740f5 by schmeise
When vector is found as a type or non-type id, check if it is really the altivec vector token.

Summary:
Call TryAltiVecVectorToken when an identifier is seen in the parser before
annotating the token.  This checks the next token where necessary to ensure
that vector is properly handled as the altivec token.

Author: Jamie Schmeiser <schmeise@ca.ibm.com>
Reviewed By: ZarkoCA (Zarko Todorovski)
Differential Revision: https://reviews.llvm.org/D100991
The file was modifiedclang/lib/Parse/Parser.cpp
The file was addedclang/test/Parser/altivec-template-vector.cpp
The file was addedclang/test/Parser/altivec-non-type-vector.c
The file was addedclang/test/Parser/altivec-typedef-vector.c
Commit 5b6cae5524905bc43cfc21a515f828528d1f2e68 by Steven Wu
[IR][AutoUpgrade] Drop alignment from non-pointer parameters and returns

This is a follow-up of D102201. After some discussion, it is a better idea
to upgrade all invalid uses of alignment attributes on function return
values and parameters, not just limited to void function return types.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D102726
The file was modifiedllvm/include/llvm/IR/InstrTypes.h
The file was addedllvm/test/Bitcode/upgrade-incompatible-func-attr-11.0.ll.bc
The file was modifiedllvm/lib/IR/Function.cpp
The file was addedllvm/test/Bitcode/upgrade-incompatible-func-attr-11.0.ll
The file was modifiedllvm/include/llvm/IR/Argument.h
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modifiedllvm/lib/IR/AutoUpgrade.cpp
Commit 3a293cbf13a2b6ddb2c1f6d27077ee922f32c404 by aardappel
[WebAssembly] Fix PIC/GOT codegen for wasm64

__table_base is know 64-bit, since in LLVM it represents a function pointer offset
__table_base32 is a copy in wasm32 for use in elem init expr, since no truncation may be used there.
New reloc R_WASM_TABLE_INDEX_REL_SLEB64 added

Differential Revision: https://reviews.llvm.org/D101784
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
The file was modifiedlld/wasm/InputElement.h
The file was modifiedlld/wasm/OutputSections.cpp
The file was modifiedlld/wasm/Relocations.cpp
The file was modifiedlld/wasm/Symbols.cpp
The file was modifiedlld/wasm/Symbols.h
The file was modifiedllvm/include/llvm/BinaryFormat/WasmRelocs.def
The file was addedllvm/test/MC/WebAssembly/reloc-pic64.s
The file was modifiedlld/wasm/Writer.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
The file was modifiedlld/wasm/Driver.cpp
The file was modifiedllvm/lib/Object/WasmObjectFile.cpp
The file was modifiedlld/wasm/SyntheticSections.cpp
The file was modifiedlld/wasm/InputFiles.cpp
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyWasmObjectWriter.cpp
The file was modifiedlld/test/wasm/data-layout.s
The file was addedlld/test/wasm/shared64.s
The file was modifiedlld/wasm/InputChunks.cpp
Commit 26bd2250c1870f1983fd3439becfbb39e369b8a3 by fraser
[RISCV] Ensure shuffle splat operands are type-legal

The use of `SelectionDAG::getSplatValue` isn't guaranteed to return a
type-legal splat value as it may implicitly extract a vector element
from another shuffle. It is not permitted to introduce an illegal type
when lowering shuffles.

This patch addresses the crash by adding a boolean flag to
`getSplatValue`, defaulting to false, which when set will ensure a
type-legal return value. If it is unable to do that it will fail to
return a splat value.

I've been through the existing uses of `getSplatValue` in other targets
and was unable to find a need or test cases showing a need to update
their uses. In some cases, the call is made during `LegalizeVectorOps`
which may still produce illegal scalar types. In other situations, the
illegally-typed splat value may be quickly patched up to a legal type
(such as any-extending the returned `extract_vector_elt` up to a legal
type) before `LegalizeDAG` notices.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D102687
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h
Commit 45ad207e4585ff18ed11509991bf8512f2466818 by stefanp
[PowerPC] Add fix to partword atomic operations

Partword atomic binaries are not zero extended as they should be.
This patch fixes them to ensure that they are zero extended.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D102819
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was addedllvm/test/CodeGen/PowerPC/ppc-partword-atomic.ll
The file was modifiedllvm/test/CodeGen/PowerPC/atomics.ll
Commit 752385b128e437b2219934aa75a0c8dd65b6be44 by aorlov
Add support for DWARF embedded source to llvm-symbolizer.

This patch adds DWARF embedded source printout to llvm-symbolizer.

Reviewed By: jhenderson, dblaikie

Differential Revision: https://reviews.llvm.org/D102355
The file was modifiedllvm/lib/DebugInfo/Symbolize/DIPrinter.cpp
The file was addedllvm/test/tools/llvm-symbolizer/source.ll
Commit 68d5235cb58f988c71b403334cd9482d663841ab by tamar.christina
libsanitizer: Remove cyclades inclusion in sanitizer

The Linux kernel has removed the interface to cyclades from
the latest kernel headers[1] due to them being orphaned for the
past 13 years.

libsanitizer uses this header when compiling against glibc, but
glibcs itself doesn't seem to have any references to cyclades.

Further more it seems that the driver is broken in the kernel and
the firmware doesn't seem to be available anymore.

As such since this is breaking the build of libsanitizer (and so the
GCC bootstrap[2]) I propose to remove this.

[1] https://lkml.org/lkml/2021/3/2/153
[2] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100379

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D102059
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_ioctl.inc
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
Commit a26288e8030a44a5696fe170de3fea79800d7bcd by llvm-dev
[X86][Atom] Fix vector fadd/fcmp/fmul resource/throughputs

Match whats documented in the Intel AOM - these are all fadd/fcmp use Port1 and fmul uses Port1, but in many cases BOTH ports are required - this was being incorrectly modelled as EITHER port.

Discovered while investigating the correct fptoui costs to fix the regressions in D101555.

Now that we can use in-order models in llvm-mca, the atom model is a good "worst case scenario" analysis for x86.
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-x87.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse3.s
Commit d22b27cfde0f65794acc3ff0663e0ad70fb2b7fc by Lang Hames
[ORC-RT] Add string_view and span utilities for use by the ORC runtime.

These are substitutes for std::string_view (and llvm::StringRef) and std::span
(and llvm::ArrayRef) for use by the ORC runtime.
The file was addedcompiler-rt/lib/orc/adt.h
The file was addedcompiler-rt/lib/orc/unittests/adt_test.cpp
The file was modifiedcompiler-rt/lib/orc/unittests/CMakeLists.txt
Commit 577a80bff8bdf9b26c0f4ff6d1807e43da66ec6a by 31459023+hctim
[scudo] Disable secondary cache-unmap tests on arm32.

Looks like secondary pointers don't get unmapped on one of the arm32
bots. In the interests of landing some dependent patches, disable this
test on arm32 so that it can be tested in isolation later.

Reviewed By: cryptoad, vitalybuka

Split from differential patchset (1/2): https://reviews.llvm.org/D102648
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
Commit 8f20ac9595c8b279641dace6f212b8a9673b24e4 by rnk
[PGO] Don't reference functions unless value profiling is enabled

This reduces the size of chrome.dll.pdb built with optimizations,
coverage, and line table info from 4,690,210,816 to 2,181,128,192, which
makes it possible to fit under the 4GB limit.

This change can greatly reduce binary size in coverage builds, which do
not need value profiling. IR PGO builds are unaffected. There is a minor
behavior change for frontend PGO.

PGO and coverage both use InstrProfiling to create profile data with
counters. PGO records the address of each function in the __profd_
global. It is used later to map runtime function pointer values back to
source-level function names. Coverage does not appear to use this
information.

Recording the address of every function with code coverage drastically
increases code size. Consider this program:

  void foo();
  void bar();
  inline void inlineMe(int x) {
    if (x > 0)
      foo();
    else
      bar();
  }
  int getVal();
  int main() { inlineMe(getVal()); }

With code coverage, the InstrProfiling pass runs before inlining, and it
captures the address of inlineMe in the __profd_ global. This greatly
increases code size, because now the compiler can no longer delete
trivial code.

One downside to this approach is that users of frontend PGO must apply
the -mllvm -enable-value-profiling flag globally in TUs that enable PGO.
Otherwise, some inline virtual method addresses may not be recorded and
will not be able to be promoted. My assumption is that this mllvm flag
is not popular, and most frontend PGO users don't enable it.

Differential Revision: https://reviews.llvm.org/D102818
The file was modifiedclang/lib/CodeGen/CodeGenPGO.cpp
The file was modifiedcompiler-rt/test/profile/instrprof-value-prof.c
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
The file was modifiedclang/lib/CodeGen/CodeGenPGO.h
The file was modifiedcompiler-rt/test/profile/instrprof-value-prof-2.c
Commit c74ab891fc9ce4436a3360e14becea9c6794837f by fraser
[RISCV] Ensure small mask BUILD_VECTORs aren't expanded

The default expansion for BUILD_VECTORs -- save for going through
shuffles -- is to go through the stack. This method only works when the
type is at least byte-sized, so for v2i1 and v4i1 we would crash.

This patch ensures that small mask-type BUILD_VECTORs are always handled
without crashing. We lower to a SETCC of the equivalent i8 type.

This also exposes some pre-existing issues where the lowering when
optimizing for size results in larger code than without. Those will be
tackled in future patches.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D102767
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
Commit f4ccbaf310f15f8eb91d0504395171504638b93f by 31459023+hctim
[scudo] Add supported architectures.

Adds extra supported architectures that were available for vanilla
scudo, in preparation for D102543. Hopefully the dust has settled and
7d0a81ca38e427de9b7fb0961ec643b757028131 is no longer an issue.

Reviewed By: cryptoad, vitalybuka

Differential Revision: https://reviews.llvm.org/D102648
The file was modifiedcompiler-rt/cmake/config-ix.cmake