SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [ARM] Add patterns for vmulh (details)
  2. [NFC][object] Change the input parameter of the method isDebugSection. (details)
  3. [mlir] Fold complex.re(complex.create) and complex.im(complex.create) (details)
  4. [InstCombine] Fold extractelement + vector GEP with one use (details)
  5. [mlir] Simplify folding code (NFC) (details)
  6. [mlir] LocalAliasAnalysis: Assume allocation scope to function scope if cannot determine better (details)
  7. [HIP] Adjust check in hip-include-path.hip test case (details)
  8. Fix warning introduced by 9c766f4090d19e3e2f56e87164177f8c3eba4b96 (details)
  9. [NFC][X86] clang-format X86TTIImpl::getInterleavedMemoryOpCostAVX2() (details)
  10. [Test] Add test on unrolling to make sure it won't fail (details)
  11. [X86][Atom] Fix vector variable shift resource/throughputs (details)
  12. [CostModel][X86] Remove old testshift* tests (details)
  13. AArch64: support post-indexed stores to bfloat types. (details)
  14. [Test] Add simplified versions of tests for loop deletion that don't need context (details)
  15. [RISCV] Pre-commit fixed-length mask vselect tests (details)
  16. Revert "[AMDGPU][GlobalISel] Stop foldInsertEltToCmpSelect from changing reg banks" (details)
  17. [AMDGPU][GlobalISel] Stop foldInsertEltToCmpSelect from changing reg banks (details)
  18. [NFC] Add CHECK lines for unordered FP reductions (details)
  19. [AMDGPU][Libomptarget] Move Kernel/Symbol info tables to RTLDeviceInfoTy (details)
  20. [SCEV] Add tests with signed predicates for applyLoopGuards. (details)
  21. [X86][SLM] Fix vector PSHUFB + variable shift resource/throughputs (details)
  22. [lldb][NFC] Use C++ versions of the deprecated C standard library headers (details)
  23. [AMDGPU][Libomptarget] Delete g_atmi_initialized (details)
  24. [AMDGPU][Libomptarget] Inline atmi_init/atmi_finalize (details)
  25. [MC][NFCI] Factor out ELF section unique ID calculation (details)
  26. [MC][ELF] Emit unique sections for different flags (details)
  27. [Docs] Updated the content of getting started documentation under llvm/lib/MC (details)
  28. [MC] Move elf-unique-sections-by-flags.ll to X86/ (details)
  29. [OpenCL] Include header for atomic-ops test (details)
  30. [Test] Add Loop Deletion test with irreducible CFG (details)
  31. [AArch64] Generate LD1 for anyext i8 or i16 vector load (details)
  32. [mlir] Fold complex.create(complex.re(op), complex.im(op)) (details)
  33. Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration" (details)
  34. Revert "Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration"" (details)
  35. [InstCombine] avoid 'tmp' usage in test file; NFC (details)
  36. [InstCombine] avoid 'tmp' usage in test files; NFC (details)
  37. [InstCombine] add fmul tests with shared operand; NFC (details)
  38. Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration" (try 2) (details)
  39. [LoopVectorize] Enable strict reductions when allowReordering() returns false (details)
  40. [SLP][NFC]Add a test for multiple uses of insertelement instruction, (details)
  41. [MCA][InOrderIssueStage] Fix LastWriteBackCycle computation. (details)
  42. [X86][SSE] Regenerate some tests to expose the rip relative vector/broadcast loads (details)
  43. [ARM] Extra test for reverted WLS memset. NFC (details)
  44. [CostModel][AArch64] Add tests for bitreverse. NFC. (details)
  45. [X86][AMX] Fix a bug on tile config. (details)
  46. [clang-cl] Add driver support for /std:c++20 and bump /std:c++latest (PR50465) (details)
  47. [SystemZ][z/OS] Validate symbol names for z/OS for printing without quotes (details)
  48. [AMDGPU] Fix function pointer argument bug in AMDGPU Propagate Attributes pass. (details)
  49. [SystemZ][z/OS] Enable the AllowAtInName attribute for the HLASM dialect (details)
  50. [MCA] Add a test for PR50483. NFC (details)
  51. [clangd] New ParsingCallback for semantics changes (details)
  52. [SystemZ] Support i128 inline asm operands. (details)
  53. [libc++] Fix concepts tests with GCC (details)
  54. [unroll] Use value domain for symbolic execution based cost model (details)
  55. [mlir][openacc] Translate UpdateOp to LLVM IR (details)
  56. [libc++][NFC] Move format_error to its own header. (details)
  57. [gn build] Port 16342e39947b (details)
  58. [libc++][NFC] Move basic_format_parse_context to its own header. (details)
  59. [mlir] Add `distributionTypes` to LinalgTilingOptions. (details)
  60. [libc++][format] Adds availability macros for std::format. (details)
  61. [gn build] Port de9df3f5b952 (details)
  62. [libomptarget][nfc][amdgpu] Remove atmi_status_t type (details)
  63. [AMDGPU][NFC] Remove non-existing function header (details)
  64. [RISCV] Enable cross basic block aware vsetvli insertion (details)
  65. [lldb] Remove cache in get_demangled_name_without_arguments (details)
  66. [libunwind] Inform ASan that resumption is noreturn (details)
  67. [lldb] add LLDB_SKIP_DSYM option (details)
  68. [DebugInfo] Limit the number of values that may be referenced by a dbg.value (details)
  69. [SLP]Fix vectorization of insertelements with multiple uses. (details)
  70. [scudo] Get rid of initLinkerInitialized (details)
  71. [RISCV] Don't propagate VL/VTYPE across inline assembly in the Insert VSETVLI pass. (details)
  72. [RISCV] Remove --riscv-no-aliases from RVV tests (details)
  73. [Scudo] Make -fsanitize=scudo use standalone. Migrate tests. (details)
  74. [SCEV] Extract out a helper for computing trip multiples (details)
  75. [RISCV] Optimize SEW=64 shifts by splat on RV32. (details)
  76. [SCEV] Add a utility for converting from "exit count" to "trip count" (details)
  77. [llvm-mc] Add -M to replace -riscv-no-aliases and -riscv-arch-reg-names (details)
  78. Revert "[Scudo] Make -fsanitize=scudo use standalone. Migrate tests." (details)
  79. [mlir] Make StripDebugInfo strip out block arguments locs (details)
  80. [SCEV] Generalize getSmallConstantTripCount(L) for multiple exit loops (details)
  81. [libomptarget][nfc][amdgpu] Refactor uses of KernelInfoTable (details)
  82. [AMDGPU][MC][GFX90A] Corrected DS_GWS opcodes (details)
  83. [AMDGPU] Fix kernel LDS lowering for constants (details)
  84. [SimplifyCFG] Use make_early_inc_range() while deleting instructions (details)
  85. [WebAssembly] Add TargetInstrInfo::getCalleeOperand (details)
  86. [SCEV] Compute trip multiple for multiple exit loops (details)
  87. [NFC][X86][Costmodel] Add some more interleaved load/store test with i16 element type (details)
  88. [NFC][Codegen][X86] Add a few more interleaved load/store patterns w/ i16 element type (details)
  89. [libomptarget][nfc][amdgpu] Factor out setting upper bounds (details)
Commit 2cf0e52b8548716d8534470db1ce4bbb3571eea9 by david.green
[ARM] Add patterns for vmulh

Now that vmulh can be selected, this adds the MVE patterns to make it
legal and generate instructions.

Differential Revision: https://reviews.llvm.org/D88011
The file was modifiedllvm/unittests/Target/ARM/MachineInstrTest.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmulh.ll
Commit bf809cd165f4ea1b8ef6aabc8e41e29747b4d2c7 by esme.yi
[NFC][object] Change the input parameter of the method isDebugSection.

Summary: This is a NFC patch to change the input parameter of the method SectionRef::isDebugSection(), by replacing the StringRef SectionName with DataRefImpl Sec. This allows us to determine if a section is debug type in more ways than just by section name.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D102601
The file was modifiedllvm/lib/Object/COFFObjectFile.cpp
The file was modifiedllvm/include/llvm/Object/ObjectFile.h
The file was modifiedllvm/tools/llvm-dwarfdump/SectionSizes.cpp
The file was modifiedllvm/lib/Object/MachOObjectFile.cpp
The file was modifiedllvm/lib/Object/ObjectFile.cpp
The file was modifiedllvm/include/llvm/Object/COFF.h
The file was modifiedllvm/include/llvm/Object/MachO.h
The file was modifiedllvm/include/llvm/Object/ELFObjectFile.h
Commit b99f892b025b553680c7e5dbcf15ab7301e3fa57 by akuegel
[mlir] Fold complex.re(complex.create) and complex.im(complex.create)

This extends the folding we already have. A test needs to be adjusted.

Differential Revision: https://reviews.llvm.org/D103141
The file was modifiedmlir/test/Conversion/ComplexToLLVM/convert-to-llvm.mlir
The file was modifiedmlir/lib/Dialect/Complex/IR/ComplexOps.cpp
The file was modifiedmlir/test/Dialect/Complex/canonicalize.mlir
Commit 9c766f4090d19e3e2f56e87164177f8c3eba4b96 by david.sherwood
[InstCombine] Fold extractelement + vector GEP with one use

We sometimes see code like this:

Case 1:
  %gep = getelementptr i32, i32* %a, <2 x i64> %splat
  %ext = extractelement <2 x i32*> %gep, i32 0

or this:

Case 2:
  %gep = getelementptr i32, <4 x i32*> %a, i64 1
  %ext = extractelement <4 x i32*> %gep, i32 0

where there is only one use of the GEP. In such cases it makes
sense to fold the two together such that we create a scalar GEP:

Case 1:
  %ext = extractelement <2 x i64> %splat, i32 0
  %gep = getelementptr i32, i32* %a, i64 %ext

Case 2:
  %ext = extractelement <2 x i32*> %a, i32 0
  %gep = getelementptr i32, i32* %ext, i64 1

This may create further folding opportunities as a result, i.e.
the extract of a splat vector can be completely eliminated. Also,
even for the general case where the vector operand is not a splat
it seems beneficial to create a scalar GEP and extract the scalar
element from the operand. Therefore, in this patch I've assumed
that a scalar GEP is always preferrable to a vector GEP and have
added code to unconditionally fold the extract + GEP.

I haven't added folds for the case when we have both a vector of
pointers and a vector of indices, since this would require
generating an additional extractelement operation.

Tests have been added here:

  Transforms/InstCombine/gep-vector-indices.ll

Differential Revision: https://reviews.llvm.org/D101900
The file was modifiedllvm/test/Transforms/InstCombine/vec_demanded_elts-inseltpoison.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
The file was addedllvm/test/Transforms/InstCombine/gep-vector-indices.ll
The file was modifiedllvm/test/Transforms/InstCombine/vec_gep_scalar_arg-inseltpoison.ll
The file was modifiedllvm/test/Transforms/InstCombine/vec_gep_scalar_arg.ll
The file was modifiedllvm/test/Transforms/InstCombine/vec_demanded_elts.ll
Commit cb65419b1ac05c3020dd05b64db183712235d2ff by akuegel
[mlir] Simplify folding code (NFC)
The file was modifiedmlir/lib/Dialect/Complex/IR/ComplexOps.cpp
Commit 91e0cb6598f458c79707bc3481f0e70b1dd731d4 by ivan.butygin
[mlir] LocalAliasAnalysis: Assume allocation scope to function scope if cannot determine better

It helps when checking aliasing between AllocOp result and function arguments.

Differential Revision: https://reviews.llvm.org/D102557
The file was modifiedmlir/test/Analysis/test-alias-analysis.mlir
The file was modifiedmlir/lib/Analysis/AliasAnalysis/LocalAliasAnalysis.cpp
Commit a3b3f7e631981bd861d5fe5e20f33b11a0dac978 by bjorn.a.pettersson
[HIP] Adjust check in hip-include-path.hip test case

The changes in commit 722c39fef5ab6 caused the test case to fail
when building with -DLLVM_LIBDIR_SUFFIX=64. This patch makes the
checks a bit more relaxed to support libdir suffixes again.

Also adjusting the regular expressions to avoid mathes including
double quotes.
The file was modifiedclang/test/Driver/hip-include-path.hip
Commit 70d8365e33366d44fd61c149f96e8228e05bebc0 by david.sherwood
Fix warning introduced by 9c766f4090d19e3e2f56e87164177f8c3eba4b96
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
Commit 8c86161a0be2266dd9232e9f1c13b625c2ff0db2 by lebedev.ri
[NFC][X86] clang-format X86TTIImpl::getInterleavedMemoryOpCostAVX2()

I plan to make changes to it, and undoing formatting each time is not going to be fun.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 794fb5482efc4af5434e23efb5b0a99b4a386eed by mkazantsev
[Test] Add test on unrolling to make sure it won't fail

Initially it failed an assertion with "Do actual DCE in LoopUnroll (try 2)"
which was later reverted. Make sure that when this patch is returned, the
test works fine.
The file was modifiedllvm/test/Transforms/LoopUnroll/nonlatchcondbr.ll
Commit 66978466baefbaac3234df07851ec6d94f99914c by llvm-dev
[X86][Atom] Fix vector variable shift resource/throughputs

Match whats documented in the Intel AOM - the non-immediate variants of the PSLL*/PSRA*/PSRL* shift instructions requires BOTH ports - this was being incorrectly modelled as EITHER port.

Now that we can use in-order models in llvm-mca, the atom model is a good "worst case scenario" analysis for x86.
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-mmx.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s
Commit 942e01de896a5e1fa76d367747e8fc0126038038 by llvm-dev
[CostModel][X86] Remove old testshift* tests

The vector shift cost tests are better covered (more cpu/sse levels) by the vshift-*-*cost files, and we're trying to avoid codegen tests in here as it makes it harder to maintain the test files.
The file was removedllvm/test/Analysis/CostModel/X86/testshiftlshr.ll
The file was removedllvm/test/Analysis/CostModel/X86/testshiftashr.ll
The file was removedllvm/test/Analysis/CostModel/X86/testshiftshl.ll
Commit 8c5ac18d7165fa0963583e0249faa3b272239fee by Tim Northover
AArch64: support post-indexed stores to bfloat types.
The file was modifiedllvm/test/CodeGen/AArch64/bf16.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
Commit 7ee863b8ebfad9249450dd283087042354a02939 by mkazantsev
[Test] Add simplified versions of tests for loop deletion that don't need context
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
Commit 7e27e4273d093064da8ecbf868795f8ae68bc775 by fraser
[RISCV] Pre-commit fixed-length mask vselect tests

These are default-expanded but later unrolled due to RISC-V's vector
boolean content policy. A patch to improve this codegen will follow
shortly.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
Commit 7386ad4e9e26df93876ae309920e4f7e72288bae by Mirko.Brkusanin
Revert "[AMDGPU][GlobalISel] Stop foldInsertEltToCmpSelect from changing reg banks"

This reverts commit 18c5444702893fd63b0a99ec7133dd714284f9d2.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert-vector-elt.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Commit 9601849984a79eae176a9b114d7707c651097523 by Mirko.Brkusanin
[AMDGPU][GlobalISel] Stop foldInsertEltToCmpSelect from changing reg banks

This function can change regbank for registers which already have a selected
bank. Depending on the instruction where these registers were used it can
cause instruction selection to fail.

Differential Revision: https://reviews.llvm.org/D98515
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
Commit 6b0fe3c63b4619a67b45853b7bd47ecac75c4f31 by kerry.mclaughlin
[NFC] Add CHECK lines for unordered FP reductions

An additional RUN line has been added to both strict-fadd.ll &
scalable-strict-fadd.ll to ensure the correct behaviour of these
tests where `-enable-strict-reductions` is false.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D103015
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
Commit 7648b6978e5539bcb43b3ca24a5a53e9c6a52c1e by Pushpinder.Singh
[AMDGPU][Libomptarget] Move Kernel/Symbol info tables to RTLDeviceInfoTy

Two globals KernelInfoTable & SymbolInfoTable are moved
into RTLDeviceInfoTy class.
This builds on the top of D102691.
[2/2]

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D102692
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_interop_hsa.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/internal.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_interop_hsa.cpp
Commit 2a41d702be478e3975f49bffec0672c991225786 by flo
[SCEV] Add tests with signed predicates for applyLoopGuards.
The file was modifiedllvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
Commit 21aec4fdc5de213a1009bc684adff988c290c6b3 by llvm-dev
[X86][SLM] Fix vector PSHUFB + variable shift resource/throughputs

Match whats documented in the Intel AOM (+Agner) - PSHUFB xmm is really slow, and mmx/xmm vector shifts are half rate.

Noticed while working to get the cost tables to more closely match llvm-mca analysis, in this case for shifts and truncations.
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-sse2.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleSLM.td
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-ssse3.s
The file was modifiedllvm/test/tools/llvm-mca/X86/SLM/resources-mmx.s
Commit 76e47d4887f456878c0e2f20ebfae36267006cd7 by Raphael Isemann
[lldb][NFC] Use C++ versions of the deprecated C standard library headers

The C headers are deprecated so as requested in D102845, this is replacing them
all with their (not deprecated) C++ equivalent.

Reviewed By: shafik

Differential Revision: https://reviews.llvm.org/D103084
The file was modifiedlldb/source/Host/posix/DomainSocket.cpp
The file was modifiedlldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp
The file was modifiedlldb/tools/lldb-vscode/VSCode.cpp
The file was modifiedlldb/include/lldb/Core/ValueObjectCast.h
The file was modifiedlldb/tools/debugserver/source/PThreadMutex.h
The file was modifiedlldb/source/Core/IOHandlerCursesGUI.cpp
The file was modifiedlldb/source/Host/linux/HostInfoLinux.cpp
The file was modifiedlldb/source/Interpreter/CommandHistory.cpp
The file was modifiedlldb/source/Utility/ReproducerInstrumentation.cpp
The file was modifiedlldb/include/lldb/Core/SearchFilter.h
The file was modifiedlldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
The file was modifiedlldb/source/Core/Module.cpp
The file was modifiedlldb/include/lldb/Utility/DataBufferLLVM.h
The file was modifiedlldb/include/lldb/Utility/GDBRemote.h
The file was modifiedlldb/source/Core/IOHandler.cpp
The file was modifiedlldb/tools/debugserver/source/RNBRemote.cpp
The file was modifiedlldb/include/lldb/Core/Communication.h
The file was modifiedlldb/source/Core/SearchFilter.cpp
The file was modifiedlldb/source/Plugins/Process/POSIX/CrashReason.h
The file was modifiedlldb/source/Plugins/Process/Utility/LinuxPTraceDefines_arm64sve.h
The file was modifiedlldb/source/Expression/UserExpression.cpp
The file was modifiedlldb/tools/debugserver/source/DNBRegisterInfo.h
The file was modifiedlldb/source/Core/FileSpecList.cpp
The file was modifiedlldb/source/Utility/Event.cpp
The file was modifiedlldb/include/lldb/API/SBThread.h
The file was modifiedlldb/source/API/SBFileSpecList.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Host/common/Editline.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ASTStructExtractor.cpp
The file was modifiedlldb/include/lldb/Core/ValueObjectSyntheticFilter.h
The file was modifiedlldb/include/lldb/Utility/FileSpec.h
The file was modifiedlldb/include/lldb/Core/UserSettingsController.h
The file was modifiedlldb/source/Plugins/Platform/FreeBSD/PlatformFreeBSD.cpp
The file was modifiedlldb/source/Plugins/Process/MacOSX-Kernel/CommunicationKDP.cpp
The file was modifiedlldb/source/Utility/StringList.cpp
The file was modifiedlldb/tools/debugserver/source/debugserver.cpp
The file was modifiedlldb/include/lldb/Host/windows/PosixApi.h
The file was modifiedlldb/source/Utility/UriParser.cpp
The file was modifiedlldb/include/lldb/Utility/Event.h
The file was modifiedlldb/tools/debugserver/source/StdStringExtractor.h
The file was modifiedlldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
The file was modifiedlldb/source/Breakpoint/BreakpointSite.cpp
The file was modifiedlldb/source/Host/common/Terminal.cpp
The file was modifiedlldb/source/Plugins/Platform/Linux/PlatformLinux.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm.cpp
The file was modifiedlldb/include/lldb/Core/Debugger.h
The file was modifiedlldb/source/Utility/Logging.cpp
The file was modifiedlldb/tools/debugserver/source/MacOSX/i386/MachRegisterStatesI386.h
The file was modifiedlldb/source/Host/common/FileSystem.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.cpp
The file was modifiedlldb/source/Core/Communication.cpp
The file was modifiedlldb/source/Plugins/Process/minidump/RegisterContextMinidump_ARM.cpp
The file was modifiedlldb/source/Core/EmulateInstruction.cpp
The file was modifiedlldb/source/Plugins/Process/Linux/SingleStepCheck.cpp
The file was modifiedlldb/tools/debugserver/source/MacOSX/MachException.cpp
The file was modifiedlldb/include/lldb/Core/StreamAsynchronousIO.h
The file was modifiedlldb/tools/lldb-server/lldb-gdbserver.cpp
The file was modifiedlldb/include/lldb/Utility/Status.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
The file was modifiedlldb/source/Core/DumpDataExtractor.cpp
The file was modifiedlldb/source/Utility/ConstString.cpp
The file was modifiedlldb/source/Core/ValueObjectChild.cpp
The file was modifiedlldb/source/Utility/TildeExpressionResolver.cpp
The file was modifiedlldb/include/lldb/Host/Host.h
The file was modifiedlldb/include/lldb/API/SBEvent.h
The file was modifiedlldb/source/Host/common/ProcessLaunchInfo.cpp
The file was modifiedlldb/source/Host/posix/HostInfoPosix.cpp
The file was modifiedlldb/tools/debugserver/source/DNBLog.h
The file was modifiedlldb/source/Core/StreamFile.cpp
The file was modifiedlldb/include/lldb/Utility/Timer.h
The file was modifiedlldb/include/lldb/DataFormatters/TypeSummary.h
The file was modifiedlldb/include/lldb/Host/StringConvert.h
The file was modifiedlldb/include/lldb/Utility/StringExtractor.h
The file was modifiedlldb/include/lldb/Core/DumpDataExtractor.h
The file was modifiedlldb/include/lldb/Core/FileLineResolver.h
The file was modifiedlldb/source/Host/common/StringConvert.cpp
The file was modifiedlldb/include/lldb/API/SBProcess.h
The file was modifiedlldb/include/lldb/Core/AddressResolver.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
The file was modifiedlldb/source/Utility/RegisterValue.cpp
The file was modifiedlldb/source/Utility/StringLexer.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
The file was modifiedlldb/include/lldb/Utility/Stream.h
The file was modifiedlldb/include/lldb/Core/dwarf.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfos_arm.h
The file was modifiedlldb/tools/debugserver/source/MacOSX/arm/DNBArchImpl.cpp
The file was modifiedlldb/source/Core/Disassembler.cpp
The file was modifiedlldb/source/Utility/Stream.cpp
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
The file was modifiedlldb/source/Utility/Status.cpp
The file was modifiedlldb/tools/debugserver/source/PseudoTerminal.cpp
The file was modifiedlldb/include/lldb/Host/HostInfoBase.h
The file was modifiedlldb/tools/debugserver/source/JSON.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationReplayServer.cpp
The file was modifiedlldb/source/Utility/DataEncoder.cpp
The file was modifiedlldb/tools/darwin-debug/darwin-debug.cpp
The file was modifiedlldb/include/lldb/Core/ValueObjectDynamicValue.h
The file was modifiedlldb/source/Utility/Timer.cpp
The file was modifiedlldb/source/Host/posix/PipePosix.cpp
The file was modifiedlldb/source/Host/common/MainLoop.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfos_powerpc.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfos_s390x.h
The file was modifiedlldb/source/Core/AddressRange.cpp
The file was modifiedlldb/source/Host/posix/HostProcessPosix.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDefines.h
The file was modifiedlldb/include/lldb/Core/EmulateInstruction.h
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionVariable.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfos_mips.h
The file was modifiedlldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfos_ppc64le.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.cpp
The file was modifiedlldb/include/lldb/Utility/StreamTee.h
The file was modifiedlldb/include/lldb/Core/StreamFile.h
The file was modifiedlldb/tools/lldb-vscode/VSCode.h
The file was modifiedlldb/tools/driver/Driver.cpp
The file was modifiedlldb/tools/driver/Platform.h
The file was modifiedlldb/source/Utility/SelectHelper.cpp
The file was modifiedlldb/source/Host/openbsd/Host.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
The file was modifiedlldb/source/Host/common/Socket.cpp
The file was modifiedlldb/source/Interpreter/CommandObject.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
The file was modifiedlldb/tools/debugserver/source/DNBArch.h
The file was modifiedlldb/include/lldb/Utility/DataExtractor.h
The file was modifiedlldb/source/Plugins/Language/ObjC/CoreMedia.cpp
The file was modifiedlldb/source/Core/ValueObjectDynamicValue.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangUtilityFunction.cpp
The file was modifiedlldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
The file was modifiedlldb/tools/driver/Platform.cpp
The file was modifiedlldb/include/lldb/Core/FileSpecList.h
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
The file was modifiedlldb/include/lldb/Utility/VMRange.h
The file was modifiedlldb/include/lldb/Utility/UUID.h
The file was modifiedlldb/tools/debugserver/source/DNB.cpp
The file was modifiedlldb/tools/debugserver/source/TTYState.h
The file was modifiedlldb/source/Host/windows/Windows.cpp
The file was modifiedlldb/include/lldb/Core/ValueObjectChild.h
The file was modifiedlldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
The file was modifiedlldb/source/API/SBDeclaration.cpp
The file was modifiedlldb/source/Core/Address.cpp
The file was modifiedlldb/include/lldb/Core/AddressResolverFileLine.h
The file was modifiedlldb/include/lldb/Core/ValueObject.h
The file was modifiedlldb/tools/debugserver/source/DNBDefs.h
The file was modifiedlldb/include/lldb/API/SBDebugger.h
The file was modifiedlldb/include/lldb/Host/Time.h
The file was modifiedlldb/source/Expression/UtilityFunction.cpp
The file was modifiedlldb/include/lldb/Host/File.h
The file was modifiedlldb/include/lldb/Utility/StringExtractorGDBRemote.h
The file was modifiedlldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
The file was modifiedlldb/include/lldb/Host/FileSystem.h
The file was modifiedlldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
The file was modifiedlldb/include/lldb/Utility/Endian.h
The file was modifiedlldb/source/API/SBError.cpp
The file was modifiedlldb/source/Symbol/Type.cpp
The file was modifiedlldb/include/lldb/Core/ValueObjectConstResultChild.h
The file was modifiedlldb/include/lldb/Core/ValueObjectList.h
The file was modifiedlldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
The file was modifiedlldb/include/lldb/Utility/Listener.h
The file was modifiedlldb/include/lldb/API/SBInstruction.h
The file was modifiedlldb/source/Host/common/SocketAddress.cpp
The file was modifiedlldb/source/Expression/DWARFExpression.cpp
The file was modifiedlldb/source/Core/AddressResolverFileLine.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextDarwin_x86_64.cpp
The file was modifiedlldb/source/API/SBFileSpec.cpp
The file was modifiedlldb/source/Core/Mangled.cpp
The file was modifiedlldb/source/Utility/UUID.cpp
The file was modifiedlldb/tools/debugserver/source/MacOSX/x86_64/DNBArchImplX86_64.cpp
The file was modifiedlldb/source/Host/macosx/cfcpp/CFCReleaser.h
The file was modifiedlldb/tools/debugserver/source/SysSignal.cpp
The file was modifiedlldb/include/lldb/Utility/DataBuffer.h
The file was modifiedlldb/source/Plugins/Platform/OpenBSD/PlatformOpenBSD.cpp
The file was modifiedlldb/source/Host/netbsd/HostInfoNetBSD.cpp
The file was modifiedlldb/source/Host/netbsd/HostNetBSD.cpp
The file was modifiedlldb/source/Plugins/Process/minidump/RegisterContextMinidump_ARM64.cpp
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
The file was modifiedlldb/tools/debugserver/source/MacOSX/MachThread.cpp
The file was modifiedlldb/include/lldb/API/SBStream.h
The file was modifiedlldb/include/lldb/Core/ValueObjectVariable.h
The file was modifiedlldb/tools/debugserver/source/MacOSX/MachThreadList.cpp
The file was modifiedlldb/source/Utility/GDBRemote.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.h
The file was modifiedlldb/source/Plugins/InstrumentationRuntime/UBSan/InstrumentationRuntimeUBSan.cpp
The file was modifiedlldb/include/lldb/Core/SourceManager.h
The file was modifiedlldb/include/lldb/Host/ProcessRunLock.h
The file was modifiedlldb/tools/debugserver/source/DNBLog.cpp
The file was modifiedlldb/include/lldb/Utility/Connection.h
The file was modifiedlldb/tools/debugserver/source/DNBError.h
The file was modifiedlldb/include/lldb/Utility/Predicate.h
The file was modifiedlldb/source/Utility/StringExtractor.cpp
The file was modifiedlldb/tools/debugserver/source/DNBRegisterInfo.cpp
The file was modifiedlldb/include/lldb/Host/FileCache.h
The file was modifiedlldb/include/lldb/Core/Mangled.h
The file was modifiedlldb/include/lldb/Utility/StringList.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
The file was modifiedlldb/source/Symbol/UnwindTable.cpp
The file was modifiedlldb/include/lldb/Core/Address.h
The file was modifiedlldb/source/Plugins/Platform/NetBSD/PlatformNetBSD.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_powerpc.cpp
The file was modifiedlldb/source/Utility/UserID.cpp
The file was modifiedlldb/source/Core/SourceManager.cpp
The file was modifiedlldb/include/lldb/Core/Disassembler.h
The file was modifiedlldb/include/lldb/Core/ValueObjectRegister.h
The file was modifiedlldb/tools/debugserver/source/DNBTimer.h
The file was modifiedlldb/include/lldb/Core/FormatEntity.h
The file was modifiedlldb/source/Core/FormatEntity.cpp
The file was modifiedlldb/source/Host/common/PseudoTerminal.cpp
The file was modifiedlldb/include/lldb/Core/Value.h
The file was modifiedlldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangUserExpression.cpp
The file was modifiedlldb/source/Utility/StringExtractorGDBRemote.cpp
The file was modifiedlldb/source/Plugins/SymbolVendor/MacOSX/SymbolVendorMacOSX.cpp
The file was modifiedlldb/tools/lldb-vscode/JSONUtils.h
The file was modifiedlldb/include/lldb/Target/DynamicLoader.h
The file was modifiedlldb/source/Core/Opcode.cpp
The file was modifiedlldb/include/lldb/Host/SocketAddress.h
The file was modifiedlldb/tools/lldb-server/lldb-server.cpp
The file was modifiedlldb/source/Host/linux/Host.cpp
The file was modifiedlldb/include/lldb/Utility/ConstString.h
The file was modifiedlldb/source/Interpreter/ScriptInterpreter.cpp
The file was modifiedlldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
The file was modifiedlldb/tools/debugserver/source/DNBDataRef.cpp
The file was modifiedlldb/source/Host/posix/HostThreadPosix.cpp
The file was modifiedlldb/source/Utility/VMRange.cpp
The file was modifiedlldb/tools/debugserver/source/MacOSX/x86_64/MachRegisterStatesX86_64.h
The file was modifiedlldb/source/Core/ValueObject.cpp
The file was modifiedlldb/include/lldb/Core/ValueObjectConstResultCast.h
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
The file was modifiedlldb/source/Core/ValueObjectMemory.cpp
The file was modifiedlldb/tools/debugserver/source/DNBArch.cpp
The file was modifiedlldb/tools/debugserver/source/PThreadEvent.h
The file was modifiedlldb/tools/lldb-vscode/lldb-vscode.cpp
The file was modifiedlldb/include/lldb/API/SBThreadPlan.h
The file was modifiedlldb/include/lldb/Symbol/LocateSymbolFile.h
The file was modifiedlldb/tools/debugserver/source/DNBDataRef.h
The file was modifiedlldb/source/Core/ValueObjectRegister.cpp
The file was modifiedlldb/source/Host/openbsd/HostInfoOpenBSD.cpp
The file was modifiedlldb/source/Host/common/File.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
The file was modifiedlldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.cpp
The file was modifiedlldb/source/Utility/StructuredData.cpp
The file was modifiedlldb/source/Utility/DataBufferLLVM.cpp
The file was modifiedlldb/include/lldb/Core/StreamBuffer.h
The file was modifiedlldb/include/lldb/API/SBSourceManager.h
The file was modifiedlldb/tools/debugserver/source/PThreadEvent.cpp
The file was modifiedlldb/source/API/SBLineEntry.cpp
The file was modifiedlldb/source/Host/freebsd/HostInfoFreeBSD.cpp
The file was modifiedlldb/source/Host/macosx/objcxx/Host.mm
The file was modifiedlldb/source/Utility/Broadcaster.cpp
The file was modifiedlldb/source/Host/common/GetOptInc.cpp
The file was modifiedlldb/source/Utility/DataExtractor.cpp
The file was modifiedlldb/include/lldb/lldb-types.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_ppc64le.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h
The file was modifiedlldb/include/lldb/Utility/DataEncoder.h
The file was modifiedlldb/include/lldb/DataFormatters/TypeSynthetic.h
The file was modifiedlldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp
The file was modifiedlldb/tools/lldb-server/lldb-platform.cpp
The file was modifiedlldb/include/lldb/Utility/StreamString.h
The file was modifiedlldb/source/Utility/VASprintf.cpp
The file was modifiedlldb/tools/debugserver/source/DNBBreakpoint.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.h
The file was modifiedlldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
The file was modifiedlldb/include/lldb/Core/Section.h
The file was modifiedlldb/source/API/SBProcess.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_s390x.cpp
The file was modifiedlldb/include/lldb/Core/ValueObjectConstResult.h
The file was modifiedlldb/source/Utility/Log.cpp
The file was modifiedlldb/tools/debugserver/source/StdStringExtractor.cpp
The file was modifiedlldb/source/Plugins/Platform/Android/AdbClient.cpp
The file was modifiedlldb/source/Core/Debugger.cpp
The file was modifiedlldb/source/Core/DynamicLoader.cpp
The file was modifiedlldb/source/Core/PluginManager.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextDarwin_i386.cpp
The file was modifiedlldb/include/lldb/Core/AddressRange.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp
The file was modifiedlldb/include/lldb/Core/ModuleList.h
The file was modifiedlldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.cpp
The file was modifiedlldb/source/DataFormatters/StringPrinter.cpp
The file was modifiedlldb/tools/debugserver/source/MacOSX/arm64/DNBArchImplARM64.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ASTResultSynthesizer.cpp
The file was modifiedlldb/include/lldb/Core/ValueObjectConstResultImpl.h
The file was modifiedlldb/include/lldb/API/SBInstructionList.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServer.cpp
The file was modifiedlldb/include/lldb/Target/Process.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
The file was modifiedlldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
The file was modifiedlldb/include/lldb/Core/IOHandler.h
The file was modifiedlldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
The file was modifiedlldb/source/Utility/FileSpec.cpp
The file was modifiedlldb/source/API/SBQueue.cpp
The file was modifiedlldb/tools/debugserver/source/RNBSocket.cpp
The file was modifiedlldb/include/lldb/Utility/IOObject.h
The file was modifiedlldb/source/Plugins/Process/NetBSD/NativeRegisterContextNetBSD_x86_64.cpp
The file was modifiedlldb/tools/debugserver/source/libdebugserver.cpp
The file was modifiedlldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
The file was modifiedlldb/include/lldb/Core/MappedHash.h
The file was modifiedlldb/source/Plugins/SymbolVendor/ELF/SymbolVendorELF.cpp
The file was modifiedlldb/source/Target/ThreadCollection.cpp
The file was modifiedlldb/include/lldb/API/SBCommandReturnObject.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_x86.cpp
The file was modifiedlldb/source/Target/ModuleCache.cpp
The file was modifiedlldb/tools/debugserver/source/JSON.cpp
The file was modifiedlldb/include/lldb/Breakpoint/StoppointHitCounter.h
The file was modifiedlldb/include/lldb/Core/Module.h
The file was modifiedlldb/source/Target/ThreadList.cpp
The file was modifiedlldb/source/Host/posix/ProcessLauncherPosixFork.cpp
The file was modifiedlldb/include/lldb/Core/PluginManager.h
The file was modifiedlldb/source/Host/android/LibcGlue.cpp
The file was modifiedlldb/source/Host/freebsd/Host.cpp
The file was modifiedlldb/source/Plugins/Process/Linux/NativeThreadLinux.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_ppc64le.cpp
The file was modifiedlldb/include/lldb/API/SBExecutionContext.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.cpp
The file was modifiedlldb/source/Core/Value.cpp
The file was modifiedlldb/source/Core/ValueObjectVariable.cpp
The file was modifiedlldb/source/Host/windows/Host.cpp
The file was modifiedlldb/include/lldb/Core/ValueObjectMemory.h
The file was modifiedlldb/include/lldb/Utility/StreamCallback.h
The file was modifiedlldb/source/Breakpoint/BreakpointID.cpp
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfos_ppc64.h
The file was modifiedlldb/include/lldb/Core/Opcode.h
The file was modifiedlldb/source/Plugins/SymbolVendor/wasm/SymbolVendorWasm.cpp
The file was modifiedlldb/source/Host/common/Host.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
The file was modifiedlldb/tools/debugserver/source/MacOSX/MachVMRegion.cpp
The file was modifiedlldb/source/Core/Section.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
Commit cc8661ac4a20fbbf654187c8072b226b2700d708 by Pushpinder.Singh
[AMDGPU][Libomptarget] Delete g_atmi_initialized

This patch drops g_atmi_initialized and inlines the Initialize &
Finalize methods from Runtime class.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D102847
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_interop_hsa.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
Commit a2d6ef58765301fa95776cd17033a0974a487bf4 by Pushpinder.Singh
[AMDGPU][Libomptarget] Inline atmi_init/atmi_finalize

After D102847, these functions can be inlined.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D103075
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_runtime.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/rt.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
Commit e79e8041c5ff6a611390b6c3c8484d2cc80ab21d by tomas.matheson
[MC][NFCI] Factor out ELF section unique ID calculation

Precursor to D100944. The logic for determining the unique ID had become
quite difficult to reason about, so I have factored this out into a
separate function.

Differential Revision: https://reviews.llvm.org/D102336
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
Commit 165321b3d27de5349520b5fdb7e08cbd238c880f by tomas.matheson
[MC][ELF] Emit unique sections for different flags

Global values imply flags such as readable, writable, executable for the
sections that they will be placed in. Currently MC places all such
entries into the same section, using the first set of flags seen. This
can lead to situations in LTO where a writable global is placed in the
same named section as a readable global from another file, and the
section may not be marked writable.

D72194 ensures that mergeable globals with explicit sections are placed
in separate sections with compatible entry size, by emitting the
`unique` assembly syntax where appropriate. This change extends that
approach to include section flags, so that globals with different
section flags are emitted in separate unique sections.

Differential revision: https://reviews.llvm.org/D100944
The file was addedllvm/test/CodeGen/Generic/elf-unique-sections-by-flags.ll
The file was modifiedllvm/test/CodeGen/X86/explicit-section-mergeable.ll
The file was modifiedllvm/include/llvm/MC/MCContext.h
The file was modifiedllvm/unittests/ExecutionEngine/Orc/RTDyldObjectLinkingLayerTest.cpp
The file was modifiedllvm/test/CodeGen/Mips/gpopt-explict-section.ll
The file was modifiedllvm/lib/MC/MCContext.cpp
Commit cebdf5d8465c71e43386ecec14ec1eb4b208f626 by pyadav2299
[Docs] Updated the content of getting started documentation under llvm/lib/MC

Wrote about llvm/lib/MC subproject on https://llvm.org/docs/GettingStarted.html page.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D101047
The file was modifiedllvm/docs/GettingStarted.rst
Commit ab8c44112c481fb32917b8e9b22b7576a4d6656d by tomas.matheson
[MC] Move elf-unique-sections-by-flags.ll to X86/
The file was addedllvm/test/CodeGen/X86/elf-unique-sections-by-flags.ll
The file was removedllvm/test/CodeGen/Generic/elf-unique-sections-by-flags.ll
Commit ba0fe85ec0e93db44f9babaace84cb9ab29ff5f4 by sven.vanhaastregt
[OpenCL] Include header for atomic-ops test

Avoid duplicating the memory_order and memory_scope enum definitions.
The file was modifiedclang/test/SemaOpenCL/atomic-ops.cl
Commit 5fb58d45989d63c2deee1c901c3d02b6cf01a067 by mkazantsev
[Test] Add Loop Deletion test with irreducible CFG

Authored by Mikael Holmén. It demonstrated miscompile on irreducible
CFG with patch "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration".
The patch is reverted. Checking in the test to make sure this bug
does not return.
The file was addedllvm/test/Transforms/LoopDeletion/irreducible-cfg.ll
Commit 8ac66d61eab3dd44defa5755b884eca71a19431c by andrew.savonichev
[AArch64] Generate LD1 for anyext i8 or i16 vector load

The existing LD1 patterns do not cover cases where result type does
not match the memory type. This happens when illegal vector types are
extended and scalarized, for example:

  load <2 x i16>* %v2i16

is lowered into:

  // first element
  (v4i32 (insert_subvector (v2i32 (scalar_to_vector (load anyext from i16)))))
  // other elements
  (v4i32 (insert_vector_elt (i32 (load anyext from i16)) idx))

Before this patch these patterns were compiled into LDR + INS.
Now they are compiled into LD1.

The problem was reported in
PR24820: LLVM Generates abysmal code in simple situation.

Differential Revision: https://reviews.llvm.org/D102938
The file was modifiedllvm/test/CodeGen/AArch64/ssub_sat_vec.ll
The file was modifiedllvm/test/CodeGen/AArch64/sadd_sat_vec.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was addedllvm/test/CodeGen/AArch64/aarch64-load-ext.ll
Commit dee46d08293f2ff693893d85c472029207ce750e by akuegel
[mlir] Fold complex.create(complex.re(op), complex.im(op))

Differential Revision: https://reviews.llvm.org/D103148
The file was modifiedmlir/lib/Dialect/Complex/IR/ComplexOps.cpp
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
The file was modifiedmlir/test/Dialect/Complex/canonicalize.mlir
Commit 43d2e51c2e86788b9e2a582fdd3d8ffa7829328a by mkazantsev
Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration"

The patch was reverted due to compile time impact of contextual SCEV
queries. It also appeared that it introduced a miscompile on irreducible CFG.

Changes made:
1. isKnownPredicateAt is replaced with more lightweight isKnownPredicate;
2. Irreducible CFG in live code is now detected and excluded from processing.

Differential Revision: https://reviews.llvm.org/D102615
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
The file was modifiedllvm/test/Transforms/LoopDeletion/zero-btc.ll
Commit 0de553dce0098e2606345ec5b89cf7d14599c643 by mkazantsev
Revert "Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration""

This reverts commit 43d2e51c2e86788b9e2a582fdd3d8ffa7829328a.

Commited wrong version.
The file was modifiedllvm/test/Transforms/LoopDeletion/zero-btc.ll
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
Commit b70fe92f08e8aac8fa2e0d46d5d0a1ae56fe9d2f by spatel
[InstCombine] avoid 'tmp' usage in test file; NFC

The update script ( utils/update_test_checks.py ) warns against this.
The file was modifiedllvm/test/Transforms/InstCombine/select.ll
Commit 9e43b1e9a1f3b261ef998003bf7edba96d8c64a5 by spatel
[InstCombine] avoid 'tmp' usage in test files; NFC

The update script ( utils/update_test_checks.py ) warns against this.
The file was modifiedllvm/test/Transforms/InstCombine/fmul-exp.ll
The file was modifiedllvm/test/Transforms/InstCombine/fmul-exp2.ll
Commit 01120fe5b39837f87e6fa34a5227b8f8634d7b01 by spatel
[InstCombine] add fmul tests with shared operand; NFC

Baseline tests for:
D102698
The file was modifiedllvm/test/Transforms/InstCombine/fmul-exp.ll
The file was modifiedllvm/test/Transforms/InstCombine/fmul-exp2.ll
Commit be1a23203b1de655b8c7dac7549818d975a0cbbf by mkazantsev
Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration" (try 2)

The patch was reverted due to compile time impact of contextual SCEV
queries. It also appeared that it introduced a miscompile on irreducible CFG.

Changes made:
1. isKnownPredicateAt is replaced with more lightweight isKnownPredicate;
2. Irreducible CFG in live code is now detected and excluded from processing.

Differential Revision: https://reviews.llvm.org/D102615
The file was modifiedllvm/test/Transforms/LoopDeletion/zero-btc.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
Commit 9f76a8526010015fc3e5046fb2c5925000ac45a4 by kerry.mclaughlin
[LoopVectorize] Enable strict reductions when allowReordering() returns false

When loop hints are passed via metadata, the allowReordering function
in LoopVectorizationLegality will allow the order of floating point
operations to be changed:

  bool allowReordering() const {
    // When enabling loop hints are provided we allow the vectorizer to change
    // the order of operations that is given by the scalar loop. This is not
    // enabled by default because can be unsafe or inefficient.

The -enable-strict-reductions flag introduced in D98435 will currently only
vectorize reductions in-loop if hints are used, since canVectorizeFPMath()
will return false if reordering is not allowed.

This patch changes canVectorizeFPMath() to query whether it is safe to
vectorize the loop with ordered reductions if no hints are used. For
testing purposes, an additional flag (-hints-allow-reordering) has been
added to disable the reordering behaviour described above.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D101836
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
The file was modifiedllvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
Commit 8be23ed3f02ae633193c400909d135876de6c8cb by a.bataev
[SLP][NFC]Add a test for multiple uses of insertelement instruction,
NFC.
The file was addedllvm/test/Transforms/SLPVectorizer/X86/insert-element-multiple-uses.ll
Commit 63cc9fd579b20e225d1109ebd077a6a13c97c2ab by andrea.dibiagio
[MCA][InOrderIssueStage] Fix LastWriteBackCycle computation.

Conservatively use the instruction latency to compute the last write-back cycle.
Before this patch, the last write cycle computation was incorrect for store
instructions that didn't declare any register writes.
The file was modifiedllvm/lib/MCA/Stages/InOrderIssueStage.cpp
The file was modifiedllvm/test/tools/llvm-mca/AArch64/Cortex/A55-all-stats.s
The file was modifiedllvm/test/tools/llvm-mca/AArch64/Cortex/A55-all-views.s
Commit 629e2b3442257937486bd7a5c8239c173492963e by llvm-dev
[X86][SSE] Regenerate some tests to expose the rip relative vector/broadcast loads
The file was modifiedllvm/test/CodeGen/X86/vec_shift6.ll
The file was modifiedllvm/test/CodeGen/X86/oddsubvector.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-arith.ll
The file was modifiedllvm/test/CodeGen/X86/sse-domains.ll
The file was modifiedllvm/test/CodeGen/X86/sse2-vector-shifts.ll
The file was modifiedllvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
The file was modifiedllvm/test/CodeGen/X86/vector-gep.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
The file was modifiedllvm/test/CodeGen/X86/x86-shifts.ll
The file was modifiedllvm/test/CodeGen/X86/combine-rotates.ll
The file was modifiedllvm/test/CodeGen/X86/combine-mul.ll
Commit a409fcddaed9ad4468d781a447fc5a4b3aac90d4 by david.green
[ARM] Extra test for reverted WLS memset. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-memtp-loop.ll
Commit b6f6501b2412ffaf5d7dce539de3c382b1cf9b64 by sjoerd.meijer
[CostModel][AArch64] Add tests for bitreverse. NFC.
The file was addedllvm/test/Analysis/CostModel/AArch64/bitreverse.ll
Commit 4ed2b6cccdef912013c84244c3f5ee4c018de9b1 by yuanke.luo
[X86][AMX] Fix a bug on tile config.

The previous code detect if a MBB is bottom block to determine if it is
a backedge of a loop. We should check latch block instead of bottom
block and we should check the header and the bottom block are in the
same loop.

Differential Revision: https://reviews.llvm.org/D103145
The file was modifiedllvm/lib/Target/X86/X86PreTileConfig.cpp
The file was addedllvm/test/CodeGen/X86/AMX/amx-gemm.ll
Commit a8f75d497daa2684a03909d7c31d5bce11b427e1 by hans
[clang-cl] Add driver support for /std:c++20 and bump /std:c++latest (PR50465)

VS 2019 16.11 (just released in Preview) is adding support for the
/std:c++20 option and bumping /std:c++latest to "post-c++20". This
updates clang-cl to match.

Differential revision: https://reviews.llvm.org/D103155
The file was modifiedclang/test/Driver/cl-options.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/include/clang/Driver/Options.td
Commit b37a2fcd8d7c59c3db4b1c64bbdba6d1bbea9e99 by anirudh_prasad
[SystemZ][z/OS] Validate symbol names for z/OS for printing without quotes

- Currently, before printing a label in MCSymbol.cpp (MCSymbol::print), the current code "validates" the label that is to be printed.
- If it fails the validation step, then it prints the label within double quotes.
- However, the validation is provided as a virtual function in MCAsmInfo.h (i.e. isAcceptableChar() function). So we can override this for the AD_HLASM dialect in SystemZMCAsmInfo.cpp.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D103091
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.h
The file was modifiedllvm/unittests/MC/SystemZ/SystemZAsmLexerTest.cpp
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
Commit fcd32d62c0675abccac7b7f919bb0df52b6c4262 by sebastian.neubauer
[AMDGPU] Fix function pointer argument bug in AMDGPU Propagate Attributes pass.

This patch fixes a bug in the AMDGPU Propagate Attributes pass where a call
instruction with a function pointer argument is identified as a user of the
passed function, and illegally replaces the called function of the
instruction with the function argument.

For example, given functions f and g with appropriate types, the following
illegal transformation could occur without this fix:
call void @f(void ()* @g)
-->
call void @g(void ()* @g.1)

The solution introduced in this patch is to prevent the cloning and
substitution if the instruction's called function and the function which
might be cloned do not match.

Reviewed By: arsenm, madhur13490

Differential Revision: https://reviews.llvm.org/D101847
The file was addedllvm/test/CodeGen/AMDGPU/propagate-attributes-function-pointer-argument.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUPropagateAttributes.cpp
Commit 1bc0e857bfd4d5a10675b5b75494c2ea6cff7c78 by anirudh_prasad
[SystemZ][z/OS] Enable the AllowAtInName attribute for the HLASM dialect

- Currently, LLVM supports symbols of the name "token1@token2".
- "token2" is used to identify whether an appropriate symbol reference can be used for the symbol.
- Now, if the symbol reference couldn't be found, the AsmParser usually emits an error, unless the backend is configured to accept the "@" in a symbol name
- Thus, this patch aims to do that. It sets the `AllowAtInName` attribute in the SystemZ backend for the HLASM dialect.
- Setting this attribute ensures that, if a particular symbol reference is found, it uses that. If it doesn't, and there exists an "@" in the symbol name, it will use that instead of explicitly erroring out.

Reviewed By: uweigand

Differential Revision: https://reviews.llvm.org/D103111
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmInfo.cpp
Commit 5f500d73cd1aaff4c9ab2fd5c327c2d5ca9ae5c9 by andrea.dibiagio
[MCA] Add a test for PR50483. NFC
The file was addedllvm/test/tools/llvm-mca/AArch64/Cortex/A55-load-store-alias.s
Commit 8f79203a22d8e04086f4cc9a58bb365148852a09 by kadircet
[clangd] New ParsingCallback for semantics changes

Previously notification of the Server about semantic happened strictly
before notification of the AST thread.
Hence a racy Server could make a request (like semantic tokens) after
the notification, with the assumption that it'll be served fresh
content. But it wasn't true if AST thread wasn't notified about the
change yet.

This change reverses the order of those notifications to prevent racy
interactions.

Differential Revision: https://reviews.llvm.org/D102761
The file was modifiedclang-tools-extra/clangd/TUScheduler.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/TUScheduler.h
Commit d058262b1471c80577924fc988ee86e175e3fc16 by paulsson
[SystemZ] Support i128 inline asm operands.

Support virtual, physical and tied i128 register operands in inline assembly.

i128 is on SystemZ not really supported and is not a legal type and generally
such a value will be split into two i64 parts. There are however some
instructions that require a pair of two GPR64 registers contained in the GR128
bit reg class, which is untyped.

For inline assmebly operands, it proved to be very cumbersome to first follow
the general behavior of splitting an i128 operand into two parts and then
later rebuild the INLINEASM MI to have one GR128 register. Instead, some
minor common code changes were made to SelectionDAGBUilder to only create one
GR128 register part to begin with. In particular:

- getNumRegisters() now has an optional parameter "RegisterVT" which is
  passed by AddInlineAsmOperands() and GetRegistersForValue().

- The bitcasting in GetRegistersForValue is not performed if RegVT is
  Untyped.

- The RC for a tied use in AddInlineAsmOperands() is now computed either from
  the tied def (virtual register), or by getMinimalPhysRegClass() (physical
  register).

- InstrEmitter.cpp:EmitCopyFromReg() has been fixed so that the register
  class (DstRC) can also be computed for an illegal type.

In the SystemZ backend getNumRegisters(), splitValueIntoRegisterParts() and
joinRegisterPartsIntoValue() have been implemented to handle i128 operands.

Differential Revision: https://reviews.llvm.org/D100788

Review: Ulrich Weigand
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was addedllvm/test/CodeGen/SystemZ/inline-asm-i128.ll
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
Commit 31191e15b6e362bcbd83353344bbb102f822762d by Louis Dionne
[libc++] Fix concepts tests with GCC
The file was removedlibcxx/test/std/concepts/concepts.callable/concept.regularinvocable/regular_invocable.pass.cpp
The file was modifiedlibcxx/test/std/concepts/concepts.callable/concept.invocable/invocable.compile.pass.cpp
The file was addedlibcxx/test/std/concepts/concepts.callable/concept.regularinvocable/regular_invocable.compile.pass.cpp
Commit 9cc2181ec3885b5b505849448955659b3c6299d5 by listmail
[unroll] Use value domain for symbolic execution based cost model

The current full unroll cost model does a symbolic evaluation of the loop up to a fixed limit. That symbolic evaluation currently simplifies to constants, but we can generalize to arbitrary Values using the InstructionSimplify infrastructure at very low cost.

By itself, this enables some simplifications, but it's mainly useful when combined with the branch simplification over in D102928.

Differential Revision: https://reviews.llvm.org/D102934
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
The file was modifiedllvm/include/llvm/Analysis/LoopUnrollAnalyzer.h
The file was modifiedllvm/lib/Analysis/LoopUnrollAnalyzer.cpp
The file was modifiedllvm/test/Transforms/LoopUnroll/unroll-cost-symbolic-execute.ll
The file was modifiedllvm/unittests/Analysis/UnrollAnalyzerTest.cpp
Commit 1005ef445dbf71e70966856e9a78aa9322125f37 by clementval
[mlir][openacc] Translate UpdateOp to LLVM IR

Add translation to LLVM IR for the UpdateOp with host and device operands.
Translation is done with call using the runtime. This is done in a similar way as
D101504 and D102381.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D102382
The file was modifiedmlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp
The file was modifiedmlir/test/Target/LLVMIR/openacc-llvm.mlir
Commit 16342e39947bca83b25c251a65c7ea86a244a092 by koraq
[libc++][NFC] Move format_error to its own header.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D101723
The file was addedlibcxx/include/__format/format_error.h
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/include/format
Commit deb6a0f94a24301a015d88a943d1acb429024f72 by llvmgnsyncbot
[gn build] Port 16342e39947b
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit de9df3f5b952f66d6b80f9e4d957eb82f3021d71 by koraq
[libc++][NFC] Move basic_format_parse_context to its own header.

This is a preparation to split the format header in smaller parts for the
upcoming patches.

Depends on D101723

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D102703
The file was addedlibcxx/include/__format/format_parse_context.h
The file was modifiedlibcxx/include/format
The file was modifiedlibcxx/include/CMakeLists.txt
Commit 74a89cba8ced90520f129083bd3c97cfce717bbc by pifon
[mlir] Add `distributionTypes` to LinalgTilingOptions.

Differential Revision: https://reviews.llvm.org/D103161
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.h
The file was modifiedmlir/test/Dialect/Linalg/tile-tensors.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
Commit 963495f0d4b5a0707f82b6c6454f42f3aa52da9b by koraq
[libc++][format] Adds availability macros for std::format.

This prevents std::format to be available until there's an ABI stable
version. (This only impacts the Apple platform.)

Depends on D102703

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D102705
The file was modifiedlibcxx/include/__availability
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was modifiedlibcxx/include/version
The file was modifiedlibcxx/include/__format/format_parse_context.h
Commit e47311d88899088379ee25176c3246265d5322eb by llvmgnsyncbot
[gn build] Port de9df3f5b952
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit 07f59baad634de8be91a266acf33465663b9d5f7 by jonathanchesterfield
[libomptarget][nfc][amdgpu] Remove atmi_status_t type

ATMI_STATUS_UNKNOWN was unused, deleted references to it.
Replaced ATMI_STATUS_{SUCCESS,ERROR} with HSA_STATUS_{SUCCESS,ERROR}
Replaced atmi_status_t with hsa_status_t

Otherwise no change. In particular, conversions between atmi_status_t and
hsa_status_t will now be conversions between hsa_status_t and itself.

Reviewed By: pdhaliwal

Differential Revision: https://reviews.llvm.org/D103115
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/utils.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/rt.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/data.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/internal.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_interop_hsa.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_interop_hsa.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_runtime.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
Commit ea91a8cbab93e6592c918b771942598ad0e9b571 by sebastian.neubauer
[AMDGPU][NFC] Remove non-existing function header
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.h
Commit 1b47a3de48d2ac3ee4420209ab5d191f66849979 by craig.topper
[RISCV] Enable cross basic block aware vsetvli insertion

This patch extends D102737 to allow VL/VTYPE changes to be taken
into account before adding an explicit vsetvli.

We do this by using a data flow analysis to propagate VL/VTYPE
information from predecessors until we've determined a value for
every value in the function.

We use this information to determine if a vsetvli needs to be
inserted before the first vector instruction the block.

Differential Revision: https://reviews.llvm.org/D102739
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
Commit d28bc54ff44aad7b080177ef85764d7c5444f031 by Raphael Isemann
[lldb] Remove cache in get_demangled_name_without_arguments

This function has a single-value caching based on function local static variables.

This causes two problems:

* There is no synchronization, so this function randomly returns the demangled
  name of other functions that are demangled at the same time.
* The 1-element cache is not very effective (the cache rate is around 0% when
  running the LLDB test suite that calls this function around 30k times).

I would propose just removing it.

To prevent anyone else the git archeology: the static result variables were
originally added as this returned a ConstString reference, but that has since
been changed so that this returns by value.

Reviewed By: #lldb, JDevlieghere, shafik

Differential Revision: https://reviews.llvm.org/D103107
The file was modifiedlldb/source/Core/Mangled.cpp
Commit adf1561d6ce8af057127c65af863b3f0e1c77e60 by smeenai
[libunwind] Inform ASan that resumption is noreturn

If you're building libunwind instrumented with ASan, `_Unwind_RaiseException`
will poison the stack and then transfer control in a manner which isn't
understood by ASan, so the stack will remain poisoned. This can cause
false positives, e.g. if you call an uninstrumented function (so it
doesn't re-poison the stack) after catching an exception. Add a call to
`__asan_handle_no_return` inside `__unw_resume` to get ASan to unpoison
the stack and avoid this.

`__unw_resume` seems like the appropriate place to make this call, since
it's used for resumption by all unwind implementations except SJLJ. SJLJ
uses `__builtin_longjmp` to handle resumption, which is already
recognized as noreturn (and therefore ASan adds the `__asan_handle_no_return`
call itself), so it doesn't need any special handling.

PR32434 is somewhat similar (in particular needing a component built
without ASan to trigger the bug), and rG781ef03e1012, the fix for that
bug, adds an interceptor for `_Unwind_RaiseException`. This interceptor
won't always be triggered though, e.g. if you statically link the
unwinder into libc++abi in a way that prevents interposing the unwinder
functions (e.g. marking the symbols as hidden, using `--exclude-libs`,
or using `-Bsymbolic`). rG53335d6d86d5 makes `__cxa_throw` call
`__asan_handle_no_return` explicitly, to similarly avoid relying on
interception.

Reviewed By: #libunwind, compnerd

Differential Revision: https://reviews.llvm.org/D103002
The file was modifiedlibunwind/src/libunwind.cpp
Commit 969eefd98e0f8e485148be61190cc2ef62fb1eca by smeenai
[lldb] add LLDB_SKIP_DSYM option

Add an option to skip generating a dSYM when installing the LLDB framework on Darwin.

Reviewed By: smeenai

Differential Revision: https://reviews.llvm.org/D103124
The file was modifiedlldb/cmake/modules/LLDBConfig.cmake
The file was modifiedlldb/cmake/modules/AddLLDB.cmake
Commit a0bd6105d80698c53ceaa64bbe6e3b7e7bbf99ee by stephen.tozer
[DebugInfo] Limit the number of values that may be referenced by a dbg.value

Following the addition of salvaging dbg.values using DIArgLists to
reference multiple values, a case has been found where excessively large
DIArgLists are produced as a result of this salvaging, resulting in
large enough performance costs to effectively freeze the compiler.

This patch introduces an upper bound of 16 to the number of values that
may be salvaged into a dbg.value, to limit the impact of these extreme
cases to performance.

Differential Revision: https://reviews.llvm.org/D103162
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was addedllvm/test/DebugInfo/limit-arglist-size.ll
Commit 27d3528acf8aacc62a955dc13b0f08d4167b5b48 by a.bataev
[SLP]Fix vectorization of insertelements with multiple uses.

SLP vectorizer should not consider in sertelements with multiple uses as
a part of high level build vector, it must be considered as
a terminating insertelement in the vector build, otherwise it may
produce incorrect code.

Differential Revision: https://reviews.llvm.org/D103164
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/insert-element-multiple-uses.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit a45877eea8c424cd91bc1f7749313c9cb3aab285 by kostyak
[scudo] Get rid of initLinkerInitialized

Now that everything is forcibly linker initialized, it feels like a
good time to get rid of the `init`/`initLinkerInitialized` split.

This allows to get rid of various `memset` construct in `init` that
gcc complains about (this fixes a Fuchsia open issue).

I added various `DCHECK`s to ensure that we would get a zero-inited
object when entering `init`, which required ensuring that
`unmapTestOnly` leaves the object in a good state (tests are currently
the only location where an allocator can be "de-initialized").

Running the tests with `--gtest_repeat=` showed no issue.

Differential Revision: https://reviews.llvm.org/D103119
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd_exclusive.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary64.h
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/tsd_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/combined_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/mutex_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd.h
The file was modifiedcompiler-rt/lib/scudo/standalone/benchmarks/malloc_benchmark.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/secondary.h
The file was modifiedcompiler-rt/lib/scudo/standalone/stats.h
The file was modifiedcompiler-rt/lib/scudo/standalone/local_cache.h
The file was modifiedcompiler-rt/lib/scudo/standalone/bytemap.h
The file was modifiedcompiler-rt/lib/scudo/standalone/tsd_shared.h
The file was modifiedcompiler-rt/lib/scudo/standalone/mutex.h
The file was modifiedcompiler-rt/lib/scudo/standalone/quarantine.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary32.h
Commit b2c7ac874f516df38968d02636ecab7730ca9323 by craig.topper
[RISCV] Don't propagate VL/VTYPE across inline assembly in the Insert VSETVLI pass.

It's conceivable someone could put a vsetvli in inline assembly
so its safer to consider them as barriers. The alternative would
be to trust that the user marks VL and VTYPE registers as clobbers
of the inline assembly if they do that, but hat seems error prone.

I'm assuming inline assembly in vector code is going to be rare.

Reviewed By: frasercrmck, HsiangKai

Differential Revision: https://reviews.llvm.org/D103126
The file was modifiedllvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
Commit d63d662d3cc51219fb08908ebea8d5851e53adb8 by jrtc27
[RISCV] Remove --riscv-no-aliases from RVV tests

This serves no useful purpose other than to clutter things up. Diff
summary as the real diff is extremely unwieldy:

   24844 -; CHECK-NEXT:    jalr zero, 0(ra)
   24844 +; CHECK-NEXT:    ret
       8 -; CHECK-NEXT:    vl4re8.v v28, (a0)
       8 +; CHECK-NEXT:    vl4r.v v28, (a0)
      64 -; CHECK-NEXT:    vl8re8.v v24, (a0)
      64 +; CHECK-NEXT:    vl8r.v v24, (a0)
     392 -; RUN:   --riscv-no-aliases < %s | FileCheck %s
     392 +; RUN:   < %s | FileCheck %s
       1 -; RUN:   -verify-machineinstrs --riscv-no-aliases < %s \
       1 +; RUN:   -verify-machineinstrs < %s \

As discussed in D103004.
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vle-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vse-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vxor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vle1-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vse1-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vle1-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vse1-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vle-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoand-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vid-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmandnot-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmornot-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/viota-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vpopc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmandnot-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vse-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vand-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/spill-fpr-scalar.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsbc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamominu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmornot-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vid-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/viota-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll
Commit 6911114d8cbed06a8a809c34ae07f4e3e89ab252 by 31459023+hctim
[Scudo] Make -fsanitize=scudo use standalone. Migrate tests.

This patch moves -fsanitize=scudo to link the standalone scudo library,
rather than the original compiler-rt based library. This is one of the
major remaining roadblocks to deleting the compiler-rt based scudo,
which should not be used any more. The standalone Scudo is better in
pretty much every way and is much more suitable for production usage.

As well as patching the litmus tests for checking that the
scudo_standalone lib is linked instead of the scudo lib, this patch also
ports all the scudo lit tests to run under scudo standalone.

This patch also adds a feature to scudo standalone that was under test
in the original scudo - that arguments passed to an aligned operator new
were checked that the alignment was a power of two.

Some lit tests could not be migrated, due to the following issues:
1. Features that aren't supported in scudo standalone, like the rss
limit.
2. Different quarantine implementation where the test needs some more
thought.
3. Small bugs in scudo standalone that should probably be fixed, like
the Secondary allocator having a full page on the LHS of an allocation
that only contains the chunk header, so underflows by <= a page aren't
caught.
4. Slight differences in behaviour that's technically correct, like
'realloc(malloc(1), 0)' returns nullptr in standalone, but a real
pointer in old scudo.
5. Some tests that might be migratable, but not easily.

Tests that are obviously not applicable to scudo standalone (like
testing that no sanitizer symbols made it into the DSO) have been
deleted.

After this patch, the remaining work is:
1. Update the Scudo documentation. The flags have changed, etc.
2. Delete the old version of scudo.
3. Patch up the tests in lit-unmigrated, or fix Scudo standalone.

Reviewed By: cryptoad, vitalybuka

Differential Revision: https://reviews.llvm.org/D102543
The file was removedcompiler-rt/test/scudo/secondary.c
The file was removedcompiler-rt/test/scudo/alignment.c
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_cpp.cpp
The file was removedcompiler-rt/test/scudo/interface.cpp
The file was modifiedcompiler-rt/test/scudo/CMakeLists.txt
The file was addedcompiler-rt/test/scudo/standalone/alignment.c
The file was addedcompiler-rt/test/scudo/standalone/malloc.cpp
The file was addedcompiler-rt/test/scudo/standalone/lit-unmigrated/overflow.c
The file was addedcompiler-rt/test/scudo/standalone/dealloc-race.c
The file was removedcompiler-rt/test/scudo/threads.c
The file was addedcompiler-rt/test/scudo/standalone/lit-unmigrated/valloc.c
The file was addedcompiler-rt/test/scudo/standalone/sized-delete.cpp
The file was addedcompiler-rt/test/scudo/standalone/lit-unmigrated/quarantine.c
The file was addedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-unknown-fuchsia/libclang_rt.scudo_standalone.so
The file was addedcompiler-rt/test/scudo/standalone/options.cpp
The file was removedcompiler-rt/test/scudo/realloc.cpp
The file was addedcompiler-rt/test/scudo/standalone/lit-unmigrated/rss.c
The file was addedcompiler-rt/test/scudo/standalone/lit-unmigrated/secondary.c
The file was removedcompiler-rt/test/scudo/memalign.c
The file was removedcompiler-rt/test/scudo/preinit.c
The file was removedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-unknown-fuchsia/libclang_rt.scudo.so
The file was addedcompiler-rt/test/scudo/standalone/preinit.c
The file was addedcompiler-rt/test/scudo/standalone/random_shuffle.cpp
The file was removedcompiler-rt/test/scudo/preload.cpp
The file was removedcompiler-rt/test/scudo/mismatch.cpp
The file was removedcompiler-rt/test/scudo/lit.cfg.py
The file was removedcompiler-rt/test/scudo/valloc.c
The file was addedcompiler-rt/test/scudo/standalone/lit.cfg.py
The file was removedcompiler-rt/test/scudo/aligned-new.cpp
The file was removedcompiler-rt/test/scudo/symbols.test
The file was removedcompiler-rt/test/scudo/sized-delete.cpp
The file was removedcompiler-rt/test/scudo/options.cpp
The file was removedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/aarch64-unknown-fuchsia/libclang_rt.scudo.so
The file was addedcompiler-rt/test/scudo/standalone/lit-unmigrated/realloc.cpp
The file was removedcompiler-rt/test/scudo/rss.c
The file was addedcompiler-rt/test/scudo/standalone/double-free.cpp
The file was modifiedclang/test/Driver/sanitizer-ld.c
The file was addedcompiler-rt/test/scudo/standalone/fsanitize.c
The file was addedcompiler-rt/test/scudo/standalone/aligned-new.cpp
The file was removedcompiler-rt/test/scudo/stats.c
The file was addedcompiler-rt/test/scudo/standalone/lit.site.cfg.py.in
The file was removedcompiler-rt/test/scudo/overflow.c
The file was removedcompiler-rt/test/scudo/lit.site.cfg.py.in
The file was addedcompiler-rt/test/scudo/standalone/preload.cpp
The file was removedcompiler-rt/test/scudo/sizes.cpp
The file was addedcompiler-rt/test/scudo/standalone/mismatch.cpp
The file was addedcompiler-rt/test/scudo/standalone/lit-unmigrated/threads.c
The file was addedcompiler-rt/test/scudo/standalone/memalign.c
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
The file was addedcompiler-rt/test/scudo/standalone/tsd_destruction.c
The file was removedcompiler-rt/test/scudo/double-free.cpp
The file was removedcompiler-rt/test/scudo/fsanitize.c
The file was modifiedcompiler-rt/test/scudo/standalone/CMakeLists.txt
The file was modifiedclang/test/Driver/fuchsia.c
The file was addedcompiler-rt/test/scudo/standalone/stats.c
The file was addedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/aarch64-unknown-fuchsia/libclang_rt.scudo_standalone.so
The file was removedcompiler-rt/test/scudo/dealloc-race.c
The file was addedcompiler-rt/test/scudo/standalone/lit-unmigrated/sizes.cpp
The file was removedcompiler-rt/test/scudo/random_shuffle.cpp
The file was removedcompiler-rt/test/scudo/malloc.cpp
The file was removedcompiler-rt/test/scudo/quarantine.c
The file was removedcompiler-rt/test/scudo/tsd_destruction.c
Commit fb14577d0c4828f0e793072fc3e6bb3c57ec596e by listmail
[SCEV] Extract out a helper for computing trip multiples
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
Commit 9065118b6463adf6cc5552f202cd8302c21cd7b0 by craig.topper
[RISCV] Optimize SEW=64 shifts by splat on RV32.

SEW=64 shifts only uses the log2(64) bits of shift amount. If we're
splatting a 64 bit value in 2 parts, we can avoid splatting the
upper bits and just let the low bits be sign extended. They won't
be read anyway.

For the purposes of SelectionDAG semantics of the generic ISD opcodes,
if hi was non-zero or bit 31 of the low is 1, the shift was already
undefined so it should be ok to replace high with sign extend of low.

In order do be able to find the split i64 value before it becomes
a stack operation, I added a new ISD opcode that will be expanded
to the stack spill in PreprocessISelDAG. This new node is conceptually
similar to BuildPairF64, but I expanded earlier so that we could
go through regular isel to get the right VLSE opcode for the LMUL.
BuildPairF64 is expanded in a CustomInserter.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D102521
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
Commit 921d3f7af09c6a08d2d2897e6fcce6127a9f4fd4 by listmail
[SCEV] Add a utility for converting from "exit count" to "trip count"

(Mostly as a logical place to put a comment since this is a reoccuring confusion.)
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/lib/Analysis/LoopCacheAnalysis.cpp
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 73a117953599af58645d944e68076ec8fb052540 by i
[llvm-mc] Add -M to replace -riscv-no-aliases and -riscv-arch-reg-names

In objdump, many targets support `-M no-aliases`.  Instead of having a
`-*-no-aliases` for each target when LLVM adds the support, it makes more sense
to introduce objdump style `-M`.

-riscv-arch-reg-names is removed. -riscv-no-aliases has too many uses and thus is retained for now.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D103004
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
The file was addedllvm/test/tools/llvm-mc/disassembler-options.test
The file was modifiedllvm/include/llvm/MC/MCInstPrinter.h
The file was modifiedllvm/test/MC/RISCV/numeric-reg-names-d.s
The file was modifiedllvm/tools/llvm-mc/llvm-mc.cpp
The file was modifiedllvm/test/MC/RISCV/numeric-reg-names.s
The file was modifiedllvm/test/MC/RISCV/rvi-aliases-valid.s
The file was modifiedllvm/test/MC/RISCV/numeric-reg-names-f.s
Commit f7c5c0d87b8ae5e55006fd3a31994cd68d64f102 by 31459023+hctim
Revert "[Scudo] Make -fsanitize=scudo use standalone. Migrate tests."

This reverts commit 6911114d8cbed06a8a809c34ae07f4e3e89ab252.

Broke the QEMU sanitizer bots due to a missing header dependency. This
actually needs to be fixed on the bot-side, but for now reverting this
patch until I can fix up the bot.
The file was addedcompiler-rt/test/scudo/lit.cfg.py
The file was modifiedclang/test/Driver/sanitizer-ld.c
The file was addedcompiler-rt/test/scudo/preload.cpp
The file was addedcompiler-rt/test/scudo/interface.cpp
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/realloc.cpp
The file was addedcompiler-rt/test/scudo/rss.c
The file was removedcompiler-rt/test/scudo/standalone/fsanitize.c
The file was addedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/aarch64-unknown-fuchsia/libclang_rt.scudo.so
The file was addedcompiler-rt/test/scudo/lit.site.cfg.py.in
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/rss.c
The file was removedcompiler-rt/test/scudo/standalone/mismatch.cpp
The file was removedcompiler-rt/test/scudo/standalone/lit.site.cfg.py.in
The file was addedcompiler-rt/test/scudo/sizes.cpp
The file was addedcompiler-rt/test/scudo/symbols.test
The file was addedcompiler-rt/test/scudo/fsanitize.c
The file was modifiedcompiler-rt/test/scudo/standalone/CMakeLists.txt
The file was removedcompiler-rt/test/scudo/standalone/dealloc-race.c
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/overflow.c
The file was removedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-unknown-fuchsia/libclang_rt.scudo_standalone.so
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/threads.c
The file was modifiedclang/test/Driver/fuchsia.c
The file was removedcompiler-rt/test/scudo/standalone/double-free.cpp
The file was removedcompiler-rt/test/scudo/standalone/options.cpp
The file was addedcompiler-rt/test/scudo/secondary.c
The file was removedcompiler-rt/test/scudo/standalone/sized-delete.cpp
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/sizes.cpp
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/quarantine.c
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/secondary.c
The file was removedcompiler-rt/test/scudo/standalone/preload.cpp
The file was addedcompiler-rt/test/scudo/realloc.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_cpp.cpp
The file was addedcompiler-rt/test/scudo/mismatch.cpp
The file was addedcompiler-rt/test/scudo/options.cpp
The file was removedcompiler-rt/test/scudo/standalone/malloc.cpp
The file was addedcompiler-rt/test/scudo/valloc.c
The file was removedcompiler-rt/test/scudo/standalone/memalign.c
The file was addedcompiler-rt/test/scudo/preinit.c
The file was modifiedcompiler-rt/test/scudo/CMakeLists.txt
The file was addedcompiler-rt/test/scudo/double-free.cpp
The file was addedcompiler-rt/test/scudo/memalign.c
The file was addedcompiler-rt/test/scudo/stats.c
The file was removedcompiler-rt/test/scudo/standalone/alignment.c
The file was addedcompiler-rt/test/scudo/malloc.cpp
The file was removedcompiler-rt/test/scudo/standalone/preinit.c
The file was addedcompiler-rt/test/scudo/tsd_destruction.c
The file was removedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/aarch64-unknown-fuchsia/libclang_rt.scudo_standalone.so
The file was addedcompiler-rt/test/scudo/dealloc-race.c
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
The file was addedcompiler-rt/test/scudo/random_shuffle.cpp
The file was addedcompiler-rt/test/scudo/sized-delete.cpp
The file was addedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-unknown-fuchsia/libclang_rt.scudo.so
The file was addedcompiler-rt/test/scudo/overflow.c
The file was removedcompiler-rt/test/scudo/standalone/tsd_destruction.c
The file was addedcompiler-rt/test/scudo/threads.c
The file was removedcompiler-rt/test/scudo/standalone/aligned-new.cpp
The file was removedcompiler-rt/test/scudo/standalone/stats.c
The file was addedcompiler-rt/test/scudo/quarantine.c
The file was addedcompiler-rt/test/scudo/aligned-new.cpp
The file was removedcompiler-rt/test/scudo/standalone/random_shuffle.cpp
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/valloc.c
The file was addedcompiler-rt/test/scudo/alignment.c
The file was removedcompiler-rt/test/scudo/standalone/lit.cfg.py
Commit e5eff533f7611967ae1ead99846d06597dcb8ee2 by thomasraoux
[mlir] Make StripDebugInfo strip out block arguments locs

Differential Revision: https://reviews.llvm.org/D103187
The file was modifiedmlir/test/Transforms/strip-debuginfo.mlir
The file was modifiedmlir/lib/Transforms/StripDebugInfo.cpp
Commit 9306bb638ff2b13fb8472b5b035e658c1dcbd74c by listmail
[SCEV] Generalize getSmallConstantTripCount(L) for multiple exit loops

This came up in review for another patch, see https://reviews.llvm.org/D102982#2782407 for full context.

I've reviewed the callers to make sure they can handle multiple exit loops w/non-zero returns.  There's two cases in target cost models where results might change (Hexagon and PowerPC), but the results looked legal and reasonable.  If a target maintainer wishes to back out the effect of the costing change, they should explicitly check for multiple exit loops and handle them as desired.

Differential Revision: https://reviews.llvm.org/D103182
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
Commit c5c1ec7945ff2c26f4f9ce5db5ff647ee3f931ab by jonathanchesterfield
[libomptarget][nfc][amdgpu] Refactor uses of KernelInfoTable

Suggested in D103059. Use a single lookup instead of two, more const, less mutation.

Reviewed By: dhruvachak

Differential Revision: https://reviews.llvm.org/D103093
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
Commit 13c6568c6e20ee70aaa8157431e8a3d01be07e81 by dmitry.preobrazhensky
[AMDGPU][MC][GFX90A] Corrected DS_GWS opcodes

Corrected DS_GWS opcodes to use even aligned registers.

Differential Revision: https://reviews.llvm.org/D103185
The file was addedllvm/test/MC/AMDGPU/gfx90a_err_pos.s
The file was modifiedllvm/test/MC/AMDGPU/gfx90a_ldst_acc.s
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt
The file was modifiedllvm/test/MC/AMDGPU/gfx90a_err.s
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Commit 5e2facb922840bfd03eb116eaeead039df021275 by Stanislav.Mekhanoshin
[AMDGPU] Fix kernel LDS lowering for constants

There is a trivial but severe bug in the recent code collecting
LDS globals used by kernel. It aborts scan on the first constant
without scanning further uses. That leads to LDS overallocation
with multiple kernels in certain cases.

Differential Revision: https://reviews.llvm.org/D103190
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPULDSUtils.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_write2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_read2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lower-kernel-lds-constexpr.ll
Commit 5bfe06ad3590d5aeb14c2fc3fae729abc6412cb3 by aheejin
[SimplifyCFG] Use make_early_inc_range() while deleting instructions

We are deleting `phi` nodes within the for loop, so this makes sure we
increment the iterator before we delete the instruction pointed by the
iterator.

This started to break in
https://github.com/llvm/llvm-project/commit/a0be08164622bf938855ff5d19dd8e9d0c96b9b3.

Reviewed By: dschuff, lebedev.ri

Differential Revision: https://reviews.llvm.org/D103181
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was addedllvm/test/Transforms/SimplifyCFG/cleanup-phis.ll
Commit 5dd86aadf0b014913bd35bb7435808eb081bc049 by aheejin
[WebAssembly] Add TargetInstrInfo::getCalleeOperand

DwarfDebug unconditionally assumes for all call instructions the 0th
operand is the callee operand, which seems to be true for other targets,
but not for WebAssembly. This adds `TargetInstrInfo::getCallOperand`
method whose default implementation returns `getOperand(0)` and makes
WebAssembly overrides it to use its own utility method to get the callee
operand.

This also fixes an existing bug in `WebAssembly::getCalleeOp`, which was
uncovered by this CL.

Reviewed By: dschuff, djtodoro

Differential Revision: https://reviews.llvm.org/D102978
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was modifiedllvm/lib/Target/WebAssembly/Utils/WebAssemblyUtilities.cpp
The file was addedllvm/test/DebugInfo/WebAssembly/call-site.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h
Commit ff08c3468fa4ba25384104206255f3648fd21fe9 by listmail
[SCEV] Compute trip multiple for multiple exit loops

This patch implements getSmallConstantTripMultiple(L) correctly for multiple exit loops. The previous implementation was both imprecise, and violated the specified behavior of the method. This was fine in practice, because it turns out the function was both dead in real code, and not tested for the multiple exit case.

Differential Revision: https://reviews.llvm.org/D103189
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/Analysis/ScalarEvolution/tripmultiple_calculation.ll
Commit 78c9796f963f0577b86de7bf062f65b4595cb757 by lebedev.ri
[NFC][X86][Costmodel] Add some more interleaved load/store test with i16 element type

Not sure if even larger interleaving factors are needed,
but these are what i have seen being queried in the wild.
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-2.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-5.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-5.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll
Commit ab7f26dc13f282101691370f98f3c0e4371ea12d by lebedev.ri
[NFC][Codegen][X86] Add a few more interleaved load/store patterns w/ i16 element type

Matching the costmodel coverage.
We want them both because they simplify coming up with the patterns
to check their cost, and to track their codegen.

Tests for loads can be fully autogenerated: https://godbolt.org/z/o1fncqo9n
For stores, however, i have done that semi-manually: https://godbolt.org/z/KPzTnvsh1
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-2.ll
The file was addedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-2.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
The file was addedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
The file was addedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
The file was addedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
Commit 2fdf8bbd19c33c0eb5fdf88ff3cbd12aae607768 by jonathanchesterfield
[libomptarget][nfc][amdgpu] Factor out setting upper bounds

Refactor suggested in D103037 to help avoid similar copy-paste errors.
Change is mechanical. Some parts of this would be more robust with unsigned.

Reviewed By: dhruvachak

Differential Revision: https://reviews.llvm.org/D103090
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp