Changes

Summary

  1. [DWARFYAML] Remove useless conditional statement. NFC. (details)
  2. [DSE,MSSA] Recognise init_trampoline in getLocForWriteEx (details)
  3. [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbb asm instructions (details)
  4. [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbp asm instructions (details)
  5. [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbbp asm instructions (details)
  6. [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbs asm instructions (details)
  7. [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbt asm instructions (details)
  8. [mips] Rename FeatureMadd4 to FeatureNoMadd4. NFC (details)
  9. [lldb] Use the basename of the Python test for the log name instead of the class name (details)
  10. [lldb] Make expect_expr fall back to the dummy target if no target is selected (details)
  11. [clangd] Use llvm::errs() instead of outs() for errors (details)
Commit a9e10a09651fa685876d2104254236b6840ad1af by Xing
[DWARFYAML] Remove useless conditional statement. NFC.

The conditional statement is useless after
3a48a632d00ef1c98042140f402337fe13cdff52.
The file was modifiedllvm/lib/ObjectYAML/DWARFVisitor.cpp
Commit 20854d85e14cf0b86f6e0dbbf9aef817845403bd by john.brawn
[DSE,MSSA] Recognise init_trampoline in getLocForWriteEx

This fixes an instance where MemorySSA-using Dead Store Elimination is failing
to do a transformation that the non-MemorySSA-using version does.

Differential Revision: https://reviews.llvm.org/D83783
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/simple-todo.ll
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/simple.ll
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit e2692f0ee7f338fea4fc918669643315cefc7678 by lewis-revill
[RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbb asm instructions

This patch provides optimization of bit manipulation operations by
enabling the +experimental-b target feature.
It adds matching of single block patterns of instructions to specific
bit-manip instructions from the base subset (zbb subextension) of the
experimental B extension of RISC-V.
It adds also the correspondent codegen tests.

This patch is based on Claire Wolf's proposal for the bit manipulation
extension of RISCV:
https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.92.pdf

Differential Revision: https://reviews.llvm.org/D79870
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was addedllvm/test/CodeGen/RISCV/rv64Zbb.ll
The file was addedllvm/test/CodeGen/RISCV/rv32Zbb.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
Commit 31b52b4345e36b169a2b6a89eac44651f59889dd by lewis-revill
[RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbp asm instructions

This patch provides optimization of bit manipulation operations by
enabling the +experimental-b target feature.
It adds matching of single block patterns of instructions to specific
bit-manip instructions from the permutation subset (zbp subextension) of
the experimental B extension of RISC-V.
It adds also the correspondent codegen tests.

This patch is based on Claire Wolf's proposal for the bit manipulation
extension of RISCV:
https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.92.pdf

Differential Revision: https://reviews.llvm.org/D79871
The file was addedllvm/test/CodeGen/RISCV/rv32Zbp.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was addedllvm/test/CodeGen/RISCV/rv64Zbp.ll
Commit 6144f0a1e52e7f5439a67267ca65f2d72c21aaa6 by lewis-revill
[RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbbp asm instructions

This patch provides optimization of bit manipulation operations by
enabling the +experimental-b target feature.
It adds matching of single block patterns of instructions to specific
bit-manip instructions belonging to both the permutation and the base
subsets of the experimental B extension of RISC-V.
It adds also the correspondent codegen tests.

This patch is based on Claire Wolf's proposal for the bit manipulation
extension of RISCV:
https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.92.pdf

Differential Revision: https://reviews.llvm.org/D79873
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was addedllvm/test/CodeGen/RISCV/rv64Zbbp.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was addedllvm/test/CodeGen/RISCV/rv32Zbbp.ll
Commit d4be33374c07ea9a9362892876aa76b227298181 by lewis-revill
[RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbs asm instructions

This patch provides optimization of bit manipulation operations by
enabling the +experimental-b target feature.
It adds matching of single block patterns of instructions to specific
bit-manip instructions from the single-bit subset (zbs subextension) of
the experimental B extension of RISC-V.
It adds also the correspondent codegen tests.

This patch is based on Claire Wolf's proposal for the bit manipulation
extension of RISCV:
https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.92.pdf

Differential Revision: https://reviews.llvm.org/D79874
The file was addedllvm/test/CodeGen/RISCV/rv64Zbs.ll
The file was addedllvm/test/CodeGen/RISCV/rv32Zbs.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
Commit c9c955ada8e65205312f2bc41b46eefa0e98b36c by lewis-revill
[RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbt asm instructions

This patch provides optimization of bit manipulation operations by
enabling the +experimental-b target feature.
It adds matching of single block patterns of instructions to specific
bit-manip instructions from the ternary subset (zbt subextension) of the
experimental B extension of RISC-V.
It adds also the correspondent codegen tests.

This patch is based on Claire Wolf's proposal for the bit manipulation
extension of RISCV:
https://github.com/riscv/riscv-bitmanip/blob/master/bitmanip-0.92.pdf

Differential Revision: https://reviews.llvm.org/D79875
The file was addedllvm/test/CodeGen/RISCV/rv32Zbt.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was addedllvm/test/CodeGen/RISCV/rv64Zbt.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Commit 3a6c2a61c64277a51a9dda22eece8072c0590fa4 by simon
[mips] Rename FeatureMadd4 to FeatureNoMadd4. NFC

`FeatureMadd4` is used to disable `madd4`, and the corresponding feature
option is `(+-)nomadd4`. Renaming to the `FeatureNoMadd4` makes its
purpose clear.

Patch by YunQiang Su.

Differential Revision: https://reviews.llvm.org/D83780
The file was modifiedllvm/lib/Target/Mips/MipsInstrInfo.td
The file was modifiedllvm/lib/Target/Mips/Mips.td
Commit 29aab9b5c748b28b231e2ca0f9b95453638ade1a by Raphael Isemann
[lldb] Use the basename of the Python test for the log name instead of the class name

Summary:

From what I know we already have the restriction that every test in the test
suite needs to have a unique file name as that's used for generating the unique
build directory for a test. It seems there is also a restriction that every test
case class in the test suite needs to have a unique name as that's used to
generate the unique log file name for the test run.

This changes the log file format to use the basename of the test file instead so
that we only have to keep worrying about the 'unique file name' restriction from
now on.

This came up because I started naming the test classes "TestCase" (as repeating
the file name in the test class seems like redudant information that just makes
renaming tests a pain).

Reviewers: labath, JDevlieghere

Reviewed By: labath

Subscribers: mgorny, abidh

Differential Revision: https://reviews.llvm.org/D83767
The file was modifiedlldb/test/API/CMakeLists.txt
Commit 10fd550d308d5dbcf7a3068f1f76d5f0f1a56661 by Raphael Isemann
[lldb] Make expect_expr fall back to the dummy target if no target is selected

Summary:

Currently expect_expr will not run the expression if no target is selected. This
patch changes this behavior so that expect_expr will instead fall back to the
dummy target similar to what the `expression` command is doing. This way we
don't have to compile an empty executable to be able to use `expect_expr` (which
is a waste of resources for tests that just test generic type system features).

As a test I modernized the TestTypeOfDeclTypeExpr into a Python test +
expect_expr (as it relied on the dummy target fallback of the expression
command).

Reviewers: labath, JDevlieghere

Reviewed By: labath

Subscribers: abidh

Differential Revision: https://reviews.llvm.org/D83388
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
The file was addedlldb/test/API/lang/cpp/typeof/TestTypeOfDeclTypeExpr.py
The file was removedlldb/test/Shell/Expr/TestTypeOfDeclTypeExpr.test
Commit c11c78a1bd0b3275bf845604aae3c94e97acceed by kbobyrev
[clangd] Use llvm::errs() instead of outs() for errors

Summary: errs() is more appropriate for error messages in dexp and clangd-index-server.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D83827
The file was modifiedclang-tools-extra/clangd/index/dex/dexp/Dexp.cpp
The file was modifiedclang-tools-extra/clangd/index/remote/server/Server.cpp