Changes

Summary

  1. [ConstantFold] Get rid of special cases for sizeof etc. (details)
  2. Fix a couple regression tests I missed updating in 2a284782 (details)
  3. Fix the default alignment of i1 vectors. (details)
Commit 2a2847823f0d13188c43ebdd0baf42a95df750c7 by efriedma
[ConstantFold] Get rid of special cases for sizeof etc.

Target-dependent constant folding will fold these down to simple
constants (or at least, expressions that don't involve a GEP).  We don't
need heroics to try to optimize the form of the expression before that
happens.

Fixes https://bugs.llvm.org/show_bug.cgi?id=51232 .

Differential Revision: https://reviews.llvm.org/D107116
The file was modifiedclang/test/CodeGenCXX/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.cpp
The file was modifiedclang/test/OpenMP/taskloop_simd_reduction_codegen.cpp
The file was modifiedclang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp
The file was modifiedclang/test/OpenMP/for_reduction_codegen.cpp
The file was modifiedclang/test/CodeGen/catch-nullptr-and-nonzero-offset.c
The file was modifiedclang/test/OpenMP/taskloop_reduction_codegen.cpp
The file was modifiedllvm/test/Transforms/LowerTypeTests/function-disjoint.ll
The file was modifiedllvm/lib/IR/ConstantFold.cpp
The file was modifiedllvm/test/Other/constant-fold-gep.ll
The file was modifiedclang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp
The file was modifiedclang/test/OpenMP/master_taskloop_reduction_codegen.cpp
The file was modifiedclang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp
The file was modifiedclang/test/CodeGen/catch-nullptr-and-nonzero-offset-in-offsetof-idiom.c
The file was modifiedllvm/test/tools/llvm-as/slow-ptrtoint.ll
Commit 6eb2ffbaeb56c8b08ad17c823e1699b964e10b8b by efriedma
Fix a couple regression tests I missed updating in 2a284782
The file was modifiedmlir/test/Target/LLVMIR/openacc-llvm.mlir
The file was modifiedclang/test/CodeGen/catch-nullptr-and-nonzero-offset.c
Commit bdd55b2f1810eb5a2474a36229d08a9e5ca870fc by efriedma
Fix the default alignment of i1 vectors.

Currently, the default alignment is much larger than the actual size of
the vector in memory.  Fix this to use a sane default.

For SVE, temporarily remove lowering of load/store operations for
predicates with less than 16 elements. The layout the backend was
assuming for SVE predicates with less than 16 elements doesn't agree
with the frontend. More work probably needs to be done here.

This change is, strictly speaking, not backwards-compatible at the
bitcode level. But probably nobody is actually depending on that; i1
vectors in memory are rare, and the code that does use them probably
ends up forcing the alignment to something sane anyway.  If we think
this is a concern, I can restrict this to scalable vectors for now
(where it's actually causing issues for me at the moment).

Differential Revision: https://reviews.llvm.org/D88994
The file was modifiedllvm/test/CodeGen/X86/avx512-extract-subvector-load-store.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-store.ll
The file was modifiedllvm/test/CodeGen/X86/pr41619.ll
The file was modifiedllvm/test/CodeGen/NVPTX/f16x2-instructions.ll
The file was modifiedllvm/test/CodeGen/X86/bitcast-vector-bool.ll
The file was modifiedllvm/test/CodeGen/X86/vector-sext.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-call.c
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-load.ll
The file was modifiedllvm/lib/IR/DataLayout.cpp
The file was modifiedllvm/test/Transforms/InstCombine/select-min-max.ll
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c
The file was modifiedllvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp-vec.ll
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c
The file was modifiedllvm/test/Transforms/InstCombine/abs-intrinsic.ll
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-globals.c
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-op.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
The file was modifiedllvm/test/Transforms/InstCombine/shufflevec-bitcast.ll
The file was modifiedllvm/test/Transforms/SROA/vector-promotion-different-size.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
The file was modifiedclang/test/CodeGen/attr-arm-sve-vector-bits-cast.c
The file was modifiedllvm/test/CodeGen/X86/avx512-select.ll
The file was modifiedllvm/test/CodeGen/X86/load-local-v3i129.ll
The file was modifiedclang/test/CodeGen/builtins-ppc-pair-mma.c
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/test/Transforms/VectorCombine/load-insert-store.ll
The file was modifiedllvm/test/CodeGen/NVPTX/param-load-store.ll
The file was modifiedllvm/test/CodeGen/AArch64/spillfill-sve.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lower-kernargs.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll