Commit
71b6b010e6bc49caaec511195e33ac1f43f07c64
by stellaraccident[mlir][python] Factor out standalone OpView._ods_build_default class method.
* This allows us to hoist trait level information for regions and sized-variadic to class level attributes (_ODS_REGIONS, _ODS_OPERAND_SEGMENTS, _ODS_RESULT_SEGMENTS). * Eliminates some splicey python generated code in favor of a native helper for it. * Makes it possible to implement custom, variadic and region based builders with one line of python, without needing to manually code access to the segment attributes. * Needs follow-on work for region based callbacks and support for SingleBlockImplicitTerminator. * A follow-up will actually add ODS support for generating custom Python builders that delegate to this new method. * Also includes the start of an e2e sample for constructing linalg ops where this limitation was discovered (working progressively through this example and cleaning up as I go).
Differential Revision: https://reviews.llvm.org/D94738
|
 | mlir/docs/Bindings/Python.md |
 | mlir/test/Bindings/Python/ods_helpers.py |
 | mlir/test/mlir-tblgen/op-python-bindings.td |
 | mlir/examples/python/linalg_matmul.py |
 | mlir/lib/Bindings/Python/IRModules.cpp |
 | mlir/lib/Bindings/Python/IRModules.h |
 | mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp |
Commit
cea3abc26f7cbc4ec4cf4cf73b4cce5f926420a9
by andrzej.warzynski[flang][driver] Move isFixedFormSuffix and isFreeFormSuffix to flangFrontend
isFixedFormSuffix and isFreeFormSuffix should be defined in flangFrontend rather than flangFrontendTool library. That's for 2 reasons: * these methods are used in flangFrontend rather than flangFrontendTool * flangFrontendTool depends on flangFrontend
As mentioned in the post-commit review for D94228, without this change shared library builds fail.
Differential Revision: https://reviews.llvm.org/D94968
|
 | flang/include/flang/FrontendTool/Utils.h |
 | flang/lib/FrontendTool/ExecuteCompilerInvocation.cpp |
 | flang/lib/Frontend/FrontendAction.cpp |
 | flang/include/flang/Frontend/FrontendOptions.h |
 | flang/lib/Frontend/FrontendOptions.cpp |
Commit
3cae8b33297b14449514a87dcaa8996ba40db412
by Raphael Isemann[lldb][docs] Add a doc page for enums and constants
Enums and constants are currently missing in the new LLDB Python API docs.
In theory we could just let them be autogenerated like the SB API classes, but sadly the generated documentation suffers from a bunch of problems. Most of these problems come from the way SWIG is representing enums, which is done by translating every single enum case into its own constant. This has a bunch of nasty effects:
* Because SWIG throws away the enum types, we can't actually reference the enum type itself in the API. Also because automodapi is impossible to script, this can't be fixed in post (at least without running like sed over the output files). * The lack of enum types also causes that every enum *case* has its own full doc page. Having a full doc page that just shows a single enum case is pointless and it really slows down sphinx. * There is no SWIG code for the enums, so there is also no place to write documentation strings for them. Also there is no support for copying the doxygen strings (which would be in the wrong format, but better than nothing) for enums (let alone our defines), so we can't really document all this code. * Because the enum cases are just forwards to the native lldb module (which we mock), automodapi actually takes the `Mock` docstrings and adds it to every single enum case.
I don't see any way to solve this via automodapi or SWIG. The most reasonable way to solve this is IMHO to write a simple Clang tool that just parses our enum/constant headers and emits an *.rst file that we check in. This way we can do all the LLDB-specific enum case and constant grouping that we need to make a readable documentation page.
As we're without any real documentation until I get around to write that tool, I wrote a doc page for the enums/constants as a stop gap measure. Most of this is done by just grepping our enum header and then manually cleaning up all the artifacts and copying the few doc strings we have.
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D94959
|
 | lldb/docs/python_api_enums.rst |
 | lldb/bindings/interface/SBLanguageRuntime.i |
 | lldb/bindings/python/python.swig |
Commit
6a563eef1321f742fa06482f4536cd41fb8e24c7
by david.green[ARM] Expand vXi1 VSELECT's
We have no lowering for VSELECT vXi1, vXi1, vXi1, so mark them as expanded to turn them into a series of logical operations.
Differential Revision: https://reviews.llvm.org/D94946
|
 | llvm/test/CodeGen/Thumb2/mve-pred-vselect.ll |
 | llvm/test/Analysis/CostModel/ARM/arith-overflow.ll |
 | llvm/test/Analysis/CostModel/ARM/arith-ssat.ll |
 | llvm/lib/Target/ARM/ARMISelLowering.cpp |
Commit
2f8099509030d3352ac211b1fbae4c6c32b0bfa7
by Raphael Isemann[lldb][docs] Update .htaccess to redirect from old SB API documentation to new one
This is mostly SEO so that the new API can take over the old API when people search for the different SB* classes. Sadly epydoc decided to throw in a -class prefix behind all the class file names, so we can't just overwrite the old files with the newly generated ones.
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D94900
|
 | lldb/docs/.htaccess |
Commit
842314b5f078b5c63df1d7e271fc6fad8461d44f
by llvm-project[Polly] Update isl to isl-0.23-61-g24e8cd12.
This fixes llvm.org/PR48554
Some test cases had to be updated because the hash function for union_maps have been changed which affects the output order.
|
 | polly/lib/External/isl/missing |
 | polly/lib/External/isl/interface/generator.cc |
 | polly/test/DependenceInfo/reduction_privatization_deps.ll |
 | polly/lib/External/isl/test_inputs/codegen/cloog/faber.c |
 | polly/lib/External/isl/test_inputs/codegen/pldi2012/figure7_c.c |
 | polly/lib/External/isl/isl_map.c |
 | polly/lib/External/isl/configure |
 | polly/lib/External/isl/interface/missing |
 | polly/lib/External/isl/test_inputs/codegen/cloog/gesced.c |
 | polly/lib/External/isl/test_inputs/codegen/pldi2012/figure8_b.in |
 | polly/lib/External/isl/isl_polynomial.c |
 | polly/lib/External/isl/imath/imrat.h |
 | polly/lib/External/isl/interface/install-sh |
 | polly/lib/External/isl/isl_test_imath.c |
 | polly/lib/External/isl/test_inputs/codegen/cloog/reservoir-liu-zhuge1.c |
 | polly/lib/External/isl/interface/compile |
 | polly/lib/External/isl/interface/isl.py |
 | polly/lib/External/isl/test_inputs/codegen/cloog/test.c |
 | polly/lib/External/isl/Makefile.in |
 | polly/lib/External/isl/isl_tab_pip.c |
 | polly/lib/External/isl/configure.ac |
 | polly/lib/External/isl/isl_output.c |
 | polly/lib/External/isl/test_inputs/codegen/cloog/yosr2.c |
 | polly/lib/External/isl/isl_mat.c |
 | polly/lib/External/isl/test_inputs/codegen/omega/if_then-3.c |
 | polly/lib/External/isl/isl_local_space.c |
 | polly/lib/External/isl/interface/Makefile.in |
 | polly/lib/External/isl/interface/configure |
 | polly/lib/External/isl/isl_aff_lex_templ.c |
 | polly/lib/External/isl/isl_tab.c |
 | polly/lib/External/isl/isl_union_single.c |
 | polly/lib/External/isl/imath/imrat.c |
 | polly/test/DependenceInfo/reduction_sequence.ll |
 | polly/lib/External/isl/test_inputs/codegen/omega/wak1-0.c |
 | polly/lib/External/isl/test_inputs/codegen/empty.c |
 | polly/lib/External/isl/m4/libtool.m4 |
 | polly/lib/External/isl/isl_pw_templ.c |
 | polly/test/Isl/CodeGen/empty_domain_in_context.ll |
 | polly/lib/External/isl/isl_type_has_space_templ.c |
 | polly/lib/External/isl/py-compile |
 | polly/lib/External/isl/test_inputs/codegen/omega/m12-1.c |
 | polly/lib/External/isl/compile |
 | polly/test/DependenceInfo/different_schedule_dimensions.ll |
 | polly/lib/External/isl/test_inputs/codegen/cloog/dot2.c |
 | polly/test/DependenceInfo/reduction_multiple_reductions_2.ll |
 | polly/test/DependenceInfo/fine_grain_dep_0.ll |
 | polly/lib/External/isl/isl_morph.c |
 | polly/lib/External/isl/isl_union_map_private.h |
 | polly/lib/External/isl/imath/imath.h |
 | polly/lib/External/isl/test_inputs/codegen/cloog/vivien2.c |
 | polly/lib/External/isl/isl_pw_union_opt.c |
 | polly/lib/External/isl/isl_test.c |
 | polly/lib/External/isl/isl_union_multi.c |
 | polly/lib/External/isl/isl_union_map.c |
 | polly/lib/External/isl/ltmain.sh |
 | polly/lib/External/isl/test_inputs/codegen/cloog/mode.c |
 | polly/lib/External/isl/interface/depcomp |
 | polly/lib/External/isl/isl_convex_hull.c |
 | polly/lib/External/isl/test_inputs/codegen/omega/if_then-1.c |
 | polly/test/DependenceInfo/reduction_privatization_deps_3.ll |
 | polly/lib/External/isl/Makefile.am |
 | polly/lib/External/isl/test_inputs/codegen/cloog/dealII.c |
 | polly/test/DependenceInfo/reduction_simple_privatization_deps_w_parameter.ll |
 | polly/lib/External/isl/install-sh |
 | polly/lib/External/isl/isl_seq.c |
 | polly/lib/External/isl/test_inputs/codegen/cloog/yosr.c |
 | polly/lib/External/isl/isl_bernstein.c |
 | polly/lib/External/isl/test_inputs/codegen/omega/if_then-2.c |
 | polly/lib/External/isl/isl_bound.c |
 | polly/lib/External/isl/interface/aclocal.m4 |
 | polly/lib/External/isl/doc/Makefile.in |
 | polly/lib/External/isl/test_inputs/gist1.polylib |
 | polly/lib/External/isl/isl_space.c |
 | polly/test/GPGPU/managed-pointers-preparation.ll |
 | polly/lib/External/isl/isl_map_private.h |
 | polly/lib/External/isl/isl_map_simplify.c |
 | polly/lib/External/isl/doc/user.pod |
 | polly/lib/External/isl/isl_union_eval.c |
 | polly/test/Isl/Ast/alias_checks_with_empty_context.ll |
 | polly/lib/External/isl/GIT_HEAD_ID |
 | polly/lib/External/isl/isl_list_private.h |
 | polly/test/DependenceInfo/may_writes_do_not_block_must_writes_for_war.ll |
 | polly/lib/External/isl/isl_fold.c |
 | polly/lib/External/isl/isl_map_bound_templ.c |
 | polly/lib/External/isl/check_single_reference_templ.c |
 | polly/test/DependenceInfo/reduction_privatization_deps_5.ll |
 | polly/lib/External/isl/isl_tab.h |
 | polly/lib/External/isl/include/isl/schedule.h |
 | polly/test/DependenceInfo/computeout.ll |
 | polly/lib/External/isl/isl_bound.h |
 | polly/lib/External/isl/include/isl/cpp.h |
 | polly/lib/External/isl/isl_copy_tuple_id_templ.c |
 | polly/lib/External/isl/include/isl/cpp-checked.h |
 | polly/lib/External/isl/isl_aff_private.h |
 | polly/lib/External/isl/test_inputs/codegen/cloog/classen.c |
 | polly/test/DependenceInfo/reduction_privatization_deps_4.ll |
 | polly/lib/External/isl/imath/imath.c |
 | polly/lib/External/isl/isl_union_map_lex_templ.c |
 | polly/lib/External/isl/test_inputs/codegen/cloog/gesced3.c |
 | polly/lib/External/isl/isl_ast_codegen.c |
 | polly/lib/External/isl/interface/cpp.cc |
 | polly/lib/External/isl/isl_opt_mpa_templ.c |
 | polly/lib/External/isl/include/isl/multi.h |
 | polly/lib/External/isl/include/isl/polynomial_type.h |
 | polly/lib/External/isl/depcomp |
 | polly/test/DependenceInfo/reduction_multiple_reductions.ll |
 | polly/lib/External/isl/isl_input.c |
 | polly/lib/External/isl/imath/gmp_compat.c |
 | polly/lib/External/isl/include/isl/aff.h |
 | polly/lib/External/isl/test_inputs/codegen/omega/iter9-0.c |
 | polly/lib/External/isl/isl_morph.h |
 | polly/lib/External/isl/test-driver |
 | polly/lib/External/isl/include/isl/union_map.h |
 | polly/test/DependenceInfo/generate_may_write_dependence_info.ll |
 | polly/lib/External/isl/test_inputs/codegen/pldi2012/figure7_d.c |
 | polly/lib/External/isl/test_inputs/codegen/shift2.c |
 | polly/lib/External/isl/include/isl/space.h |
 | polly/lib/External/isl/isl_arg.c |
 | polly/lib/External/isl/include/isl/map.h |
 | polly/lib/External/isl/test_inputs/codegen/pldi2012/figure7_b.c |
 | polly/lib/External/isl/ChangeLog |
 | polly/test/GPGPU/non-zero-array-offset.ll |
 | polly/lib/External/isl/interface/ltmain.sh |
 | polly/test/ScheduleOptimizer/focaltech_test_detail_threshold-7bc17e.ll |
 | polly/lib/External/isl/test_inputs/codegen/group.c |
 | polly/test/DependenceInfo/reduction_simple_privatization_deps_2.ll |
 | polly/lib/External/isl/isl_list_templ.c |
 | polly/lib/External/isl/test_inputs/codegen/correlation.c |
 | polly/lib/External/isl/aclocal.m4 |
 | polly/lib/External/isl/test_inputs/codegen/cloog/vivien.c |
 | polly/lib/External/isl/include/isl/polynomial.h |
 | polly/lib/External/isl/isl_polynomial_private.h |
 | polly/lib/External/isl/isl_union_templ.c |
 | polly/lib/External/isl/isl_space_private.h |
 | polly/lib/External/isl/AUTHORS |
 | polly/lib/External/isl/isl_aff.c |
 | polly/test/DependenceInfo/sequential_loops.ll |
Commit
88e7c3498c3a8827c3706e39609b22dea9045432
by Abhina.Sreeskantharajan[SystemZ][z/OS] Fix Permission denied pattern matching
On z/OS, the error message "EDC5111I Permission denied." is not matched correctly in lit tests. This patch updates the check expression to match successfully.
Differential Revision: https://reviews.llvm.org/D94432
|
 | llvm/test/tools/llvm-ar/error-opening-permission.test |
Commit
9c6a00fe99c4bbe329dd1933515f1a1a430fd5d7
by fraser[RISCV] Add ISel patterns for scalable mask exts & truncs
Original patch by @rogfer01.
This patch adds support for sign-, zero-, and any-extension from scalable mask vector types to integer vector types, as well as truncation in the opposite direction.
Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com> Co-Authored-by: Fraser Cormack <fraser@codeplay.com>
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D94590
|
 | llvm/lib/Target/RISCV/RISCVISelLowering.h |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll |
 | llvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll |
Commit
cfc60730179042a93cb9cb338982e71d20707a24
by Jessica Paquette[GlobalISel] Combine (a[0]) | (a[1] << k1) | ...| (a[m] << kn) into a wide load
This is a restricted version of the combine in `DAGCombiner::MatchLoadCombine`. (See D27861)
This tries to recognize patterns like below (assuming a little-endian target):
``` s8* x = ... s32 val = a[0] | (a[1] << 8) | (a[2] << 16) | (a[3] << 24) -> s32 val = *((i32)a)
s8* x = ... s32 val = a[3] | (a[2] << 8) | (a[1] << 16) | (a[0] << 24) -> s32 val = BSWAP(*((s32)a)) ```
(This patch also handles the big-endian target case as well, in which the first example above has a BSWAP, and the second example above does not.)
To recognize the pattern, this searches from the last G_OR in the expression tree.
E.g.
``` Reg Reg \ / OR_1 Reg \ / OR_2 \ Reg .. / Root ```
Each non-OR register in the tree is put in a list. Each register in the list is then checked to see if it's an appropriate load + shift logic.
If every register is a load + potentially a shift, the combine checks if those loads + shifts, when OR'd together, are equivalent to a wide load (possibly with a BSWAP.)
To simplify things, this patch
(1) Only handles G_ZEXTLOADs (which appear to be the common case) (2) Only works in a single MachineBasicBlock (3) Only handles G_SHL as the bit twiddling to stick the small load into a specific location
An IR example of this is here: https://godbolt.org/z/4sP9Pj (lifted from test/CodeGen/AArch64/load-combine.ll)
At -Os on AArch64, this is a 0.5% code size improvement for CTMark/sqlite3, and a 0.4% improvement for CTMark/7zip-benchmark.
Also fix a bug in `isPredecessor` which caused it to fail whenever `DefMI` was the first instruction in the block.
Differential Revision: https://reviews.llvm.org/D94350
|
 | llvm/include/llvm/CodeGen/TargetLowering.h |
 | llvm/include/llvm/Target/GlobalISel/Combine.td |
 | llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h |
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
 | llvm/lib/CodeGen/TargetLoweringBase.cpp |
 | llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern-align.mir |
 | llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-load-or-pattern.mir |
Commit
cbf52463599c860243d29877021fcdfcd9d46553
by Jessica PaquetteFix buildbot after cfc60730179042a93cb9cb338982e71d20707a24
Windows buildbots were not happy with using find_if + instructionsWithoutDebug.
In cfc60730179042a9, instructionsWithoutDebug is not technically necessary. So, just iterate over the block directly.
http://lab.llvm.org:8011/#/builders/127/builds/4732/steps/7/logs/stdio
|
 | llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp |
Commit
18cb7441b69a22565dcc340bac0e58bc9f301439
by jay.foad[AMDGPU] Simpler names for arch-specific ttmp registers. NFC.
Rename the *_gfx9_gfx10 ttmp registers to *_gfx9plus for simplicity, and use the corresponding isGFX9Plus predicate to decide when to use them instead of the old *_vi versions.
Differential Revision: https://reviews.llvm.org/D94975
|
 | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp |
 | llvm/lib/Target/AMDGPU/SIRegisterInfo.td |
 | llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp |
 | llvm/lib/Target/AMDGPU/SIDefines.h |
Commit
17846ed5af4a83334ef7d07f0b4a9d525e6ec0db
by usx[clangd] Use ASTSignals in Heuristics CC Ranking.
Differential Revision: https://reviews.llvm.org/D94927
|
 | clang-tools-extra/clangd/Quality.cpp |
Commit
57443bfb4ab06f7dc45f802119efc1068289cdd9
by kparzysz[Hexagon] Fix segment start to adjust for gaps between segments
The Hexagon Vector Combine pass genertes stores for a complete aligned vector. The start of each section is a multiple of the vector size, so that value is passed to normalize to compute the offset of the stores in the section. The first store may not occur at offset 0 when there is a gap between sections.
|
 | llvm/test/CodeGen/Hexagon/autohvx/vector-align-store-mask.ll |
 | llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp |
Commit
987760b463c1303121fff8197c4ebc66b61f0616
by richard[www] Fix background color in table cell.
|
 | clang/www/cxx_status.html |
Commit
121cac01e8f8afe6ed2bb0b8ffe92f323776a716
by jeroen.dobbelaere[noalias.decl] Look through llvm.experimental.noalias.scope.decl
Just like llvm.assume, there are a lot of cases where we can just ignore llvm.experimental.noalias.scope.decl.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D93042
|
 | llvm/include/llvm/Analysis/VectorUtils.h |
 | llvm/test/Analysis/AliasSet/intrinsics.ll |
 | llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp |
 | llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll |
 | llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll |
 | llvm/lib/Analysis/ValueTracking.cpp |
 | llvm/test/Analysis/CostModel/X86/free-intrinsics.ll |
 | llvm/lib/CodeGen/Analysis.cpp |
 | llvm/include/llvm/Analysis/TargetTransformInfoImpl.h |
 | llvm/lib/Analysis/MemorySSA.cpp |
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
 | llvm/test/Transforms/EarlyCSE/noalias-scope-decl.ll |
 | llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll |
 | llvm/lib/Transforms/Scalar/EarlyCSE.cpp |
 | llvm/lib/Analysis/VectorUtils.cpp |
 | llvm/test/Analysis/MemorySSA/noalias-scope-decl.ll |
 | llvm/lib/Analysis/AliasSetTracker.cpp |
 | llvm/test/Analysis/BasicAA/noalias-scope-decl.ll |
Commit
6f69f2ed61ae805df496fc86ef22e7685573d556
by rnkConsider ASan messages interesting for creduce
Helped me reduce llvm.org/pr48582
|
 | clang/utils/creduce-clang-crash.py |
Commit
e678656625a3e2b6a5f2849f4a6f7612ceeaed07
by rnkAdd bounds checking assertions to APValue, NFC
These checks help find llvm.org/pr48582 without ASan
|
 | clang/include/clang/AST/APValue.h |
Commit
68dba7eae1df333738d1c77cbbefd480995c1972
by Louis Dionne[libc++] Unbreak the debug mode
When the Debug mode is enabled, we disable extern declarations because we don't want to use the functions compiled in the library, which might not have had the debug mode enabled when built. However, some extern declarations need to be kept, because code correctness depends on it.
31e820378b8a removed those declarations, which had the unintended consequence of breaking the debug build. This commit fixes that by re-introducing a separate macro for the required extern declarations, and adds a comment so that we don't fall into that trap in the future.
Differential Revision: https://reviews.llvm.org/D94718
|
 | libcxx/test/libcxx/debug/extern-templates.sh.cpp |
 | libcxx/include/__locale |
 | libcxx/include/locale |
 | libcxx/include/__config |
Commit
933518fff82c8f39626bbcca81adc516483a9651
by Louis Dionne[libc++] Make LIBCXX_ENABLE_FILESYSTEM fully consistent
Previously, LIBCXX_ENABLE_FILESYSTEM controlled only whether the filesystem support was compiled into libc++'s library. This commit promotes the setting to a first-class option like LIBCXX_ENABLE_LOCALIZATION, where the whole library is aware of the setting and features that depend on <filesystem> won't be provided at all. The test suite is also properly annotated such that tests that depend on <filesystem> are disabled when the library doesn't support it.
This is an alternative to https://llvm.org/D94824, but also an improvement along the lines of LIBCXX_ENABLE_LOCALIZATION that I had been wanting to make for a while.
Differential Revision: https://reviews.llvm.org/D94921
|
 | libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/open_path.pass.cpp |
 | libcxx/include/fstream |
 | libcxx/test/std/utilities/time/time.clock/time.clock.file/now.pass.cpp |
 | libcxx/test/libcxx/experimental/filesystem/deprecated.verify.cpp |
 | libcxx/test/libcxx/min_max_macros.compile.pass.cpp |
 | libcxx/test/libcxx/modules/inttypes_h_exports.compile.pass.cpp |
 | libcxx/test/configs/legacy.cfg.in |
 | libcxx/utils/generate_feature_test_macro_components.py |
 | libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/open_path.pass.cpp |
 | libcxx/include/filesystem |
 | libcxx/test/libcxx/modules/cstdint_exports.compile.pass.cpp |
 | libcxx/test/libcxx/modules/clocale_exports.compile.pass.cpp |
 | libcxx/utils/ci/run-buildbot |
 | libcxx/cmake/caches/Generic-no-filesystem.cmake |
 | libcxx/test/std/input.output/file.streams/fstreams/fstream.members/open_path.pass.cpp |
 | libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/path.pass.cpp |
 | libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/path.pass.cpp |
 | libcxx/utils/libcxx/test/params.py |
 | libcxx/test/std/input.output/filesystems/lit.local.cfg |
 | libcxx/test/libcxx/experimental/filesystem/version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/filesystem.version.pass.cpp |
 | libcxx/test/libcxx/modules/stdint_h_exports.compile.pass.cpp |
 | libcxx/utils/generate_header_tests.py |
 | libcxx/test/std/experimental/filesystem/fs.req.macros/feature_macro.pass.cpp |
 | libcxx/utils/ci/macos-backdeployment.sh |
 | libcxx/test/libcxx/double_include.sh.cpp |
 | libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/open_path.pass.cpp |
 | libcxx/utils/ci/buildkite-pipeline.yml |
 | libcxx/CMakeLists.txt |
 | libcxx/test/libcxx/no_assert_include.compile.pass.cpp |
 | libcxx/test/libcxx/modules/cinttypes_exports.compile.pass.cpp |
 | libcxx/test/libcxx/modules/stds_include.sh.cpp |
 | libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/path.pass.cpp |
 | libcxx/utils/libcxx/test/features.py |
 | libcxx/include/__config_site.in |
 | libcxx/test/std/experimental/filesystem/fs.req.namespace/namespace.pass.cpp |
Commit
82e537a9d28a2c18bd1637e2eac0e0af658ed829
by tianshilei1992[Clang][OpenMP] Fixed an issue that clang crashed when compiling OpenMP program in device only mode without host IR
D94745 rewrites the `deviceRTLs` using OpenMP and compiles it by directly calling the device compilation. `clang` crashes because entry in `OffloadEntriesDeviceGlobalVar` is unintialized. Current design supposes the device compilation can only be invoked after host compilation with the host IR such that `clang` can initialize `OffloadEntriesDeviceGlobalVar` from host IR. This avoids us using device compilation directly, especially when we only have code wrapped into `declare target` which are all device code. The same issue also exists for `OffloadEntriesInfoManager`.
In this patch, we simply initialized an entry if it is not in the maps. Not sure we need an option to tell the device compiler that it is invoked standalone.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D94871
|
 | clang/lib/CodeGen/CGOpenMPRuntime.cpp |
 | clang/test/OpenMP/declare_target_device_only_compilation.cpp |
Commit
ce8b3937ddad39536e6e715813682d9198229fb5
by craig.topper[RISCV] Add DAG combine to turn (setcc X, 1, setne) -> (setcc X, 0, seteq) if we can prove X is 0/1.
If we are able to compare with 0 instead of 1, we might be able to fold the setcc into a beqz/bnez.
Often these setccs start life as an xor that gets converted to a setcc by DAG combiner's rebuildSetcc. I looked into a detecting (xor X, 1) and converting to (seteq X, 0) based on boolean contents being 0/1 in rebuildSetcc instead of using computeKnownBits. It was very perturbing to AMDGPU tests which I didn't look closely at. It had a few changes on a couple other targets, but didn't seem to be much if any improvement.
Reviewed By: lenary
Differential Revision: https://reviews.llvm.org/D94730
|
 | llvm/test/CodeGen/RISCV/double-br-fcmp.ll |
 | llvm/test/CodeGen/RISCV/float-br-fcmp.ll |
 | llvm/test/CodeGen/RISCV/select-and.ll |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
 | llvm/test/CodeGen/RISCV/half-br-fcmp.ll |
 | llvm/test/CodeGen/RISCV/select-or.ll |
 | llvm/include/llvm/CodeGen/ISDOpcodes.h |
Commit
a23178690987f04a09125d712ec3168b084539bb
by aeubanks[wasm][LLD] Rename --lto-new-pass-manager to --no-lto-legacy-pass-manager
This follows a similar ELF change.
Reviewed By: MaskRay, sbc100
Differential Revision: https://reviews.llvm.org/D93253
|
 | lld/test/wasm/lto/new-pass-manager.ll |
 | lld/wasm/Driver.cpp |
 | lld/test/wasm/lto/verify-invalid.ll |
 | lld/wasm/Options.td |
Commit
bedbb58203cd67a46f64a0182dc1e6717b3c536c
by nikita.ppv[InstCombine] Add additional tests for select operand replacement (NFC)
In particular, add tests for speculatable and non-speculatable instructions.
|
 | llvm/test/Transforms/InstCombine/select-binop-cmp.ll |
Commit
21443381c00d9d5ddd6a73f2f839dc4872d79463
by nikita.ppvReapply [InstCombine] Replace one-use select operand based on condition
Relative to the original change, this adds a check that the instruction on which we're replacing operands is safe to speculatively execute, because that's what we're effectively doing. We're executing the instruction with the replaced operand, which is fine if it's pure, but not fine if can cause side-effects or UB (aka is not speculatable).
Additionally, we cannot (generally) replace operands in phi nodes, as these may refer to a different loop iteration. This is also covered by the speculation check.
-----
InstCombine already performs a fold where X == Y ? f(X) : Z is transformed to X == Y ? f(Y) : Z if f(Y) simplifies. However, if f(X) only has one use, then we can always directly replace the use inside the instruction. To actually be profitable, limit it to the case where Y is a non-expr constant.
This could be further extended to replace uses further up a one-use instruction chain, but for now this only looks one level up.
Among other things, this also subsumes D94860.
Differential Revision: https://reviews.llvm.org/D94862
|
 | llvm/test/Transforms/InstCombine/select-binop-cmp.ll |
 | llvm/test/Transforms/InstCombine/select-safe-transforms.ll |
 | llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp |
Commit
7113de301a846521a2bdd73d44ac9cf5827b37a6
by mariya.podchishchaeva[ScalarizeMaskedMemIntrin] Add missing dependency
The pass has dependency on 'TargetTransformInfoWrapperPass', but the corresponding call to INITIALIZE_PASS_DEPENDENCY was missing.
Differential Revision: https://reviews.llvm.org/D94916
|
 | llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp |
Commit
6ac9cb2a7c6c19797fc778f3d441a6fb7b69793c
by Louis Dionne[libc++][P1679] add string contains
C++23 string contains implementation and tests
Paper: https://wg21.link/P1679R3 Standard (string): https://eel.is/c++draft/string.contains Standard (string_view): https://eel.is/c++draft/string.view.ops#lib:contains,basic_string_view
Differential Revision: https://reviews.llvm.org/D93912
|
 | libcxx/include/version |
 | libcxx/test/std/strings/string.view/string.view.template/contains.string_view.pass.cpp |
 | libcxx/test/std/strings/string.view/string.view.template/contains.char.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/string.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp |
 | libcxx/test/std/language.support/support.limits/support.limits.general/string_view.version.pass.cpp |
 | libcxx/test/std/strings/basic.string/string.contains/contains.string_view.pass.cpp |
 | libcxx/test/std/strings/basic.string/string.contains/contains.ptr.pass.cpp |
 | libcxx/include/string |
 | libcxx/docs/FeatureTestMacroTable.rst |
 | libcxx/include/string_view |
 | libcxx/test/std/strings/basic.string/string.contains/contains.char.pass.cpp |
 | libcxx/utils/generate_feature_test_macro_components.py |
 | libcxx/test/std/strings/string.view/string.view.template/contains.ptr.pass.cpp |
Commit
a4b42c621b9e2009cfd8bc9265bbf970c7231271
by Jonas Devlieghere[llvm] Protect signpost map with a mutex
Use a mutex to protect concurrent access to the signpost map. This fixes nondeterministic crashes in LLDB that appeared after using signposts in the timer implementation.
Differential revision: https://reviews.llvm.org/D94285
|
 | llvm/lib/Support/Signposts.cpp |
Commit
d39adeaf440bc0db508b7d2a4eb9ace7f40178fc
by i[ELF] Improve R_PPC64_ADDR* relocation tests
|
 | lld/test/ELF/ppc64-reloc-addr-err.s |
 | lld/test/ELF/ppc64-reloc-addr.s |
 | lld/test/ELF/ppc64-relocs.s |
Commit
e12e0d66c03c89d8ff0b08a4285f5b74a85a5812
by i[ELF] Error for out-of-range R_PPC64_ADDR16_HA, R_PPC64_ADDR16_HI and their friends
There are no tests for REL16_* and TPREL16_*.
|
 | lld/test/ELF/ppc64-reloc-addr16-err.s |
 | lld/ELF/Arch/PPC64.cpp |
Commit
5fcb412ed0831ad763810f9b424149b3b353451a
by i[ELF] Support R_PPC64_ADDR16_HIGH
R_PPC64_ADDR16_HI represents bits 16-31 of a 32-bit value R_PPC64_ADDR16_HIGH represents bits 16-31 of a 64-bit value.
In the Linux kernel, `LOAD_REG_IMMEDIATE_SYM` defined in `arch/powerpc/include/asm/ppc_asm.h` uses @l, @high, @higher, @highest to load the 64-bit value of a symbol.
Fixes https://github.com/ClangBuiltLinux/linux/issues/1260
|
 | lld/test/ELF/ppc64-reloc-addr16-err.s |
 | lld/ELF/Arch/PPC64.cpp |
 | lld/test/ELF/ppc64-reloc-addr.s |
Commit
24e8e21f19f4380e8410a12f9135bfef3c046142
by pklausler[flang] Refine WhyNotModifiable()
The utility routine WhyNotModifiable() needed to become more aware of the use of pointers in data-refs; the targets of pointer components are sometimes modifiable even when the leftmost ("base") symbol of a data-ref is not.
Added a new unit test for WhyNotModifiable() that uses internal READ statements (mostly), since I/O semantic checking uses WhyNotModifiable() for all its definability checking.
Differential Revision: https://reviews.llvm.org/D94849
|
 | flang/lib/Semantics/check-io.cpp |
 | flang/lib/Semantics/tools.cpp |
 | flang/include/flang/Evaluate/tools.h |
 | flang/test/Semantics/modifiable01.f90 |
 | flang/lib/Evaluate/tools.cpp |
Commit
5b7aef6eb4b2930971029b984cb2360f7682e5a5
by 31459023+hctimRevert "[PDB] Defer relocating .debug$S until commit time and parallelize it"
This reverts commit 6529d7c5a45b1b9588e512013b02f891d71bc134.
Reason: Broke the ASan buildbots. http://lab.llvm.org:8011/#/builders/99/builds/1567
|
 | lld/COFF/PDB.cpp |
 | lld/COFF/Chunks.h |
 | lld/COFF/Chunks.cpp |
 | llvm/lib/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.cpp |
 | llvm/lib/DebugInfo/PDB/Native/DbiStreamBuilder.cpp |
 | llvm/include/llvm/DebugInfo/PDB/Native/DbiModuleDescriptorBuilder.h |
Commit
d8ffaa9f7234d8bf40682763373ab060d14adf22
by jeroen.dobbelaere[NFC] cleanup noalias2.ll test
D75825 and D75828 modified llvm/test/Transforms/Inline/noalias2.ll to handle llvm.assume. The checking though was broken. The NO_ASSUME has been replaced by a normal CHECK; the ASSUME rules were never triggered and have been removed. The test checks have been regenerated.
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D94978
|
 | llvm/test/Transforms/Inline/noalias2.ll |
Commit
e463bd53c03ff9183bd30030477dfe6f3b2fdd0c
by alexey.bataevRevert "[SLP]Merge reorder and reuse shuffles."
This reverts commit 438682de6a38ac97f89fa38faf5c8dc9b09cd9ad to fix the bug with the reducing size of the resulting vector for the entry node with multiple users.
|
 | llvm/test/Transforms/SLPVectorizer/X86/PR32086.ll |
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
 | llvm/test/Transforms/SLPVectorizer/AArch64/PR38339.ll |
 | llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll |
Commit
27afc091e2c0caa954326129adb86987d1b41c91
by mtrofin[NFC] Disallow unused prefixes under Other
Differential Revision: https://reviews.llvm.org/D94853
|
 | llvm/test/Other/lit.local.cfg |
 | llvm/test/Other/opt-LTO-pipeline.ll |
 | llvm/test/Other/new-pass-manager.ll |
 | llvm/test/Other/print-slotindexes.ll |
 | llvm/test/Other/opt-bisect-legacy-pass-manager.ll |
Commit
cabe1b11243740d39c0b49c10a8ce86001b1011c
by aeubanks[polly][NewPM][test] Fix polly tests under -enable-new-pm
In preparation for turning on opt's -enable-new-pm by default, this pins uses of passes via the legacy "opt -passname" with pass names beginning with "polly-" and "polyhedral-info" to the legacy PM. Many of these tests use -analyze, which isn't supported in the new PM.
(This doesn't affect uses of "opt -passes=passname").
rL240766 accidentally removed `-polly-prepare` in phi_not_grouped_at_top.ll, and it also doesn't use the output of -analyze.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D94266
|
 | llvm/tools/opt/opt.cpp |
 | polly/test/ScopInfo/phi_not_grouped_at_top.ll |
Commit
b272698de790d6603db7992c0c0ad6446b7a52b8
by alexey.bataev[OPENMP]Do not use OMP_MAP_TARGET_PARAM for data movement directives.
OMP_MAP_TARGET_PARAM flag is used to mark the data that shoud be passed as arguments to the target kernels, nothing else. But the compiler still marks the data with OMP_MAP_TARGET_PARAM flags even if the data is passed to the data movement directives, like target data, target update etc. This flag is just ignored for this directives and the compiler does not need to emit it.
Reviewed By: cchen
Differential Revision: https://reviews.llvm.org/D91261
|
 | clang/test/OpenMP/target_data_codegen.cpp |
 | clang/test/OpenMP/target_data_use_device_ptr_if_codegen.cpp |
 | clang/test/OpenMP/target_map_member_expr_array_section_codegen.cpp |
 | clang/test/OpenMP/target_update_codegen.cpp |
 | clang/lib/CodeGen/CGOpenMPRuntime.cpp |
 | clang/test/OpenMP/target_exit_data_codegen.cpp |
 | clang/test/OpenMP/target_data_map_pointer_array_subscript_codegen.cpp |
 | clang/test/OpenMP/declare_mapper_codegen.cpp |
 | clang/test/OpenMP/target_enter_data_codegen.cpp |
 | clang/test/OpenMP/target_data_use_device_addr_codegen.cpp |
 | clang/test/OpenMP/target_data_use_device_ptr_codegen.cpp |
 | clang/test/OpenMP/target_enter_data_depend_codegen.cpp |
 | clang/test/OpenMP/target_exit_data_depend_codegen.cpp |
 | clang/test/OpenMP/target_update_depend_codegen.cpp |
Commit
7bd3702b64043fb623bf82c1d1a8a2d168142219
by sivachandra[libc] Extend the current fenv functions to aarch64.
This change does not try to move the common parts of x86 and aarch64 and build few abstractions over them. While this is possible, x86 story needs a bit of cleanup, especially around manipulation of the mxcsr register. Moreover, on x86 one can raise exceptions without performing exception raising operations. So, all of this can be done in follow up patches.
Reviewed By: lntue
Differential Revision: https://reviews.llvm.org/D94947
|
 | libc/utils/FPUtil/FEnv.h |
 | libc/config/linux/aarch64/entrypoints.txt |
 | libc/utils/FPUtil/aarch64/FEnv.h |
Commit
5a684b70dc74f9f671f8eb61993a25769ec68117
by richardEnsure we don't strip the ConstantExpr carrying a non-type template argument's value off it during substitution.
|
 | clang/lib/Sema/SemaTemplateInstantiate.cpp |
 | clang/test/SemaTemplate/temp_arg_nontype_cxx17.cpp |
Commit
da986511fb9da1a46a0ca4dba2e49e2426036303
by richardRevert "DR2064: decltype(E) is only a dependent type if E is type-dependent, not if E is merely instantiation-dependent."
This change leaves us unable to distinguish between different function templates that differ in only instantiation-dependent ways, for example
template<typename T> decltype(int(T())) f(); template<typename T> decltype(int(T(0))) f();
We'll need substantially better support for types that are instantiation-dependent but not dependent before we can go ahead with this change.
This reverts commit e3065ce238475ec202c707f4c58d90df171626ca.
|
 | clang/lib/AST/ItaniumMangle.cpp |
 | clang/test/SemaCXX/coroutines.cpp |
 | clang/test/SemaTemplate/dependent-expr.cpp |
 | clang/test/CodeGenCXX/mangle-subst.cpp |
 | clang/lib/AST/Type.cpp |
 | clang/www/cxx_dr_status.html |
 | clang/test/CXX/drs/dr20xx.cpp |
 | clang/test/SemaTemplate/temp_arg_template_cxx1z.cpp |
 | clang/test/SemaCXX/invalid-template-base-specifier.cpp |
 | clang/include/clang/AST/DependenceFlags.h |
 | clang/lib/AST/ASTContext.cpp |
 | clang/test/Sema/invalid-bitwidth-expr.mm |
Commit
b99147b4fa7b361fba4eeefdb443dca72b8ee87f
by sbc[lld][WebAssembly] Don't defined indirect function table in relocatable output
Object files (and the output --relocatable) should never define __indirect_function_table. It should always be linker synthesized with the final output executable.
Differential Revision: https://reviews.llvm.org/D94993
|
 | lld/wasm/Driver.cpp |
 | lld/test/wasm/locals-duplicate.test |
 | lld/test/wasm/signature-mismatch.ll |
 | lld/test/wasm/weak-alias.ll |
 | lld/test/wasm/relocatable.ll |
Commit
894d88a759c9376de4a48ed99c965aac97839b6c
by stellaraccident[mlir][python] Add facility for extending generated python ODS.
* This isn't exclusive with other mechanisms for more ODS centric op definitions, but based on discussions, we feel that we will always benefit from a python escape hatch, and that is the most natural way to write things that don't fit the mold. * I suspect this facility needs further tweaking, and once it settles, I'll document it and add more tests. * Added extensions for linalg, since it is unusable without them and continued to evolve my e2e example.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D94752
|
 | mlir/lib/Bindings/Python/mlir/dialects/_linalg.py |
 | mlir/examples/python/.style.yapf |
 | mlir/examples/python/linalg_matmul.py |
 | mlir/lib/Bindings/Python/.style.yapf |
 | mlir/lib/Bindings/Python/CMakeLists.txt |
 | mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp |
 | mlir/lib/Bindings/Python/mlir/dialects/__init__.py |
Commit
ce24bb0eddab12460a01e4d91faa435f2fc84bb6
by steveire[ASTMatchers] NFC Rearrange declarations to allow more arg adapting
|
 | clang/include/clang/ASTMatchers/ASTMatchersInternal.h |
Commit
be7352c00d51f4358db3a23ed6a077f7cb48eafd
by silvasean[mlir][splitting std] move 2 more ops to `tensor`
- DynamicTensorFromElementsOp - TensorFromElements
Differential Revision: https://reviews.llvm.org/D94994
|
 | mlir/test/Dialect/Tensor/ops.mlir |
 | mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td |
 | mlir/include/mlir/Dialect/StandardOps/IR/Ops.td |
 | mlir/test/IR/core-ops.mlir |
 | mlir/test/Dialect/Tensor/bufferize.mlir |
 | mlir/test/Dialect/Standard/invalid.mlir |
 | mlir/test/Dialect/Tensor/canonicalize.mlir |
 | mlir/test/Dialect/Standard/bufferize.mlir |
 | mlir/test/Dialect/Tensor/invalid.mlir |
 | mlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp |
 | mlir/lib/Dialect/Tensor/Transforms/PassDetail.h |
 | mlir/lib/Conversion/ShapeToStandard/CMakeLists.txt |
 | mlir/lib/Dialect/Tensor/IR/TensorOps.cpp |
 | mlir/test/Dialect/Standard/ops.mlir |
 | mlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp |
 | mlir/lib/Dialect/StandardOps/Transforms/Bufferize.cpp |
 | mlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt |
 | mlir/test/IR/invalid-ops.mlir |
 | mlir/include/mlir/Dialect/Tensor/Transforms/Passes.td |
 | mlir/lib/Dialect/StandardOps/IR/Ops.cpp |
 | mlir/test/Transforms/canonicalize.mlir |
 | mlir/lib/Dialect/Tensor/IR/CMakeLists.txt |
 | mlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir |
 | mlir/test/Dialect/Standard/canonicalize.mlir |
 | mlir/include/mlir/Dialect/Tensor/IR/Tensor.h |
Commit
347145538443347e705aaf1fb1473a5dcc5698e6
by stilis[lldb/test] Skip TestProcessAttach: test_attach_to_process_from_different_dir_by_id on Windows
This test is flakey on Windows and on failure it hangs causing the test suite to fail and future builds (on the buildbot, especially) to fail because they cannot re-write the files that are currently in use
|
 | lldb/test/API/commands/process/attach/TestProcessAttach.py |
Commit
ecf696641e6ce4b22e8c8ea3c7476b9c1f0f200b
by steveire[ASTMatchers] Allow use of mapAnyOf in more contexts
Add an operator overload to ArgumentAdaptingMatcherFunc to allow use of mapAnyOf within hasAncestor, hasParent etc.
Differential Revision: https://reviews.llvm.org/D94864
|
 | clang/include/clang/ASTMatchers/ASTMatchersInternal.h |
 | clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp |
Commit
e75a4b6ea9e950181049f1c2f8a78835754852fe
by craig.topper[RISCV] Remove NotHasStdExtZbb predicate from zext.h/sext.b/sext.h InstAliases. NFC
NotHasStdExtZbb doesn't have an AssemblerPredicate associated with it so it didn't do anything. We don't need it either because the sorting rules in tablegen prioritize by number of predicates. So the dedicated instructions in the B extension that have predicates will be prioritized automatically.
|
 | llvm/lib/Target/RISCV/RISCVInstrInfo.td |
 | llvm/lib/Target/RISCV/RISCV.td |
Commit
18e093faf726d15f210ab4917142beec51848258
by richard[msabi] Mangle a template argument referring to array-to-pointer decay applied to an array the same as the array itself.
This follows MS ABI, and corrects a regression from the implementation of generalized non-type template parameters, where we "forgot" how to mangle this case.
|
 | clang/test/CodeGenCXX/mangle-ms-templates.cpp |
 | clang/lib/AST/MicrosoftMangle.cpp |
Commit
8d112a8eda9d78bc4c97cf7bc9e133afae7b6eed
by steveireRemove TypedMatcherOps from VariantValue
It provides no features or advantage over ASTNodeKind-based handling.
Differential Revision: https://reviews.llvm.org/D94876
|
 | clang/include/clang/ASTMatchers/Dynamic/VariantValue.h |
 | clang/lib/ASTMatchers/Dynamic/VariantValue.cpp |
Commit
22eb1cf89f38b33aaf082326ba4dcfee4f98913d
by echristoRemove unused functions.
|
 | mlir/test/lib/Dialect/Affine/TestVectorizationUtils.cpp |
Commit
0cd0eb6e0a8133ec86d884c1bbc9c3cbd1769c0b
by steveireAdd API to retrieve a clade kind from ASTNodeKind
Differential Revision: https://reviews.llvm.org/D94877
|
 | clang/include/clang/AST/ASTTypeTraits.h |
 | clang/lib/AST/ASTTypeTraits.cpp |
 | clang/unittests/AST/ASTTypeTraitsTest.cpp |
Commit
96ef4f307df27f4e0946eb344bac2703017ad073
by sbcRevert "[WebAssembly] call_indirect issues table number relocs"
This reverts commit 418df4a6ab35d343cc0f2608c90a73dd9b8d0ab1.
This change broke emscripten tests, I believe because it started generating 5-byte a wide table index in the call_indirect instruction. Neither v8 nor wabt seem to be able to handle that. The spec currently says that this is single 0x0 byte and:
"In future versions of WebAssembly, the zero byte occurring in the encoding of the call_indirectcall_indirect instruction may be used to index additional tables."
So we need to revisit this change. For backwards compat I guess we need to guarantee that __indirect_function_table is always at address zero. We could also consider making this a single-byte relocation with and assert if have more than 127 tables (for now).
Differential Revision: https://reviews.llvm.org/D95005
|
 | llvm/test/MC/WebAssembly/basic-assembly.s |
 | llvm/test/MC/WebAssembly/reloc-code.ll |
 | llvm/lib/MC/WasmObjectWriter.cpp |
 | llvm/test/CodeGen/WebAssembly/function-pointer64.ll |
 | lld/test/wasm/call-indirect.ll |
 | llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp |
 | llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp |
 | llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp |
 | llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp |
 | llvm/test/MC/WebAssembly/type-index.s |
 | llvm/test/CodeGen/WebAssembly/multivalue.ll |
 | llvm/test/MC/WebAssembly/call-indirect-relocs.s |
 | llvm/test/MC/WebAssembly/tail-call-encodings.s |
 | lld/test/wasm/shared.ll |
 | llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h |
 | llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp |
 | llvm/test/MC/WebAssembly/weak-alias.s |
 | lld/test/wasm/compress-relocs.ll |
 | llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td |
Commit
1bf2b1665b43e1a5090177486c8fa6374a4596a2
by joker.ephImplement constant folding for DivFOp
Add a constant folder for DivFOp. Analogous to existing folders for AddFOp, SubFOp, and MulFOp. Matches the behavior of existing LLVM constant folding (https://github.com/llvm/llvm-project/blob/999f5da6b3088fa4c0bb9d05b358d015ca74c71f/llvm/lib/IR/ConstantFold.cpp#L1432).
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D94939
|
 | mlir/lib/Dialect/StandardOps/IR/Ops.cpp |
 | mlir/include/mlir/Dialect/StandardOps/IR/Ops.td |
Commit
21b1ad0340a7ba69c605ea1c218adb567b5190ae
by wmi[SampleFDO] Add the support to split the function profiles with context into separate sections.
For ThinLTO, all the function profiles without context has been annotated to outline functions if possible in prelink phase. In postlink phase, profile annotation in postlink phase is only meaningful for function profile with context. If the profile is large, it is better to split the profile into two parts, one with context and one without, so the profile reading in postlink phase only has to read the part with context. To have the profile splitting, we extend the ExtBinary format to support different section arrangement. It will be flexible to add other section layout in the future without the need to create new class inheriting from ExtBinary class.
Differential Revision: https://reviews.llvm.org/D94435
|
 | llvm/lib/Transforms/IPO/SampleProfile.cpp |
 | llvm/test/Transforms/SampleProfile/ctxsplit.ll |
 | llvm/include/llvm/ProfileData/SampleProfWriter.h |
 | llvm/include/llvm/ProfileData/SampleProfReader.h |
 | llvm/include/llvm/ProfileData/SampleProf.h |
 | llvm/lib/ProfileData/SampleProfReader.cpp |
 | llvm/test/Transforms/SampleProfile/Inputs/ctxsplit.extbinary.afdo |
 | llvm/lib/ProfileData/SampleProfWriter.cpp |
Commit
3729ee893948be7e3ba138b2a04c4cdfa6257cdf
by wmiFix Wmissing-field-initializers warnings.
|
 | llvm/include/llvm/ProfileData/SampleProfWriter.h |
Commit
68a1f09107a4b0c32fe84063ea1c5a902c8817a9
by ianlevesque[xray] Honor xray-never function-instrument attribute
function-instrument=xray-never wasn't actually honored before. We were getting lucky that it worked because CodeGenFunction would omit the other xray attributes when a function was annotated with xray_never_instrument. This patch adds proper support.
Differential Revision: https://reviews.llvm.org/D89441
|
 | llvm/test/CodeGen/AArch64/xray-attribute-instrumentation.ll |
 | llvm/lib/CodeGen/XRayInstrumentation.cpp |
Commit
be59bac184e3a3ccdd3c7f41f31e48ffe77f443d
by thakis[gn build] (manually) port 933518fff82c
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn |
Commit
7f36df0fb19c08879822cf5b7d4bba300fc8c058
by thakis[gn build] fix libcxx gn file with libcxx_abi_namespace set
|
 | llvm/utils/gn/secondary/libcxx/include/BUILD.gn |
Commit
b62c7e047420026dcfe84ad66969f501698acbee
by stellaraccident[mlir][python] Swap shape and element_type order for MemRefType.
* Matches how all of the other shaped types are declared. * No super principled reason fro this ordering beyond that it makes the one that was different be like the rest. * Also matches ordering of things like ndarray, et al.
Reviewed By: ftynse, nicolasvasilache
Differential Revision: https://reviews.llvm.org/D94812
|
 | mlir/lib/Bindings/Python/IRModules.cpp |
 | mlir/test/Bindings/Python/ir_types.py |
 | mlir/examples/python/linalg_matmul.py |
Commit
233106269db6af64f9eff7db0bdf119593f822b1
by serguei.n.dmitriev[llvm-link] Improve link time for bitcode archives [NFC]
Linking large bitcode archives currently takes a lot of time with llvm-link, this patch adds couple improvements which reduce link time for archives - Use one Linker instance for archive instead of recreating it for each member - Lazy load archive members
Reviewed By: tra, jdoerfert
Differential Revision: https://reviews.llvm.org/D94643
|
 | llvm/tools/llvm-link/llvm-link.cpp |
Commit
daeea961a6d93f301e7a22659a2c203846fd58f2
by wlei[llvm-profgen][NFC] Fix the incorrect computation of callsite sample count
Differential Revision: https://reviews.llvm.org/D95009
|
 | llvm/test/tools/llvm-profgen/noinline-cs-noprobe.test |
 | llvm/tools/llvm-profgen/ProfileGenerator.cpp |
Commit
4479c0c2c0be019b9932c6f1380a40e6cb48da25
by aqjuneAllow nonnull/align attribute to accept poison
Currently LLVM is relying on ValueTracking's `isKnownNonZero` to attach `nonnull`, which can return true when the value is poison. To make the semantics of `nonnull` consistent with the behavior of `isKnownNonZero`, this makes the semantics of `nonnull` to accept poison, and return poison if the input pointer isn't null. This makes many transformations like below legal:
``` %p = gep inbounds %x, 1 ; % p is non-null pointer or poison call void @f(%p) ; instcombine converts this to call void @f(nonnull %p) ```
Instead, this semantics makes propagation of `nonnull` to caller illegal. The reason is that, passing poison to `nonnull` does not immediately raise UB anymore, so such program is still well defined, if the callee does not use the argument. Having `noundef` attribute there re-allows this.
``` define void @f(i8* %p) { ; functionattr cannot mark %p nonnull here anymore call void @g(i8* nonnull %p) ; .. because @g never raises UB if it never uses %p. ret void } ```
Another attribute that needs to be updated is `align`. This patch updates the semantics of align to accept poison as well.
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D90529
|
 | llvm/test/Transforms/FunctionAttrs/nonnull.ll |
 | llvm/test/Transforms/InstCombine/call_nonnull_arg.ll |
 | llvm/include/llvm/IR/Argument.h |
 | llvm/lib/Transforms/IPO/FunctionAttrs.cpp |
 | llvm/test/Analysis/ValueTracking/known-nonnull-at.ll |
 | llvm/docs/LangRef.rst |
 | llvm/lib/IR/Function.cpp |
 | llvm/test/Transforms/Attributor/align.ll |
 | llvm/test/Transforms/Attributor/nonnull.ll |
 | llvm/test/Transforms/InstCombine/unused-nonnull.ll |
 | llvm/lib/Analysis/ValueTracking.cpp |
Commit
4dae2247fd62f1319de6297fa5088ab1b0175d88
by shihpo.hung[RISCV] refactor VPatBinary (NFC)
Make it easier to reuse for intrinsic vrgatherei16 which needs to encode both LMUL & EMUL in the instruction name, like PseudoVRGATHEREI16_VV_M1_M1 and PseudoVRGATHEREI16_VV_M1_M2.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D94951
|
 | llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
Commit
2e74a2775665eea221c6819af44011f7489df856
by aqjune[SimplifyCFG] Reapply update_test_checks.py (NFC)
|
 | llvm/test/Transforms/SimplifyCFG/preserve-branchweights.ll |
 | llvm/test/Transforms/SimplifyCFG/switch_create-custom-dl.ll |
Commit
885720248921324d28b983248dcc4056fd994a0f
by kazu[llvm] Use llvm::find (NFC)
|
 | llvm/lib/Target/Hexagon/HexagonSubtarget.cpp |
 | llvm/lib/Transforms/Scalar/GuardWidening.cpp |
 | llvm/lib/Transforms/Vectorize/VPlan.h |
 | llvm/utils/TableGen/SubtargetEmitter.cpp |
 | llvm/lib/Support/DynamicLibrary.cpp |
 | llvm/lib/MCA/Stages/InstructionTables.cpp |
 | llvm/utils/TableGen/GlobalISel/GIMatchTree.cpp |
 | llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
Commit
978c754076e37c7b392240dd121b5b6cb8d1bde2
by kazu[llvm] Use llvm::any_of (NFC)
|
 | llvm/lib/Support/CommandLine.cpp |
 | llvm/tools/llvm-objcopy/ELF/Object.cpp |
 | llvm/utils/TableGen/AsmWriterEmitter.cpp |
Commit
b023cdeacce3e7029d8a684bfbcb6f1c88dc1017
by kazu[llvm] Use llvm::all_of (NFC)
|
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/lib/CodeGen/MachineVerifier.cpp |
 | llvm/lib/Transforms/Scalar/GuardWidening.cpp |
 | llvm/lib/Analysis/IRSimilarityIdentifier.cpp |
 | llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp |
 | llvm/lib/DebugInfo/Symbolize/Symbolize.cpp |
Commit
b5c542d64b98b5a74d35dedad41051a0b00d7946
by ajcbik[mlir][sparse] add narrower choices for pointers/indices
Use cases with 16- or even 8-bit pointer/index structures have been identified.
Reviewed By: penpornk
Differential Revision: https://reviews.llvm.org/D95015
|
 | mlir/test/lib/Transforms/TestSparsification.cpp |
 | mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h |
 | mlir/lib/Dialect/Linalg/Transforms/Sparsification.cpp |
 | mlir/test/Dialect/Linalg/sparse_storage.mlir |
Commit
8031785f4a7ebd027edb34c91cbcf48db53ef444
by i[ELF][test] Improve --wrap tests
|
 | lld/test/ELF/wrap-shlib-undefined.s |
Commit
f96ff3c0f8ebd941b3f6b345164c3d858b781484
by i[ELF] --wrap: Produce a dynamic symbol for undefined __wrap_
``` // a.s jmp fcntl // b.s .globl fcntl fcntl: ret ```
`ld.lld -shared --wrap=fcntl a.o b.o` has an `R_X86_64_JUMP_SLOT` referencing the index 0 undefined symbol, which will cause a glibc `symbol lookup error` at runtime. This is because `__wrap_fcntl` is not in .dynsym
We use an approximation `!wrap->isUndefined()`, which doesn't set `isUsedInRegularObj` of `__wrap_fcntl` when `fcntl` is referenced and `__wrap_fcntl` is undefined.
Fix this by using `sym->referenced`.
|
 | lld/ELF/Driver.cpp |
 | lld/test/ELF/wrap-shlib-undefined.s |
 | lld/ELF/Symbols.h |
Commit
8ca4b174d703e8676c6d47a2e25895c82e2e2ab7
by kai.wang[RISCV] Implement vlseg intrinsics.
For Zvlsseg, we need continuous vector registers for the values. We need to define new register classes for the different combinations of (number of fields and LMUL). For example,
when the number of fields(NF) = 3, LMUL = 2, the values will be assigned to (V0M2, V2M2, V4M2), (V2M2, V4M2, V6M2), (V4M2, V6M2, V8M2), ...
We define the vlseg intrinsics with multiple outputs. There is no way to describe the codegen patterns with multiple outputs in the tablegen files. We do the codegen in RISCVISelDAGToDAG and use EXTRACT_SUBREG to extract the values of output.
The multiple scalable vector values will be put into a struct. This patch is depended on the support for scalable vector struct.
Differential Revision: https://reviews.llvm.org/D94229
|
 | llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp |
 | llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td |
 | llvm/include/llvm/IR/IntrinsicsRISCV.td |
 | llvm/lib/Target/RISCV/RISCVISelLowering.h |
 | llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll |
 | llvm/lib/Target/RISCV/RISCVMCInstLower.cpp |
 | llvm/lib/Target/RISCV/RISCVRegisterInfo.td |
 | llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll |
 | llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h |
 | llvm/lib/Target/RISCV/RISCVISelLowering.cpp |
Commit
e22295385c7fb1104620a497da8eab935768fd78
by isanbard[X86] Add segment and address-size override prefixes
X86 allows for the "addr32" and "addr16" address size override prefixes. Also, these and the segment override prefixes should be recognized as valid prefixes.
Differential Revision: https://reviews.llvm.org/D94726
|
 | llvm/test/MC/X86/segment-prefix.s |
 | llvm/lib/Target/X86/X86InstrSystem.td |
 | llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp |
 | llvm/test/MC/X86/addr16-32.s |
Commit
7fce3b240b6b313b1becf19ddf3f2a904c34ced2
by Raphael Isemann[lldb][docs] Remove -webkit-hyphens in table cells so that table widths are correct on Safari
The tables in the new LLDB documentation currently are less wide than their contents. The reason for that seems to be the `-webkit-hyphens: auto` property that sphinx is setting for all `p` tags. The `p` tags in the generated Python documentation seem to trigger some Safari layout issue, so Safari is calculating the cell width to be smaller than it should be (which ends up looking like this {F15104344} ).
This patch just sets that property back to the browser default `manual`. Not sure if that's the proper workaround, but I clicked around on the website with the changed CSS and nothing looked funny (which is I believe how webdev unit testing works).
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D94991
|
 | lldb/docs/_static/lldb.css |
Commit
3c69ff4b03abaa3b7b80f4f3f2a1c1806e2d4495
by Raphael Isemann[lldb][docs] Filter out 'thisown' attribute and inheritance boilerplate
This patch implements a filter that post-processes some of the generated RST sources of the Python API docs. I mainly want to avoid two things:
1. Filter out all the inheritance boilerplate that just keeps mentioning for every class that it inherits from the builtin 'object'. There is no inheritance in the SB API.
2. More importantly, removes the SWIG generated `thisown` attribute from the public documentation. I don't think we want users to mess with that attribute and this is probably causing more confusion than it would help anyone. It also makes the documentation for some smaller classes more verbose than necessary.
This patch just uses the sphinx event for reading source and removes the parts that we don't want in documentation.
Reviewed By: JDevlieghere
Differential Revision: https://reviews.llvm.org/D94967
|
 | lldb/docs/conf.py |
Commit
255a507716bca63a375f3b8a379ccbbc58cb40da
by david.sherwood[NFC][InstructionCost] Use InstructionCost in lib/Transforms/IPO/IROutliner.cpp
In places where we call a TTI.getXXCost() function I have changed the code to use InstructionCost instead of unsigned. This is in preparation for later on when we will change the TTI interfaces to return InstructionCost.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174 See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Differential Revision: https://reviews.llvm.org/D94427
|
 | llvm/lib/Transforms/IPO/IROutliner.cpp |
 | llvm/include/llvm/Transforms/IPO/IROutliner.h |
Commit
b3c260d8fa07ed1202afdda9ca4c437a2a847080
by Raphael Isemann[lldb][docs] Expand CSS fix for LLDB doc tables
Apparently the sphinx version on the server doesn't place <p> tags in the table cells, so the previous fix from commit 7fce3b240b6b313b1becf19ddf3f2a90 didn't fix the bug for that sphinx version. Just expand the CSS workaround to all <td> tags.
|
 | lldb/docs/_static/lldb.css |
Commit
2aeaaf841b58b2a6721f9271ae897e392fd0b357
by mikael.holmen[GlobalISel] Add missing operand update when copy is required
When constraining an operand register using constrainOperandRegClass(), the function may emit a COPY in case the provided register class does not match the current operand register class. However, the operand itself is not updated to make use of the COPY, thereby resulting in incorrect code. This patch fixes that bug by updating the machine operand accordingly.
Reviewed By: dsanders
Differential Revision: https://reviews.llvm.org/D91244
|
 | llvm/lib/CodeGen/GlobalISel/Utils.cpp |
 | llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h |
 | llvm/include/llvm/CodeGen/GlobalISel/Utils.h |
 | llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp |
 | llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h |
Commit
4ab704d62820396af5bd4a4322a5cbc2700a7ec3
by petar.avramovic[AMDGPU][MC] Add tfe disassembler support MIMG opcodes
With tfe on there can be a vgpr write to vdata+1. Add tablegen support for 5 register vdata store. This is required for 4 register vdata store with tfe.
Differential Revision: https://reviews.llvm.org/D94960
|
 | llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt |
 | llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt |
 | llvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt |
 | llvm/lib/Target/AMDGPU/MIMGInstructions.td |
 | llvm/test/MC/Disassembler/AMDGPU/mimg_vi.txt |
 | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp |
Commit
e20d46628a31a984074f2e1029e67734d5c2ab0d
by Jan Svoboda[clang][cli] Port more options to new parsing system
This patch adds marshalling information to more options.
Reviewed By: dexonsmith
Differential Revision: https://reviews.llvm.org/D94957
|
 | clang/lib/Frontend/CompilerInvocation.cpp |
 | clang/include/clang/Driver/Options.td |
Commit
fc6677f0bbaf8a4654ef138fc6b0411c75a7313f
by quic_arangasa[Test Commit] This is a test commit for https://reviews.llvm.org/D94904
D94904 Reviewed by xbolva00
Reviewers for D94904: llvm-commits, MatzeB, craig.topper, kparzysz, efriedma, pengfei, wxiao3, xbolva00
Subscribers for D94904: llvm-commits, xbolva00
D94904 Differential Revision: https://reviews.llvm.org/D94904
|
 | llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll |
Commit
536a1b0ea21163eaee53652c527ea20cf45bc675
by sam.mccall[clangd] Allow CDBs to have background work to block on.
In preparation for moving DirectoryBasedCompilationDatabase broadcasting off the main thread.
Differential Revision: https://reviews.llvm.org/D94603
|
 | clang-tools-extra/clangd/ClangdServer.cpp |
 | clang-tools-extra/clangd/GlobalCompilationDatabase.h |
 | clang-tools-extra/clangd/GlobalCompilationDatabase.cpp |
 | clang-tools-extra/clangd/ClangdServer.h |
Commit
de4ba7073bd7e200aca704e6a26403e07bc246a5
by sam.mccall[clangd] Move DirBasedCDB broadcasting onto its own thread.
This is on the critical path (it blocks getting the compile command for the first file).
It's not trivially fast: it involves processing all filenames in the CDB and doing some IO to look for shadowing CDBs.
And we may make this slower soon - making CDB configurable implies evaluating the config for each listed to see which ones really are owned by the broadcasted CDB.
Differential Revision: https://reviews.llvm.org/D94606
|
 | clang-tools-extra/clangd/GlobalCompilationDatabase.h |
 | clang-tools-extra/clangd/GlobalCompilationDatabase.cpp |
 | clang-tools-extra/clangd/unittests/GlobalCompilationDatabaseTests.cpp |
Commit
e6be5c7cd6d227144f874623e2764890f80cad32
by sam.mccall[clangd] Remove the recovery-ast options.
These force a couple of flags or that are now on by default. So the flags don't currently do anything unless the compile command has -fno-recovery-ast explicitly.
(For turning recovery *off* for debugging we can inject the flag with config)
This leaves the command-line flags around with no effect, I'm planning to add a "retired flag" mechanism shortly in a separate patch.
Differential Revision: https://reviews.llvm.org/D94724
|
 | clang-tools-extra/clangd/tool/ClangdMain.cpp |
 | clang-tools-extra/clangd/ClangdServer.h |
 | clang-tools-extra/clangd/ClangdServer.cpp |
 | clang-tools-extra/clangd/Compiler.cpp |
 | clang-tools-extra/clangd/Compiler.h |
Commit
2ab5fd2c8567ac89d7e7639563babdfc78dbcf78
by sam.mccall[clangd] Retire some flags for uncontroversial, stable features.
And mark a couple to be retired afther the next release branch.
Differential Revision: https://reviews.llvm.org/D94727
|
 | clang-tools-extra/clangd/tool/ClangdMain.cpp |
 | clang-tools-extra/clangd/unittests/TestTU.cpp |
 | clang-tools-extra/clangd/ClangdServer.cpp |
 | clang-tools-extra/clangd/ParsedAST.cpp |
 | clang-tools-extra/clangd/ClangdServer.h |
 | clang-tools-extra/clangd/Compiler.h |
Commit
a6a72dfdf2e132d64ea73ddbbc0d3431b6483724
by Mirko.Brkusanin[AMDGPU][GlobalISel] Avoid selecting S_PACK with constants
If constants are hidden behind G_ANYEXT we can treat them same way as G_SEXT. For that purpose we extend getConstantVRegValWithLookThrough with option to handle G_ANYEXT same way as G_SEXT.
Differential Revision: https://reviews.llvm.org/D92219
|
 | llvm/include/llvm/CodeGen/GlobalISel/Utils.h |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll |
 | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
 | llvm/lib/CodeGen/GlobalISel/Utils.cpp |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-build-vector-trunc.v2s16.mir |
Commit
c1bc7981babcae20247650a4b8adab9c0c97890a
by yedeng.yd[Coroutine] Remain alignment information when merging frame variables
Summary: This is to address bug48712. The solution in this patch is that when we want to merge two variable a into the storage frame of variable b only if the alignment of a is multiple of b. There may be other strategies. But now I think they are hard to handle and benefit little. Or we can implement them in the future.
Test-plan: check-llvm
Reviewers: jmorse, lxfind, junparser
Differential Revision: https://reviews.llvm.org/D94891
|
 | llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-05.ll |
 | llvm/test/Transforms/Coroutines/coro-frame-reuse-alloca-04.ll |
 | llvm/lib/Transforms/Coroutines/CoroFrame.cpp |
Commit
29aaae281403c3ab26a4e87fe37a69e1b810e0f2
by quic_arangasa[PostRASched] Regenerate Whole Test with update_llc_test_checks.py
Reviewed by xbolva00
Reviewers: llvm-commits, MatzeB, craig.topper, kparzysz, efriedma, pengfei, wxiao3, xbolva00
Subscribers: llvm-commits, xbolva00
Differential Revision: https://reviews.llvm.org/D94904
|
 | llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll |
Commit
cf50f4f764566a78da8c0551f853118fe604d8d7
by csigg[mlir] Link mlir_runner_utils statically into cuda/rocm-runtime-wrappers.
The runtime-wrappers depend on LLVMSupport, pulling in static initialization code (e.g. command line arguments). Dynamically loading multiple such libraries results in ODR violoations.
So far this has not been an issue, but in D94421, I would like to load both the async-runtime and the cuda-runtime-wrappers as part of a cuda-runner integration test. When doing this, code that asserts that an option category is only registered once fails (note that I've only experienced this in Google's bazel where the async-runtime depends on LLVMSupport, but a similar issue would happen in cmake if more than one runtime-wrapper starts to depend on LLVMSupport).
The underlying issue is that we have a mix of static and dynamic linking. If all dependencies were loaded as shared objects (i.e. if LLVMSupport was linked dynamically to the runtime wrappers), each dependency would only get loaded once. However, linking dependencies dynamically would require special attention to paths (one could dynamically load the dependencies first given explicit paths). The simpler approach seems to be to link all dependencies statically into a single shared object.
This change basically applies the same logic that we have in the c_runner_utils: we have a shared object target that can be loaded dynamically, and we have a static library target that can be linked to other runtime-wrapper shared object targets.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D94399
|
 | mlir/lib/ExecutionEngine/CMakeLists.txt |
 | mlir/tools/mlir-cuda-runner/CMakeLists.txt |
 | mlir/test/mlir-cuda-runner/shuffle.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-region.mlir |
 | mlir/test/mlir-cuda-runner/gpu-to-cubin.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-min.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-xor.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-op.mlir |
 | mlir/test/mlir-rocm-runner/gpu-to-hsaco.mlir |
 | mlir/test/mlir-rocm-runner/two-modules.mlir |
 | mlir/test/mlir-rocm-runner/vector-transferops.mlir |
 | mlir/test/mlir-cuda-runner/multiple-all-reduce.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-or.mlir |
 | mlir/include/mlir/ExecutionEngine/CRunnerUtils.h |
 | mlir/test/mlir-cuda-runner/all-reduce-and.mlir |
 | mlir/tools/mlir-rocm-runner/CMakeLists.txt |
 | mlir/test/mlir-cuda-runner/all-reduce-max.mlir |
 | mlir/test/mlir-rocm-runner/vecadd.mlir |
 | mlir/test/mlir-cuda-runner/two-modules.mlir |
Commit
43f34f58349ae178fd1c95d6a73c6858f35f2ea1
by julian.grossAdded check if there are regions that do not implement the RegionBranchOpInterface.
Add a check if regions do not implement the RegionBranchOpInterface. This is not allowed in the current deallocation steps. Furthermore, we handle edge-cases, where a single region is attached and the parent operation has no results.
This fixes: https://bugs.llvm.org/show_bug.cgi?id=48575
Differential Revision: https://reviews.llvm.org/D94586
|
 | mlir/lib/Transforms/BufferDeallocation.cpp |
 | mlir/test/Transforms/buffer-deallocation.mlir |
Commit
eff6e75c3f7c5471f0326526dc3f0b8b10f8a4df
by jeremy.morse[LLD][ELF] Correct test temporary file paths
In 8031785f4a7ebd the temporary object being built was moved to %t/main.o, but not all run lines were updated to reflect this. Observe the failure on this buildbot:
http://lab.llvm.org:8011/#/builders/5/builds/3646/steps/9/logs/stdio
It might pass locally for some people due to a stale %t.o hanging around the build directory.
|
 | lld/test/ELF/wrap-shlib-undefined.s |
Commit
eee2e8813f8113f23059a6a8757908c38e3099c5
by flo[LV] Add test cases with multiple exits which require versioning.
This adds some test coverage for caafdf07bbccbe89219539e2b56043c2a98358f1, which relaxed an assertion to only require a unique exit block.
|
 | llvm/test/Transforms/LoopVectorize/multiple-exits-versioning.ll |
Commit
f07403eb1a5f781b1bcc2b0c18ef7f632e1a0fdc
by james.henderson[llvm-symbolizer][doc] Reorder --relativenames in options list
This puts it in alphabetical order, matching the rest of the list.
Reviewed by: MaskRay, saugustine
Differential Revision: https://reviews.llvm.org/D94481
|
 | llvm/docs/CommandGuide/llvm-symbolizer.rst |
Commit
a1d4649a5b176bf826685cac5cc4416b6498bdf9
by kadircet[clangd] Fix division by zero when computing scores
NameMatch could be a float close to zero, in such cases we were dividing by zero and moreover propogating a "NaN" to clients, which is invalid per JSON.
This fixes the issue by only using Quality scores whenever the NameMatch is low, as we do in CodeCompletion ranking.
Fixes https://github.com/clangd/clangd/issues/648.
Differential Revision: https://reviews.llvm.org/D94755
|
 | clang-tools-extra/clangd/FindSymbols.cpp |
 | clang-tools-extra/clangd/CodeComplete.cpp |
Commit
f344c028dea34c1f1ec3b901d7a4c4d5d867384d
by mark.murray[AArch64] Add missing "pauth" feature to the .arch_extension directive.
Differential Revision: https://reviews.llvm.org/D94970
|
 | llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp |
 | llvm/test/MC/AArch64/armv8.3a-pauth.s |
 | llvm/test/MC/AArch64/directive-arch_extension.s |
Commit
cab20f61057760e3f9d7e12a9b25f3934ebd1ea4
by mark.murray[AArch64] Add missing "flagm" feature to the .arch_extension directive.
Depends on D94970
Differential Revision: https://reviews.llvm.org/D94971
|
 | llvm/test/MC/AArch64/armv8.4a-flagm.s |
 | llvm/test/MC/AArch64/directive-arch_extension-negative.s |
 | llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp |
 | llvm/test/MC/AArch64/directive-arch_extension.s |
Commit
cba1ca9025899b1f6681ac824a7db60349d575f7
by csiggFix cuda-runner tests.
|
 | mlir/test/mlir-cuda-runner/all-reduce-op.mlir |
 | mlir/test/mlir-rocm-runner/vector-transferops.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-or.mlir |
 | mlir/test/mlir-cuda-runner/gpu-to-cubin.mlir |
 | mlir/test/mlir-rocm-runner/vecadd.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-xor.mlir |
 | mlir/test/mlir-cuda-runner/two-modules.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-min.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-max.mlir |
 | mlir/test/mlir-rocm-runner/two-modules.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-and.mlir |
 | mlir/test/mlir-cuda-runner/shuffle.mlir |
 | mlir/test/mlir-cuda-runner/multiple-all-reduce.mlir |
 | mlir/test/mlir-cuda-runner/all-reduce-region.mlir |
 | mlir/test/mlir-rocm-runner/gpu-to-hsaco.mlir |
Commit
42830f8bdc8f064fee648541f79f8e8d66072cce
by hokein.wu[clangd] Extend find-refs to include overrides.
find-references on `virtual void meth^od() = 0` will include override references.
Differential Revision: https://reviews.llvm.org/D94390
|
 | clang-tools-extra/clangd/unittests/XRefsTests.cpp |
 | clang-tools-extra/clangd/XRefs.cpp |
Commit
985b9b7e421a16e8fcab7f038601a23a25cdfd5d
by bjorn.a.pettersson[PM] Avoid duplicates in the Used/Preserved/Required sets
The pass analysis uses "sets" implemented using a SmallVector type to keep track of Used, Preserved, Required and RequiredTransitive passes. When having nested analyses we could end up with duplicates in those sets, as there was no checks to see if a pass already existed in the "set" before pushing to the vectors. This idea with this patch is to avoid such duplicates by avoiding pushing elements that already is contained when adding elements to those sets.
To align with the above PMDataManager::collectRequiredAndUsedAnalyses is changed to skip adding both the Required and RequiredTransitive passes to its result vectors (since RequiredTransitive always is a subset of Required we ended up with duplicates when traversing both sets).
Main goal with this is to avoid spending time verifying the same analysis mulitple times in PMDataManager::verifyPreservedAnalysis when iterating over the Preserved "set". It is assumed that removing duplicates from a "set" shouldn't have any other negative impact (I have not seen any problems so far). If this ends up causing problems one could do some uniqueness filtering of the vector being traversed in verifyPreservedAnalysis instead.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D94416
|
 | llvm/lib/IR/Pass.cpp |
 | llvm/include/llvm/PassAnalysisSupport.h |
 | llvm/lib/IR/LegacyPassManager.cpp |
Commit
5d718374a68fb68f3ec5ed3670b4dfa99dc42789
by chenmindong1[SCEV] Add a test with wrong exit counts. (NFC)
This patch pre-commits a test case with wrong exit count analysis for D92367.
Reviewed by: mkazantsev
Differential Revision: https://reviews.llvm.org/D94657
|
 | llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll |
Commit
21bfd068b32ece1c6fbc912208e7cd1782a8c3fc
by amanieu[AArch64] Add support for the GNU ILP32 ABI
Add the aarch64[_be]-*-gnu_ilp32 targets to support the GNU ILP32 ABI for AArch64.
The needed codegen changes were mostly already implemented in D61259, which added support for the watchOS ILP32 ABI. The main changes are: - Wiring up the new target to enable ILP32 codegen and MC. - ILP32 va_list support. - ILP32 TLSDESC relocation support.
There was existing MC support for ELF ILP32 relocations from D25159 which could be enabled by passing "-target-abi ilp32" to llvm-mc. This was changed to check for "gnu_ilp32" in the target triple instead. This shouldn't cause any issues since the existing support was slightly broken: it was generating ELF64 objects instead of the ELF32 object files expected by the GNU ILP32 toolchain.
This target has been tested by running the full rustc testsuite on a big-endian ILP32 system based on the GCC ILP32 toolchain.
Reviewed By: kristof.beyls
Differential Revision: https://reviews.llvm.org/D94143
|
 | llvm/test/CodeGen/AArch64/ilp32-tlsdesc.ll |
 | llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp |
 | llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp |
 | llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp |
 | llvm/test/CodeGen/AArch64/ilp32-va.ll |
 | llvm/lib/Target/AArch64/AArch64Subtarget.h |
 | llvm/test/MC/AArch64/adrp-relocation.s |
 | llvm/test/MC/AArch64/arm64-ilp32.s |
 | llvm/test/MC/AArch64/elf-reloc-uncondbrimm.s |
 | llvm/include/llvm/ADT/Triple.h |
 | llvm/test/MC/AArch64/elf-reloc-tstb.s |
 | llvm/test/MC/AArch64/elf-reloc-ldrlit.s |
 | llvm/lib/Support/Triple.cpp |
 | llvm/lib/Target/AArch64/AArch64TargetMachine.cpp |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/test/MC/AArch64/ilp32-diagnostics.s |
 | llvm/test/MC/AArch64/arm32-elf-relocs.s |
 | llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp |
 | llvm/test/MC/AArch64/arm64-elf-reloc-condbr.s |
 | llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp |
 | llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp |
Commit
c056f824340ff0189f3ef7870b83e3730de401d1
by Paul C. Anagnostopoulos[TableGen] Improve algorithm for inheriting class template args and fields
Differential Revision: https://reviews.llvm.org/D94822
|
 | llvm/test/TableGen/self-reference-typeerror.td |
 | llvm/lib/TableGen/Record.cpp |
 | llvm/lib/TableGen/TGParser.cpp |
 | llvm/include/llvm/TableGen/Record.h |
Commit
19d02842ee56089b9208875ce4582e113e08fb6d
by llvm-dev[X86][AVX] Fold extract_subvector(VSRLI/VSHLI(x,32)) -> VSRLI/VSHLI(extract_subvector(x),32)
As discussed on D56387, if we're shifting to extract the upper/lower half of a vXi64 vector then we're actually better off performing this at the subvector level as its very likely to fold into something.
combineConcatVectorOps can perform this in reverse if necessary.
|
 | llvm/test/CodeGen/X86/combine-sra.ll |
 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/pmul.ll |
 | llvm/test/CodeGen/X86/vec-strict-inttofp-256.ll |
Commit
4f5f29d40974b9ba6e89179dda738c1eb9794370
by Paul C. AnagnostopoulosRevert "[TableGen] Improve algorithm for inheriting class template args and fields"
This reverts commit c056f824340ff0189f3ef7870b83e3730de401d1.
That commit causes build failures.
|
 | llvm/lib/TableGen/TGParser.cpp |
 | llvm/lib/TableGen/Record.cpp |
 | llvm/test/TableGen/self-reference-typeerror.td |
 | llvm/include/llvm/TableGen/Record.h |
Commit
8ba442bc2136c9ab91c74826db7195e406b94fb7
by hansRevert "Following up on PR48517, fix handling of template arguments that refer"
Combined with 'da98651 - Revert "DR2064: decltype(E) is only a dependent', this change (5a391d3) caused verifier errors when building Chromium. See https://crbug.com/1168494#c1 for a reproducer.
Additionally it reverts changes that were dependent on this one, see below.
> Following up on PR48517, fix handling of template arguments that refer > to dependent declarations. > > Treat an id-expression that names a local variable in a templated > function as being instantiation-dependent. > > This addresses a language defect whereby a reference to a dependent > declaration can be formed without any construct being value-dependent. > Fixing that through value-dependence turns out to be problematic, so > instead this patch takes the approach (proposed on the core reflector) > of allowing the use of pointers or references to (but not values of) > dependent declarations inside value-dependent expressions, and instead > treating template arguments as dependent if they evaluate to a constant > involving such dependent declarations. > > This ends up affecting a bunch of OpenMP tests, due to OpenMP > imprecisely handling instantiation-dependent constructs, bailing out > early instead of processing dependent constructs to the extent possible > when handling the template. > > Previously committed as 8c1f2d15b826591cdf6bd6b468b8a7d23377b29e, and > reverted because a dependency commit was reverted.
This reverts commit 5a391d38ac6c561ba908334d427f26124ed9132e.
It also restores clang/test/SemaCXX/coroutines.cpp to its state before da986511fb9da1a46a0ca4dba2e49e2426036303.
Revert "[c++20] P1907R1: Support for generalized non-type template arguments of scalar type."
> Previously committed as 9e08e51a20d0d2b1c5724bb17e969d036fced4cd, and > reverted because a dependency commit was reverted. This incorporates the > following follow-on commits that were also reverted: > > 7e84aa1b81e72d44bcc58ffe1731bfc7abb73ce0 by Simon Pilgrim > ed13d8c66781b50ff007cb089c5905f9bb9e8af2 by me > 95c7b6cadbc9a3d4376ef44edbeb3c8bb5b8d7fc by Sam McCall > 430d5d8429473c2b10b109991d7577a3cea41140 by Dave Zarzycki
This reverts commit 4b574008aef5a7235c1f894ab065fe300d26e786.
Revert "[msabi] Mangle a template argument referring to array-to-pointer decay"
> [msabi] Mangle a template argument referring to array-to-pointer decay > applied to an array the same as the array itself. > > This follows MS ABI, and corrects a regression from the implementation > of generalized non-type template parameters, where we "forgot" how to > mangle this case.
This reverts commit 18e093faf726d15f210ab4917142beec51848258.
|
 | clang/lib/AST/ASTContext.cpp |
 | clang/test/OpenMP/distribute_parallel_for_dist_schedule_messages.cpp |
 | clang/test/OpenMP/target_teams_distribute_dist_schedule_messages.cpp |
 | clang/test/OpenMP/target_teams_distribute_parallel_for_dist_schedule_messages.cpp |
 | clang/include/clang/AST/TemplateBase.h |
 | clang/lib/Sema/TreeTransform.h |
 | clang/lib/AST/ComputeDependence.cpp |
 | clang/test/OpenMP/distribute_parallel_for_simd_dist_schedule_messages.cpp |
 | clang/test/SemaTemplate/temp_arg_nontype_cxx20.cpp |
 | clang-tools-extra/clangd/index/remote/Client.cpp |
 | clang/lib/AST/MicrosoftMangle.cpp |
 | clang/lib/Sema/SemaTemplate.cpp |
 | clang/include/clang/AST/PropertiesBase.td |
 | clang/test/OpenMP/task_messages.cpp |
 | clang/test/OpenMP/target_update_to_messages.cpp |
 | clang/tools/libclang/CXCursor.cpp |
 | clang/test/SemaTemplate/temp_arg_nontype_cxx1z.cpp |
 | lldb/include/lldb/lldb-enumerations.h |
 | clang-tools-extra/clangd/DumpAST.cpp |
 | clang/lib/Sema/SemaTemplateDeduction.cpp |
 | clang-tools-extra/clangd/FindTarget.cpp |
 | clang/lib/AST/ItaniumMangle.cpp |
 | clang/test/OpenMP/teams_distribute_simd_dist_schedule_messages.cpp |
 | clang/include/clang/AST/Expr.h |
 | clang/lib/Sema/SemaLookup.cpp |
 | clang/lib/AST/ExprCXX.cpp |
 | clang/test/SemaCXX/coroutines.cpp |
 | clang/test/CodeGenCXX/mangle-template.cpp |
 | clang/include/clang/Basic/DiagnosticSemaKinds.td |
 | clang/test/CodeGenCXX/template-arguments.cpp |
 | clang/lib/AST/ASTStructuralEquivalence.cpp |
 | clang/lib/AST/ODRHash.cpp |
 | clang/lib/CodeGen/CGExprConstant.cpp |
 | clang/lib/AST/TypeLoc.cpp |
 | clang/lib/Index/USRGeneration.cpp |
 | clang/include/clang/AST/RecursiveASTVisitor.h |
 | clang/test/SemaTemplate/temp_arg_nontype_cxx17.cpp |
 | clang/test/OpenMP/distribute_simd_dist_schedule_messages.cpp |
 | clang/test/CodeGenCXX/mangle-ms-templates.cpp |
 | clang/tools/libclang/CIndex.cpp |
 | clang/test/OpenMP/target_teams_distribute_simd_dist_schedule_messages.cpp |
 | clang/include/clang/AST/ASTContext.h |
 | clang/lib/AST/ASTImporter.cpp |
 | clang/test/OpenMP/target_parallel_for_simd_ordered_messages.cpp |
 | clang/lib/AST/ExprConstant.cpp |
 | clang/lib/Serialization/ASTWriter.cpp |
 | clang/lib/CodeGen/CGDebugInfo.cpp |
 | clang/test/OpenMP/target_teams_distribute_parallel_for_simd_dist_schedule_messages.cpp |
 | clang/lib/Serialization/ASTReader.cpp |
 | clang/lib/AST/Decl.cpp |
 | clang/lib/AST/Expr.cpp |
 | clang/lib/AST/TemplateBase.cpp |
 | clang/lib/AST/StmtProfile.cpp |
 | clang/test/OpenMP/target_parallel_for_simd_collapse_messages.cpp |
 | clang/lib/Sema/SemaTemplateInstantiate.cpp |
 | clang/include/clang/AST/TemplateArgumentVisitor.h |
 | clang/test/OpenMP/distribute_dist_schedule_messages.cpp |
 | clang/lib/Sema/SemaTemplateVariadic.cpp |
 | clang/include/clang/Sema/Sema.h |
 | clang/test/OpenMP/target_simd_collapse_messages.cpp |
 | clang/test/OpenMP/target_update_from_messages.cpp |
 | clang/test/OpenMP/teams_distribute_dist_schedule_messages.cpp |
 | clang/test/SemaCXX/warn-unused-lambda-capture.cpp |
 | lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp |
 | clang/lib/Sema/SemaOverload.cpp |
 | clang/test/OpenMP/teams_distribute_parallel_for_dist_schedule_messages.cpp |
 | clang/test/OpenMP/teams_distribute_parallel_for_simd_dist_schedule_messages.cpp |
Commit
cad4275d697c601761e0819863f487def73c67f8
by llvm-dev[DAGCombiner] Enable SimplifyDemandedBits vector support for TRUNCATE
Add DemandedElts support inside the TRUNCATE analysis.
Differential Revision: https://reviews.llvm.org/D56387
|
 | llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll |
 | llvm/test/CodeGen/ARM/lowerMUL-newload.ll |
 | llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp |
 | llvm/test/CodeGen/AArch64/lowerMUL-newload.ll |
 | llvm/test/CodeGen/Thumb2/mve-vmulh.ll |
 | llvm/test/CodeGen/X86/vector-trunc.ll |
 | llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll |
 | llvm/test/CodeGen/X86/combine-sra.ll |
 | llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp |
 | llvm/test/CodeGen/X86/known-signbits-vector.ll |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/test/CodeGen/AArch64/aarch64-smull.ll |
 | llvm/test/CodeGen/X86/min-legal-vector-width.ll |
Commit
8000c778532bfe1cc74191e41e19272e54477ed0
by steveireMake it possible to store a ASTNodeKind in VariantValue
Differential Revision: https://reviews.llvm.org/D94878
|
 | clang/unittests/ASTMatchers/Dynamic/VariantValueTest.cpp |
 | clang/include/clang/ASTMatchers/Dynamic/VariantValue.h |
 | clang/lib/ASTMatchers/Dynamic/VariantValue.cpp |
Commit
537d90db827d1df0fef400653eefd857834ca0ba
by Alexander.Richardson[libc++] Split re.alg tests into locale-dependent and independent tests
Currently all these tests are XFAILED on Linux even though the problem only seems to be with the few checks that look at collation. To retain test coverage this splits the locale-dependent tests into a separate .pass.cpp that is XFAILed as before. This commit also XFAILs the locale-dependent tests on FreeBSD since the [=M=] and [.ch.] behaviour for cs_CZ also doesn't seem to match the behaviour that is expected by these tests.
Reviewed By: #libc, ldionne
Differential Revision: https://reviews.llvm.org/D94969
|
 | libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.search/basic.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.search/extended.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.match/basic.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.match/ecma.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.match/awk.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.match/extended.pass.cpp |
 | libcxx/utils/libcxx/test/features.py |
 | libcxx/test/std/re/re.alg/re.alg.search/ecma.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp |
 | libcxx/test/std/re/re.alg/re.alg.search/awk.pass.cpp |
Commit
e069662deb1fa167b3e5fdce4c9949e663df8082
by jonathanchesterfield[libomptarget][devicertl] Wrap source in declare target pragmas
[libomptarget][devicertl] Wrap source in declare target pragmas
Factored out of D93135 / D94745. C++ and cuda ignore unknown pragmas so this is a NFC for the current implementation language. Removes noise from patches for building deviceRTL as openmp.
Reviewed By: tianshilei1992
Differential Revision: https://reviews.llvm.org/D95048
|
 | openmp/libomptarget/deviceRTLs/common/src/omp_data.cu |
 | openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu |
 | openmp/libomptarget/deviceRTLs/common/src/sync.cu |
 | openmp/libomptarget/deviceRTLs/common/src/libcall.cu |
 | openmp/libomptarget/deviceRTLs/common/src/omptarget.cu |
 | openmp/libomptarget/deviceRTLs/common/src/critical.cu |
 | openmp/libomptarget/deviceRTLs/common/src/task.cu |
 | openmp/libomptarget/deviceRTLs/common/src/support.cu |
 | openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_locks.hip |
 | openmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip |
 | openmp/libomptarget/deviceRTLs/common/src/data_sharing.cu |
 | openmp/libomptarget/deviceRTLs/common/src/loop.cu |
 | openmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip |
 | openmp/libomptarget/deviceRTLs/common/src/parallel.cu |
 | openmp/libomptarget/deviceRTLs/common/src/cancel.cu |
 | openmp/libomptarget/deviceRTLs/common/src/reduction.cu |
Commit
e377c8eeb4aa2eb239a651f1fe12c27fc77deda3
by steveireImplement dynamic mapAnyOf in terms of ASTNodeKinds
This reduces template bloat, but more importantly, makes it possible to construct one from clang-query without template types.
Differential Revision: https://reviews.llvm.org/D94879
|
 | clang/lib/ASTMatchers/Dynamic/Marshallers.h |
Commit
40cd262c4339c8cbd67bf5c96c4a052ae02a8660
by jotremLoop peeling: check that latch is conditional branch
Loop peeling assumes that the loop's latch is a conditional branch. Add a check to canPeel that explicitly checks for this, and testcases that otherwise fail an assertion when trying to peel a loop whose back-edge is a switch case or the non-unwind edge of an invoke.
Reviewed By: skatkov, fhahn
Differential Revision: https://reviews.llvm.org/D94995
|
 | llvm/test/Transforms/LoopUnroll/peel-loop-conditions.ll |
 | llvm/lib/Transforms/Utils/LoopPeel.cpp |
Commit
6c1bc0d24ceacfe736de4fd29a21b91125125a1f
by Louis Dionne[docs] Fix overly specific link to uploading patches on Phabricator
The documentation for contributing to LLVM currently links to the section explaining how to submit a Phabricator review using the web interface. I believe it would be better to link to the general page for using Phabricator instead, which explains how to sign up with Phabricator, and also how to submit patches using either the web interface or the command-line.
I think this is worth changing because what currently *appears* to be our preferred way of submitting a patch (through the web interface) isn't actually what we prefer. Indeed, patches submitted from the command-line have more meta-data available (such as which repository the patch targets), and also can't suffer from missing context.
Differential Revision: https://reviews.llvm.org/D94929
|
 | llvm/docs/Contributing.rst |
Commit
8590d245434dd4205c89f0a05b4c22feccb7421c
by spatel[SLP] move reduction createOp functions; NFC
We were able to remove almost all of the state from OperationData, so these don't make sense as members of that class - just pass the RecurKind in as a param.
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
1c54112a5762ebab2c14a90c55f27d00bfced7f8
by spatel[SLP] refactor more reduction functions; NFC
We were able to remove almost all of the state from OperationData, so these don't make sense as members of that class - just pass the RecurKind in as a param.
More streamlining is possible, but I'm trying to avoid logic/typo bugs while fixing this. Eventually, we should not need the `OperationData` class.
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
c09be0d2a0f930a128c946329b42eef45d53062a
by spatel[SLP] reduce reduction code for checking vectorizable ops; NFC
This is another step towards removing `OperationData` and fixing FMF matching/propagation bugs when forming reductions.
|
 | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp |
Commit
c540ce9900ff99566b4951186e2f070b3b36cdbe
by sameer.sahasrabuddhe[AMDGPU] pin lit test divergent-unswitch.ll to the old pass manager
The loop-unswitch transform should not be performed on a loop whose condition is divergent. For this to happen correctly, divergence analysis must be available. The existing divergence analysis has not been ported to the new pass manager yet. As a result, loop unswitching on the new pass manager is currently unsafe on targets that care about divergence.
This test is temporarily disabled to unblock work on the new pass manager. The issue is now tracked in bug 48819.
Reviewed By: foad
Differential Revision: https://reviews.llvm.org/D95051
|
 | llvm/test/Transforms/LoopUnswitch/AMDGPU/divergent-unswitch.ll |
Commit
fd70f70d1e02752f411fcf923fddda31cce376ae
by tianshilei1992[OpenMP][NVPTX] Replaced CUDA builtin vars with LLVM intrinsics
Replaced CUDA builtin vars with LLVM intrinsics such that we don't need definitions of those intrinsics.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D95013
|
 | openmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu |
Commit
7dd198852b4db52ae22242dfeda4eccda83aa8b2
by diego.caballero[mlir][Affine] Add support for multi-store producer fusion
This patch adds support for producer-consumer fusion scenarios with multiple producer stores to the AffineLoopFusion pass. The patch introduces some changes to the producer-consumer algorithm, including:
* For a given consumer loop, producer-consumer fusion iterates over its producer candidates until a fixed point is reached.
* Producer candidates are gathered beforehand for each iteration of the consumer loop and visited in reverse program order (not strictly guaranteed) to maximize the number of loops fused per iteration.
In general, these changes were needed to simplify the multi-store producer support and remove some of the workarounds that were introduced in the past to support more fusion cases under the single-store producer limitation.
This patch also preserves the existing functionality of AffineLoopFusion with one minor change in behavior. Producer-consumer fusion didn't fuse scenarios with escaping memrefs and multiple outgoing edges (from a single store). Multi-store producer scenarios will usually (always?) have multiple outgoing edges so we couldn't fuse any with escaping memrefs, which would greatly limit the applicability of this new feature. Therefore, the patch enables fusion for these scenarios. Please, see modified tests for specific details.
Reviewed By: andydavis1, bondhugula
Differential Revision: https://reviews.llvm.org/D92876
|
 | mlir/lib/Analysis/AffineStructures.cpp |
 | mlir/lib/Transforms/LoopFusion.cpp |
 | mlir/include/mlir/Analysis/AffineStructures.h |
 | mlir/include/mlir/Analysis/Utils.h |
 | mlir/include/mlir/Transforms/Passes.td |
 | mlir/include/mlir/Transforms/LoopFusionUtils.h |
 | mlir/test/Transforms/loop-fusion.mlir |
 | mlir/lib/Analysis/Utils.cpp |
 | mlir/lib/Transforms/Utils/LoopFusionUtils.cpp |
Commit
b11b6ab3e09464e88e57b69ff4a8fc8e1c00cc5b
by craig.topper[RISCV] Add way to mark CompressPats that should only be used for compressing.
There can be muliple patterns that map to the same compressed instruction. Reversing those leads to multiple ways to uncompress an instruction, but its not easily controllable which one will be chosen by the tablegen backend.
This patch adds a flag to mark patterns that should only be used for compressing. This allows us to leave one canonical pattern for uncompressing.
The obvious benefit of this is getting c.mv to uncompress to the addi patern that is aliased to the mv pseudoinstruction. For the add/and/or/xor/li patterns it just removes some unreachable code from the generated code.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D94894
|
 | llvm/test/MC/RISCV/compress-rv32i.s |
 | llvm/test/MC/RISCV/option-rvc.s |
 | llvm/utils/TableGen/RISCVCompressInstEmitter.cpp |
 | llvm/test/TableGen/AsmPredicateCombiningRISCV.td |
 | llvm/lib/Target/RISCV/RISCVInstrInfoC.td |
Commit
cad16e4a9267f08229c59e473db6dedd730a5d93
by jpienaarAvoid unused variable warning in opt mode
|
 | mlir/lib/Transforms/LoopFusion.cpp |
Commit
4c1eaf26ae70b9f0e441b0f613871d697c4c9a7d
by tobias.gysi[mlir] fix the rocm runtime wrapper to account for cuda / rocm api differences
The patch adapts the rocm runtime wrapper due to subtle differences between the cuda and the rocm/hip runtime api.
Reviewed By: csigg
Differential Revision: https://reviews.llvm.org/D95027
|
 | mlir/tools/mlir-rocm-runner/rocm-runtime-wrappers.cpp |
Commit
7169d3a315f4cdc19c4ab6b8f20c6f91b46ba9b8
by medismail.bennani[lldb/Commands] Refactor ProcessLaunchCommandOptions to use TableGen (NFC)
This patch refactors the current implementation of `ProcessLaunchCommandOptions` to be generated by TableGen.
The patch also renames the class to `CommandOptionsProcessLaunch` to align better with the rest of the codebase style and moves it to separate files.
Differential Review: https://reviews.llvm.org/D95059
Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
|
 | lldb/source/Commands/CommandOptionsProcessLaunch.h |
 | lldb/source/Commands/CommandObjectPlatform.cpp |
 | lldb/source/Commands/CommandOptionsProcessLaunch.cpp |
 | lldb/include/lldb/Target/Process.h |
 | lldb/source/Commands/CMakeLists.txt |
 | lldb/source/Target/Process.cpp |
 | lldb/source/Commands/Options.td |
 | lldb/source/Commands/CommandObjectProcess.cpp |
Commit
719b563ecf6851136e4c1e6a5ff6c407522dd024
by conanap[PowerPC][Power10] Exploit splat instruction xxsplti32dx in Power10
Exploits the instruction xxsplti32dx.
It can be used to materialize any 64 bit scalar/vector splat by using two instances, one for the upper 32 bits and the other for the lower 32 bits. It should not materialize the cases which can be materialized by using the instruction xxspltidp.
Differential Revision: https://https://reviews.llvm.org/D90173
|
 | llvm/lib/Target/PowerPC/PPCInstrPrefix.td |
 | llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll |
 | llvm/lib/Target/PowerPC/PPCISelLowering.cpp |
 | llvm/test/CodeGen/PowerPC/p10-splatImm32.ll |
Commit
cc4244d55f98b03603cf54eb4abac7e128e3c99a
by frgossen[MLIR][Standard] Add log1p operation to std
Differential Revision: https://reviews.llvm.org/D95041
|
 | mlir/include/mlir/Dialect/StandardOps/IR/Ops.td |
 | mlir/test/IR/core-ops.mlir |