Changes

Changes from Git (git http://labmaster3.local/git/llvm-lnt.git)

Summary

  1. Mirror LLVM's arc config (details)
Commit 94712399ab6bbe66e52212721c6b600aaebe1690 by thomasp
Mirror LLVM's arc config

Make LNT's arc config follow the same structure as LLVM's except for the
callsign since phabricator does not have a repository for LNT yet.

Reviewed By: cmatthews

Differential Revision: https://reviews.llvm.org/D94759
The file was modified.arcconfig

Changes from Git (git https://github.com/llvm/llvm-project.git)

Summary

  1. [AArch64] Fix -Wunused-but-set-variable in GCC -DLLVM_ENABLE_ASSERTIONS=off build (details)
  2. [X86][AVX] Handle vperm2x128 shuffling of a subvector splat. (details)
  3. [RISCV] Remove unnecessary APInt copy. NFC (details)
Commit 36e62b1ff7e7aa883f8ea2f236e9c04df6976b59 by i
[AArch64] Fix -Wunused-but-set-variable in GCC -DLLVM_ENABLE_ASSERTIONS=off build
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
Commit b8b5e87e6b8102d77e4e6beccf4e0f0237acc897 by llvm-dev
[X86][AVX] Handle vperm2x128 shuffling of a subvector splat.

We already handle "vperm2x128 (ins ?, X, C1), (ins ?, X, C1), 0x31" for shuffling of the upper subvectors, but we weren't dealing with the case when we were splatting the upper subvector from a single source.
The file was modifiedllvm/test/CodeGen/X86/avx-vperm2x128.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
Commit 9d792fef577843b213aa11954820512942dc31c7 by craig.topper
[RISCV] Remove unnecessary APInt copy. NFC

getAPIntValue returns a const APInt& so keep it as a reference.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp