Started 10 hr ago
Took 10 hr on green-dragon-06

Success Build #7980 (Jul 26, 2021 9:55:53 AM)


Git (git http://labmaster3.local/git/llvm-zorg.git)

  1. Add missing closing quote to SVE 2 stage cmake options (detail)

Git (git http://labmaster3.local/git/llvm-project.git)

  1. [Object] make SourceMgr available to MCContext during inline asm symbols (detail)
  2. [Preprocessor] Implement -fminimize-whitespace. (detail)
  3. [mlir] Added new RegionBranchTerminatorOpInterface and adapted uses of hasTrait<ReturnLike>. (detail)
  4. [ORC][ORC-RT] Add initial Objective-C and Swift support to MachOPlatform. (detail)
  5. [libc] fix LibcUnitTestMain when building with shared libraries (detail)
  6. [mlir] Fix RankedTensorType::walkImmediateSubElements method (detail)
  7. [libomptarget][nfc] Squash unused variable warning (detail)
  8. [libomptarget] Build amdgpu plugin without hsa (detail)
  9. Revert "Revert D106562 "[clangd] Get rid of arg adjusters in CommandMangler"" (detail)
  10. [SelectionDAG] Support scalable-vector splats in yet more cases (detail)
  11. [Analysis] Add simple cost model for strict (in-order) reductions (detail)
  12. [AArch64][AsmParser] NFC: Parser.getTok().getLoc() -> getLoc() (detail)
  13. Revert "[clangd] Avoid range-loop init-list lifetime subtleties." (detail)
  14. [X86][SSE] Don't scrub address math from interleaved shuffle tests (detail)
  15. [X86][AVX] Prefer vinsertf128 to vperm2f128 on AVX1 targets (detail)
  16. [AArch64][SVE] Improve code generation for vector_splice for Imm == -1 (detail)
  17. Fix test failures caused by 0aff1798b5721d5f95d16f465b99d357012bb8d1 (detail)
  18. [SVE][AArch64] Improve code generation for vector_splice for Imm > 0 (detail)
  19. [SVE] Add support for folding for select + masked loads (detail)
  20. [VPlan] Use stored value from recipes for interleave groups. (detail)
  21. [Inliner] Make the CallPenalty configurable (detail)
  22. [NFC] Change VFShape so it contains an ElementCount rather than seperate VF and IsScalable properties. (detail)
  23. [SLP]Fix costs calculations. (detail)
  24. [mlir] split type conversion to two lines for GCC's sake (detail)
  25. [AArch65][SVE] Remove vector_splice from AddedComplexity pattern (detail)
  26. Revert "[SLP]Fix costs calculations." (detail)
  27. [SVE] Fix casts to <FixedVectorType> in truncateToMinimalBitwidths (detail)
  28. [SimplifyCFG] Improve store speculation check (detail)
  29. AArch64: support i128 (& larger) returns in GlobalISel (detail)
  30. [ARM] Ensure correct regclass in distributing postinc (detail)
  31. [AMDGPU] Fix MMO for raw/struct buffer access with non-constant offset (detail)
  32. [AMDGPU] Pre-commit global-isel test case for D106451 (detail)
  33. [AMDGPU][GISel] Fix MMO for raw/struct buffer access with non-constant offset (detail)
  34. [llvm-readobj] Display multiple function names for stack size entries (detail)
  35. [OpenCL] Change default standard version to CL1.2 (detail)
  36. [SLP]Fix costs calculations. (detail)
  37. [LV] Add test to store a first-order rec via interleave group. (detail)
  38. [InstrRef][AArch64][1/4] Accept constant physreg variable locations (detail)
  39. [Analyzer][solver][NFC] print constraints deterministically (ordered by their string representation) (detail)
  40. Simplify away some SmallVector copies. NFCI. (detail)
  41. [IR] Consider non-willreturn as side effect (PR50511) (detail)
  42. [libc++][ci] Detect not committed generated files. (detail)

Started by upstream project clang-stage2-cmake-RgSan_relay build number 3643
originally caused by:

This run spent:

  • 1 hr 8 min waiting;
  • 10 hr build duration;
  • 11 hr total from scheduled to completion.
Revision: 1139fd4270c7462a4bce8e1e91e6be174dcae88f
  • detached
Revision: 0b9e49366d6c3c39fabf7a20123cb37eac6297ca
  • refs/remotes/origin/main
LLVM/Clang Warnings: 0 warnings.
  • No warnings since build 7,976.
  • Still 384 days before reaching the previous zero warnings highscore.
Test Result (no failures)