1. [AArch64] AArch64ExpandImm.cpp - fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFC. (details)
  2. [ORC] Drop Comdat when discarding IR symbol (details)
  3. [DAG] Add visitABD optimizations (details)
  4. IROutliner: Fix another assert with non-0 alloca addrspaces (details)
  5. LangRef: Clarify behavior of with "denormal-fp-math" (details)
Commit b72330cd54f985f3454d3538b504027c3eff8711 by llvm-dev
[AArch64] AArch64ExpandImm.cpp - fix MSVC "32-bit shift implicitly converted to 64 bits" warning. NFC.
The file was modifiedllvm/lib/Target/AArch64/AArch64ExpandImm.cpp (diff)
Commit 50ca8b3e8726180a74fcbc4611893f19189b97c0 by jonas.hahnfeld
[ORC] Drop Comdat when discarding IR symbol

According to the IR verifier, "Declaration[s] may not be in a Comdat!"

This is a re-commit of 76b3f0b4d5a0b8c54147c4c73a30892bbca76467 and
87d7838202267a011639fcbf97263556ccf091dc with updates to the test:
* Force emission of the extra-module, to trigger the bug after D138264,
   by providing a second symbol @g, and making the comdat nodeduplicate.
   (Technically only one is needed, but two should be safer.)
* Name the comdat $f to avoid failure on Windows:
   LLVM ERROR: Associative COMDAT symbol 'c' does not exist.
* Mark the test as UNSUPPORTED on macOS, MachO doesn't support COMDATs.

Differential Revision:
The file was modifiedllvm/lib/ExecutionEngine/Orc/Layer.cpp (diff)
The file was addedllvm/test/ExecutionEngine/Orc/Inputs/weak-comdat-def.ll
The file was addedllvm/test/ExecutionEngine/Orc/weak-comdat.ll
Commit 120ce83660dea7e70abe1c8f9408f39fe2502f8d by
[DAG] Add visitABD optimizations

This adds basic a visitABD to optimize ABDS and ABDU nodes, similar to the
existing visitAVG method.

The fold I was initially interested in was folding shuffles though the binop.
This also:
- Marks ABDS and ABDU as commutative binops (
- Add reassociative folds.
- Add constant folding using max(x,y)-min(x,y)
- Canonicalizes constants to the RHS
- Folds abds x, 0 -> abs(x) (
- Folds abdu x, 0 -> x (
- Folds abd x, undef -> 0 ( and

Differential Revision:
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vabdus.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/abd-combine.ll (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/arm64-neon-aba-abd.ll (diff)
Commit 8c5a292202ff26ad51cf348001f82444d96e803b by arsenm2
IROutliner: Fix another assert with non-0 alloca addrspaces

Code is inserting an addrspacecast it shouldn't be, but
that's a separate CodeExtractor bug.

This also stops caring about typed pointers.
The file was modifiedllvm/lib/Transforms/IPO/IROutliner.cpp (diff)
The file was addedllvm/test/Transforms/IROutliner/alloca-addrspace-1.ll
Commit d4f38ef288c3a4cf2318182c8585a5c7e760877a by arsenm2
LangRef: Clarify behavior of with "denormal-fp-math"

This does not read canonicalized values, which matches the behavior of
the basic DAG expansion using integer operations. There is a buggy
expansion using FP-operations if legal which needs to be adjusted to
account for this. We need to be aware of the denormal mode to switch
between is.fpclass calls and fcmp.

There's no real spec for denormal handling anywhere, but I believe
this is the most harmonious way to deal with the question considering
the requirement to not quiet input signaling nans.

This matches the behavior of MSVC's _fpclass and AMDGPU's
v_cmp_class_f32. fpclassify currently does not use this, and has
inconsistent behavior for denormals under DAZ on different platforms
(i.e. clang and gcc report FP_ZERO return FP_ZERO for a denormal under
The file was modifiedllvm/docs/LangRef.rst (diff)