Changes

Summary

  1. Reland [SCEV] Fix and validate ValueExprMap/ExprValueMap consistency (details)
  2. [NVPTX][AsmPrinter] Avoid removing globals before calling AsmPrinter::doFinalization() (details)
  3. [DSE] Optimize defining access of defs while walking upwards. (details)
  4. [ARM] Extra testing for v2i1 types. NFC (details)
  5. [SCEV] Simplify invalidation after BE count calculation (NFCI) (details)
  6. [SCEV] Simplify forgetSymbolicName() (NFCI) (details)
  7. [DwarfCompileUnit] Set parent DIE right after creating a local entity (details)
  8. [PowerPC] Regenerate ppc64-P9-vabsd.ll tests (details)
  9. [ARM] Fold away unnecessary CSET/CMPZ (details)
  10. [Target] Use range-based for loops (NFC) (details)
  11. [ARM] CSINC/CSINV patterns from CMOV (details)
  12. [mlir] Enable MLIRDialectUtilsTests (details)
  13. [sanitizer] Switch StackStore from pointers to 32bit IDs (details)
  14. NFC: Simplify sve-widen-phi.ll by unrolling once. (details)
  15. [LV] Fix incorrectly marking a pointer indvar as 'scalar'. (details)
  16. [sanitizer] Remove storeIds and use padding of StackDepotNode (details)
  17. [libc++][format] Adds formatting benchmarks. (details)
  18. [SCEV] Turn validity check in getExistingSCEV into assert (NFC). (details)
  19. [libc++] Remove support for Clang 9 and older. (details)
  20. [libc++] Add myself to the credits. (details)
  21. [InstCombine] reduce code duplication; NFC (details)
  22. [InstCombine] use decomposeBitTestICmp to make icmp (trunc X), C more consistent (details)
  23. [ARM] Add testing for various fptosi.sat patterns. NFC (details)
  24. [clang] Fix -Wreturn-type false positive in @try statements (details)
  25. [llvm] Use range-based for loops (NFC) (details)
  26. [LV] Move code from widenGEP to VPWidenGEPRecipe (NFC). (details)
  27. [ELF] Simplify assignFileOffsets. NFC (details)
  28. [ELF] -z separate-*: Use max-page-size instead of common-page-size for text/non-SHF_ALLOC transition and writeTrapInstr (details)
  29. [DSE] Use MapVector for IOLs (details)
  30. [AArch64] Avoid crashing on invalid -Wa,-march= values (details)
  31. [mlir] NFC - Move invalid.mlir tests to the proper dialects (details)
  32. [ELF] Simplify assignFileOffsets (details)
  33. [ELF] Fix out-of-bounds write in memset(&Out::first, ...) (details)
  34. [ELF] Simplify OutputSection::sectionIndex assignment. NFC (details)
  35. [ELF] Replace one make_unique from r316378 with a stack object. NFC (details)
  36. [Driver] Support PowerPC SPE musl dynamic linker name ld-musl-powerpc-sf.so.1 (details)
  37. [ELF] Inline InputSection::getOffset into callers and remove it. NFC (details)
  38. [ELF] Remove unneeded getOutputSectionVA. NFC (details)
  39. Compilation Database: Point Bazel users to a solution (details)
  40. [ELF] Simplify/remove LinkerScript::output and advance. NFC (details)
  41. [mlir][python] Normalize asm-printing IR behavior. (details)
  42. [llvm] Use range-based for loops (NFC) (details)
  43. test: add a lit configuration for Windows subdirectory (details)
  44. [ELF][test] --oformat binary: Check that SIZEOF_HEADERS==0 (details)
  45. [ELF] Support --oformat= beside Separate --oformat (details)
  46. [AIX] Disable empty.ll test using unsupported split dwarf (details)
  47. [ELF] Simplify/remove LinkerScript::switchTo. NFC (details)
  48. [ELF] Simplify some ctx->outSec with sec. NFC (details)
  49. [ELF] Decrease InputSectionBase::entsize to uint32_t (details)
  50. [analyzer][doc] Add user documenation for taint analysis (details)
  51. [ELF] Speed up/simplify removeUnusedSyntheticSections. NFC (details)
  52. [ELF] Avoid std::stable_partition which may allocate memory. NFC (details)
  53. [flang] Return true in IsSymplyContiguous for allocatables (details)
  54. [CodeGen][SVE] Use whilelo instruction when lowering @llvm.get.active.lane.mask (details)
  55. Fix cppcoreguidelines-virtual-base-class-destructor in macros (details)
  56. [libtooling][clang-tidy] Fix crashing on rendering invalid SourceRanges (details)
  57. [clang-tidy] Fix crashing altera-struct-pack-align on invalid RecordDecls (details)
  58. [clang-tidy] Ignore narrowing conversions in case of bitfields (details)
  59. [fir] Add base for runtime builder unittests (details)
  60. [LV] Move code from widenInstruction to VPWidenRecipe. (NFC) (details)
  61. [fir] Add fir transformational intrinsic builder (details)
  62. [fir] Add assignment runtime API builder (details)
  63. [analyzer][NFC] Refactor AnalysisConsumer::getModeForDecl() (details)
  64. [fir] Add data flow optimization pass (details)
  65. [X86][Costmodel] Now that `getReplicationShuffleCost()` is good, update `getInterleavedMemoryOpCostAVX512()` (details)
  66. [AArch64][SVE] Mark fixed-type FP extending/truncating loads/stores as custom (details)
  67. Use a deterministic order when updating the DominatorTree (details)
  68. fix typos in comments (details)
  69. [NFC][X86][LV][Costmodel] Add most basic test for masked interleaved load (details)
  70. Don't consider 'LinkageSpec' when calculating DeclContext 'Encloses' (details)
  71. [CodeGen][AArch64] Bail out in performConcatVectorsCombine for scalable vectors (details)
  72. [clang-format] regressed default behavior for operator parentheses (details)
  73. Reapply 'Implement target_clones multiversioning' (details)
  74. [mlir][memref] Fix bug in verification of memref.collapse_shape (details)
  75. [X86] Add vector test coverage for or with no common bits tests (details)
  76. [AMDGPU] Fix "must generated" typo in docs (details)
  77. [AMDGPU] Fix list indentation in docs (details)
  78. [AMDGPU][GlobalISel] Transform (fadd (fmul x, y), z) -> (fma x, y, z) (details)
  79. [AMDGPU][GlobalISel] Transform (fadd (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), z) (details)
  80. [AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y, (fma u, v, z)) (details)
  81. [AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fpext (fmul u, v))), z) -> (fma x, y, (fma (fpext u), (fpext v), z)) (details)
  82. [AMDGPU][GlobalISel] Transform (fsub (fmul x, y), z) -> (fma x, y, -z) (details)
  83. [AMDGPU][GlobalISel] Transform (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z)) (details)
  84. [AMDGPU][GlobalISel] Transform (fsub (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), (fneg z)) (details)
  85. [AMDGPU][GlobalISel] Transform (fsub (fpext (fneg (fmul x, y))), z) -> (fneg (fma (fpext x), (fpext y), z)) (details)
  86. [X86][Costmodel] `getInterleavedMemoryOpCostAVX512()`: masked load can not be folded into a shuffle (details)
  87. [fir] Get rid of the global option in FIRBuilder (details)
  88. [HWASan] Disable LTO test on aarch64. (details)
  89. [SCEV] Remove incorrect assert (details)
  90. [InstCombine] Fold (~A | B) ^ A --> ~(A & B) (details)
  91. [llvm] Use range-based for loops (NFC) (details)
  92. [mlir] Handle an edge case when folding reshapes with multiple trailing 1 dimensions (details)
  93. [LLDB][NativePDB] fix find-functions.cpp failure on windows bots (details)
  94. [NFC][AIX]Disable unsupported hip test on AIX (details)
  95. [libc++] Fix incorrect REQUIRES on a locale-dependent test (details)
  96. OpenMP: Start calling setTargetAttributes for generated kernels (details)
  97. [LLDB][NativePDB] fix find-functions.cpp failure on windows bots (2) (details)
  98. [HIP] Add atomic load, atomic store and atomic cmpxchng_weak builtin support in HIP-clang (details)
  99. [NFC][clang]Increase the number of driver diagnostics (details)
  100. [InstCombine] (~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) & (c | (b ^ a))) (details)
  101. [InstCombine] add tests for or with mul operand; NFC (details)
  102. [LICM] Regenerate test checks (NFC) (details)
  103. [mlir][sparse] some leftover cleanup from migration to bufferization dialect (details)
  104. Revert "OpenMP: Start calling setTargetAttributes for generated kernels" (details)
  105. [DebugInfo][InstrRef][NFC] Test changes: DBG_VALUE to DBG_INSTR_REF (details)
  106. Update unit test API usage (NFC) (details)
  107. OpenMP: Correctly query location for amdgpu-arch (details)
  108. [DAG] Add tests for fpsti.sat for various architectures. NFC (details)
  109. [DebugInfo][InstrRef] Preserve properties of restored variables (details)
  110. [InstCombine] try to fold 'or' into 'mul' operand (details)
  111. [ELF] --cref: If -Map is specified, print to the map file (details)
  112. [unroll] Split full exact and full bound unroll costing [NFC] (details)
  113. [DebugInfo][InstrRef] Add indirection from dbg.declare in SelectionDAG (details)
  114. [unroll] Reduce scope of UnrollFactor variable in computeUnrollCount [NFC] (details)
  115. [unroll] Use early return in shouldPartialUnroll [nfc] (details)
  116. [DebugInfo][InstrRef][NFC] "Final" x86 test cleanup (details)
  117. [SCEVExpander] Drop poison generating flags when reusing instructions (details)
  118. [CVP] Remove ashr of -1 or 0 (details)
  119. [DebugInfo][InstrRef] Terminate overlapping variable fragments (details)
  120. [clang-tidy] Fix pr48613: "llvm-header-guard uses a reserved identifier" (details)
  121. [openmp][devicertl] Add a missing loader_uninitialized attribute (details)
  122. [lldb][NFC] Format lldb/include/lldb/Symbol/Type.h (details)
  123. [NFC][Regalloc] Split canEvictInterference into hint and general (details)
  124. [Demangle] Add support for D simple single qualified names (details)
  125. [Demangle] Add support for multiple identifiers in D qualified names (details)
  126. [Demangle] Add support for D anonymous symbols (details)
  127. Tests for D112754 (details)
  128. X86: Fold masked-merge when and-not is not available (details)
  129. [mlir][sparse] generalize sparse tensor output implementation (details)
  130. Add missing header (details)
  131. Revert "[lldb][NFC] Format lldb/include/lldb/Symbol/Type.h" (details)
  132. [sanitizer] Add Leb128 encoding/decoding (details)
  133. [NFC] Header comment in X86RegisterBanks.td referred to Aarch64 (details)
  134. [RISCV] Add a test case to show the bug in RISCVFrameLowering. (details)
  135. [RISCV] Fix a bug in RISCVFrameLowering. (details)
  136. [NFC][sanitizer] Track progress of populating the block (details)
  137. [RISCV] Promote f16 log/pow/exp/sin/cos/etc. to f32 libcalls. (details)
  138. [TwoAddressInstructionPass] Create register mapping for registers with multiple uses in the current MBB (details)
  139. [AMDGPU] Enable copy between VGPR and AGPR classes during regalloc (details)
  140. [DebugInfo] Do not replace existing nodes from DICompileUnit (details)
  141. [mlir][python] Add pyi stub files to enable auto completion. (details)
  142. [mlir][python] Implement more SymbolTable methods. (details)
  143. [mlir][python] Audit and fix a lot of the Python pyi stubs. (details)
  144. [X86][clang] Enable floating-point type for -mno-x87 option on 32-bits (details)
  145. [ELF] Move GOT/PLT relocation code closer. NFC (details)
  146. [clang-tidy] Warn on functional C-style casts (details)
  147. [ARM] create new pseudo t2LDRLIT_ga_pcrel for stack guards (details)
  148. [X86][LoopVectorize] "Fix" `X86TTIImpl::getAddressComputationCost()` (details)
  149. [llvm-profgen] Compute and show profile density (details)
  150. [PR52549][clang-cl] Predefine _MSVC_EXECUTION_CHARACTER_SET (details)
  151. [RISCV] Decode vtype with reserved fields to raw immediate (details)
  152. [ELF] Move ObjFile<ELFT>::{getLocalSymbols,getGlobalSymbols} to non-template ELFFileBase. NFC (details)
  153. [mlir][OpDSL] Fix OpDSL tests after https://reviews.llvm.org/D114680. (details)
  154. [mlir] Move bufferization-related passes to `bufferization` dialect. (details)
  155. [clangd] Make std symbol generation script python3 friendly (details)
  156. [mlir] Decompose Bufferization Clone operation into Memref Alloc and Copy. (details)
  157. [clang][ARM] PACBTI-M assembly support (details)
Commit 2b160e95c89f28a30e2481e6131073659d866a8c by nikita.ppv
Reland [SCEV] Fix and validate ValueExprMap/ExprValueMap consistency

Relative to the previous landing attempt, this introduces an additional
flag on forgetMemoizedResults() to not remove SCEVUnknown phis from
the value map. The invalidation after BECount calculation wants to
leave these alone and skips them in its own use-def walk, but we can
still end up invalidating them via forgetMemoizedResults() if there
is another IR value with the same SCEV. This is intended as a temporary
workaround only, and the need for this should go away once the
getBackedgeTakenInfo() invalidation is refactored in the spirit of
D114263.

-----

This adds validation for consistency of ValueExprMap and
ExprValueMap, and fixes identified issues:

* Addrec construction directly wrote to ValueExprMap in a few places,
  without updating ExprValueMap. Add a helper to ensures they stay
  consistent. The adjustment in forgetSymbolicName() explicitly
  drops the old value from the map, so that we don't rely on it
  being overwritten.
* forgetMemoizedResultsImpl() was dropping the SCEV from
  ExprValueMap, but not dropping the corresponding entries from
  ValueExprMap.

Differential Revision: https://reviews.llvm.org/D113349
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/test/CodeGen/PowerPC/more-dq-form-prepare.ll
The file was addedllvm/test/Analysis/ScalarEvolution/becount-invalidation.ll
The file was addedllvm/test/Transforms/LoopStrengthReduce/X86/nested-ptr-addrec.ll
Commit 9f374a74c2aabed998a731ac9f14bd8baa4208ba by kbessonova
[NVPTX][AsmPrinter] Avoid removing globals before calling AsmPrinter::doFinalization()

Instead of removing globals from a module, we, it seems, can just override
AsmPrinter::emitGlobalVariable() to do nothing as NVPTXAsmPrinter already
emitted globals by this time and we don't want to do it twice.

Reviewed By: tra

Differential Revision: https://reviews.llvm.org/D113653
The file was modifiedllvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXAsmPrinter.h
Commit 25dad1064bf14b9a24c6e33ef4a9e7f8e951c1e3 by flo
[DSE] Optimize defining access of defs while walking upwards.

This patch extends the code that walks memory defs upwards to find
clobbering accesses to also try to optimize the clobbering defining
access.

We should be able to find set the optimized access of our starting def
(KillingDef), if the following holds:

1. It is the first call of getDomMemoryDef for KillingDef (so Current
    ==  KillingDef->getDefiningAccess().
2. No potentially aliasing defs are skipped.

Then if a (partly) aliasing def is encountered, it can be used as
optimized access for KillingDef. No further optimizations can be
applied to KillingDef.

I'd appreciate a careful look, as the existing documentation is not too
clear on what is expected for optimized accesses.

The motivation for this patch is to use the optimized accesses to cover
more cases of redundant stores as follow-up to D111727.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D112313
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit 1b2d58ba90cd72a8dfe1535b5fbecbefacc30016 by david.green
[ARM] Extra testing for v2i1 types. NFC

This adds extra tests for various operations from making the v2i1 type
legal.
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpsel.ll
The file was modifiedllvm/test/CodeGen/Thumb2/active_lane_mask.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmovimm.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-ext.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-spill.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-shuffle.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmp.ll
Commit c2550e342732d029c3a8ae1eff764d68b1abfc59 by nikita.ppv
[SCEV] Simplify invalidation after BE count calculation (NFCI)

After backedge taken counts have been calculated, we want to
invalidate all addrecs and dependent expressions in the loop,
because we might compute better results with the newly available
backedge taken counts. Previously this was done with a forgetLoop()
style use-def walk. With recent improvements to SCEV invalidation,
we can instead directly invalidate any SCEVs using addrecs in this
loop. This requires a great deal less subtlety to avoid invalidating
more than necessary, and in particular gets rid of the hack from
D113349. The change is similar to D114263 in spirit.
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
Commit f492a414bad782ae4202d2af9d3408f8e727599d by nikita.ppv
[SCEV] Simplify forgetSymbolicName() (NFCI)

With the recently introduced tracking as well as D113349, we can
greatly simplify forgetSymbolicName(). In fact, we can simply
replace it with forgetMemoizedResults().

What forgetSymbolicName() used to do is to walk the IR use-def
chain to find all SCEVs that mention the SymbolicName. However,
thanks to use tracking, we can now determine the relevant SCEVs
in a more direct way. D113349 is needed to also clear out the
actual IR to SCEV mapping in ValueExprMap.

Differential Revision: https://reviews.llvm.org/D114263
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 904328932699cd5e0eefab2c81e4f51421fd3f33 by kbessonova
[DwarfCompileUnit] Set parent DIE right after creating a local entity

No functional changes intended.

Before this patch DwarfCompileUnit::createScopeChildrenDIE() and
DwarfCompileUnit::createAndAddScopeChildrenDIE() used to emit child subtrees
and then when all the children get created, attach them to a parent scope DIE.
However, when a DIE doesn't have a parent, all the requests for its unit DIE
fail.

Currently, this is not a big issue since it isn't usually needed to know unit DIE
for a local (function-scoped) entity. But once we introduce lexical blocks as
a valid scope for global variables (static locals) and type DIEs, any requests
for a unit DIE need to be guarded against local scope due to the potential
absence of the DIE's parent.

To avoid the aforementioned issue, this patch refactors a few DwarfCompileUnit
methods to support the idea of attaching a DIE to its parent as close to the
creation of this DIE as possible.

Reviewed By: ellis

Differential Revision: https://reviews.llvm.org/D114350
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
Commit 7ba64ab05a174cc5cecacbc81dadc0ef48cc8ed1 by llvm-dev
[PowerPC] Regenerate ppc64-P9-vabsd.ll tests
The file was modifiedllvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll
Commit 7d5d063c7745672afaab9dc2e744d43093fa6062 by david.green
[ARM] Fold away unnecessary CSET/CMPZ

Codegen from expanded vector operations can end up with unnecessary
CMPZ/CSINC, of the form:
  CSXYZ A, B, C1 (CMPZ (CSINC 0, 0, C2, D), 0)

These can be converted to remove the CMPZ and CSINC, depending on the
condition.
  if C1==NE -> CSXYZ A, B, C2, D
  if C1==EQ -> CSXYZ A, B, NOT(C2), D

Differential Revision: https://reviews.llvm.org/D114013
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpf.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-ctlz.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-xor.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-not.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-vselect.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-or.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpz.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll
The file was modifiedllvm/test/CodeGen/Thumb2/active_lane_mask.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpsel.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpr.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-fmath.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-spill.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmp.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-fmas.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-shuffle.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-cttz.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-and.ll
Commit ff649e08021042a8e828f30ae72d062c9b25c661 by kazu
[Target] Use range-based for loops (NFC)
The file was modifiedllvm/lib/Target/Lanai/LanaiInstrInfo.cpp
The file was modifiedllvm/lib/Target/Sparc/SparcMCInstLower.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCMCInstLower.cpp
The file was modifiedllvm/lib/Target/Mips/MipsConstantIslandPass.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/lib/Target/Mips/MipsMCInstLower.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZElimCompare.cpp
The file was modifiedllvm/lib/Target/XCore/XCoreMCInstLower.cpp
The file was modifiedllvm/lib/Target/Mips/MipsSEISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCCTRLoops.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiMCInstLower.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZMCInstLower.cpp
The file was modifiedllvm/lib/Target/Mips/MipsAsmPrinter.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
The file was modifiedllvm/lib/Target/Sparc/DelaySlotFiller.cpp
The file was modifiedllvm/lib/Target/MSP430/MSP430MCInstLower.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp
Commit 5c64d8ef8cc0c0ed3e0f2ae693d99e7f70f20a84 by david.green
[ARM] CSINC/CSINV patterns from CMOV

We sometimes end up generating CMOV with constant operands that can be
simplified to CSINC or CSINV under Arm-8.1m. This adds some simple
patterns for them.

Differential Revision: https://reviews.llvm.org/D114349
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqmovn.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-fmas.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-store.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpfz.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-fpclamptosat_vec.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpf.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-minmax.ll
The file was modifiedllvm/test/CodeGen/Thumb2/active_lane_mask.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-ext.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vctp.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmp.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-load.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpr.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqshrn.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmaxv-vminv-scalar.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqdmulh.ll
Commit 2afd16fe725ffa98723abda6dc19ee6d70f60a4d by chiahungduan
[mlir] Enable MLIRDialectUtilsTests

Also remove `TooFewDims` test which tried to create an invalid AffineMap.
The creation of an invalid AffineMap is rejected by `willBeValidAffineMap`,
as a result we can deprecate the test.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D114657
The file was modifiedmlir/unittests/Dialect/CMakeLists.txt
The file was modifiedmlir/unittests/Dialect/Utils/StructuredOpsUtilsTest.cpp
Commit cc2794abeab5d876c50523de193ea7b5849018cc by Vitaly Buka
[sanitizer] Switch StackStore from pointers to 32bit IDs

Depends on D114488.

Reviewed By: morehouse, dvyukov, kstoimenov

Differential Revision: https://reviews.llvm.org/D114489
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.h
Commit a9f837bbf0ecb12fd309a1c5ba59661fc1447327 by sander.desmalen
NFC: Simplify sve-widen-phi.ll by unrolling once.

The unroll factor > 1 has little value for what is being tested.
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
Commit 28a4deab921d2d9a1e27d520fc3f745eb8d9aa02 by sander.desmalen
[LV] Fix incorrectly marking a pointer indvar as 'scalar'.

collectLoopScalars should only add non-uniform nodes to the list if they
are used by a load/store instruction that is marked as CM_Scalarize.

Before this patch, the LV incorrectly marked pointer induction variables
as 'scalar' when they required to be widened by something else,
such as a compare instruction, and weren't used by a node marked as
'CM_Scalarize'. This case is covered by sve-widen-phi.ll.

This change also allows removing some code where the LV tried to
widen the PHI nodes with a stepvector, even though it was marked as
'scalarAfterVectorization'. Now that this code is more careful about
marking instructions that need widening as 'scalar', this code has
become redundant.

Differential Revision: https://reviews.llvm.org/D114373
The file was modifiedllvm/test/Transforms/LoopVectorize/pointer-induction.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
Commit 168bc7ce7e2ebe6527bf3fdd9262ef5c0deab4fc by Vitaly Buka
[sanitizer] Remove storeIds and use padding of StackDepotNode

Depends on D114489.

Reviewed By: morehouse, dvyukov

Differential Revision: https://reviews.llvm.org/D114490
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stackdepot.cpp
Commit 01631ffcfca768c97e4a26c2d86af1ecb4b28b22 by koraq
[libc++][format] Adds formatting benchmarks.

These benchmarks will be used to test the performance inpact of the next
set of optimization patches.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D110501
The file was addedlibcxx/benchmarks/format_to_n.bench.cpp
The file was addedlibcxx/benchmarks/formatted_size.bench.cpp
The file was addedlibcxx/benchmarks/format.bench.cpp
The file was addedlibcxx/benchmarks/format_to.bench.cpp
Commit 7b75110fac979be24eed0178caa9d1f8c68e14eb by flo
[SCEV] Turn validity check in getExistingSCEV into assert (NFC).

Now that we track users of SCEV expressions, we should be able to always
invalidate containing expressions.

With that, I think the case where a value gets removed but
SCEVs containing references to it should not be possible any longer.
Turn check into an assert.

This slightly reduces compile-time:

NewPM-O3: -0.27%
NewPM-ReleaseThinLTO: -0.21%
NewPM-ReleaseLTO-g: -0.26%

http://llvm-compile-time-tracker.com/compare.php?from=c3dc6b081da6ba503e67d260033f81f61eb38ea3&to=95a4a028b1f1dd0bc3d221435953b7d2c031b3d5&stat=instructions

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D114633
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 730dccb98622a82d1cad65e784ce5a8e8323e8cb by koraq
[libc++] Remove support for Clang 9 and older.

I encountered this while reviewing an unrelated patch. Will land after
the CI passes.

Reviewed By: #libc, Mordante

Differential Revision: https://reviews.llvm.org/D114673
The file was modifiedlibcxx/include/type_traits
Commit cb68fc814af63a7dc2f696fccbcc6971c76956bd by koraq
[libc++] Add myself to the credits.

Noticed while updating the credits for the to_chars patch.
The file was modifiedlibcxx/CREDITS.TXT
Commit 97755ab1c67f01031d1f2e1a972b00c76841f6f8 by spatel
[InstCombine] reduce code duplication; NFC
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit f55d1eb3746a17688ca10d4e699ccea7d0f15378 by spatel
[InstCombine] use decomposeBitTestICmp to make icmp (trunc X), C more consistent

This is a follow-on suggested in D112634.
Two folds that were added with that patch are subsumed in the call to
decomposeBitTestICmp, and two other folds are potentially inverted.

The deleted folds were very specialized by instcombine standards
because they were restricted to legal integer types based on the data
layout. This generalizes the canonical form independent of target/types.

This change has a reasonable chance of exposing regressions either in
IR or codegen, but I don't have any evidence for either of those yet.
A spot check of asm across several in-tree targets shows variations
that I expect are mostly neutral.

We have one improvement in an existing IR test that I noted with a
comment. Using mask ops might also make more code match with D114272.

Differential Revision: https://reviews.llvm.org/D114386
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/test/Transforms/InstCombine/and-compare.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp-trunc.ll
The file was modifiedllvm/test/Transforms/InstCombine/getelementptr.ll
The file was modifiedllvm/test/Transforms/InstCombine/select-icmp-and.ll
The file was modifiedllvm/test/Transforms/InstCombine/select-with-bitwise-ops.ll
The file was modifiedllvm/test/Transforms/InstCombine/signed-truncation-check.ll
The file was modifiedllvm/test/Transforms/InstCombine/compare-signs.ll
Commit 04b5c00952c39e00806bc154df348f5171919788 by david.green
[ARM] Add testing for various fptosi.sat patterns. NFC
The file was addedllvm/test/CodeGen/ARM/fpclamptosat.ll
Commit 8874ada906f6a2ae0c4aa978581a0c9c26b89ffd by thakis
[clang] Fix -Wreturn-type false positive in @try statements

After 04f30795f16638, -Wreturn-type has an effect on functions that
contain @try/@catch statements. CheckFallThrough() was missing
a case for ObjCAtTryStmts, leading to a false positive.

(What about the other two places in CheckFallThrough() that handle
CXXTryStmt but not ObjCAtTryStmts?

- I think the last use of CXXTryStmt is dead in practice: 04c6851cd made it so
  that calls never add edges to try bodies, and the CFG block for a try
  statement is always an empty block containing just the try element itself as
  terminator (the try body itself is part of the normal flow of the function
  and not connected to the block for the try statement itself. The try statment
  cfg block is only connected to the catch bodies, and only reachable from
  throw expressions within the try body.)

- The first use of CXXTryStmt might be important. It looks similar to
  the code that adds all cfg blocks for try statements as roots of
  the reachability graph for the reachability warnings, but I can't
  find a way to trigger it. So I'm omitting it for now. The CXXTryStmt
  code path seems to only be hit by try statements that are function
  bodies without a surrounding compound statements
  (`f() try { ... } catch ...`), and those don't exist for ObjC
  @try statements.
)

Fixes PR52473.

Differential Revfision: https://reviews.llvm.org/D114660
The file was modifiedclang/lib/Sema/AnalysisBasedWarnings.cpp
The file was addedclang/test/SemaObjC/return-noreturn.m
Commit c73fc74ce0f85510ebedd9fe8bcad51d53f2465c by kazu
[llvm] Use range-based for loops (NFC)
The file was modifiedllvm/lib/Target/AArch64/AArch64CondBrTuning.cpp
The file was modifiedllvm/lib/Target/Mips/MipsConstantIslandPass.cpp
The file was modifiedllvm/lib/CodeGen/MachinePipeliner.cpp
The file was modifiedllvm/lib/CodeGen/ModuloSchedule.cpp
The file was modifiedllvm/lib/Target/ARM/ARMConstantIslandPass.cpp
The file was modifiedllvm/lib/CodeGen/InlineSpiller.cpp
The file was modifiedllvm/lib/CodeGen/RegAllocFast.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/lib/Target/X86/X86ExpandPseudo.cpp
The file was modifiedllvm/lib/CodeGen/StackSlotColoring.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
Commit 3495090b9bfdb1daf9c64585b4c02284dc99a180 by flo
[LV] Move code from widenGEP to VPWidenGEPRecipe (NFC).

The code in widenGEP has already been transitioned to only rely on
information provided by VPWidenGEPRecipe directly.

Moving the code directly to VPWidenGEPRecipe::execute completes
the transition for the recipe.

It provides the following advantages:

1. Less indirection, easier to see what's going on.
2. Removes accesses to fields of ILV.

2) in particular ensures that no dependencies on
fields in ILV for GEP code generation are re-introduced.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D114321
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 6c1c2313d1b7bea4e9d831fe061c37735b7d4802 by i
[ELF] Simplify assignFileOffsets. NFC
The file was modifiedlld/ELF/Writer.cpp
Commit f9a4d9aa0309ca353de909a19b648ab34f6c0c68 by i
[ELF] -z separate-*: Use max-page-size instead of common-page-size for text/non-SHF_ALLOC transition and writeTrapInstr

For -z separate-code and -z separate-loadable-segments:

When RW is present, the RX to RW transition is aligned with max-page-size.
When RW is absent, the RX to non-SHF_ALLOC transition should use max-page-size as well.
The file was modifiedlld/ELF/Writer.cpp
The file was modifiedlld/test/ELF/fill-trap.s
The file was modifiedlld/test/ELF/fill-trap-ppc.s
Commit 3608e18a946e77a474a468304b6c3904c55dbce0 by nikita.ppv
[DSE] Use MapVector for IOLs

I'm not sure whether this can cause any actual non-determinism,
but at least it makes the DSE debug log non-deterministic, which
makes it harder to debug other non-determinism issues.
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit df08b2fe8b35cb63dfb3b49738a3494b9b4e6f8e by dimitry
[AArch64] Avoid crashing on invalid -Wa,-march= values

As reported in https://bugs.freebsd.org/260078, the gnutls Makefiles
pass -Wa,-march=all to compile a number of assembly files. Clang does
not support this -march value, but because of a mistake in handling
the arguments, an unitialized Arg pointer is dereferenced, which can
cause a segfault.

Work around this by adding a check if the local WaMArch variable is
initialized, and if so, using its value in the diagnostic message.

Reviewed By: tschuett

Differential Revision: https://reviews.llvm.org/D114677
The file was modifiedclang/test/Driver/aarch64-target-as-march.s
The file was modifiedclang/lib/Driver/ToolChains/Arch/AArch64.cpp
Commit f5a9bfdf8f4a278ba725fee50d5b5054f95e88f2 by nicolas.vasilache
[mlir] NFC - Move invalid.mlir tests to the proper dialects
The file was modifiedmlir/test/Dialect/Tensor/invalid.mlir
The file was modifiedmlir/test/IR/invalid-ops.mlir
The file was modifiedmlir/test/Dialect/MemRef/invalid.mlir
Commit cecc6893a08618fc753cd55893b720a01fbd2b51 by i
[ELF] Simplify assignFileOffsets

There is a difference with non-SHF_ALLOC SHT_NOBITS when off%sh_addralign!=0
which doesn't happen/matter in practice.
The file was modifiedlld/ELF/Writer.cpp
Commit d060cc1f9808dd5de524334fd695404a96e3175f by i
[ELF] Fix out-of-bounds write in memset(&Out::first, ...)

Fix r285764: there is no guarantee that Out::first is placed before other
static data members of `struct Out`. After `bufferStart` was introduced, this
out-of-bounds write is destined in many compilers. It is likely benign, though.

And move `Out::elfHeader->size` assignment beside `Out::elfHeader->sectionIndex`
The file was modifiedlld/ELF/OutputSections.h
The file was modifiedlld/ELF/OutputSections.cpp
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/ELF/Writer.cpp
Commit 25c7ec4fc622b73f02840daf2ebaf4a5dabb9e1a by i
[ELF] Simplify OutputSection::sectionIndex assignment. NFC

And improve comments.
The file was modifiedlld/ELF/Writer.cpp
Commit 7ea662e2dda021bfc4c68354a5fe359748dd4ce4 by i
[ELF] Replace one make_unique from r316378 with a stack object. NFC
The file was modifiedlld/ELF/LinkerScript.cpp
Commit b3163c1cdde09467382984e5879aa9701b7036d3 by i
[Driver] Support PowerPC SPE musl dynamic linker name ld-musl-powerpc-sf.so.1

Musl treats PowerPC SPE as a soft-float target (as the PowerPC SPE ABI
is soft-float compatible).

Reviewed By: jhibbits, MaskRay

Differential Revision: https://reviews.llvm.org/D105869
The file was modifiedclang/test/Driver/linux-ld.c
The file was modifiedclang/lib/Driver/ToolChains/Linux.cpp
Commit 85e50c10807f8d3ddd4d092afc23e75b818d0462 by i
[ELF] Inline InputSection::getOffset into callers and remove it. NFC

This is an unneeded abstraction which may cause confusion:
SectionBase::getOffset has the same name but hard codes -1 as the size of OutputSection.
The file was modifiedlld/ELF/InputSection.cpp
The file was modifiedlld/ELF/MapFile.cpp
The file was modifiedlld/ELF/InputSection.h
Commit e80a0b353c31e2303c44141ab8b2ca63627ab5c2 by i
[ELF] Remove unneeded getOutputSectionVA. NFC

I attempted to remove it 1 or 2 year ago but kept it just to have a good
diagnostic in case the output section is nullptr (should be impossible).
It is long enough that we haven't seen such a case.
The file was modifiedlld/ELF/LinkerScript.cpp
Commit 5233ad17e77eb7b7697f2664dc5a588a30fe5eaf by zeratul976
Compilation Database: Point Bazel users to a solution

This doc lists ways of getting compilation databases out of some popular build systems for use with clangd and other tooling.

We built such a way for Bazel and just released it after a bunch of requests on GitHub. Thought I should propose that we add a link to help people find it and use clang tooling.

(This is my first revision submitted via LLVM Phabricator, so if I've messed something up, I'd really appreciate your help and patience. Asking for a review from Sam McCall, because I've had a great time working with him elsewhere on GitHub before and because I saw him in the Git history for this file.)

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D114213
The file was modifiedclang/docs/JSONCompilationDatabase.rst
Commit 1164c4b37583eca98866853ed22149f1a1b55a3d by i
[ELF] Simplify/remove LinkerScript::output and advance. NFC
The file was modifiedlld/ELF/LinkerScript.h
The file was modifiedlld/ELF/LinkerScript.cpp
Commit ace1d0ad3dc43e28715cbe2f3e0a5a76578bda9f by stellaraccident
[mlir][python] Normalize asm-printing IR behavior.

While working on an integration, I found a lot of inconsistencies on IR printing and verification. It turns out that we were:
  * Only doing "soft fail" verification on IR printing of Operation, not of a Module.
  * Failed verification was interacting badly with binary=True IR printing (causing a TypeError trying to pass an `str` to a `bytes` based handle).
  * For systematic integrations, it is often desirable to control verification yourself so that you can explicitly handle errors.

This patch:
  * Trues up the "soft fail" semantics by having `Module.__str__` delegate to `Operation.__str__` vs having a shortcut implementation.
  * Fixes soft fail in the presence of binary=True (and adds an additional happy path test case to make sure the binary functionality works).
  * Adds an `assume_verified` boolean flag to the `print`/`get_asm` methods which disables internal verification, presupposing that the caller has taken care of it.

It turns out that we had a number of tests which were generating illegal IR but it wasn't being caught because they were doing a print on the `Module` vs operation. All except two were trivially fixed:
  * linalg/ops.py : Had two tests for direct constructing a Matmul incorrectly. Fixing them made them just like the next two tests so just deleted (no need to test the verifier only at this level).
  * linalg/opdsl/emit_structured_generic.py : Hand coded conv and pooling tests appear to be using illegal shaped inputs/outputs, causing a verification failure. I just used the `assume_verified=` flag to restore the original behavior and left a TODO. Will get someone who owns that to fix it properly in a followup (would also be nice to break this file up into multiple test modules as it is hard to tell exactly what is failing).

Notes to downstreams:
  * If, like some of our tests, you get verification failures after this patch, it is likely that your IR was always invalid and you will need to fix the root cause. To temporarily revert to prior (broken) behavior, replace calls like `print(module)` with `print(module.operation.get_asm(assume_verified=True))`.

Differential Revision: https://reviews.llvm.org/D114680
The file was modifiedmlir/test/python/dialects/std.py
The file was modifiedmlir/test/python/dialects/linalg/opdsl/emit_structured_generic.py
The file was modifiedmlir/test/python/ir/module.py
The file was modifiedmlir/test/python/dialects/linalg/ops.py
The file was modifiedmlir/test/python/dialects/shape.py
The file was modifiedmlir/test/python/ir/operation.py
The file was modifiedmlir/lib/Bindings/Python/IRCore.cpp
The file was modifiedmlir/lib/Bindings/Python/IRModule.h
The file was modifiedmlir/test/python/dialects/builtin.py
Commit fd7d40640d26cd7834a1d85023ed9da8aef2a3a7 by kazu
[llvm] Use range-based for loops (NFC)
The file was modifiedllvm/lib/CodeGen/BranchFolding.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
The file was modifiedllvm/lib/CodeGen/LatencyPriorityQueue.cpp
The file was modifiedllvm/lib/TableGen/TGLexer.cpp
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
The file was modifiedllvm/lib/Transforms/Scalar/Reassociate.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/EHStreamer.cpp
The file was modifiedllvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
The file was modifiedllvm/lib/CodeGen/MachinePipeliner.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/GlobalMerge.cpp
The file was modifiedllvm/lib/ExecutionEngine/ExecutionEngine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600MachineScheduler.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
The file was modifiedllvm/lib/Transforms/ObjCARC/DependencyAnalysis.cpp
Commit 6488bd1d51715501632778e3c9a1d4eedfac2998 by Saleem Abdulrasool
test: add a lit configuration for Windows subdirectory

This adds a local configuration to the Windows subdirectory to filter
out the tests on non-Windows platforms using the lit filtering.
The file was addedlldb/test/Shell/Process/Windows/lit.local.cfg
Commit b5f1fa3e5c1503137c63d5eab1bd213dea706041 by i
[ELF][test] --oformat binary: Check that SIZEOF_HEADERS==0
The file was modifiedlld/test/ELF/oformat-binary.s
Commit 11291326cd983288117b52e955e7936548373c89 by i
[ELF] Support --oformat= beside Separate --oformat

Both GNU ld's manpage and ours use --oformat= as the canonical form.
It's odd that we do not support it...
The file was modifiedlld/test/ELF/oformat-binary.s
The file was modifiedlld/ELF/Options.td
Commit 01eb91fa86a0c65cbaac75336769d188f35443ec by Jake.Egan
[AIX] Disable empty.ll test using unsupported split dwarf

This test uses split-dwarf feature, which is not currently supported on AIX. Set this test to `UNSUPPORTED` on AIX for now.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D114567
The file was modifiedllvm/test/DebugInfo/Generic/empty.ll
Commit 89c0f4553ea62cef172a4924c21b40afdc744f11 by i
[ELF] Simplify/remove LinkerScript::switchTo. NFC
The file was modifiedlld/ELF/LinkerScript.h
The file was modifiedlld/ELF/LinkerScript.cpp
Commit e652f3f04a253d1c6bc3e16f15115ff3e8401dc0 by i
[ELF] Simplify some ctx->outSec with sec. NFC
The file was modifiedlld/ELF/LinkerScript.cpp
Commit 286c11165e24a7904328804ba10c332277d18b45 by i
[ELF] Decrease InputSectionBase::entsize to uint32_t

While here, change the sh_addralign argument to uint32_t (InputSection ctor's
argument and the member are uint32_t); add constexpr.
The file was modifiedlld/ELF/InputSection.h
Commit 4aac00a71db31121d70b140d7367e7f9d9992f66 by endre.fulop
[analyzer][doc] Add user documenation for taint analysis

Checker alpha.security.taint.TaintPropagation now has user documentation for
taint analysis with an example showing external YAML configuration format.
The format of the taint configuration file is now documented under the user
documentation of Clang SA.

Differential Revision: https://reviews.llvm.org/D113251
The file was addedclang/docs/analyzer/user-docs/TaintAnalysisConfiguration.rst
The file was modifiedclang/docs/analyzer/user-docs.rst
The file was modifiedclang/docs/analyzer/checkers.rst
Commit 99a2d940dd77a9c3699c71024b38baee98df8292 by i
[ELF] Speed up/simplify removeUnusedSyntheticSections. NFC

Make one change: when the OutputSection is nullptr (due to /DISCARD/ or garbage
collected BssSection (replaceCommonSymbols)), discard the SyntheticSection as well.
The file was modifiedlld/ELF/Writer.cpp
Commit 4709bacf18b41bf80b3a0fc1c9f16be60fedae8b by i
[ELF] Avoid std::stable_partition which may allocate memory. NFC
The file was modifiedlld/ELF/Writer.cpp
Commit 9d1938fd1441935313ac0e44e39069bee8171a86 by jperier
[flang] Return true in IsSymplyContiguous for allocatables

The current code was relying on the fact that allocatables are deferred
shape and that isAssumedShape() should therefore return true for them.

This is not true, because the current parsing/semantic analysis always
builds a semantics::ArraySpec for `x(:)` that returns true to both
isDeferredShape()/isAssumedShape(), whether x is allocatable/pointer or
not.

It proved tricky to change this behavior, so this is a simple fix for
IsSymplyContiguous where it currently matters, but we most likely want
to investigate more and fix the isDeferredShape()/isAssumedShape() in
a second time.

Differential Revision: https://reviews.llvm.org/D114599
The file was modifiedflang/lib/Evaluate/check-expression.cpp
The file was modifiedflang/test/Evaluate/folding09.f90
Commit a31f4bdfe8211ecb38741c4fd570baf0d6e16f76 by david.sherwood
[CodeGen][SVE] Use whilelo instruction when lowering @llvm.get.active.lane.mask

In most common cases the @llvm.get.active.lane.mask intrinsic maps directly
to the SVE whilelo instruction, which already takes overflow into account.
However, currently in SelectionDAGBuilder::visitIntrinsicCall we always lower
this immediately to a generic sequence of instructions that explicitly
take overflow into account. This makes it very difficult to then later
transform back into a single whilelo instruction. Therefore, this patch
introduces a new TLI function called shouldExpandGetActiveLaneMask that asks if
we should lower/expand this to a sequence of generic ISD nodes, or instead
just leave it as an intrinsic for the target to lower.

You can see the significant improvement in code quality for some of the
tests in this file:

  CodeGen/AArch64/active_lane_mask.ll

Differential Revision: https://reviews.llvm.org/D114542
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/test/CodeGen/AArch64/active_lane_mask.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 0685e83534ef8917f277b394da2927cabff8129f by balazs.benics
Fix cppcoreguidelines-virtual-base-class-destructor in macros

The `cppcoreguidelines-virtual-base-class-destructor` checker crashed on
this example:

  #define DECLARE(CLASS) \
  class CLASS {          \
  protected:             \
    virtual ~CLASS();    \
  }
  DECLARE(Foo); // no-crash

The checker will hit the following assertion:

  clang-tidy: llvm/include/llvm/ADT/Optional.h:196: T &llvm::optional_detail::OptionalStorage<clang::Token, true>::getValue() & [T = clang::Token]: Assertion `hasVal' failed."

It turns out, `Lexer::findNextToken()` returned `llvm::None` within the
`getVirtualKeywordRange()` function when the `VirtualEndLoc`
SourceLocation represents a macro expansion.
To prevent this from happening, I decided to propagate the `llvm::None`
further up and only create the removal of `virtual` if the
`getVirtualKeywordRange()` succeeds.

I considered an alternative fix for this issue:
I could have checked the `Destructor.getLocation().isMacroID()` before
doing any Fixit calculation inside the `check()` function.
In contrast to this approach my patch will preserve the diagnostics and
drop the fixits only if it would have crashed.

Reviewed By: whisperity

Differential Revision: https://reviews.llvm.org/D113558
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines-virtual-class-destructor.cpp
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/VirtualClassDestructorCheck.cpp
Commit 0540485436c4dd225e6a40e6db1240f096d145d3 by balazs.benics
[libtooling][clang-tidy] Fix crashing on rendering invalid SourceRanges

Invalid SourceRanges can occur generally if the code does not compile,
thus we expect clang error diagnostics.
Unlike `clang`, `clang-tidy` did not swallow invalid source ranges, but
tried to highlight them, and blow various assertions.

The following two examples produce invalid source ranges, but this is
not a complete list:

  void test(x); // error: unknown type name 'x'
  struct Foo {
    member; // error: C++ requires a type specifier for all declarations
  };

Thanks @whisperity helping me fix this.

Reviewed-By: xazax.hun

Differential Revision: https://reviews.llvm.org/D114254
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
The file was modifiedclang-tools-extra/unittests/clang-tidy/ClangTidyDiagnosticConsumerTest.cpp
The file was modifiedclang-tools-extra/test/clang-tidy/infrastructure/export-diagnostics.cpp
Commit e1d0673aeeece138d4865385a24a86f6954dff72 by balazs.benics
[clang-tidy] Fix crashing altera-struct-pack-align on invalid RecordDecls

Reviewed-By: martong

Differential Revision: https://reviews.llvm.org/D114256
The file was addedclang-tools-extra/test/clang-tidy/checkers/altera-struct-pack-align-invalid-decl-no-crash.cpp
The file was modifiedclang-tools-extra/clang-tidy/altera/StructPackAlignCheck.cpp
Commit a8120a771143c15480b508c19a14c0c85a36378c by balazs.benics
[clang-tidy] Ignore narrowing conversions in case of bitfields

Bitfields are special. Due to integral promotion [conv.prom/5] bitfield
member access expressions are frequently wrapped by an implicit cast to
`int` if that type can represent all the values of the bitfield.

Consider these examples:
  struct SmallBitfield { unsigned int id : 4; };
  x.id & 1;             (case-1)
  x.id & 1u;            (case-2)
  x.id << 1u;           (case-3)
  (unsigned)x.id << 1;  (case-4)

Due to the promotion rules, we would get a warning for case-1. It's
debatable how useful this is, but the user at least has a convenient way
of //fixing// it by adding the `u` unsigned-suffix to the literal as
demonstrated by case-2. However, this won't work for shift operators like
the one in case-3. In case of a normal binary operator, both operands
contribute to the result type. However, the type of the shift expression is
the promoted type of the left operand. One could still suppress this
superfluous warning by explicitly casting the bitfield member access as
case-4 demonstrates, but why? The compiler already knew that the value from
the member access should safely fit into an `int`, why do we have this
warning in the first place? So, hereby we suppress this specific scenario,
when a bitfield's value is implicitly cast to int (likely due to integral
promotion).

Note that the bitshift operation might invoke unspecified/undefined
behavior, but that's another topic, this checker is about detecting
conversion-related defects.

Example AST for `x.id << 1`:
  BinaryOperator 'int' '<<'
  |-ImplicitCastExpr 'int' <IntegralCast>
  | `-ImplicitCastExpr 'unsigned int' <LValueToRValue>
  |   `-MemberExpr 'unsigned int' lvalue bitfield .id
  |     `-DeclRefExpr 'SmallBitfield' lvalue ParmVar 'x' 'SmallBitfield'
  `-IntegerLiteral 'int' 1

Reviewed By: courbet

Differential Revision: https://reviews.llvm.org/D114105
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/NarrowingConversionsCheck.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines-narrowing-conversions-bitfields.cpp
Commit 1b3cd35ade5daea163ac444324415d68af2513a7 by clementval
[fir] Add base for runtime builder unittests

This patch adds the common base shared by builder runtime
unittests. It extracted from D114460 to make it easier to base other patches
on it.

Reviewed By: kiranchandramohan, rovka

Differential Revision: https://reviews.llvm.org/D114557
The file was addedflang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
The file was addedflang/unittests/Optimizer/Builder/Runtime/RuntimeCallTestBase.h
Commit fd71159f6468988d9865a39c243695f823f4b6d7 by flo
[LV] Move code from widenInstruction to VPWidenRecipe. (NFC)

The code in widenInstruction has already been transitioned to
only rely on information provided by VPWidenRecipe directly.

Moving the code directly to VPWidenRecipe::execute completes
the transition for the recipe.

It provides the following advantages:

1. Less indirection, easier to see what's going on.
2. Removes accesses to fields of ILV.

2) in particular ensures that no dependencies on
fields in ILV for vector code generation are re-introduced.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D114322
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 18452d1f12479ff5e1b437ef7efc9538e505c437 by clementval
[fir] Add fir transformational intrinsic builder

This patch adds the builder to generate transformational
intrinsic runtime API calls.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: rovka

Differential Revision: https://reviews.llvm.org/D114470

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: mleair <leairmark@gmail.com>
Co-authored-by: Kiran Chandramohan <kiran.chandramohan@arm.com>
Co-authored-by: Peter Steinfeld <psteinfeld@nvidia.com>
The file was addedflang/unittests/Optimizer/Builder/Runtime/TransformationalTest.cpp
The file was modifiedflang/unittests/Optimizer/CMakeLists.txt
The file was addedflang/include/flang/Optimizer/Builder/Runtime/Transformational.h
The file was modifiedflang/lib/Optimizer/Builder/CMakeLists.txt
The file was addedflang/lib/Optimizer/Builder/Runtime/Transformational.cpp
Commit 51e2c8c9bf96f19a3160a7da36be26943318a2cb by clementval
[fir] Add assignment runtime API builder

This patch adds the builder that generate assignment runtime API calls.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: rovka, awarzynski

Differential Revision: https://reviews.llvm.org/D114475

Co-authored-by: Jean Perier <jperier@nvidia.com>
The file was modifiedflang/unittests/Optimizer/CMakeLists.txt
The file was addedflang/unittests/Optimizer/Builder/Runtime/AssignTest.cpp
The file was addedflang/include/flang/Optimizer/Builder/Runtime/Assign.h
The file was addedflang/lib/Optimizer/Builder/Runtime/Assign.cpp
The file was modifiedflang/lib/Optimizer/Builder/CMakeLists.txt
Commit af37d4b6fee8990d5b029796681b59e0d0390c28 by balazs.benics
[analyzer][NFC] Refactor AnalysisConsumer::getModeForDecl()

I just read this part of the code, and I found the nested ifs less
readable.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D114441
The file was modifiedclang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
Commit 2e7202b0082fd0e22589949aa4d3472d201949b2 by clementval
[fir] Add data flow optimization pass

Add pass to perform store/load forwarding and potentially removing dead
stores.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: kiranchandramohan, schweitz, mehdi_amini, awarzynski

Differential Revision: https://reviews.llvm.org/D111288
The file was addedflang/lib/Optimizer/Transforms/MemRefDataFlowOpt.cpp
The file was addedflang/test/Fir/memref-data-flow.fir
The file was modifiedflang/include/flang/Optimizer/Transforms/Passes.td
The file was modifiedflang/lib/Optimizer/Transforms/CMakeLists.txt
The file was modifiedflang/include/flang/Optimizer/Transforms/Passes.h
Commit cffe3a084f87ad2ed17aeebc1075eb100182114e by lebedev.ri
[X86][Costmodel] Now that `getReplicationShuffleCost()` is good, update `getInterleavedMemoryOpCostAVX512()`

... to actually ask about i1-elt-wide mask, since that is what will probably be used on AVX512.
This unblocks D111460.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D114316
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-accesses-with-gaps.ll
Commit 61808066325ff0828bab7f016e8798b78d2e6b49 by bradley.smith
[AArch64][SVE] Mark fixed-type FP extending/truncating loads/stores as custom

This allows the generic DAG combine to fold fp_extend/fp_trunc into
loads/stores which we can then lower into a integer extending
load/truncating store plus an FP_EXTEND/FP_ROUND.

The nuance here is that fixed-type FP_EXTEND/FP_ROUND require unpacked
types hence lowering them introduces an unpack/zip. By allowing these
nodes to be combined with loads/store we make it much easier to have
this unpack/zip combined into the load/store by our custom lowering.

Differential Revision: https://reviews.llvm.org/D114580
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-trunc.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 297fb66484c73d3a04e8974921e94cb00c1587c2 by bjorn.a.pettersson
Use a deterministic order when updating the DominatorTree

This solves a problem with non-deterministic output from opt due
to not performing dominator tree updates in a deterministic order.

The problem that was analysed indicated that JumpThreading was using
the DomTreeUpdater via llvm::MergeBasicBlockIntoOnlyPred. When
preparing the list of updates to send to DomTreeUpdater::applyUpdates
we iterated over a SmallPtrSet, which didn't give a well-defined
order of updates to perform.

The added domtree-updates.ll test case is an example that would
result in non-deterministic printouts of the domtree. Semantically
those domtree:s are equivalent, but it show the fact that when we
use the domtree iterator the order in which nodes are visited depend
on the order in which dominator tree updates are performed.

Since some passes (at least EarlyCSE) are iterating over nodes in the
dominator tree in a similar fashion as the domtree printer, then the
order in which transforms are applied by such passes, transitively,
also depend on the order in which dominator tree updates are
performed. And taking EarlyCSE as an example the end result could be
different depending on in which order the transforms are applied.

Reviewed By: nikic, kuhar

Differential Revision: https://reviews.llvm.org/D110292
The file was addedllvm/test/Transforms/JumpThreading/domtree-updates.ll
The file was modifiedllvm/lib/CodeGen/IndirectBrExpandPass.cpp
The file was modifiedllvm/include/llvm/Support/GenericDomTree.h
The file was modifiedllvm/lib/Transforms/Utils/BasicBlockUtils.cpp
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
Commit d96f92ff16edab72cf78811673f02371f07a5a70 by sylvestre
fix typos in comments
The file was modifiedllvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
The file was modifiedclang-tools-extra/clang-doc/ClangDoc.h
The file was modifiedllvm/test/tools/llvm-objcopy/ELF/Inputs/ihex-elf-sections.yaml
Commit 5e96553608a1bbf688f11c76890dc543c5f89c61 by lebedev.ri
[NFC][X86][LV][Costmodel] Add most basic test for masked interleaved load
The file was removedllvm/test/Analysis/CostModel/X86/interleaved-store-accesses-with-gaps.ll
The file was addedllvm/test/Analysis/CostModel/X86/masked-interleaved-load-i16.ll
The file was addedllvm/test/Analysis/CostModel/X86/masked-interleaved-store-i16.ll
Commit 90010c2e1d60c6a9a4a0b30a113d4dae2b7214eb by erich.keane
Don't consider 'LinkageSpec' when calculating DeclContext 'Encloses'

We don't properly handle lookup through using directives when there is
a linkage spec in the common chain.  This is because `CppLookupName` and
`CppNamespaceLookup` end up skipping `LinkageSpec`'s (correctly, as they
are not lookup scopes), but the `UnqualUsingDirectiveSet` does not.

I discovered that when we are calculating the `CommonAncestor` for a
using-directive, we were coming up with the `LinkageSpec`, instead of
the `LinkageSpec`'s parent.  Then, when we use
`UnqualUsingDirectiveSet::getNamespacesFor` a scope, we don't end up
finding any that were in the `LinkageSpec` (again, since `CppLookupName`
skips linkage specs), so those don't end up participating in the lookup.

The function `UnqualUsingDirectiveSet::addUsingDirective` calculates
this common ancestor via a loop through the the `DeclSpec::Encloses`
function.

Changing this Encloses function to believe that a `LinkageSpec`
`Encloses` nothing ends up fixing the problem without breaking any other tests,
so I opted to do that.  A less aggressive patch could perhaps change only
the `addUsingDirective`, but my examination of all uses of `Encloses`
showed that it seems to be used exclusively in lookup, which makes me think
this is correct everywhere.

Differential Revision: https://reviews.llvm.org/D113709
The file was addedclang/test/SemaCXX/lookup-through-linkage.cpp
The file was modifiedclang/lib/AST/DeclBase.cpp
Commit 84364bdaabfca35f083c932ffd3a14f3b9ad4f3a by david.sherwood
[CodeGen][AArch64] Bail out in performConcatVectorsCombine for scalable vectors

I tried to exercise the existing combine patterns in performConcatVectorsCombine
for scalable vectors and at the moment it doesn't seem possible. Parts of
the code currently assume we're dealing with fixed-width vectors with calls
to getVectorNumElements(), therefore I've decided to simply bail out early
for scalable vectors.

Added a test here to show that we don't crash when attempting to combine
truncate + concat:

  CodeGen/AArch64/concat_vector-truncate-combine.ll

Differential Revision: https://reviews.llvm.org/D114600
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/concat_vector-truncate-combine.ll
Commit 814aabae37757d21d96e22608ccb98e91c1f3a06 by mydeveloperday
[clang-format] regressed default behavior for operator parentheses

{D110833} regressed behavior of spaces before parentheses for operators, this revision reverts that so that operators are handled as they were before.

I think in hindsight it was a mistake to try and consume operator behaviour in with the function behaviour, I think Operators can be considered a special style. Its seems the code is getting confused as to if this is a function declaration or definition.

I think latterly we can consider adding an operator parentheses specific custom option but this should have been explicitly called out as it can impact projects.

Reviewed By: HazardyKnusperkeks, curdeius

Differential Revision: https://reviews.llvm.org/D114696
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
Commit fc53eb69c26cdd7efa6b629c187d04326f0448ca by erich.keane
Reapply 'Implement target_clones multiversioning'

See discussion in D51650, this change was a little aggressive in an
error while doing a 'while we were here', so this removes that error
condition, as it is apparently useful.

This reverts commit bb4934601d731465e01e2e22c80ce2dbe687d73f.
The file was addedclang/test/CodeGenCXX/attr-target-clones.cpp
The file was modifiedclang/include/clang/AST/Decl.h
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/include/clang/Basic/Attr.td
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was addedclang/test/CodeGen/attr-target-clones.c
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was addedclang/test/Sema/attr-target-clones.c
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/lib/CodeGen/CodeGenModule.h
The file was modifiedclang/test/Misc/pragma-attribute-supported-attributes-list.test
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/test/Sema/attr-cpuspecific.c
The file was addedclang/test/SemaCXX/attr-target-clones.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
Commit 95f34e318c469806879a0cd1a6c5290901ed12df by herhut
[mlir][memref] Fix bug in verification of memref.collapse_shape

The verifier computed an illegal type with negative dimension size when collapsing partially static memrefs.

Differential Revision: https://reviews.llvm.org/D114702
The file was modifiedmlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
The file was modifiedmlir/test/Dialect/MemRef/ops.mlir
Commit a7363067e69a60442a1d52e93207ed7a86ce9d6a by spatel
[X86] Add vector test coverage for or with no common bits tests

Ensure D113970 handles vector types patterns as well.

Differential Revision: https://reviews.llvm.org/D114575
The file was addedllvm/test/CodeGen/X86/vec_no-common-bits.ll
Commit 7319d11586c4aa836204316a5be7cd71cfe5e05d by jay.foad
[AMDGPU] Fix "must generated" typo in docs
The file was modifiedllvm/docs/AMDGPUUsage.rst
Commit 65d9dc7f1f4ac5b4d76502d36bd81d9857538148 by jay.foad
[AMDGPU] Fix list indentation in docs
The file was modifiedllvm/docs/AMDGPUUsage.rst
Commit 881840fc268e6523b71b40e717c647ed45682816 by Mirko.Brkusanin
[AMDGPU][GlobalISel] Transform (fadd (fmul x, y), z) -> (fma x, y, z)

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D93305
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-pre-legalize.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul-post-legalize.mir
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-mul.ll
Commit 89511362165332695bf0e26767662b47f8e11f98 by Mirko.Brkusanin
[AMDGPU][GlobalISel] Transform (fadd (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), z)

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D97937
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-mul.ll
Commit f7322925365c165e8e92a699a2a699b6fe04f6d5 by Mirko.Brkusanin
[AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y, (fma u, v, z))

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D97938
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Commit e5e49a08f11618653aca133f22603c165889505e by Mirko.Brkusanin
[AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fpext (fmul u, v))), z) -> (fma x, y, (fma (fpext u), (fpext v), z))

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D98047
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Commit a7821692708c413d7a2488137dea2fbbfac31ca7 by Mirko.Brkusanin
[AMDGPU][GlobalISel] Transform (fsub (fmul x, y), z) -> (fma x, y, -z)

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D96614
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-mul.ll
Commit 5fe7fcd28e5e7df174a46a78e19316856152eefa by Mirko.Brkusanin
[AMDGPU][GlobalISel] Transform (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z))

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D98048
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-neg-mul.ll
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
Commit 37c2a2201d683383d3683321ff1f33fd8dd22298 by Mirko.Brkusanin
[AMDGPU][GlobalISel] Transform (fsub (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), (fneg z))

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D98049
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-mul.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
Commit 0dd570ff56c53dd6d11305fb0b36edab69eb1484 by Mirko.Brkusanin
[AMDGPU][GlobalISel] Transform (fsub (fpext (fneg (fmul x, y))), z) -> (fneg (fma (fpext x), (fpext y), z))

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D98050
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
Commit 7e73c2a66a8bb73b80aedc94c4e58598ac87e9d5 by lebedev.ri
[X86][Costmodel] `getInterleavedMemoryOpCostAVX512()`: masked load can not be folded into a shuffle

The mask on the shuffle is for the output, not the input.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D114697
The file was modifiedllvm/test/Analysis/CostModel/X86/masked-interleaved-load-i16.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
Commit 1cc3b135aa61a31a7f7e488dd720e29bd8907bfc by clementval
[fir] Get rid of the global option in FIRBuilder

Replace the global option `nameLengthHashSize` with a constexpr
with the same name. The option was not used in fir-dev so switching
to a constexpr is fine.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D114630
The file was modifiedflang/lib/Optimizer/Builder/FIRBuilder.cpp
Commit 2022e2fcd05c68a38c4b5ef865461c9c86a81997 by mascasa
[HWASan] Disable LTO test on aarch64.

It fails for non-Android aarch64 bots as well.
The file was modifiedcompiler-rt/test/hwasan/TestCases/lto.c
Commit 77dd579827f2e7574be4bbf3f94a48930e7b094f by nikita.ppv
[SCEV] Remove incorrect assert

Fix assertion failure reported on D113349 by removing the assert.
While the produced expression should be equivalent, it may not
be strictly the same, e.g. due to lazy nowrap flag updates. Similar
to what the main createSCEV() code does, simply retain the old
value map entry if one already exists.
The file was addedllvm/test/Analysis/ScalarEvolution/addrec-computed-during-addrec-calculation.ll
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit c572eb1ad9d8a528bcaff0160888aff31b1f4b5f by mehrnoosh.heidarpour
[InstCombine] Fold (~A | B) ^ A --> ~(A & B)

https://alive2.llvm.org/ce/z/gLrYPk

Fixes:
https://llvm.org/PR52518

Reviewed by: spatel

Differential revision: https://reviews.llvm.org/D114339
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
The file was modifiedllvm/test/Transforms/InstCombine/xor.ll
Commit f240e528cea25fd2a9ae01b1e1fe77f507ed7a2c by kazu
[llvm] Use range-based for loops (NFC)
The file was modifiedllvm/lib/CodeGen/MachinePipeliner.cpp
The file was modifiedllvm/lib/ObjectYAML/COFFEmitter.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
The file was modifiedllvm/lib/ProfileData/InstrProf.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonCommonGEP.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
The file was modifiedllvm/lib/Object/ELFObjectFile.cpp
The file was modifiedllvm/lib/Passes/StandardInstrumentations.cpp
Commit 8d474f1d157530577f06ce3ef9187e1aaf31a59e by benny.kra
[mlir] Handle an edge case when folding reshapes with multiple trailing 1 dimensions

We would exit early and miss this case.

Differential Revision: https://reviews.llvm.org/D114711
The file was modifiedmlir/lib/Dialect/Utils/ReshapeOpsUtils.cpp
The file was modifiedmlir/test/Dialect/Linalg/canonicalize.mlir
Commit 34d02fada28753221eda576e2f651f9b23c3f1af by zequanwu
[LLDB][NativePDB] fix find-functions.cpp failure on windows bots
The file was modifiedlldb/test/Shell/SymbolFile/NativePDB/find-functions.cpp
Commit 23dc886226306d961c31987db9aad137a69ad539 by wanyu9511
[NFC][AIX]Disable unsupported hip test on AIX

AIX doesn't support GPU. There is no point testing HIP on it.

Reviewed By: Jake-Egan

Differential Revision: https://reviews.llvm.org/D114484
The file was modifiedclang/test/Driver/hip-version.hip
Commit a8278a747ddf9e56262dafddd7c03e29cd85d074 by Louis Dionne
[libc++] Fix incorrect REQUIRES on a locale-dependent test

The test doesn't depend specifically on the en_US.UTF-8 locale, instead
it depends on whether localization support exists, period.

Differential Revision: https://reviews.llvm.org/D114708
The file was modifiedlibcxx/test/libcxx/iterators/iterator.requirements/iterator.assoc.types/iterator.traits/locale_dependent.compile.pass.cpp
Commit 6c27d389c8a00040aad998fe959f38ba709a8750 by Matthew.Arsenault
OpenMP: Start calling setTargetAttributes for generated kernels

This wasn't setting any of the attributes the target would expect to
emit for kernels.
The file was addedclang/test/OpenMP/amdgcn-attributes.cpp
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
Commit fe270ab061fa1200d1f7e121ac6671f7d24b73d6 by zequanwu
[LLDB][NativePDB] fix find-functions.cpp failure on windows bots (2)
The file was modifiedlldb/test/Shell/SymbolFile/NativePDB/find-functions.cpp
Commit df0560ca00182364e0a786d35adb294c3c98dbd0 by Anshil.Gandhi
[HIP] Add atomic load, atomic store and atomic cmpxchng_weak builtin support in HIP-clang

Introduce `__hip_atomic_load`, `__hip_atomic_store` and `__hip_atomic_compare_exchange_weak`
builtins in HIP.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D114553
The file was addedclang/test/SemaCUDA/atomic-ops.cu
The file was modifiedclang/lib/AST/StmtPrinter.cpp
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/include/clang/AST/Expr.h
The file was modifiedclang/lib/CodeGen/CGAtomic.cpp
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/test/CodeGenCUDA/atomic-ops.cu
The file was modifiedclang/include/clang/Basic/Builtins.def
Commit 3c32c568844c745e3fe7fa72ce3aa65340e545bc by wanyu9511
[NFC][clang]Increase the number of driver diagnostics

We're close to hitting the limited number of driver diagnostics, increase `DIAG_SIZE_DRIVER` to accommodate more.

Reviewed By: erichkeane

Differential Revision: https://reviews.llvm.org/D114615
The file was modifiedclang/include/clang/Basic/DiagnosticIDs.h
Commit 5c6b9e1622b10a543ea4210996d2732a6e5183da by Stanislav.Mekhanoshin
[InstCombine] (~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) & (c | (b ^ a)))

```
----------------------------------------
define i3 @src(i3 %a, i3 %b, i3 %c) {
%0:
  %or1 = or i3 %b, %c
  %not1 = xor i3 %or1, 7
  %and1 = and i3 %a, %not1
  %xor1 = xor i3 %b, %c
  %or2 = or i3 %xor1, %a
  %not2 = xor i3 %or2, 7
  %or3 = or i3 %and1, %not2
  ret i3 %or3
}
=>
define i3 @tgt(i3 %a, i3 %b, i3 %c) {
%0:
  %obc = or i3 %b, %c
  %xbc = xor i3 %b, %c
  %o = or i3 %a, %xbc
  %and = and i3 %obc, %o
  %r = xor i3 %and, 7
  ret i3 %r
}
Transformation seems to be correct!
```

Differential Revision: https://reviews.llvm.org/D112955
The file was modifiedllvm/test/Transforms/InstCombine/and-xor-or.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit 142044a0b52f767c11a74aee827c3cf598a68138 by spatel
[InstCombine] add tests for or with mul operand; NFC
The file was modifiedllvm/test/Transforms/InstCombine/or.ll
Commit eee035235ebd76b0e1b62f6dec989874a3102233 by nikita.ppv
[LICM] Regenerate test checks (NFC)
The file was modifiedllvm/test/Transforms/LICM/scalar-promote-memmodel.ll
The file was modifiedllvm/test/Transforms/LICM/scalar-promote.ll
Commit 52668355f481c25131be7a1b4e3498ddf3b0f6d2 by ajcbik
[mlir][sparse] some leftover cleanup from migration to bufferization dialect

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D114730
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
Commit 25eb7fa01d7ebbe67648ea03841cda55b4239ab2 by Matthew.Arsenault
Revert "OpenMP: Start calling setTargetAttributes for generated kernels"

This reverts commit 6c27d389c8a00040aad998fe959f38ba709a8750.

This is failing on the buildbots
The file was removedclang/test/OpenMP/amdgcn-attributes.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
Commit 32815bc907c4bf25866545da93b00b5d6c2ce45f by jeremy.morse
[DebugInfo][InstrRef][NFC] Test changes: DBG_VALUE to DBG_INSTR_REF

This patch contains a bunch of replacements of:

    DBG_VALUE $somereg

with,

    SOMEINST debug-instr-number1
    DBG_INSTR_REF 1, 0, ...

It's mostly SelectionDAG tests that are making sure that the variable
location assignment is placed in the correct position in the instructions.

To avoid a loss in test coverage of SelectionDAG, which is used by a lot
of different backends, all these tests now have two modes and sets of RUN
lines, one for DBG_VALUE mode, the other for instruction referencing.

Differential Revision: https://reviews.llvm.org/D114258
The file was modifiedllvm/test/DebugInfo/X86/pr40427.ll
The file was modifiedllvm/test/DebugInfo/X86/sdag-dbgvalue-ssareg.ll
The file was modifiedllvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-2.ll
The file was modifiedllvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-4.ll
The file was modifiedllvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-1.ll
The file was modifiedllvm/test/DebugInfo/X86/sdag-salvage-add.ll
The file was modifiedllvm/test/DebugInfo/X86/sdag-transfer-dbgvalue.ll
The file was modifiedllvm/test/DebugInfo/X86/pr34545.ll
The file was modifiedllvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
The file was modifiedllvm/test/DebugInfo/X86/sdag-ir-salvage.ll
The file was modifiedllvm/test/DebugInfo/X86/sdag-dbgvalue-phi-use-3.ll
Commit 4f215bfa6ee525b245b81462d75c3e1e47d18f13 by Adrian Prantl
Update unit test API usage (NFC)
The file was modifiedlldb/unittests/Platform/PlatformAppleSimulatorTest.cpp
Commit 935abeaace123e5f11792a5175079d974d0a0be8 by Matthew.Arsenault
OpenMP: Correctly query location for amdgpu-arch

This was trying to figure out the build path for amdgpu-arch, and
making assumptions about where it is which were not working on my
system. Whether a standalone build or not, we should have a proper
imported target to get the location from.
The file was modifiedopenmp/libomptarget/plugins/amdgpu/CMakeLists.txt
Commit 410d276400a9ee2440387d372db6b0f112853cc0 by david.green
[DAG] Add tests for fpsti.sat for various architectures. NFC
The file was addedllvm/test/CodeGen/RISCV/fpclamptosat_vec.ll
The file was addedllvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
The file was addedllvm/test/CodeGen/WebAssembly/fpclamptosat_vec.ll
The file was addedllvm/test/CodeGen/WebAssembly/fpclamptosat.ll
The file was addedllvm/test/CodeGen/ARM/fpclamptosat_vec.ll
The file was addedllvm/test/CodeGen/X86/fpclamptosat_vec.ll
The file was addedllvm/test/CodeGen/AArch64/fpclamptosat.ll
The file was addedllvm/test/CodeGen/RISCV/fpclamptosat.ll
The file was addedllvm/test/CodeGen/X86/fpclamptosat.ll
Commit 9cf31b8d39d67843eeb314bacf6f78a1c969e1cc by jeremy.morse
[DebugInfo][InstrRef] Preserve properties of restored variables

InstrRefBasedLDV observes when variable locations are clobbered, scans what
values are available in the machine, and re-issues a DBG_VALUE for the
variable if it can find another location. Unfortunately, I hadn't joined up
the Indirectness flag, so if it did this to an Indirect Value, the
indirectness would be dropped.

Fix this, and add a test that if we clobber a variable value (on the stack
in this case), then the recovered variable location keeps the Indirect
flag.

Differential Revision: https://reviews.llvm.org/D114378
The file was addedllvm/test/DebugInfo/MIR/InstrRef/restore-clobber-with-indirectness.mir
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
Commit 99f8b795cc03f9bcda7f9cbd9625c2976ae62bd5 by spatel
[InstCombine] try to fold 'or' into 'mul' operand

or (mul X, Y), X --> mul X, (add Y, 1) (when the multiply has no common bits with X)

We already have this fold if the pattern ends in 'add', but we can miss it if the
'add' becomes 'or' via another no-common-bits transform.

This is part of fixing:
http://llvm.org/PR49055
...but it won't make a difference on that example yet.

https://alive2.llvm.org/ce/z/Vrmoeb

Differential Revision: https://reviews.llvm.org/D114729
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
The file was modifiedllvm/test/Transforms/InstCombine/or.ll
Commit 1ce51a5f355ffba72b01e5e688cda7bbba2aa282 by i
[ELF] --cref: If -Map is specified, print to the map file

PR48282: This behavior matches GNU ld and gold.

Reviewed By: markj

Differential Revision: https://reviews.llvm.org/D114663
The file was modifiedlld/test/ELF/cref.s
The file was modifiedlld/ELF/MapFile.h
The file was modifiedlld/docs/ReleaseNotes.rst
The file was modifiedlld/ELF/MapFile.cpp
The file was modifiedlld/ELF/Writer.cpp
The file was modifiedlld/docs/ld.lld.1
The file was modifiedlld/ELF/Options.td
Commit 829b62adf5db189843b9a9ce626dfef97f76059f by listmail
[unroll] Split full exact and full bound unroll costing [NFC]

This change should be NFC. It's posted for review mostly to make sure others are happy with the names I'm introducing for "exact full unroll" and "bounded full unroll". The motivation here is that our cost model for bounded unrolling is too aggressive - it gives benefits for exits we aren't going to prune - but I also just think the new version of the code is a lot easier to follow.

Differential Revision: https://reviews.llvm.org/D114453
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
Commit a20987adf4f80e2657eb3032a5a91e13f58106a0 by jeremy.morse
[DebugInfo][InstrRef] Add indirection from dbg.declare in SelectionDAG

Usually dbg.declares get translated into either entries in an MF
side-table, or a DBG_VALUE on entry to the function with IsIndirect set
(including in instruction referencing mode). Much rarer is a dbg.declare
attached to a non-argument value, such as in the test added in this patch
where there's a variable-length-array. Such dbg.declares become SDDbgValue
nodes with InIndirect=true.

As it happens, we weren't correctly emitting DBG_INSTR_REFs with the
additional indirection. This patch adds the extra indirection, encoded as
adding an additional DW_OP_deref to the expression.

Differential Revision: https://reviews.llvm.org/D114440
The file was addedllvm/test/DebugInfo/X86/instr-ref-dbg-declare.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
Commit a655e0f991ba59f34fc24c44d04bbc56ff564c3e by listmail
[unroll] Reduce scope of UnrollFactor variable in computeUnrollCount [NFC]

Suggested in review of D114453, done as a separate change to get all uses at once.
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
Commit f50207c015df91132efe135fd64c3c5bb36c0909 by listmail
[unroll] Use early return in shouldPartialUnroll [nfc]
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
Commit fc9dae420c0c7f0f4667e0aa9f3d37d72b2a9906 by jeremy.morse
[DebugInfo][InstrRef][NFC] "Final" x86 test cleanup

These are some final test changes for using instruction referencing on X86:
* Most of these tests just have the flag switched so that they run with
   instr-ref, and just work: these tests were fixed by earlier patches.
* There are some spurious differences in textual outputs,
* A few have different temporary labels in the output because more
   MCSymbols are printed to the output.

Differential Revision: https://reviews.llvm.org/D114588
The file was modifiedllvm/test/DebugInfo/COFF/types-array-advanced.ll
The file was modifiedllvm/test/DebugInfo/MIR/X86/entry-value-of-modified-param.mir
The file was modifiedllvm/test/DebugInfo/X86/dbg-addr-dse.ll
The file was modifiedllvm/test/tools/llvm-locstats/locstats.ll
The file was modifiedllvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
The file was modifiedllvm/test/DebugInfo/COFF/fpo-shrink-wrap.ll
The file was modifiedllvm/test/DebugInfo/MIR/X86/kill-entry-value-after-diamond-bbs.mir
The file was modifiedllvm/test/DebugInfo/MIR/X86/live-debug-values-restore.mir
The file was modifiedllvm/test/DebugInfo/X86/sdag-split-arg.ll
The file was modifiedllvm/test/DebugInfo/X86/sdagsplit-1.ll
The file was modifiedllvm/test/DebugInfo/COFF/fpo-stack-protect.ll
The file was modifiedllvm/test/CodeGen/X86/fast-regalloc-live-out-debug-values.mir
The file was modifiedllvm/test/CodeGen/MIR/X86/diexpr-win32.mir
Commit 8906a0fe64abf1a9c8641ee51908bba7cbf8ec54 by listmail
[SCEVExpander] Drop poison generating flags when reusing instructions

The basic problem we have is that we're trying to reuse an instruction which is mapped to some SCEV. Since we can have multiple such instructions (potentially with different flags), this is analogous to our need to drop flags when performing CSE. A trivial implementation would simply drop flags on any instruction we decided to reuse, and that would be correct.

This patch is almost that trivial patch except that we preserve flags on the reused instruction when existing users would imply UB on overflow already. Adding new users can, at most, refine this program to one which doesn't execute UB which is valid.

In practice, this fixes two conceptual problems with the previous code: 1) a binop could have been canonicalized into a form with different opcode or operands, or 2) the inbounds GEP case which was simply unhandled.

On the test changes, most are pretty straight forward. We loose some flags (in some cases, they'd have been dropped on the next CSE pass anyways). The one that took me the longest to understand was the ashr-expansion test. What's happening there is that we're considering reuse of the mul, previously we disallowed it entirely, now we allow it with no flags. The surrounding diffs are all effects of generating the same mul with a different operand order, and then doing simple DCE.

The loss of the inbounds is unfortunate, but even there, we can recover most of those once we actually treat branch-on-poison as immediate UB.

Differential Revision: https://reviews.llvm.org/D112734
The file was modifiedllvm/test/Transforms/IndVarSimplify/lftr-address-space-pointers.ll
The file was modifiedllvm/test/Transforms/IRCE/non-loop-invariant-rhs-instr.ll
The file was modifiedllvm/test/Transforms/LoopPredication/basic.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/loop-rotation-vs-common-code-hoisting.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/lftr-reuse.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/ashr-expansion.ll
The file was modifiedllvm/test/CodeGen/PowerPC/common-chain.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/pr24783.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll
The file was modifiedllvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
The file was modifiedllvm/test/Transforms/LoopUnroll/runtime-loop-multiple-exits.ll
Commit 45ecfed6c636d06f76bca0a44803e945cdae9506 by listmail
[CVP] Remove ashr of -1 or 0

Fixes PR#52190. There is already a check for converting ashr instructions with non-negative left-hand sides into lshr; this patch adds an optimization to remove ashr altogether if the left-hand side is known to be in the range [-1, 1).

Differential Revision: https://reviews.llvm.org/D113835
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/ashr.ll
Commit 0eee844539e406dfa8010a129ea3655d2298ac10 by jeremy.morse
[DebugInfo][InstrRef] Terminate overlapping variable fragments

If we have a variable where its fragments are split into overlapping
segments:

    DBG_VALUE $ax, $noreg, !123, !DIExpression(DW_OP_LLVM_fragment_0, 16)
    ...
    DBG_VALUE $eax, $noreg, !123, !DIExpression(DW_OP_LLVM_fragment_0, 32)

we should only propagate the most recently assigned fragment out of a
block. LiveDebugValues only deals with live-in variable locations, as
overlaps within blocks is DbgEntityHistoryCalculators domain.

InstrRefBasedLDV has kept the accumulateFragmentMap method from
VarLocBasedLDV, we just need it to recognise DBG_INSTR_REFs. Once it's
produced a mapping of variable / fragments to the overlapped variable /
fragments, VLocTracker uses it to identify when a debug instruction needs
to terminate the other parts it overlaps with. The test is updated for
some standard "InstrRef picks different registers" variation, and the
order of some unrelated DBG_VALUEs changes.

Differential Revision: https://reviews.llvm.org/D114603
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
The file was modifiedllvm/unittests/CodeGen/InstrRefLDVTest.cpp
The file was modifiedllvm/test/DebugInfo/MIR/X86/live-debug-values-fragments.mir
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
Commit c7aa358798e6330593fd5cc2ff4caf6bc15ba3c9 by mail
[clang-tidy] Fix pr48613: "llvm-header-guard uses a reserved identifier"

Fixes https://bugs.llvm.org/show_bug.cgi?id=48613.

llvm-header-guard is suggesting header guards with leading underscores
if the header file path begins with a '/' or similar special character.
Only reserved identifiers should begin with an underscore.

Differential Revision: https://reviews.llvm.org/D114149
The file was modifiedclang-tools-extra/clang-tidy/utils/HeaderGuard.cpp
The file was modifiedclang-tools-extra/unittests/clang-tidy/LLVMModuleTest.cpp
The file was modifiedclang-tools-extra/clang-tidy/utils/HeaderGuard.h
Commit 3ab150f6e44b99dea855024c48d0878eb55ae3d0 by jonathanchesterfield
[openmp][devicertl] Add a missing loader_uninitialized attribute
The file was modifiedopenmp/libomptarget/DeviceRTL/src/Debug.cpp
Commit 6f99e1aa58e3566fcce689bc986b7676e818c038 by contact
[lldb][NFC] Format lldb/include/lldb/Symbol/Type.h

Reviewed By: teemperor, JDevlieghere

Differential Revision: https://reviews.llvm.org/D113604

Signed-off-by: Luís Ferreira <contact@lsferreira.net>
The file was modifiedlldb/source/Symbol/Type.cpp
The file was modifiedlldb/include/lldb/Symbol/Type.h
Commit e8b8304d76ccefa9880bbb352d9f81f330ef1ea1 by mtrofin
[NFC][Regalloc] Split canEvictInterference into hint and general

There are 2 eviction queries. One is made by tryAssign, when it attempts to
free an interference occupying the hint of the candidate. The other is
during 'regular' interference resolution, where we scan over all
physical registers and try to see if we can evict live ranges in favor
of the candidate. We currently use the same logic in both cases, just
that the former never passes the cost to any subsequent query.
Technically, the 2 decisions could be implemented with different
policies.

This patch splits the 2.

RFC: https://lists.llvm.org/pipermail/llvm-dev/2021-November/153639.html

Differential Revision: https://reviews.llvm.org/D114019
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
Commit e63c799a767b0f682af62eba9d1d375c59e58627 by dblaikie
[Demangle] Add support for D simple single qualified names

    This patch adds support for simple single qualified names that includes
    internal mangled names and normal symbol names.

Differential Revision: https://reviews.llvm.org/D111415
The file was modifiedllvm/unittests/Demangle/DLangDemangleTest.cpp
The file was modifiedllvm/lib/Demangle/DLangDemangle.cpp
Commit 6e08abdc256bb9c2158ab5dbfa082a78faa3543a by dblaikie
[Demangle] Add support for multiple identifiers in D qualified names

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D114305
The file was modifiedllvm/unittests/Demangle/DLangDemangleTest.cpp
The file was modifiedllvm/lib/Demangle/DLangDemangle.cpp
Commit b779f02a1cb73bb3885e2059e418dfc1c16d25e2 by dblaikie
[Demangle] Add support for D anonymous symbols

    Anonymous symbols are represented by 0 in the mangled symbol. We should skip
    them in order to represent the demangled name correctly, otherwise demangled
    names like `demangle..anon` can happen.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D114307
The file was modifiedllvm/unittests/Demangle/DLangDemangleTest.cpp
The file was modifiedllvm/lib/Demangle/DLangDemangle.cpp
Commit 53dfa52546833d4c8443d976e67fef820ff54426 by Matthias Braun
Tests for D112754

Differential Revision: https://reviews.llvm.org/D113151
The file was addedllvm/test/CodeGen/X86/fold-masked-merge.ll
Commit 87ba99c263afd4c1c090c17eaf51089b1edbc280 by Matthias Braun
X86: Fold masked-merge when and-not is not available

Differential Revision: https://reviews.llvm.org/D112754
The file was modifiedllvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
The file was modifiedllvm/test/CodeGen/X86/or-lea.ll
The file was modifiedllvm/test/CodeGen/X86/fold-masked-merge.ll
Commit 7d4da4e1ab7f79e51db0d5c2a0f5ef1711122dd7 by ajcbik
[mlir][sparse] generalize sparse tensor output implementation

Moves sparse tensor output support forward by generalizing from injective
insertions only to include reductions. This revision accepts the case with all
parallel outer and all reduction inner loops, since that can be handled with
an injective insertion still. Next revision will allow the inner parallel loop
to move inward (but that will require "access pattern expansion" aka "workspace").

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D114399
The file was modifiedmlir/test/Dialect/SparseTensor/sparse_out.mlir
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
The file was modifiedmlir/lib/Dialect/SparseTensor/Utils/Merger.cpp
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/Utils/Merger.h
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_vector_ops.mlir
The file was addedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_reduction.mlir
Commit bd4c6a476fd037fb07a1c484f75d93ee40713d3d by dblaikie
Add missing header
The file was modifiedllvm/lib/Demangle/DLangDemangle.cpp
Commit 2e5c47eda14a547c21e57d869a1e51ffd9938289 by contact
Revert "[lldb][NFC] Format lldb/include/lldb/Symbol/Type.h"

This reverts commit 6f99e1aa58e3566fcce689bc986b7676e818c038.
The file was modifiedlldb/source/Symbol/Type.cpp
The file was modifiedlldb/include/lldb/Symbol/Type.h
Commit 25a7e4b9f7c60883c677a246641287744b0bb479 by Vitaly Buka
[sanitizer] Add Leb128 encoding/decoding

Reviewed By: dvyukov, kstoimenov

Differential Revision: https://reviews.llvm.org/D114464
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/CMakeLists.txt
The file was addedcompiler-rt/lib/sanitizer_common/sanitizer_leb128.h
The file was addedcompiler-rt/lib/sanitizer_common/tests/sanitizer_leb128_test.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/CMakeLists.txt
Commit fde937748b7def9f9d349b85bf9077f07a84b724 by mtrofin
[NFC] Header comment in X86RegisterBanks.td referred to Aarch64

Differential Revision: https://reviews.llvm.org/D114763
The file was modifiedllvm/lib/Target/X86/X86RegisterBanks.td
Commit 4ae2222e143b8541b6567f9852d9600a17cc9426 by kai.wang
[RISCV] Add a test case to show the bug in RISCVFrameLowering.

If the number of arguments is too large to use register passing, it
needs to occupy stack space to pass the arguments to the callee. There
are two scenarios. One is to reserve the space in prologue and the other
is to reserve the space before the function calls. When we need to
reserve the stack space before function calls, the stack pointer is
adjusted. Under the scenario, we should not use stack pointer to access
the stack objects. It looks like,

callseq_start  ->  sp = sp - reserved_space
//
// We should not use SP to access stack objects in this area.
//
call @foo
callseq_end    ->  sp = sp + reserved_space

Differential Revision: https://reviews.llvm.org/D114245
The file was addedllvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
Commit 9a88566537177df75af1fcde69e0626fed2b1145 by kai.wang
[RISCV] Fix a bug in RISCVFrameLowering.

When we have out-going arguments passing through stack and we do not
reserve the stack space in the prologue. Use BP to access stack objects
after adjusting the stack pointer before function calls.

callseq_start  ->  sp = sp - reserved_space
//
// Use FP to access fixed stack objects.
// Use BP to access non-fixed stack objects.
//
call @foo
callseq_end    ->  sp = sp + reserved_space

Differential Revision: https://reviews.llvm.org/D114246
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
Commit a06d3527563503f17794bf119ee471d0ca2669ca by Vitaly Buka
[NFC][sanitizer] Track progress of populating the block

In multi-threaded application concurrent StackStore::Store may
finish in order different from assigned Id. So we can't assume
that after we switch writing the next block the previous is done.

The workaround is to count exact number of uptr stored into the block,
including skipped tail/head which were not able to fit entire trace.

Depends on D114490.

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D114493
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stackdepot.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_stack_store_test.cpp
Commit b121d23a9cea711e832505c0b2495de6a51591c1 by craig.topper
[RISCV] Promote f16 log/pow/exp/sin/cos/etc. to f32 libcalls.

Prevents crashes or cannot select errors.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D113822
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/half-intrinsics.ll
Commit f1d8345a2ab3c343929212d1c62174cfaa46e71a by carrot
[TwoAddressInstructionPass] Create register mapping for registers with multiple uses in the current MBB

Currently we create register mappings for registers used only once in current
MBB. For registers with multiple uses, when all the uses are in the current MBB,
we can also create mappings for them similarly according to the last use.
For example

    %reg101 = ...
            = ... reg101
    %reg103 = ADD %reg101, %reg102

We can create mapping between %reg101 and %reg103.

Differential Revision: https://reviews.llvm.org/D113193
The file was modifiedllvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
The file was modifiedllvm/test/CodeGen/X86/umul_fix.ll
The file was modifiedllvm/test/CodeGen/X86/shift-combine.ll
The file was modifiedllvm/test/CodeGen/X86/shl-crash-on-legalize.ll
The file was modifiedllvm/test/CodeGen/Thumb/srem-seteq-illegal-types.ll
The file was modifiedllvm/test/CodeGen/X86/vselect-packss.ll
The file was modifiedllvm/test/CodeGen/X86/nontemporal-loads.ll
The file was modifiedllvm/test/CodeGen/ARM/fpclamptosat.ll
The file was modifiedllvm/test/CodeGen/X86/setcc-combine.ll
The file was modifiedllvm/test/CodeGen/X86/combine-bitselect.ll
The file was modifiedllvm/test/CodeGen/ARM/ssat.ll
The file was modifiedllvm/test/CodeGen/X86/lzcnt-cmp.ll
The file was modifiedllvm/test/CodeGen/X86/rem.ll
The file was modifiedllvm/test/CodeGen/X86/smul_fix.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-lshr-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
The file was modifiedllvm/test/CodeGen/X86/ctpop-combine.ll
The file was modifiedllvm/test/CodeGen/X86/umul_fix_sat.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-cmp-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-packus.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
The file was modifiedllvm/test/CodeGen/X86/fpclamptosat.ll
The file was modifiedllvm/test/CodeGen/SystemZ/int-div-01.ll
The file was modifiedllvm/test/CodeGen/X86/pmulh.ll
The file was modifiedllvm/test/CodeGen/X86/vector-narrow-binop.ll
The file was modifiedllvm/test/CodeGen/X86/omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-ssat.ll
The file was modifiedllvm/test/CodeGen/X86/smul_fix_sat.ll
The file was modifiedllvm/test/CodeGen/X86/uadd_sat.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fmul-fast.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-128.ll
The file was modifiedllvm/test/CodeGen/X86/vec_ctbits.ll
The file was modifiedllvm/lib/CodeGen/TwoAddressInstructionPass.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
The file was modifiedllvm/test/CodeGen/X86/64-bit-shift-by-32-minus-y.ll
The file was modifiedllvm/test/CodeGen/X86/haddsub-shuf.ll
The file was modifiedllvm/test/CodeGen/X86/sdiv_fix_sat.ll
The file was modifiedllvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
The file was modifiedllvm/test/CodeGen/X86/vec_umulo.ll
The file was modifiedllvm/test/CodeGen/X86/bypass-slow-division-32.ll
The file was modifiedllvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/X86/popcnt.ll
The file was modifiedllvm/test/CodeGen/X86/pull-binop-through-shift.ll
The file was modifiedllvm/test/CodeGen/X86/bmi2.ll
The file was modifiedllvm/test/CodeGen/X86/vector-popcnt-128.ll
The file was modifiedllvm/test/CodeGen/SystemZ/int-mul-08.ll
The file was modifiedllvm/test/CodeGen/X86/horizontal-sum.ll
The file was modifiedllvm/test/CodeGen/X86/vector-lzcnt-sub128.ll
The file was modifiedllvm/test/CodeGen/X86/combine-sdiv.ll
The file was modifiedllvm/test/CodeGen/X86/umul-with-overflow.ll
The file was modifiedllvm/test/CodeGen/X86/sse3-avx-addsub-2.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-ashr-128.ll
The file was modifiedllvm/test/CodeGen/X86/haddsub-3.ll
The file was modifiedllvm/test/CodeGen/X86/vector-ext-logic.ll
The file was modifiedllvm/test/CodeGen/X86/vector-tzcnt-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
The file was modifiedllvm/test/CodeGen/X86/bitreverse.ll
The file was modifiedllvm/test/CodeGen/X86/haddsub.ll
The file was modifiedllvm/test/CodeGen/X86/vector-bitreverse.ll
The file was modifiedllvm/test/CodeGen/X86/divide-by-constant.ll
The file was modifiedllvm/test/CodeGen/X86/uadd_sat_vec.ll
The file was modifiedllvm/test/CodeGen/X86/vector-lzcnt-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-popcnt-128-ult-ugt.ll
The file was modifiedllvm/test/CodeGen/ARM/usat.ll
The file was modifiedllvm/test/CodeGen/X86/slow-pmulld.ll
The file was modifiedllvm/test/CodeGen/SystemZ/int-div-03.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-fadd-fast.ll
The file was modifiedllvm/test/CodeGen/X86/atomic-unordered.ll
The file was modifiedllvm/test/CodeGen/X86/sat-add.ll
The file was modifiedllvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
The file was modifiedllvm/test/CodeGen/ARM/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/X86/8bit_cmov_of_trunc_promotion.ll
The file was modifiedllvm/test/CodeGen/X86/horizontal-reduce-fadd.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc-usat.ll
The file was modifiedllvm/test/CodeGen/SystemZ/int-div-04.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-128.ll
Commit 5297cbf04532f61fe18570982f4f2a3095d08c13 by Christudasan.Devadasan
[AMDGPU] Enable copy between VGPR and AGPR classes during regalloc

Greedy register allocator prefers to move a constrained
live range into a larger allocatable class over spilling
them. This patch defines the necessary superclasses for
vector registers. For subtargets that support copy between
VGPRs and AGPRs, the vector register spills during regalloc
now become just copies.

Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D109301
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-agpr.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/extend-phi-subrange-not-in-parent.mir
The file was addedllvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
Commit 0150645bf5ae0d55866e77d2bec5aad4e5226b7c by kyulee
[DebugInfo] Do not replace existing nodes from DICompileUnit

When creating a new DIBuilder with an existing DICompileUnit, load the
DINodes from the current DICompileUnit so they don't get overwritten.
This is done in the MachineOutliner pass, but it didn't change the CU so
the bug never appeared. We need this if we ever want to add DINodes to
the CU after it has been created, e.g., DIGlobalVariables.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D114556
The file was modifiedllvm/lib/IR/DIBuilder.cpp
The file was modifiedllvm/unittests/IR/IRBuilderTest.cpp
Commit a6e7d024a9ebda1564fd78b829c45169add80864 by stellaraccident
[mlir][python] Add pyi stub files to enable auto completion.

There is no completely automated facility for generating stubs that are both accurate and comprehensive for native modules. After some experimentation, I found that MyPy's stubgen does the best at generating correct stubs with a few caveats that are relatively easy to fix:
  * Some types resolve to cross module symbols incorrectly.
  * staticmethod and classmethod signatures seem to always be completely generic and need to be manually provided.
  * It does not generate an __all__ which, from testing, causes namespace pollution to be visible to IDE code completion.

As a first step, I did the following:
  * Ran `stubgen` for `_mlir.ir`, `_mlir.passmanager`, and `_mlirExecutionEngine`.
  * Manually looked for all instances where unnamed arguments were being emitted (i.e. as 'arg0', etc) and updated the C++ side to include names (and re-ran stubgen to get a good initial state).
  * Made/noted a few structural changes to each `pyi` file to make it minimally functional.
  * Added the `pyi` files to the CMake rules so they are installed and visible.

To test, I added a `.env` file to the root of the project with `PYTHONPATH=...` set as per instructions. Then reload the developer window (in VsCode) and verify that completion works for various changes to test cases.

There are still a number of overly generic signatures, but I want to check in this low-touch baseline before iterating on more ambiguous changes. This is already a big improvement.

Differential Revision: https://reviews.llvm.org/D114679
The file was modifiedmlir/lib/Bindings/Python/IRAttributes.cpp
The file was modifiedmlir/lib/Bindings/Python/MainModule.cpp
The file was modifiedmlir/lib/Bindings/Python/Pass.cpp
The file was modifiedmlir/lib/Bindings/Python/IRCore.cpp
The file was addedmlir/python/mlir/_mlir_libs/_mlir/ir.pyi
The file was modifiedmlir/lib/Bindings/Python/IRAffine.cpp
The file was addedmlir/python/mlir/_mlir_libs/_mlir/passmanager.pyi
The file was modifiedmlir/lib/Bindings/Python/IRModule.h
The file was addedmlir/python/mlir/_mlir_libs/_mlir/__init__.pyi
The file was modifiedmlir/lib/Bindings/Python/IRTypes.cpp
The file was modifiedmlir/python/CMakeLists.txt
The file was addedmlir/python/mlir/_mlir_libs/_mlirExecutionEngine.pyi
The file was modifiedmlir/lib/Bindings/Python/ExecutionEngineModule.cpp
Commit bdc3183742f1e996d58bdf23b91966e64ad5e9a3 by stellaraccident
[mlir][python] Implement more SymbolTable methods.

* set_symbol_name, get_symbol_name, set_visibility, get_visibility, replace_all_symbol_uses, walk_symbol_tables
* In integrations I've been doing, I've been reaching for all of these to do both general IR manipulation and module merging.
* I don't love the replace_all_symbol_uses underlying APIs since they necessitate SYMBOL_COUNT walks and have various sharp edges. I'm hoping that whatever emerges eventually for this can still retain this simple API as a one-shot.

Differential Revision: https://reviews.llvm.org/D114687
The file was modifiedmlir/lib/Bindings/Python/IRCore.cpp
The file was modifiedmlir/test/python/ir/operation.py
The file was addedmlir/test/python/ir/symbol_table.py
The file was modifiedmlir/lib/CAPI/IR/IR.cpp
The file was modifiedmlir/lib/Bindings/Python/IRModule.h
The file was modifiedmlir/python/mlir/_mlir_libs/_mlir/ir.pyi
The file was modifiedmlir/include/mlir-c/IR.h
Commit a88bb5b9fee5aee8c25cabad44a257175e384f52 by stellaraccident
[mlir][python] Audit and fix a lot of the Python pyi stubs.

* Classes that are still todo are marked with "# TODO: Auto-generated. Audit and fix."
* Those without this note have been cross-checked with C++ sources and most have been spot checked by hovering in VsCode.

Differential Revision: https://reviews.llvm.org/D114767
The file was modifiedmlir/python/mlir/_mlir_libs/_mlirExecutionEngine.pyi
The file was modifiedmlir/python/mlir/_mlir_libs/_mlir/passmanager.pyi
The file was modifiedmlir/python/mlir/_mlir_libs/_mlir/__init__.pyi
The file was modifiedmlir/python/mlir/_mlir_libs/_mlir/ir.pyi
Commit 42c15c7edf174fc7a45131a1b89ee816fada7633 by pengfei.wang
[X86][clang] Enable floating-point type for -mno-x87 option on 32-bits

We should match GCC's behavior which allows floating-point type for -mno-x87 option on 32-bits. https://godbolt.org/z/KrbhfWc9o

The previous block issues have partially been fixed by D112143.

Reviewed By: asavonic, nickdesaulniers

Differential Revision: https://reviews.llvm.org/D114162
The file was modifiedclang/test/Sema/x86-no-x87.cpp
The file was modifiedclang/lib/Basic/Targets/X86.cpp
Commit 5047e3a3ba92402b60c200201484b422cad8bea6 by i
[ELF] Move GOT/PLT relocation code closer. NFC
The file was modifiedlld/ELF/Relocations.cpp
Commit 5bbe50148f3b515c170be22209395b72890f5b8c by carlosgalvezp
[clang-tidy] Warn on functional C-style casts

The google-readability-casting check is meant to be on par
with cpplint's readability/casting check, according to the
documentation. However it currently does not diagnose
functional casts, like:

float x = 1.5F;
int y = int(x);

This is detected by cpplint, however, and the guidelines
are clear that such a cast is only allowed when the type
is a class type (constructor call):

> You may use cast formats like `T(x)` only when `T` is a class type.

Therefore, update the clang-tidy check to check this
case.

Differential Revision: https://reviews.llvm.org/D114427
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was modifiedclang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/google-readability-casting.cpp
Commit 89453ed6f2059b5cec576fc41914def713fe38f7 by ardb
[ARM] create new pseudo t2LDRLIT_ga_pcrel for stack guards

We can't use the existing pseudo ARM::tLDRLIT_ga_pcrel for loading the
stack guard for PIC code that references the GOT, since arm-pseudo may
expand this to the narrow tLDRpci rather than the wider t2LDRpci.

Create a new pseudo, t2LDRLIT_ga_pcrel, and expand it to t2LDRpci.

Fixes: https://bugs.chromium.org/p/chromium/issues/detail?id=1270361

Reviewed By: ardb

Differential Revision: https://reviews.llvm.org/D114762
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
The file was addedllvm/test/CodeGen/ARM/expand-pseudos.ll
The file was modifiedllvm/lib/Target/ARM/Thumb2InstrInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
Commit 8cd782487fe68082e57d24a576b77f529d77f96c by lebedev.ri
[X86][LoopVectorize] "Fix" `X86TTIImpl::getAddressComputationCost()`

We ask `TTI.getAddressComputationCost()` about the cost of computing vector address,
and then multiply it by the vector width. This doesn't make any sense,
it implies that we'd do a vector GEP and then scalarize the vector of pointers,
but there is no such thing in the vectorized IR, we perform scalar GEP's.

This is *especially* bad on X86, and was effectively prohibiting any scalarized
vectorization of gathers/scatters, because `X86TTIImpl::getAddressComputationCost()`
says that cost of vector address computation is `10` as compared to `1` for scalar.

The computed costs are similar to the ones with D111222+D111220,
but we end up without masked memory intrinsics that we'd then have to
expand later on, without much luck. (D111363)

Differential Revision: https://reviews.llvm.org/D111460
The file was modifiedllvm/test/Analysis/CostModel/X86/masked-interleaved-store-i16.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/scatter-i16-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/gather-i8-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-5.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/scatter-i32-with-i8-index.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/scatter-i64-with-i8-index.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/scatter-i8-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/masked-interleaved-load-i16.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/gather-i64-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/masked-scatter-i32-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/gather-i16-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/masked-scatter-i64-with-i8-index.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/gather-i32-with-i8-index.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit c2e08aba1afd5a69dbe74b03ce6f463d45102222 by wlei
[llvm-profgen] Compute and show profile density

AutoFDO performance is sensitive to profile density, i.e., the amount of samples in the profile relative to the program size, because profiles with insufficient samples could be inaccurate due to statistical noise and thus hurt AutoFDO performance. A previous investigation showed that AutoFDO performed better on MySQL with increased amount of samples. Therefore, we implement a profile-density computation feature to give hints about profile density to users and the compiler.

We define the density of a profile Prof as follows:

- For each function A in the profile, density(A) = total_samples(A) / sizeof(A).
- density(Prof) = min(density(A)) for all functions A that are warm (defined below).

A function is considered warm if its total-samples is within top N percent of the profile. For implementation, we reuse the `ProfileSummaryBuilder::getHotCountThreshold(..)` as threshold which can be set by percent(`--profile-summary-cutoff-hot`) or by value(`--profile-summary-hot-count`).

We also introduce `--hot-function-density-threshold` to set hot function density threshold and will give suggestion if profile density is below it which implies we should increase samples.

This also applies for CS profile with all profiles merged into base.

Reviewed By: hoy, wenlei

Differential Revision: https://reviews.llvm.org/D113781
The file was addedllvm/test/tools/llvm-profgen/profile-density.test
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.cpp
The file was addedllvm/test/tools/llvm-profgen/Inputs/profile-density-cs.raw.prof
The file was modifiedllvm/tools/llvm-profgen/ProfileGenerator.h
The file was addedllvm/test/tools/llvm-profgen/Inputs/profile-density.raw.prof
The file was modifiedllvm/tools/llvm-profgen/ProfiledBinary.h
Commit 7ba70d32736aef0c640b9d0e7b9081fc208c81c2 by markus.boeck02
[PR52549][clang-cl] Predefine _MSVC_EXECUTION_CHARACTER_SET

Since VS 2022 17.1 MSVC predefines _MSVC_EXECUTION_CHARACTER_SET to inform the users of the execution character set defined at compile time. The value the macro expands to is a Windows Code Page Identifier which are documented here: https://docs.microsoft.com/en-us/windows/win32/intl/code-page-identifiers

As clang currently only supports UTF-8 it is defined as 65001. If clang-cl were to support a different execution character set in the future we'd have to change the value.

Fixes https://bugs.llvm.org/show_bug.cgi?id=52549

Differential Revision: https://reviews.llvm.org/D114576
The file was modifiedclang/test/Preprocessor/init.c
The file was modifiedclang/lib/Basic/Targets/OSTargets.cpp
Commit 29d4230d6b528ebf14dcd5dc610ee0d937a23d51 by powerman1st
[RISCV] Decode vtype with reserved fields to raw immediate

This patch fixes a crash when doing "llvm-objdump -D --mattr=+experimental-v"
against an object file which happens to keep a word that can be decoded to
VSETVLI & VSETIVLI with reserved vlmul[2:0]=4. All vtype values with
reserved fields (vlmul[2:0]=4, vsew[2:0]=0b1xx, non-zero bits 8/9/10) are
printed to raw immediate.

Reviewed By: jhenderson, jrtc27, craig.topper

Differential Revision: https://reviews.llvm.org/D114581
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
The file was addedllvm/test/MC/RISCV/rvv/vsetvl-invalid.s
Commit 5188f55d32a9cd95c3cb668ab2d762ca4e0c8d6b by i
[ELF] Move ObjFile<ELFT>::{getLocalSymbols,getGlobalSymbols} to non-template ELFFileBase. NFC
The file was modifiedlld/ELF/InputFiles.h
The file was modifiedlld/ELF/InputFiles.cpp
Commit 0d0371f58ff0e4289bdff9ef70f7f6fb0277c3d0 by gysit
[mlir][OpDSL] Fix OpDSL tests after https://reviews.llvm.org/D114680.

Update the shapes of the convolution / pooling tests that where detected after enabling verification during printing (https://reviews.llvm.org/D114680). Also split the emit_structured_generic.py file that previously contained all tests into multiple separate files to simplify debugging.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D114731
The file was addedmlir/test/python/dialects/linalg/opdsl/emit_matmul.py
The file was addedmlir/test/python/dialects/linalg/opdsl/emit_convolution.py
The file was removedmlir/test/python/dialects/linalg/opdsl/emit_structured_generic.py
The file was addedmlir/test/python/dialects/linalg/opdsl/emit_pooling.py
The file was addedmlir/test/python/dialects/linalg/opdsl/emit_misc.py
Commit f89bb3c012b46a00eb31bb7a705a85993eb763e3 by pifon
[mlir] Move bufferization-related passes to `bufferization` dialect.

[RFC](https://llvm.discourse.group/t/rfc-dialect-for-bufferization-related-ops/4712)

Differential Revision: https://reviews.llvm.org/D114698
The file was addedmlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
The file was removedmlir/lib/Transforms/Bufferize.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Transforms/Passes.h
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was addedmlir/include/mlir/Dialect/Bufferization/Transforms/Bufferize.h
The file was addedmlir/include/mlir/Dialect/Bufferization/Transforms/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/FuncBufferize.cpp
The file was addedmlir/lib/Dialect/Bufferization/Transforms/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
The file was removedmlir/test/Transforms/finalizing-bufferize.mlir
The file was removedmlir/include/mlir/Transforms/Bufferize.h
The file was modifiedmlir/include/mlir/Transforms/Passes.h
The file was addedmlir/lib/Dialect/Bufferization/Transforms/BufferDeallocation.cpp
The file was modifiedmlir/lib/Dialect/SCF/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Transforms/PassDetail.h
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/ExpandOps.cpp
The file was modifiedmlir/lib/Dialect/Shape/Transforms/Bufferize.cpp
The file was addedmlir/lib/Dialect/Bufferization/Transforms/PassDetail.h
The file was addedmlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Arithmetic/Transforms/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt
The file was modifiedmlir/include/mlir/InitAllPasses.h
The file was modifiedmlir/lib/Dialect/Shape/Transforms/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Bufferization/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/include/mlir/Dialect/Arithmetic/Transforms/Passes.h
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/TensorConstantBufferize.cpp
The file was addedmlir/test/Dialect/Bufferization/Transforms/finalizing-bufferize.mlir
The file was modifiedmlir/lib/Transforms/CMakeLists.txt
The file was removedmlir/test/Transforms/buffer-deallocation.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/CMakeLists.txt
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Math/Transforms/PolynomialApproximation.cpp
The file was addedmlir/include/mlir/Dialect/Bufferization/Transforms/Passes.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/lib/Dialect/Arithmetic/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Arithmetic/Transforms/ExpandOps.cpp
The file was removedmlir/lib/Transforms/BufferDeallocation.cpp
The file was addedmlir/test/Dialect/Bufferization/Transforms/buffer-deallocation.mlir
The file was modifiedmlir/include/mlir/Dialect/Bufferization/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Tensor/Transforms/Passes.h
Commit 3356d8837e46a92446e4b9b0cbd6967e5f4e44ba by kadircet
[clangd] Make std symbol generation script python3 friendly

Differential Revision: https://reviews.llvm.org/D114723
The file was modifiedclang-tools-extra/clangd/include-mapping/gen_std.py
Commit ae1ea0bead75f4c7a4c965dfa40b5f3b78b60364 by julian.gross
[mlir] Decompose Bufferization Clone operation into Memref Alloc and Copy.

This patch introduces a new conversion to convert bufferization.clone operations
into a memref.alloc and a memref.copy operation. This transformation is needed to
transform all remaining clones which "survive" all previous transformations, before
a given program is lowered further (to LLVM e.g.). Otherwise, these operations
cannot be handled anymore and lead to compile errors.
See: https://llvm.discourse.group/t/bufferization-error-related-to-memref-clone/4665

Differential Revision: https://reviews.llvm.org/D114233
The file was modifiedmlir/include/mlir/Conversion/Passes.h
The file was addedmlir/lib/Conversion/BufferizationToMemRef/BufferizationToMemRef.cpp
The file was addedmlir/lib/Conversion/BufferizationToMemRef/CMakeLists.txt
The file was addedmlir/include/mlir/Conversion/BufferizationToMemRef/BufferizationToMemRef.h
The file was modifiedmlir/lib/Conversion/CMakeLists.txt
The file was addedmlir/test/Conversion/BufferizationToMemRef/bufferization-to-memref.mlir
The file was modifiedmlir/include/mlir/Conversion/Passes.td
Commit 5cff77c23f43130887b566dd0fe237e1c482e23b by zeno
[clang][ARM] PACBTI-M assembly support

Introduce assembly support for Armv8.1-M PACBTI extension. This is an optional
extension in v8.1-M.

There are 10 new system registers and 5 new instructions, all predicated on the
feature.

The attribute for llvm-mc is called "pacbti". For armclang, an architecture
extension also called "pacbti" was created.

This patch is part of a series that adds support for the PACBTI-M extension of
the Armv8.1-M architecture, as detailed here:

https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension

The PACBTI-M specification can be found in the Armv8-M Architecture Reference
Manual:

https://developer.arm.com/documentation/ddi0553/latest

The following people contributed to this patch:

- Victor Campos
- Ties Stuij

Reviewed By: labrinea

Differential Revision: https://reviews.llvm.org/D112420
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/lib/Target/ARM/ARMSystemRegister.td
The file was modifiedllvm/include/llvm/Support/ARMTargetParser.def
The file was modifiedllvm/include/llvm/Support/ARMTargetParser.h
The file was addedllvm/test/MC/ARM/armv8.1m-pacbti.s
The file was addedllvm/test/MC/ARM/implicit-it-generation-v8.s
The file was modifiedllvm/lib/Target/ARM/ARMPredicates.td
The file was modifiedllvm/test/CodeGen/Thumb/high-reg-clobber.mir
The file was addedllvm/test/MC/ARM/armv8.1m-pacbti-error.s
The file was modifiedllvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
The file was modifiedllvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
The file was addedllvm/test/MC/Disassembler/ARM/armv8.1m-pacbti.txt
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.h
The file was modifiedclang/test/Driver/armv8.1m.main.c
The file was modifiedllvm/lib/Target/ARM/ARM.td
The file was modifiedllvm/lib/Target/ARM/ARMRegisterInfo.td