Changes

Summary

  1. [analyzer][NFC] Introduce CallDescriptionSets (details)
  2. [analyzer][NFC] Introduce CallDescription::matches() in addition to isCalled() (details)
  3. [analyzer][NFC] Switch to using CallDescription::matches() instead of isCalled() (details)
  4. [analyzer][NFC] Demonstrate the use of CallDescriptionSet (details)
  5. [analyzer][NFC] CallDescription should own the qualified name parts (details)
  6. [analyzer][NFC] Consolidate the inner representation of CallDescriptions (details)
  7. [analyzer][NFC] Use enum for CallDescription flags (details)
  8. [analyzer][NFC] MaybeUInt -> MaybeCount (details)
  9. [DSE] Improve handling of `strncpy` in Dead Store Elimination (details)
  10. [SROA] Add new test cases to cover existing SROA behavior that structs will be scalarized. (details)
  11. [mlir][vector] Remove usage of shapecast to remove unit dim (details)
  12. [mlir][vector] NFC, move some vector patterns in a separate file (details)
  13. [openmp][amdgpu][nfc] Inline interop_hsa_get_kernel_info into only caller (details)
  14. [ELF] Support discarding .got.plt (details)
  15. [AMDGPU] Add an implicit use of M0 to all V_MOV_B32_indirect_read/write (details)
  16. [mlir][gpu] Extend shuffle op modes and add nvvm lowering (details)
  17. [MLIR][GPU] Run generic LLVM optimizations when serializing (on AMD) (details)
  18. [libc++] Avoid potential truncation warnings in std::abs test (details)
  19. [libc++] Fix some tests that were broken in the single-threaded configuration (details)
  20. [libc++] Fix feature test macro for __cpp_lib_to_chars (details)
  21. [clang][NFC] Inclusive terms: replace some uses of sanity in clang (details)
  22. [libc++] Test that our algorithms never copy a user-provided comparator. (details)
  23. [openmp][amdgpu][nfc] Simplify implicit args handling (details)
  24. DWARFVerifier: Simplify name lookups (details)
  25. NFC: Callout restriction on folding 0-result ops in documentation. (details)
  26. [MLIR][GPU] Make the path to ROCm a runtime option (details)
  27. Allow __attribute__((swift_attr)) in attribute push pragmas (details)
  28. [libc++][NFC] Add missing include in test (details)
  29. [PowerPC][NFC] Add a series of codegen tests for vector reductions. (details)
  30. [InstCombine] add/adjust tests for mask of sext i1; NFC (details)
  31. [Sema] fix nondeterminism in ASTContext::getDeducedTemplateSpecializationType (details)
  32. [mlir] Bug fix. Stream must outlive the pass manager. (details)
  33. [NFC][llvm] Inclusive language: remove instance of master from Thumb2SizeReduction.cpp (details)
  34. [MLIR][GPU] Link in device libraries during HSA compilation if needed (details)
  35. [InstrProf] Use i32 for GEP index from lowering llvm.instrprof.increment (details)
  36. [clangd] Avoid possible crash: apply configuration after binding methods (details)
  37. [NFC] Test commit, add whitespace to end-of-line (details)
  38. [hmaptool] Port to python3 (details)
  39. [GVN][NFC] Remove redundant check (details)
  40. [ORC][JITLink] Move JITDylib name into JITLinkDylib base class. (details)
  41. [AMDGPU] Do not generate ELF symbols for the local branch target labels (details)
  42. [llvm] Use range-based for loops (NFC) (details)
  43. [ORC] Make JITDylib::AsynchronousSymbolQuerySet private. (details)
  44. [X86] Add test case for pr52567. NFC (details)
  45. [X86] Don't combine (x86cmp (trunc (movmsk (bitcast X))), 0) if the truncate discards unknown bits. (details)
  46. [MLIR] Avoid creation of buggy affine maps while replacing dimension and symbol (details)
  47. [NFC][X86][MCA] Add forgotten test coverage for AVX512's VPMOVM2[BWDQ] / VPMOV[BWDQ]2M (details)
  48. [NFC][X86][Costmodel] Add AVX512DQ runlines to trunc.ll/extend.ll (details)
  49. compiler-rt: Use FreeBSD's elf_aux_info to detect AArch64 HW features (details)
  50. [Libomptarget] Remove undefined symbol in old runtime (details)
  51. [MLIR] Simplify Semi-affine expressions by rule based matching and replacing "expr - q * (expr floordiv q)" with  "expr mod q" expression. (details)
  52. [libc++] [test] Eliminate libcpp-no-noexcept-function-type and libcpp-no-structured-bindings. (details)
  53. [InstCombine] add tests for bitwise logic with bool op; NFC (details)
  54. [InstCombine] add folds for binop with sexted bool and constant operands (details)
  55. [VPlan] Wrap vector loop blocks in region. (details)
  56. [CVP] Add tests for implied conditions using urem (NFC) (details)
  57. [LVI] Support urem in implied conditions (details)
  58. [LVI] Drop requirement that modulus is constant (details)
  59. [clang-tidy] performance-unnecessary-copy-initialization: Correctly match the type name of the thisPointertype. (details)
  60. [DSE] Drop hasAnalyzableMemoryWrite() (NFCI) (details)
  61. [NFC][X86][Costmodel] Actually test +prefer-256-bit in replication-shuffle-related tests :( (details)
  62. [libc++] [doc] Mark some spaceship-related LWG issues as "Complete." (details)
  63. [libc++][NFC] Fix typo in ranges::iterator_t synopsis (details)
  64. [X86][FP16] Relax the pattern condition for VZEXT_MOVL to match more cases (details)
  65. [llvm] Use range-based for loops (NFC) (details)
  66. [ELF] Move getOutputSectionName from Writer.cpp to LinkerScript.cpp. NFC (details)
  67. [AArch64] Extra testing for sinking splats to various instructions. NFC (details)
  68. [ARM][ParallelDSP] Regenerate complex_dot_prod.ll test (details)
  69. [MLIR][NFC] Simplex::restoreRow: improve documentation (details)
  70. Add a best practice section on how to configure a fast builder (details)
  71. [PowerPC] Regenerate rlwinm2.ll test (details)
  72. [Thumb2] Regenerate ext + rot tests (details)
  73. [ARM] Regenerate sxt_rot.ll tests (details)
  74. [llvm] Use range-based for loops (NFC) (details)
  75. [CodeGen] Use llvm::is_contained (NFC) (details)
  76. [mlir] Move trait to InferTypeOpInterface (details)
  77. [mlir] Fix unused function warning (NFC) (details)
  78. [libc++] Implement P1272R4 (std::byteswap) (details)
  79. [gn build] Port 1dc62f2653f8 (details)
  80. [libc++][NFC] Sort includes in __ranges/concepts.h (details)
  81. NFC: clang-format lib/Transforms/Instrumentation/InstrProfiling.cpp (details)
  82. [llvm] Use range-based for loops (NFC) (details)
  83. [llvm] Use make_early_inc_range (NFC) (details)
  84. [RISCV] Generate pseudo instruction li (details)
  85. [ELF][NFC] Do not pass region name to expandMemoryRegion() (details)
  86. tsan: add another fork test (details)
  87. [C++20] [Coroutines] Warn for deprecated form 'for co_await' (details)
  88. Fix nits in clang-tidy's documentation (NFC) (details)
  89. [AArch64] Sink splat shuffles to lane index intrinsics (details)
  90. [clangd] IncludeCleaner: Mark possible expr resolutions as used (details)
  91. Add missing clang-tidy args in index.rst (NFC) (details)
  92. Fix various problems found by fuzzing. (details)
  93. [libc] Remove unused variable (details)
  94. [LV] Pre-commit test for D111846 (details)
  95. [MLIR][NFC] Simplex: remove repeated words in comment (details)
  96. [BPI] Look-up tables for non-loop branches. NFC. (details)
  97. [mlir][Vector] Add a vblendps-based impl for transpose8x8 (both intrin and inline_asm) (details)
  98. [mlir][linalg] Fix tile and fuse for outermost reduction. (details)
  99. [mlir] Fix unintentional mutation by VectorType/RankedTensorType::Builder dropDim (details)
  100. [LV] Drop integer poison-generating flags from instructions that need predication (details)
  101. [mlir][linalg] Add a tile and fuse on tensors pattern. (details)
  102. [mlir] Add InitializeNativeTargetAsmParser to ExecutionEngine. (details)
  103. [X86][TTI] Costmodel for AVX512DQ's VPMOVM2[DQ] / VPMOV[DQ]2M instructions (details)
  104. [X86][TTI] Finish costmodel for AVX512BW's VPMOVM2[BW] / VPMOV[BW]2M instructions (details)
  105. [DA][NFC] Update publication - add remarks (details)
  106. [AArch64][ARM] Add missing SVE/SVE2 features from Cortex-A710 (details)
  107. [mlir][linalg] Remove tile and fuse test pass (NFC). (details)
  108. Rename MlirExecutionEngine lookup to lookupPacked (details)
  109. [mlir][linalg] Always generate an extract/insert slice pair when tiling output tensors. (details)
  110. [mlir][linalg] Use getAsOpFoldResult in padding (NFC). (details)
  111. [lldb/test] Make it possible to run the mock gdb server on a single thread (details)
  112. [lldb] Fix [some] leaks in python bindings (details)
  113. [SCEV] Fix and validate ValueExprMap/ExprValueMap consistency (details)
  114. [MLIR] PresburgerSetTest: fix comment and add a test case (details)
  115. [libc] add memmove basic building blocks (details)
  116. Revert "[SCEV] Fix and validate ValueExprMap/ExprValueMap consistency" (details)
  117. tsan: disable instrumentation in runtime callbacks in tests (details)
  118. tsan: new runtime (v3) (details)
  119. [RISCV] Reverse the order of loading/storing callee-saved registers. (details)
  120. [NFC][llvm][Hexagon] Inclusive Terms remove uses of sanity in Hexagon taget (details)
  121. [SLP][NFC]Add a test that reveals the problem in the emission of (details)
  122. [Target] Use range-based for loops (NFC) (details)
  123. Use std::string::substr (NFC) (details)
  124. [Analyzer][Core] Simplify IntSym in SValBuilder (details)
  125. [libc++] Improve CMake include directory search. (details)
  126. [asm] Allow labels as operands in intel asm syntax (details)
  127. [asm] Merge EmitMSInlineAsmStr() and EmitGCCInlineAsmStr() (details)
  128. [libc++] [NFC] Mark P0858R0 as implemented (details)
  129. [libc++] Remove uses of printf in some test support headers (details)
  130. [flang] Predefine unit 0 connected to stderr (details)
  131. [runtimes] Do not force -stdlib=libc++ on Apple platforms (details)
  132. [mlir] support recursive types in type conversion infra (details)
  133. [mlir][vector] Fix TransferOpReduceRank for 0-D tensors (details)
  134. [hwasan] fix arguments to symbolizer. (details)
  135. [flang] Add -fno-automatic, refine IsSaved() (details)
  136. Revert "tsan: new runtime (v3)" (details)
  137. [libc++] Granularize the <random> header. NFCI. (details)
  138. [libc++] [P1614] Implement [cmp.alg]'s std::{strong,weak,partial}_order. (details)
  139. [gn build] Port 344cef6695e9 (details)
  140. [gn build] Port d8380ad977e9 (details)
  141. libfuzzer: Disable broken tests for arm (details)
  142. [libc++][NFC] Reformat comment about D68480 support (details)
  143. [libcxx][NFC] adds status entry for ranges algorithms (details)
  144. [libcxx][NFC] adds var-const@ as the owner for the uninitialised algos (details)
  145. [InstCombine] (~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) & (c | (b ^ a))) (details)
  146. [docs] Incorprate first round of feedback on D114325 (details)
  147. [lld-macho] Don't replace local personality symbol with LazySymbol (details)
  148. [HWASan] Remove -Wa,-mrelax-relocations=no flag. (details)
  149. Revert "[mlir][Vector] Add a vblendps-based impl for transpose8x8 (both intrin and inline_asm)" (details)
  150. [Driver] correct typo in FreeBSD 14 test (details)
  151. [InstCombine] move/add tests for binops with sext operand; NFC (details)
  152. [InstCombine] avoid 'tmp' usage in test files; NFC (details)
  153. [InstCombine] regenerate test checks; NFC (details)
  154. [mlir] Move AllocationOpInterface to Bufferize/IR/AllocationOpInterface.td. (details)
  155. [NFC][clang] Inclusive language: rename master variable to controller in debug-info tests (details)
  156. Revert "[mlir] Move AllocationOpInterface to Bufferize/IR/AllocationOpInterface.td." (details)
  157. [AMDGPU] Allow VOP3 source modifiers in fpow expansion (details)
  158. [NFC][llvm] Inclusive language: replace master with main in 2007-04-02-RegScavengerAssert.ll (details)
  159. [PowerPC] [Clang] Enable Intel intrinsics support on FreeBSD (details)
  160. [flang] Move IsCoarray() to fix shared library build (details)
  161. [compiler-rt] Explicitly set dependency on libcxx for MemProfUnitTest (details)
  162. [gn build] Port 8e2fd879e6f9 (details)
  163. [lldb] Load the fblldb module automatically (details)
  164. [formatters] Add a libstdcpp formatter for  for unordered_map, unordered_set, unordered_multimap, unordered_multiset (details)
  165. Revert "[lldb] Load the fblldb module automatically" (details)
  166. [HWASan] Move LTO test to separate file. (details)
  167. [ThreadPool] Support returning futures with results. (details)
  168. [llvm-diff] Implement diff of PHI nodes (details)
  169. [MLIR] Fix incorrect removal of source loop in loop fusion (details)
  170. [memprof] Remove the "Live on exit:" print for text format. (details)
  171. [mlir] FlatAffineConstraint parsing for unit tests (details)
  172. [Driver] Default to libc++ on FreeBSD (details)
  173. [mlir][memref] Fix expanded shape ops memref.cast folding with changed type (details)
  174. [ELF] Simplify a condition with config->copyRelocs. NFC (details)
  175. [openmp][amdgpu] Make plugin robust to presence of explicit implicit arguments (details)
  176. [MachO] Fix struct size assertion (details)
  177. [flang] Remove typo that affected complex namelist input (details)
  178. [InstCombine] Enable fold select into operand for FAdd,  FMul, FSub and FDiv. (details)
  179. [formatters] Add a formatter for libstdc++ optional (details)
  180. [flang] Correct the argument keyword for AIMAG(Z=...) (details)
  181. Attempt to fix e3dea5cf0e326366ab95a49d167fde8b0816e292 (details)
  182. [mlir][linalg][bufferize][NFC] Clean up headers and function visibility (details)
  183. [mlir][linalg][bufferize][NFC] Remove special casing of CallOps (details)
  184. [mlir][linalg][bufferize][NFC] Move helper function to op interface (details)
  185. [mlir][linalg][bufferize] Limited support for scf.execute_region (details)
  186. [llvm] Use range-based for loops (NFC) (details)
  187. [mlir] Refactoring a few Parser APIs (details)
  188. [mlir][Vector] Add a vblendps-based impl for transpose8x8 (both intrin and inline_asm) (details)
  189. [COFF] [ARM64] Create symbols with regular intervals for relocations against temporary symbols (details)
  190. [LLD] [COFF] Interpret the immediate in ARM64 adr/adrp relocations as signed 21 bit (details)
  191. [AArch64] [COFF] Move jump tables back to the readonly section (details)
  192. [LLD] [COFF] Omit section symbols and IMAGE_SYM_CLASS_LABEL from the PE symbol table (details)
  193. [ARM] Add an test for showing the incorrect aliasing info around masked loads/stores. NFC (details)
  194. [X86] Regenerate X86/vmaskmov-offset.ll check lines as per new mir format. NFC (details)
  195. [PowerPC] Implement more fusion types for Power10 (details)
  196. [SDAG] Use UnknownSize for masked load/store MMO size (details)
  197. Revert "Revert "[mlir] Move AllocationOpInterface to Bufferize/IR/AllocationOpInterface.td."" (details)
  198. [ThreadPool] Do not return shared futures. (details)
  199. [DSE][NFC] Introduce "doesn't overwrite" return code for isOverwrite (details)
  200. [clang-format] [PR52527] can join * with /* to form an outside of comment error C4138 (details)
  201. [clang-format] [NFC] build clang-format with -Wall (details)
  202. tsan: new runtime (v3) (details)
  203. [AMDGPU] Fix the name of a test case (details)
  204. [lldb] Fix lookup for global constants in namespaces (details)
  205. [fir] Set !fir.len_param_index conversion to unimplemented (details)
  206. [mlir][linalg][bufferize][NFC] Specify bufferize traversal in `bufferize` (details)
  207. [mlir][Vector] Thread 0-d vectors through ExtractElementOp. (details)
  208. [mlir][Vector] Thread 0-d vectors through InsertElementOp. (details)
  209. Revert "The _Float16 type is supported on x86 systems with SSE2 enabled." (details)
  210. [ARM] Expand rev.ll test with more triples. NFC (details)
  211. [libc++] Tidy up how %T and %t are created during configuration checks (details)
  212. [InstCombine] add tests for logical select; NFC (details)
  213. [InstCombine] enhance bitwise select matching (details)
  214. [PowerPC] Remove FreeBSD test in mm-malloc.c due to cross-compilation limitation (details)
  215. [HIP] Add HIP scope atomic operations (details)
  216. [Analyzer][Core] Better simplification in SimpleSValBuilder::evalBinOpNN (details)
  217. [VP] Canonicalize macros of VPIntrinsics.def (details)
  218. Fix warning due to default switch label (details)
  219. [NFC] Let Microsoft mangler accept GlobalDecl (details)
  220. [AMDGPU] Enable fneg and fabs divergence-driven instruction selection. (details)
  221. [PS4][TLI] Remove redundant line (details)
  222. [llvm] Use range-based for loops (NFC) (details)
  223. [lldb] Deflake TestTsanBasic.py (details)
  224. tsan: disable signal_sync2.cpp test on powerpc64 (details)
  225. [unroll] Use early return in shouldFullUnroll [nfc] (details)
  226. [HIP] Fix device stub name for Windows (details)
  227. profi - a flow-based profile inference algorithm: Part I (out of 3) (details)
  228. [unroll] Remove two dead variable assignments [nfc] (details)
  229. Revert "profi - a flow-based profile inference algorithm: Part I (out of 3)" (details)
  230. [LAA] Turn aggregate type check into assertion (NFCI). (details)
  231. [PowerPC] Add BCD add/sub/cmp builtins (details)
  232. [indvars] Fix lftr crash when preheader is terminated by switch (details)
  233. [compiler-rt/profile] Include __llvm_profile_get_magic in module signature (details)
  234. [llvm][NFC] Inclusive language: Reword replace uses of sanity in llvm/lib/Transform comments and asserts (details)
  235. [ELF] Support non-RAX/non-adjacent R_X86_64_GOTPC32_TLSDESC/R_X86_64_TLSDESC_CALL (details)
  236. [mlir][sparse] Moving integration tests that merely use the Python API (details)
  237. profi - a flow-based profile inference algorithm: Part I (out of 3) (details)
  238. [NFC][llvm] Inclusive language: remove instance of master in LiveRangeUtils.h (details)
  239. [gn build] Port 884b6dd31142 (details)
  240. [InstCombine] Add test cases for D114339; NFC (details)
  241. [mlir][Linalg] Add pad vectorization patterns into LinalgStrategyVectorize passes. (details)
  242. Revert "profi - a flow-based profile inference algorithm: Part I (out of 3)" (details)
  243. [gn build] Port 1392b654ff65 (details)
  244. [mlir][tosa] Separate tosa.transpose_conv decomposition and added stride support (details)
  245. [mlir][tosa] Materialize tosa.pad value and fold noop pads (details)
  246. [InstSimplify] add tests for xor logic fold; NFC (details)
  247. [NFC][sanitizer] Move StackStore::Allocated into cpp file (details)
  248. [NFC][sanitizer] Early return for empty StackTraces (details)
  249. [lldb] Move create_relative_symlink function up in CMake hierarchy (details)
  250. [NFC][sanitizer] Add StackStoreTest (details)
  251. [SampleFDO] Recompute BFI if the sample loader changes BPI (details)
  252. [NFC][sanitizer] Extract StackTraceHeader struct (details)
  253. [NFC][sanitizer] Make method const (details)
  254. [InstSimplify] fold xor logic of 2 variables (details)
  255. Improve optional formatter (details)
  256. Make some libstd++ formatters safer (details)
  257. [formatters] Capping size limitation avoidance for the libcxx and libcpp bitset data formatters. (details)
  258. Move dependency llvm:AllTargetsAsmParsers from Translation to ExecutionEngine. (details)
  259. [formatters] List and forward_list capping_size determination and application (details)
  260. Fix a48501150b9ef64fd61d24f8cef2645237facc44 (details)
  261. [LAA] Move visitPointers up in file (NFC). (details)
  262. PrologEpilogInserter: Use explicit control for scavenge slot placement (details)
  263. [PowerPC] Allow scalars for asm constraint "v" with VSX (details)
  264. [sanitizer] Add DenseMap::forEach (details)
  265. [NFC][sanitizer] Reuse forEach for operator== (details)
  266. [stack-safety] Check SCEV constraints at memory instructions. (details)
  267. [hwasan] support python3 in hwasan_sanitize (details)
  268. [mlir][spirv] Add math to OpenCL conversion (details)
  269. [AMDGPU] Remove a no-op check in the gfx90a hazard recognizer (details)
  270. [NFC][sanitizer] Test for b80affb8a149 (details)
  271. [NFC][sanitizer] Limit StackStore stack size/tag to 1 byte (details)
  272. [LLDB][NativePDB] Allow find functions by full names (details)
  273. Update fir.insert_on_range syntax to make the range more explicit (NFC) (details)
  274. Revert "Revert "Revert "Recommit "Revert "[CVP] processSwitch: Remove default case when switch cover all possible values.""""" (details)
  275. Revert "[Taildup] Don't tail-duplicate loop header with multiple successors as its latches" (details)
  276. [mlir][sparse] Adding wrappers for constantOverheadTypeEncoding (details)
  277. [MLIR] Remove duplicate `Pass` suffix from ViewOpGraph class name (details)
  278. Revert "tsan: new runtime (v3)" (details)
  279. Accept symmetric sparse matrix in Matrix Market Exchange Format. (details)
  280. [sanitizer] Fail instead of crash without real_pthread_create (details)
  281. [ELF] Support the "read-only" memory region attribute (details)
  282. [AMDGPU] Check for unneeded shift mask in shift PatFrags. (details)
  283. [sanitizer] Add Abs<T> (details)
  284. [clang-tidy] performance-unnecessary-copy-initialization: Fix false negative. (details)
  285. [mlir][scf] Canonicalize scf.while with unused results (details)
  286. [LoopVectorize] Add vector reduction support for fmuladd intrinsic (details)
  287. [LoopVectorize] Propagate fast-math flags for VPInstruction (details)
  288. [LoopVectorize] Print fast-math flags for VPReductionRecipe (details)
  289. [LoopVectorize][CostModel] Update cost model for fmuladd intrinsic (details)
  290. [lldb/gdb-remote] Remove more non-stop mode remnants (details)
  291. [llvm-reduce] Add parallel chunk processing. (details)
  292. [mlir][linalg][bufferize][NFC] Move tensor interface impl to new build target (details)
  293. [clang-format] NFC - recent changes caused clang-format to no longer be clang-formatted. (details)
  294. [ARM] Add fma and update fadd/fmul predicated select tests. NFC (details)
  295. tsan: extend mmap test (details)
  296. [ARM] Fold floating point select(binop) patterns (details)
  297. [DebugInfo][InstrRef] Avoid crash when values optimised out late in sdag (details)
  298. [NFC] Tidy up SelectionDAGBuilder::visitIntrinsicCall to use existing sdl debug loc (details)
  299. [mlir][linalg][bufferize][NFC] Move vector interface impl to new build target (details)
  300. [ARM] Fold (fadd x, (vselect c, y, -1.0)) into (vselect c, (fadd x, y), x) (details)
  301. [AMDGPU] Only allow implicit WQM in pixel shaders (details)
  302. [LLDB/test] lldbutil check_breakpoint() - check target instance (details)
  303. [AMDGPU] Only select VOP3 forms of VOP2 instructions (details)
  304. [AMDGPU] Implement widening multiplies with v_mad_i64_i32/v_mad_u64_u32 (details)
  305. [DAG] SimplifyDemandedBits - simplify rotl/rotr to shl/srl (details)
  306. [DebugInfo] Check both instr-ref and DBG_VALUE modes of sdag tests (details)
  307. Clean up clang-format tech debt. (details)
  308. sanitizer_common: remove SANITIZER_USE_MALLOC (details)
  309. tsan: add another fork deadlock test (details)
  310. [DebugInfo] Adjust x86 location-list tests for instruction referencing (details)
  311. [PowerPC] Provide XL-compatible vec_round implementation (details)
  312. [llvm-dwarfdump][Statistics] Handle LTO cases with cross CU referencing (details)
  313. [InstSimplify] add tests for xor logic; NFC (details)
  314. [InstSimplify] fold xor logic of 2 variables, part 2 (details)
  315. [X86] Add D113970 tests cases for or-lea with no common bits. (details)
  316. [X86] Add BMI test coverage for for or-lea with no common bits tests (details)
  317. [LV] Use patterns in some induction tests, to make more robust. (NFC) (details)
  318. Revert "[DAG] SimplifyDemandedBits - simplify rotl/rotr to shl/srl" (details)
  319. [AArch64][SVE] Recognize all ones mask during fixed mask generation (details)
  320. [VPlan] Remove unused VPInstruction constructor. (NFC) (details)
  321. [libc] Fix wrong type for load/store of Repeated elements (details)
  322. [X86][Costmodel] `getReplicationShuffleCost()`: promote 1 bit-wide elements to 32 bit when have AVX512DQ (details)
  323. [X86][MS] Add test cases to show wrong alignment in vector variable arguments. NFC (details)
  324. [lldb] Move GetSupportedArchitectureAtIndex to PlatformDarwin (details)
  325. Have yaml2obj describe all options in --help (details)
  326. [NFC][X86] Inclusive language: Rename master label in x86-shrink-wrapping.ll (details)
  327. [clang-tidy] Add unit tests for `DeclRefExprUtils`. (details)
  328. [gn build] Port 3b7244808405 (details)
  329. [LoopAccessAnalysis][SVE] Bail out for scalable vectors (details)
  330. [mlir][Vector] NFC - Apply some clangd suggested fixes. (details)
  331. tsan: lock internal allocator around fork (details)
  332. tsan: include internal allocator into deadlock detection (details)
  333. Fixed use of -o and -k in LLDB under Windows when statically compiled with vcruntime. (details)
  334. [clang][AST] Check context of record in structural equivalence. (details)
  335. [NFC][LAA] Precommit tests for forked pointers (details)
  336. [AArch64] Add regression test for D114354 (details)
  337. [DebugInfo] Reflect switched variable order from instruction referencing (details)
  338. [DebugInfo][InstrRef] Ignore SP clobbers on call instructions even more (details)
  339. [ASan] Moved __asan_test_only_reported_buggy_pointer to ReportGenericError, which is needed for shared optimzied callback tests. (details)
  340. [NFC][AIX]Disable precompiled module file tests on AIX (details)
  341. [mlir][Linalg] Remove alloc/dealloc pair as a callback. (details)
  342. [PowerPC] Add missed clang portion of c933c2eb3346 (details)
  343. Revert "[ThreadPool] Do not return shared futures." (details)
  344. [NFC][Clang][test] Inclusive language: Remove and rephrase uses of sanity test/check in clang/test (details)
  345. [mlir][linalg] Update failure conditions for padOperandToSmallestStaticBoundingBox. (details)
  346. Revert "[InstCombine] (~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) & (c | (b ^ a)))" (details)
  347. [mlir][linalg] Add makeComposedPadHighOp. (details)
  348. [NFC][clang]Inclusive language: remove remaining uses of sanity (details)
  349. [mlir][linalg] Simplify padding test (NFC). (details)
  350. [DebugInfo][InstrRef] Cope with win32 calls changing SP in LiveDebugValues (details)
  351. [LV] Use OrigLoop instead of induction to get function. (NFC) (details)
  352. cfi: fix more -Wformat warnings (details)
  353. Headers: exclude `#include_next <stdatomic.h>` on MSVC (details)
  354. [SLP]Improve analysis/emission of vector operands for alternate nodes. (details)
  355. Move some tests from instcombine to phase ordering. NFC. (details)
  356. [ConstraintElimination] Add additional tests. (details)
  357. [libc++] Fix two tests that were failing in freestanding mode (details)
  358. [libc++] Handle armv7m in two architecture dependent tests (details)
  359. [CVP] Add a cl::opt for canonicalization of signed relational comparisons (details)
  360. [libc++] Fix backdeployment annotations for std::filesystem (details)
  361. DWARFVerifier: Don't parse all units twice (details)
  362. [LLVM][NFC]Inclusive language: remove occurances of sanity check/test from llvm (details)
  363. [libc++] Value-initialize unique_ptr's deleter_type (details)
  364. [mlir][spirv] Change the return type for {Min|Max}VersionBase (details)
  365. Promote readability by factoring out creation of min/max operation. Remove unnecessary divisions. (details)
  366. [mlir][linalg][bufferize][NFC] Move arith interface impl to new build target (details)
  367. GlobalISel: remove assert that memcpy Src and Dst addrspace must be identical (details)
  368. [NFC] Improve debug message in getAsIntegerSet (details)
  369. [mlir][SCF] Fix off-by-one bug in affine analysis (details)
  370. [mlir][SCF] Further simplify affine maps during `for-loop-canonicalization` (details)
  371. [MLIR] Rename test/python/dialects/math.py -> math_dialect.py (details)
  372. [ELF] Remove unneeded DF_STATIC_TLS for EM_386 local-exec TLS (details)
  373. [ELF] Rename hasStaticTlsModel to hasTlsIe (details)
  374. [ELF] Emit DF_STATIC_TLS only for -shared (details)
  375. [lldb] Fix TestFileHandle.py (details)
  376. Revert "[clang][AST] Check context of record in structural equivalence." (details)
  377. [clang-format] [PR47936] AfterControlStatement: MultiLine breaks AllowShortFunctionsOnASingleLine (details)
  378. [mlir][interfaces] Add insideMutuallyExclusiveRegions helper (details)
  379. [mlir][spirv] Float atomics should not imply Shader (details)
  380. [clangd] Disable hicpp-invalid-access-moved inside clangd (details)
  381. [mlir][spirv] arith::RemSIOp OpenCL lowering (details)
  382. [clang][driver] Add -fplugin-arg- to pass arguments to plugins (details)
  383. Revert "[mlir][SCF] Further simplify affine maps during `for-loop-canonicalization`" (details)
  384. [mlir][linalg][bufferize][NFC] Move SCF interface impl to new build target (details)
  385. [SDAG] Allow Unknown sizes when refining MMO alignments. NFC (details)
  386. [clangd] Add ObjC method support to prepareCallHierarchy (details)
  387. [mlir][linalg] Add backward slice filtering in hoist padding. (details)
  388. [mlir][linalg] Limit hoist padding to constant paddings. (details)
  389. [mlir][linalg] Perform checks early in hoist padding. (details)
  390. [mlir][linalg] Cleanup hoisting test (NFC). (details)
  391. [mlir] Move memref.[tensor_load|buffer_cast|clone] to "bufferization" dialect. (details)
  392. [clang-format] [PR52595] clang-format does not recognize rvalue references to array (details)
  393. [clang-format]NFC improve the comment to match the code (details)
  394. [DAG] SimplifyDemandedBits - simplify rotl/rotr to shl/srl (REAPPLIED) (details)
  395. [lldb/gdb-remote] Remove initial pipe-draining workaround (details)
  396. [lldb/gdb-remote] Ignore spurious ACK packets (details)
  397. [clang-format] [C++20] [Module] clang-format couldn't recognize partitions (details)
  398. [clangd] Move IncludeCleaner tracer to the actual computation (details)
  399. [NFC][llvm] Inclusive language: reword uses of sanity test and check (details)
  400. [MLIR] [docs] Fix misguided examples in memref.subview operation. (details)
  401. Revert "[SLP]Improve analysis/emission of vector operands for alternate nodes." (details)
  402. [PowerPC/ Regenerate fp128-bitcast-after-operation test checks (details)
  403. Don't store nullptrs in mlir::FuncOp::getAll*Attrs' result (details)
  404. [clang][OpenMP][DebugInfo] Debug support for private variables inside an OpenMP task construct (details)
  405. [ARM] Add fptosi.sat variants of the fixed point vcvt tests. NFC (details)
  406. [DebugInfo][InstrRef] Track variable assignments in out-of-scope blocks (details)
  407. [llvm][ubsan] Inclusive language: replace use of blacklist HandleLLVMOptions.cmake but use old option name (details)
  408. [ARM] Convert fptoi.sat to fixed point multiply (details)
  409. tsan: enable -msse4 when compiling tests (details)
  410. tsan: add a test for vector memory accesses (details)
  411. tsan: add a benchmark for vector memory accesses (details)
  412. tsan: fix Java heap block begin in reports (details)
  413. tsan: fix another potential deadlock in fork (details)
  414. [libc++] Fix constraints for string_view's iterator/sentinel constructor (details)
  415. [libc++] Avoid overload resolution in path comparison operators (details)
  416. [llvm] Use range-based for loops (NFC) (details)
  417. [NFC][clang-tools-extra] Inclusive language: replace master with main (details)
  418. Revert "[ThreadPool] Support returning futures with results." (details)
  419. tsan: new runtime (v3) (details)
  420. [CMake] Add new cmake option to control adding comments in GenDAGISel (details)
  421. [libc++] Fix ssize test that made an assumption about ptrdiff_t being 'long' (details)
  422. [LLDB] Provide target specific directories to libclang (details)
  423. [NFC][llvm] Inclusive language: replace master with main in dbg-call-site-spilled-arg.mir (details)
  424. [PowerPC] Prevent the optimizer from producing wide vector types in IR. (details)
  425. [MLIR] NFC. Rename MLIR CAPI ExecutionEngine target for consistency (details)
  426. [NFC][compiler-rt] Inclusive language: replace master/slave with primary/secondary (details)
  427. [clang-format] NFC update LLVM overall clang-formatted status (details)
  428. [NFC][llvm] Inclusive language: replace master in llvm docs (details)
  429. [clang-format] Extend AllowShortBlocksOnASingleLine for else blocks (details)
  430. Recommit [ThreadPool] Support returning futures with results. (details)
  431. [AIX] Disable unsupported offloading gpu tests (details)
  432. [mlir][Vector] Support 0-D vectors in `VectorPrintOpConversion` (details)
  433. [ThreadPool] Use auto again for future with ENABLE_THREADS=Off. (details)
  434. [libunwind] Fix testing with sanitizers enabled (details)
  435. [DebugInfo][InstrRef] Avoid some quadratic behaviour in LiveDebugVariables (details)
  436. [NFC][flang] Inclusive language: remove instances of master (details)
  437. [NFC] Inclusive language: rename master flag to main flag (details)
  438. [clang][NFC] Inclusive terms: rename AccessDeclContextSanity to AccessDeclContextCheck (details)
  439. [DebugInfo][InstrRef] Add extra indirection for NRVO tests (details)
  440. [ELF] Simplify DynamicSection content computation. NFC (details)
  441. [ELF] Simplify GnuHashSection::write. NFC (details)
  442. [ELF] Remove redundant part.dynSymTab creation. NFC (details)
  443. Fix link to the other docs from the Bufferization dialect (details)
  444. [mlir][linalg][bufferize][NFC] Move Affine interface impl to new build target (details)
  445. [ELF] Rename OutputSection::sectionCommands to commands. NFC (details)
  446. [ELF] Make ExprValue smaller. NFC' (details)
  447. [mlir][linalg][bufferize][NFC] Extract func boundary bufferization (details)
  448. [mlir][linalg][bufferize][NFC] Allow returning arbitrary memrefs (details)
  449. [mlir][linalg][bufferize] Compose dialect-specific bufferization state (details)
  450. [mlir][linalg][bufferize][NFC] Pass BufferizationState to PostAnalysisStep (details)
  451. [NFC] Fix typo in 95875d246acb (details)
  452. [ELF] Rename BaseCommand to SectionCommand. NFC (details)
  453. [AMDGPU] Make vector superclasses allocatable (details)
  454. [llvm] Use range-based for loops (NFC) (details)
  455. tsan: check stack in atexit4.cpp test (details)
  456. tsan: add test for __cxa_atexit (details)
  457. tsan: add a test for on_exit (details)
  458. tsan: remember and print function that installed at_exit callbacks (details)
  459. [mlir][Vector] Minor formatting fixes in Vector.md (details)
  460. [clang][AST] Check context of record in structural equivalence. (details)
  461. [mlir][linalg] Simplify the hoist padding tests. (details)
  462. [CodeGen] Add scalable vector support for lowering of llvm.get.active.lane.mask (details)
  463. [clang] Change ordering of PreableCallbacks to make sure PP can be referenced in them (details)
  464. [ARM] Add some vctp from setcc tests. NFC (details)
  465. [clang] Fix crash on broken parameter declarators (details)
  466. [libcxx] Implement three-way comparison for std::reverse_iterator (details)
  467. [lldb] Fix 'memory write' to not allow specifying values when writing file contents (details)
  468. [DAG] SimplifyDemandedVectorElts - attempt to handle ADD(x,x) as single use (details)
  469. [ARM] Generate VCTP from SETCC (details)
  470. [AArch64][SVE] Generate ASRD instructions for power of 2 signed divides (details)
  471. [clang][deps] NFC: Remove else after early return (details)
  472. [clang][deps] NFC: Clean up wording (ignored vs minimized) (details)
  473. [LoopVectorize] When tail-folding, don't always predicate uniform loads (details)
  474. [GlobalISel] Fold or of shifts to funnel shift. (details)
  475. [AMDGPU] Add SIMemoryLegalizer comments to clarify bit usage (details)
  476. [libunwind][ARM] Handle end of stack during unwind (details)
  477. Defines new PDLInterp operations needed for multi-root matching in PDL. (details)
  478. [Docs] Removed /Zd flag still mentioned in documentation (details)
  479. [AArch64][SVEIntrinsicOpts] Fix: predicated SVE mul/fmul are not commutative (details)
  480. Introduced iterative bytecode execution. (details)
  481. Implementation of the root ordering algorithm (details)
  482. Multi-root PDL matching using upward traversals. (details)
  483. Added line numbers to the debug output of PDL bytecode. (details)
  484. [clang][deps] NFC: Extract function (details)
  485. [tsan] Relax atexit5.cpp a bit more so it's not as dependent on the standard library implementation (details)
  486. [PDL] fix unused variable warning in Release builds (details)
  487. Provide a definition for OperationPosition::kDown (details)
  488. [clangd] Record information about non self-contained headers in IncludeStructure (details)
  489. [mlir][linalg][bufferize][NFC] InsertSliceOp no-copy detection as PostAnalysis (details)
  490. [SCEV] Turn check in createSimpleAffineAddRec to assertion. (NFC) (details)
  491. [Bug 49018][lldb] Fix incorrect help text for 'memory write' command (details)
  492. [SLP][NFC]Add a test for gathered instructions in loop, NFC. (details)
  493. [mlir][OpenMP] Add support for SIMD modifier (details)
  494. [pstl] Fix incorrect usage of std::invoke_result (details)
  495. [SLP]Improve analysis/emission of vector operands for alternate nodes. (details)
  496. [clangd] IncludeCleaner: Attribute symbols from non self-contained headers to their parents (details)
  497. Revert "Reland "[lldb] Remove non address bits when looking up memory regions"" (details)
  498. [libc++] Add missing __format__ attributes (details)
  499. [libc++] Properly handle errors happening during Lit configuration (details)
  500. [LLVM][llvm-cov] Inclusive language: rename option -name-whitelist to -name-allowlist (details)
  501. [MLIR] Simplex::pivot: also update the redundant rows when pivoting (details)
  502. [Target] Use range-based for loops (NFC) (details)
  503. [libc] Make string entrypoints mutualy exclusive. (details)
  504. [llvm-cov][NFC] Add missing character to fix docs buildbot break. (details)
  505. [MLIR] Simplex: fix a bug when rolling back a Simplex with no solutions (details)
  506. [mlir][Standard] Support 0-D vectors in `SplatOp` (details)
  507. [mlir][Vector] Support 0-D vectors in `BroadcastOp` (details)
  508. [libc++] Trigger rebuild of the Docker image so we get a new nightly Clang (details)
  509. [MLIR] Allow `Idempotent` trait to be applied to binary ops. (details)
  510. [DAG] Pull out repeated isLittleEndian() calls. NFC. (details)
  511. [ELF] Rename fetch to extract (details)
  512. [MLIR] Prevent creation of buggy affine map after linearizing collapsed dimensions of source map (details)
  513. [MLIR] Avoid creation of buggy affine maps when incorrect values of number of dimensions and number of symbols are provided. (details)
  514. [ELF][PPC64] Make --power10-stubs/--no-power10-stubs proper aliases for --power10-stubs={auto,no} (details)
  515. [SCEV] Fix and validate ValueExprMap/ExprValueMap consistency (details)
  516. [DAG] Restore dropped condition (details)
  517. [mlir] Fix a warning (details)
  518. [flang] Fix reversed comparison in RESHAPE() runtime (details)
  519. [InstSimplify] baseline tests for icmp of lshr/udiv fold (NFC) (details)
  520. Revert "[SCEV] Fix and validate ValueExprMap/ExprValueMap consistency" (details)
  521. [compiler-rt][CMake] Support powerpc32 on Linux (details)
  522. [compiler-rt][CMake] Support powerpcspe build (details)
  523. [InstSimplify] Fold X {lshr,udiv} C <u X --> true for nonzero X, non-identity C (details)
  524. [sanitizer] Switch StackStore to 8 MiB blocks (details)
  525. [ELF] Simplify Symbol::extract. NFC (details)
  526. [libcxx][NFC] Add tests for associative containers key_comp and value_comp (details)
  527. [ELF][test] Test that .o definition does not inherit .so STV_PROTECTED (details)
  528. Fixed broken build under GCC 5.4. (details)
  529. [Target] Use range-based for loops (NFC) (details)
  530. [RISCV] Emit DWARF location expression for RVV stack objects. (details)
  531. [test] Use -passes syntax when specifying pipeline in some more tests (details)
  532. [test] Use -passes in lit tests for the UpdateTestChecks tool (details)
  533. [test] Use -passes syntax in Feature/OperandBundles lit tests (details)
  534. [ARM] implement support for ALU/LDR PC-relative group relocations (details)
  535. Reland [SCEV] Fix and validate ValueExprMap/ExprValueMap consistency (details)
  536. [NVPTX][AsmPrinter] Avoid removing globals before calling AsmPrinter::doFinalization() (details)
  537. [DSE] Optimize defining access of defs while walking upwards. (details)
  538. [ARM] Extra testing for v2i1 types. NFC (details)
  539. [SCEV] Simplify invalidation after BE count calculation (NFCI) (details)
  540. [SCEV] Simplify forgetSymbolicName() (NFCI) (details)
  541. [DwarfCompileUnit] Set parent DIE right after creating a local entity (details)
  542. [PowerPC] Regenerate ppc64-P9-vabsd.ll tests (details)
  543. [ARM] Fold away unnecessary CSET/CMPZ (details)
  544. [Target] Use range-based for loops (NFC) (details)
  545. [ARM] CSINC/CSINV patterns from CMOV (details)
  546. [mlir] Enable MLIRDialectUtilsTests (details)
  547. [sanitizer] Switch StackStore from pointers to 32bit IDs (details)
  548. NFC: Simplify sve-widen-phi.ll by unrolling once. (details)
  549. [LV] Fix incorrectly marking a pointer indvar as 'scalar'. (details)
  550. [sanitizer] Remove storeIds and use padding of StackDepotNode (details)
  551. [libc++][format] Adds formatting benchmarks. (details)
  552. [SCEV] Turn validity check in getExistingSCEV into assert (NFC). (details)
  553. [libc++] Remove support for Clang 9 and older. (details)
  554. [libc++] Add myself to the credits. (details)
  555. [InstCombine] reduce code duplication; NFC (details)
  556. [InstCombine] use decomposeBitTestICmp to make icmp (trunc X), C more consistent (details)
  557. [ARM] Add testing for various fptosi.sat patterns. NFC (details)
  558. [clang] Fix -Wreturn-type false positive in @try statements (details)
  559. [llvm] Use range-based for loops (NFC) (details)
  560. [LV] Move code from widenGEP to VPWidenGEPRecipe (NFC). (details)
  561. [ELF] Simplify assignFileOffsets. NFC (details)
  562. [ELF] -z separate-*: Use max-page-size instead of common-page-size for text/non-SHF_ALLOC transition and writeTrapInstr (details)
  563. [DSE] Use MapVector for IOLs (details)
  564. [AArch64] Avoid crashing on invalid -Wa,-march= values (details)
  565. [mlir] NFC - Move invalid.mlir tests to the proper dialects (details)
  566. [ELF] Simplify assignFileOffsets (details)
  567. [ELF] Fix out-of-bounds write in memset(&Out::first, ...) (details)
  568. [ELF] Simplify OutputSection::sectionIndex assignment. NFC (details)
  569. [ELF] Replace one make_unique from r316378 with a stack object. NFC (details)
  570. [Driver] Support PowerPC SPE musl dynamic linker name ld-musl-powerpc-sf.so.1 (details)
  571. [ELF] Inline InputSection::getOffset into callers and remove it. NFC (details)
  572. [ELF] Remove unneeded getOutputSectionVA. NFC (details)
  573. Compilation Database: Point Bazel users to a solution (details)
  574. [ELF] Simplify/remove LinkerScript::output and advance. NFC (details)
  575. [mlir][python] Normalize asm-printing IR behavior. (details)
  576. [llvm] Use range-based for loops (NFC) (details)
  577. test: add a lit configuration for Windows subdirectory (details)
  578. [ELF][test] --oformat binary: Check that SIZEOF_HEADERS==0 (details)
  579. [ELF] Support --oformat= beside Separate --oformat (details)
  580. [AIX] Disable empty.ll test using unsupported split dwarf (details)
  581. [ELF] Simplify/remove LinkerScript::switchTo. NFC (details)
  582. [ELF] Simplify some ctx->outSec with sec. NFC (details)
  583. [ELF] Decrease InputSectionBase::entsize to uint32_t (details)
  584. [analyzer][doc] Add user documenation for taint analysis (details)
  585. [ELF] Speed up/simplify removeUnusedSyntheticSections. NFC (details)
  586. [ELF] Avoid std::stable_partition which may allocate memory. NFC (details)
  587. [flang] Return true in IsSymplyContiguous for allocatables (details)
  588. [CodeGen][SVE] Use whilelo instruction when lowering @llvm.get.active.lane.mask (details)
  589. Fix cppcoreguidelines-virtual-base-class-destructor in macros (details)
  590. [libtooling][clang-tidy] Fix crashing on rendering invalid SourceRanges (details)
  591. [clang-tidy] Fix crashing altera-struct-pack-align on invalid RecordDecls (details)
  592. [clang-tidy] Ignore narrowing conversions in case of bitfields (details)
  593. [fir] Add base for runtime builder unittests (details)
  594. [LV] Move code from widenInstruction to VPWidenRecipe. (NFC) (details)
  595. [fir] Add fir transformational intrinsic builder (details)
  596. [fir] Add assignment runtime API builder (details)
  597. [analyzer][NFC] Refactor AnalysisConsumer::getModeForDecl() (details)
  598. [fir] Add data flow optimization pass (details)
  599. [X86][Costmodel] Now that `getReplicationShuffleCost()` is good, update `getInterleavedMemoryOpCostAVX512()` (details)
  600. [AArch64][SVE] Mark fixed-type FP extending/truncating loads/stores as custom (details)
  601. Use a deterministic order when updating the DominatorTree (details)
  602. fix typos in comments (details)
  603. [NFC][X86][LV][Costmodel] Add most basic test for masked interleaved load (details)
  604. Don't consider 'LinkageSpec' when calculating DeclContext 'Encloses' (details)
  605. [CodeGen][AArch64] Bail out in performConcatVectorsCombine for scalable vectors (details)
  606. [clang-format] regressed default behavior for operator parentheses (details)
  607. Reapply 'Implement target_clones multiversioning' (details)
  608. [mlir][memref] Fix bug in verification of memref.collapse_shape (details)
  609. [X86] Add vector test coverage for or with no common bits tests (details)
  610. [AMDGPU] Fix "must generated" typo in docs (details)
  611. [AMDGPU] Fix list indentation in docs (details)
  612. [AMDGPU][GlobalISel] Transform (fadd (fmul x, y), z) -> (fma x, y, z) (details)
  613. [AMDGPU][GlobalISel] Transform (fadd (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), z) (details)
  614. [AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fmul u, v)), z) -> (fma x, y, (fma u, v, z)) (details)
  615. [AMDGPU][GlobalISel] Transform (fadd (fma x, y, (fpext (fmul u, v))), z) -> (fma x, y, (fma (fpext u), (fpext v), z)) (details)
  616. [AMDGPU][GlobalISel] Transform (fsub (fmul x, y), z) -> (fma x, y, -z) (details)
  617. [AMDGPU][GlobalISel] Transform (fsub (fneg (fmul, x, y)), z) -> (fma (fneg x), y, (fneg z)) (details)
  618. [AMDGPU][GlobalISel] Transform (fsub (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), (fneg z)) (details)
  619. [AMDGPU][GlobalISel] Transform (fsub (fpext (fneg (fmul x, y))), z) -> (fneg (fma (fpext x), (fpext y), z)) (details)
  620. [X86][Costmodel] `getInterleavedMemoryOpCostAVX512()`: masked load can not be folded into a shuffle (details)
  621. [fir] Get rid of the global option in FIRBuilder (details)
  622. [HWASan] Disable LTO test on aarch64. (details)
  623. [SCEV] Remove incorrect assert (details)
  624. [InstCombine] Fold (~A | B) ^ A --> ~(A & B) (details)
  625. [llvm] Use range-based for loops (NFC) (details)
  626. [mlir] Handle an edge case when folding reshapes with multiple trailing 1 dimensions (details)
  627. [LLDB][NativePDB] fix find-functions.cpp failure on windows bots (details)
  628. [NFC][AIX]Disable unsupported hip test on AIX (details)
  629. [libc++] Fix incorrect REQUIRES on a locale-dependent test (details)
  630. OpenMP: Start calling setTargetAttributes for generated kernels (details)
  631. [LLDB][NativePDB] fix find-functions.cpp failure on windows bots (2) (details)
  632. [HIP] Add atomic load, atomic store and atomic cmpxchng_weak builtin support in HIP-clang (details)
  633. [NFC][clang]Increase the number of driver diagnostics (details)
  634. [InstCombine] (~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) & (c | (b ^ a))) (details)
  635. [InstCombine] add tests for or with mul operand; NFC (details)
  636. [LICM] Regenerate test checks (NFC) (details)
  637. [mlir][sparse] some leftover cleanup from migration to bufferization dialect (details)
  638. Revert "OpenMP: Start calling setTargetAttributes for generated kernels" (details)
  639. [DebugInfo][InstrRef][NFC] Test changes: DBG_VALUE to DBG_INSTR_REF (details)
  640. Update unit test API usage (NFC) (details)
  641. OpenMP: Correctly query location for amdgpu-arch (details)
  642. [DAG] Add tests for fpsti.sat for various architectures. NFC (details)
  643. [DebugInfo][InstrRef] Preserve properties of restored variables (details)
  644. [InstCombine] try to fold 'or' into 'mul' operand (details)
  645. [ELF] --cref: If -Map is specified, print to the map file (details)
  646. [unroll] Split full exact and full bound unroll costing [NFC] (details)
  647. [DebugInfo][InstrRef] Add indirection from dbg.declare in SelectionDAG (details)
  648. [unroll] Reduce scope of UnrollFactor variable in computeUnrollCount [NFC] (details)
  649. [unroll] Use early return in shouldPartialUnroll [nfc] (details)
  650. [DebugInfo][InstrRef][NFC] "Final" x86 test cleanup (details)
  651. [SCEVExpander] Drop poison generating flags when reusing instructions (details)
  652. [CVP] Remove ashr of -1 or 0 (details)
  653. [DebugInfo][InstrRef] Terminate overlapping variable fragments (details)
  654. [clang-tidy] Fix pr48613: "llvm-header-guard uses a reserved identifier" (details)
  655. [openmp][devicertl] Add a missing loader_uninitialized attribute (details)
  656. [lldb][NFC] Format lldb/include/lldb/Symbol/Type.h (details)
  657. [NFC][Regalloc] Split canEvictInterference into hint and general (details)
  658. [Demangle] Add support for D simple single qualified names (details)
  659. [Demangle] Add support for multiple identifiers in D qualified names (details)
  660. [Demangle] Add support for D anonymous symbols (details)
  661. Tests for D112754 (details)
  662. X86: Fold masked-merge when and-not is not available (details)
  663. [mlir][sparse] generalize sparse tensor output implementation (details)
  664. Add missing header (details)
  665. Revert "[lldb][NFC] Format lldb/include/lldb/Symbol/Type.h" (details)
  666. [sanitizer] Add Leb128 encoding/decoding (details)
  667. [NFC] Header comment in X86RegisterBanks.td referred to Aarch64 (details)
  668. [RISCV] Add a test case to show the bug in RISCVFrameLowering. (details)
  669. [RISCV] Fix a bug in RISCVFrameLowering. (details)
  670. [NFC][sanitizer] Track progress of populating the block (details)
  671. [RISCV] Promote f16 log/pow/exp/sin/cos/etc. to f32 libcalls. (details)
  672. [TwoAddressInstructionPass] Create register mapping for registers with multiple uses in the current MBB (details)
  673. [AMDGPU] Enable copy between VGPR and AGPR classes during regalloc (details)
  674. [DebugInfo] Do not replace existing nodes from DICompileUnit (details)
  675. [mlir][python] Add pyi stub files to enable auto completion. (details)
  676. [mlir][python] Implement more SymbolTable methods. (details)
  677. [mlir][python] Audit and fix a lot of the Python pyi stubs. (details)
  678. [X86][clang] Enable floating-point type for -mno-x87 option on 32-bits (details)
  679. [ELF] Move GOT/PLT relocation code closer. NFC (details)
  680. [clang-tidy] Warn on functional C-style casts (details)
  681. [ARM] create new pseudo t2LDRLIT_ga_pcrel for stack guards (details)
  682. [X86][LoopVectorize] "Fix" `X86TTIImpl::getAddressComputationCost()` (details)
  683. [llvm-profgen] Compute and show profile density (details)
  684. [PR52549][clang-cl] Predefine _MSVC_EXECUTION_CHARACTER_SET (details)
  685. [RISCV] Decode vtype with reserved fields to raw immediate (details)
  686. [ELF] Move ObjFile<ELFT>::{getLocalSymbols,getGlobalSymbols} to non-template ELFFileBase. NFC (details)
  687. [mlir][OpDSL] Fix OpDSL tests after https://reviews.llvm.org/D114680. (details)
  688. [mlir] Move bufferization-related passes to `bufferization` dialect. (details)
  689. [clangd] Make std symbol generation script python3 friendly (details)
  690. [mlir] Decompose Bufferization Clone operation into Memref Alloc and Copy. (details)
  691. [clang][ARM] PACBTI-M assembly support (details)
  692. [AMDGPU] Update docs for nontemporal store (details)
  693. [GlobalISel] Add matchers for constant splat. (details)
  694. [lldb] Remove 'extern "C"' from the lldb-swig-python interface (details)
  695. [Analyzer][solver] Do not remove the simplified symbol from the eq class (details)
  696. [Analyzer][Core] Make SValBuilder to better simplify svals with 3 symbols in the tree (details)
  697. [LV] Move code from widenSelectInstruction to VPWidenSelectRecipe. (NFC) (details)
  698. [DebugInfo][InstrRef] "final final" test cleanups for x86 tests (details)
  699. [libc] Add memmove benchmarks (details)
  700. [libc] Add a reasonably optimized version for bcmp (details)
  701. [libc++][ABI BREAK] Do not use the C++03 emulation for std::nullptr_t by default (details)
  702. [DAG] Create fptosi.sat from clamped fptosi (details)
  703. [DebugInfo][InstrRef] Avoid dropping fragment info during PHI elimination (details)
  704. [AMDGPU][NFC] Remove unused defvar in AMDGPUInstructions.td. (details)
  705. [DebugInfo][InstrRef][X86] Instrument expanded DYN_ALLOCAs (details)
  706. [mlir] Fix BufferizationToMemRef build. (details)
  707. [mlir] Add bazel build for BufferizationToMemRef. (details)
  708. [DebugInfo][InstrRef] Pre-land on-by-default-for-x86 changes (details)
  709. [fir] Add array value copy pass (details)
  710. [gn build] (semimanually) port 25a7e4b9f7c6 (details)
  711. [lldb] Inline Platform::LoadCachedExecutable into its (single) caller (details)
  712. [lldb] Introduce PlatformQemuUser (details)
  713. [X86] Add mulh test coverage for extension to illegal type (details)
  714. [DebugInfo] Turn instruction referencing on by default for x86 (details)
  715. [BuildLibCalls] Add memset_chk test. (details)
  716. [DSE] Add memset_chk tests. (details)
  717. Test commit (details)
  718. Revert "[DAG] Create fptosi.sat from clamped fptosi" (details)
  719. [clang][dataflow] Add base types for building dataflow analyses (details)
  720. [MC][ELF] Fix accepting abbreviated form with Type change (details)
  721. [fir] Add fir reduction builder (details)
  722. [lld-macho] Mark dylib symbols coming from -weak_framework as weak-ref. (details)
  723. [mlir][linalg] Run CSE after every CodegenStrategy transformation. (details)
  724. [OpenMP] Add RTL function to externalization RAII (details)
  725. [mlir][linalg] Fix windows build issue in hoist padding. (details)
  726. [DAG] Create fptosi.sat from clamped fptosi (details)
  727. [mlir][linalg] Use top down traversal for padding. (details)
  728. [clang][dataflow] Fix broken build in ClangStaticAnalyzer (details)
  729. [mlir][linalg] Support the empty anchor op string when padding. (details)
  730. [DSE] Use optimized access if available for redundant store elimination. (details)
  731. Use VersionTuple for parsing versions in Triple. This makes it possible to distinguish between "16" and "16.0" after parsing, which previously was not possible. (details)
  732. [mlir][linalg] Adapt the decompose patterns to use a filter (NFC). (details)
  733. [mlir][linalg] Add decompose to CodegenStrategy. (details)
  734. [fir] Remove unused fct recordTypeCanBeMemCopied (details)
  735. Revert "[fir] Add fir reduction builder" (details)
  736. Code quality: Combine V_RSQ (details)
  737. Fix file extension of alignment-assumption-ignorelist.cppp test (details)
  738. [LV] Remove unneeded cast to Operator [NFC] (details)
  739. [clang][dataflow] Make header parse (details)
  740. [PS4][DWARF] Explicitly set default DWARF version to 4 (details)
  741. [CSSPGO] Sorting nodes in a cycle of profiled call graph. (details)
  742. [JITLink][ELF] Add support for reading extended table (details)
  743. [JITLink][ELF] Don't skip sections of size 0 (details)
  744. [SCEV] Track and invalidate ValuesAtScopes users (details)
  745. [RegionPass] Added check for -filter-print-funcs option to the region IR dumps. (details)
  746. Revert "Use VersionTuple for parsing versions in Triple. This makes it possible to distinguish between "16" and "16.0" after parsing, which previously was not possible." (details)
  747. [SLP][NFC]Move static function to make it visible in member function, (details)
  748. [InstSimplify] add tests for 'or' logic folds; NFC (details)
  749. [InstSimplify] add tests for 'or' with logic ops; NFC (details)
  750. [InstSimplify] refactor 'or' logic folds; NFC (details)
  751. [InstSimplify] adjust tests for 'or' of logic ops; NFC (details)
  752. [InstSimplify] reduce code duplication for 'or' logic fold; NFC (details)
  753. [SLP]Improve isFixedVectorShuffle and its use. (details)
  754. Typo fix (details)
  755. [flang] Address TODO from previous changes to IsSaved() (details)
  756. [memprof] Extend llvm-profdata to display MemProf profile summaries. (details)
  757. [gn build] Port 7cca33b40f77 (details)
  758. [ELF] Change -z unknown from error to warning (details)
  759. [InstSimplify] make 'or' test names more descriptive; NFC (details)
  760. [InstSimplify] reduce code duplication for 'or' logic folds; NFC (details)
  761. [InstSimplify] add logic fold for 'or' (details)
  762. [lldb] Search PrivateFrameworks when using an internal SDK (details)
  763. [lldb] Fix indentation in builders/darwin.py (details)
  764. [ELF][PPC64] Remove unneeded PPC64PCRelLongBranchThunk (details)
  765. [memprof] Fix unit test build after refactoring shared header. (details)
  766. [libc][clang-tidy] fix namespace check for externals (details)
  767. fix inverted logic for HideUnrelatedOptions (details)
  768. [mlir][tosa] Add tosa.conv2d as fully_connected canonicalization (details)
  769. [memprof] Disable pedantic warnings, suppress variadic macro warning. (details)
  770. [NFC][Clang]Inclusive language: Replace uses of whitelist in clang/test (details)
  771. [clang][docs] Inclusive language: remove use of sanity check in option description (details)
  772. [SCEV] Verify integrity of ValuesAtScopes and users (NFC) (details)
  773. [memprof] Disallow memprof profile reader tests on non-x86 archs. (details)
  774. AArch64 GIsel: legalize lshr operands, even if it is poison (details)
  775. [mlir][MemRef] Fix SubViewOp canonicalization when a subset of unit-dims are dropped. (details)
  776. [mlir][tensor] InsertSliceOp verification. (details)
  777. [lldb] Mark TestTsanBasic and TestUbsanBasic as "no debug info" tests (details)
  778. [lldb] Fix TypeError: argument of type 'NoneType' is not iterable (details)
  779. [flang] Fix usage & catch errors for MAX/MIN with keyword= arguments (details)
  780. [lldb] Fix broken skipUnlessUndefinedBehaviorSanitizer decorator (details)
  781. [clang-repl][NFC] Fix calling convention mismatch in test (details)
  782. [flang] Re-fold bounds expressions in DATA implied DO loops (details)
  783. [mlir][sparse] refine simply dynamic sparse tensor outputs (details)
  784. [flang] Correct INQUIRE(POSITION= & PAD=) (details)
  785. [NFC] Refactor symbol table parsing. (details)
  786. [InstCombine] Allow fake vector insert folding to bit-logic only if the insert element is integer type (details)
  787. [NFC][sanitizer] Fail test quickly (details)
  788. [ADT] Remove 0-width Asserts in APInt.getZExtValue (details)
  789. [flang] Define & implement a lowering support API IsContiguous() in runtime (details)
  790. [OpenMP][libomp][doc] Add environment variables documentation (details)
  791. [TSan][Darwin] Avoid crashes due to interpreting non-zero shadow content as a pointer (details)
  792. Big-endian version of vpermxor (details)
  793. [NFC][regalloc] Factor accesses to ExtraRegInfo (details)
  794. [Clang] Add option to disable -mconstructor-aliases with -mno-constructor-aliases (details)
  795. Revert "[MLIR] Update Vector To LLVM conversion to be aware of assume_alignment" (details)
  796. [flang] Rearrange prototype & code placement of IsCoarray() (details)
  797. [mlir][sparse] fix typos in integration tests (details)
  798. [runtimes][openmp] Change to not treat ARCH-unknown-linux-gnu as errors (details)
  799. [FS-AFDO][llvm-profgen] Generate profile with FS-AFDO discriminator (details)
  800. [ObjectYAML/obj2yaml/yaml2obj][MachO] Support indirect symbol table (details)
  801. [llvm-profgen] Truncate the context with zero probe ID (details)
  802. [mlir][sparse] added sparse out element wise mult integration test (details)
  803. [NFC][sanitizer] Add entry point for compression (details)
  804. [test] Avoid dumping .o in source tree (expand-pseudos.ll) (details)
  805. Add toggling for -fnew-infallible/-fno-new-infallible (details)
  806. [libcxx][doc] Document recent spaceship projects progress (details)
  807. [RISCV] Teach RISCVTargetLowering::shouldSinkOperands to handle udiv/sdiv/urem/srem. (details)
  808. [sanitizer] Add compress_stack_depot flag (details)
  809. [mlir] Update accessors prefixed form (NFC) (details)
  810. [X86] Pre-commit tests to show the problem of SQRT when `RefinementSteps` = 0. NFC (details)
  811. [lldb] Temporarily skip TestTsanBasic on Darwin (details)
  812. [memprof] Align each rawprofile section to 8b. (details)
  813. [sanitizer] Add delta compression stack depot (details)
  814. [Legalizer] Avoid expansion to BR_CC if illegal (details)
  815. [clang-offload-bundler] Reuse original file extension for device archive member (details)
  816. [mlir] Make sure linearizeCollapsedDims doesn't drop input map dims (details)
  817. Revert "[mlir] Make sure linearizeCollapsedDims doesn't drop input map dims" (details)
  818. [mlir] Make sure linearizeCollapsedDims doesn't drop input map dims (details)
  819. [NPM] Fix LoopNestPasses in -print-pipeline-passes (details)
  820. [fir] Add fir reduction builder (details)
  821. [Coroutines] Make suspend_always in test noexcept (NFC) (details)
  822. [Flang] Replace notifyMatchFailure with TODO hard failures (details)
  823. [libc] Add _64 element to aarch64 (details)
  824. [DSE] Allow DSE to optimize MemorySSA by default. (details)
  825. [mlir] Add a helper for TiledLoopOp to get an operand tied to the bbArg. (details)
  826. Add 'LLVM_DEFAULT_TARGET_TRIPLE' to the documented list of CMake variables (details)
  827. [SCEV] Track backedge taken count users (NFCI) (details)
  828. [LoopUnrollRuntime] Remove unnecessary pointer BECount check (NFC) (details)
  829. [OpenMP][IRBuilder] Fix createSections (details)
  830. [mlir][linalg][bufferize] CallOps do not bufferize to memory writes (details)
  831. [Sema] check PseudoObject when rebuilding CXXOperatorCallExpr in template instantiation (details)
  832. [ARM] Fix some identing in ARMAsmPrinter::emitInstruction, NFC (details)
  833. [BuildLibCalls] Add argmemonly, writeonly, nounwind to memset_chk. (details)
  834. Revert "[Sema] check PseudoObject when rebuilding CXXOperatorCallExpr in template instantiation" (details)
  835. Fix clang-format bug when handling conflict markers. (details)
  836. [ARM] Teach getIntImmCostInst about the cost of saturating fp converts (details)
  837. [clang][ARM] PACBTI-M frontend support (details)
  838. [IR] Assert on getPointerElementType() on opaque pointer (NFC) (details)
  839. [clang][ARM] emit PACBTI-M feature defines (details)
  840. [ARM] add common parts for PACBTI-M support in the backend (details)
  841. [IR] Remove deprecated GetElementPtrInst constructors (details)
  842. [IRBuilder] Remove deprecated methods (details)
  843. Fix segfault in clang-format. (details)
  844. [ARM] emit PACBTI-M build attributes (details)
  845. [ARM] Strengthen fpclamptosat.ll triple to attempt to fix buildbot errors. NFC (details)
  846. [DAG] Apply clang-format to visitMSTORE + visitMLOAD. NFC. (details)
  847. [DAGCombiner] When combining REM ensure optimized div nodes are unique (details)
  848. [LICM] Support opaque pointers in scalar promotion (details)
  849. [X86] Add some basic fptosi/fptoui saturate vector tests (details)
  850. [clang][ARM] removing branch protection error cmdline test (details)
  851. Fixed a memory leak in the PDLToPDLInterp RootOrderingTest. (details)
  852. [LICM] Hoist LOAD without sinking the STORE (details)
  853. Revert "[LICM] Hoist LOAD without sinking the STORE" (details)
  854. [ARM] Implement BTI placement pass for PACBTI-M (details)
  855. [gn build] Port f5f28d5b0ce7 (details)
  856. [Dexter] Add DexDeclareAddress command and address function (details)
  857. [libcxx][test][NFC] Extend get_allocator() testing for containers (details)
  858. Fix a violated precondition in clang-format. (details)
  859. [gn build] (manually) port 94d5f2afbef0 (details)
  860. [clang-cl] Set _MSVC_LANG to 202002L with /std:c++20 (details)
  861. [VE] Make VE official (details)
  862. [Dexter] Fix address_printing test by requiring lldb (details)
  863. [BasicAA] Add strncpy libfunc tests. (details)
  864. [BasicAA] Add memset_chk libfunc tests. (details)
  865. [SLP][NFC]Add a test for inserting into constant undef vector, NFC. (details)
  866. Revert "[Flang] Replace notifyMatchFailure with TODO hard failures" (details)
  867. [LV] Move code from vectorizeMemoryInstruction to recipe's execute(). (details)
  868. Revert "[ARM] Teach getIntImmCostInst about the cost of saturating fp converts" (details)
  869. [mlir][linalg] Disable tensor-matmul test under asan (details)
  870. [Verifier] Make matrix intrinsic verification compatible with opaque pointers (details)
  871. [SLP]Improve vectorization of cmp instructions sequences. (details)
  872. [AArch64][SVE] Duplicate FP_EXTEND/FP_TRUNC -> LOAD/STORE dag combines (details)
  873. [SLP]Introduce isUndefVector function to check for undef vectors. (details)
  874. [PowerPC][AIX] Add toc-data support for 64-bit AIX small code model. (details)
  875. [libc++] Fix `uniform_int_distribution` for 128-bit result type (details)
  876. [SLP]Improve cost model for the shuffled extracts. (details)
  877. [VE][NFC] Use POSIX-compatible stream redirection (details)
  878. [VE] Remove switch with only default case statement to fix MSVC warning. NFC. (details)
  879. [X86] combinePMULH - recognise 'cheap' trunctions via PACKS/PACKUS as well as SEXT/ZEXT (details)
  880. [OpenMP][FIX] SPMDzation guarding needs to account for all reaching kernels (details)
  881. [mlir][Vector] Thread 0-d vectors through vector.transfer ops (details)
  882. [libc++][format][1/6] Reduce binary size. (details)
  883. [llvm][stlextras] Add const methods to concat_range and enumerator (details)
  884. [mlir][ods] AttrOrTypeGen uses Class (details)
  885. Revert "tsan: new runtime (v3)" (details)
  886. [SelectionDAG] Add pattern to haveNoCommonBitsSet (details)
  887. [Clang][VE] Fix toolchain test when -DCLANG_DEFAULT_LINKER=lld in use (details)
  888. [AArch64] Fix unused variable warning with NDEBUG, NFC (details)
  889. [runtimes] Remove support for GCC-style 32 bit multilib builds (details)
  890. [runtimes] Move WARNING to FATAL_ERROR for folks using FOO_BUILD_32_BITS (details)
  891. [Clang] Fix nesting of discarded and immediate contexts. (details)
  892. [ASan] Fixed include order. (details)
  893. [VE][NFC] Fix use-after-free in VEInstrInfo (details)
  894. [mlir][ods][nfc] fix gcc-5 build (details)
  895. [NFC][Clang] Fix some comments in clang (details)
  896. Revert "[lldb] Temporarily skip TestTsanBasic on Darwin" (details)
  897. [Support] replace check with assert in known bits of mul calculation; NFC (details)
  898. Disable issues / pull requests via templates in preparation with migration (details)
  899. [Clang] Remove bogus "REQUIRES arm-registered-target" from SVE ACLE tests. (details)
  900. [mlir][ods][nfc] fixing test cases (details)
  901. Revert "[sanitizer] Add delta compression stack depot" (details)
  902. [flang] Adjust names in Semantics that imply too much (NFC) (details)
  903. [RISCV] Add inline expansion for vector ftrunc/fceil/ffloor. (details)
  904. [InstrProf][NFC] Refactor ProfileDataMap usage (details)
  905. [libcxx][NFC] Make sequence containers slightly more SFINAE-friendly during CTAD. (details)
  906. [libc++] [test] C++03-friendly MAKE_STRING macro. (details)
  907. [libc++] [test] C++14/17-friendly `TEST_IS_CONSTANT_EVALUATED` macro. (details)
  908. [libc++] [test] Refactor string_view comparison tests for comprehensiveness. (details)
  909. [GlobalOpt] Simplify CleanupConstantGlobalUsers() (details)
  910. Fix false positives in `fuchsia-trailing-return` check involving deduction guides (details)
  911. [DSE] Add libcall tests for functions only available on Darwin. (details)
  912. [TLI checker] Update for post-commit review comments (details)
  913. AMDGPU/GlobalISel: Fix constant bus restriction errors for med3 (details)
  914. [libcxx][modularisation] modularises <numeric> header (details)
  915. [gn build] Port a0efb1750065 (details)
  916. [TLI] Add memset_pattern4, memset_pattern8 lib functions. (details)
  917. [Analyzer][solver] Simplification: Do a fixpoint iteration before the eq class merge (details)
  918. [flang] Don't close stderr in runtime (fixes STOP output) (details)
  919. [mlir] Remove extractVectorTypeFromShapedValue (details)
  920. [NFC][sanitizer] constexpr in sanitizer_dense_map_info (details)
  921. [libc++] Make __wrap_iter constexpr (details)
  922. [sanitizer] Implement MprotectReadOnly and MprotectNoAccess (details)
  923. [libcxx][test][NFC] Various tests for std::vector (details)
  924. profi - a flow-based profile inference algorithm: Part I (out of 3) (details)
  925. [gn build] Port 7cc2493daaf5 (details)
  926. [Cloning] Clone metadata on function declarations (details)
  927. [llvm-reduce] Assert that the number of chunks does not change with reductions (details)
  928. [TSan][Darwin] Mark test unsupported (details)
  929. [llvm] [Support] Add HTTP Client Support library. (details)
  930. [gn build] Port 170783f991fa (details)
  931. [clang-tidy] Use `hasCanonicalType()` matcher in `bugprone-unused-raii` check (details)
  932. [lldb] Split TestCxxChar8_t (details)
  933. [TSan][Darwin] Prevent inlining of functions in tests (details)
  934. Revert "[sanitizer] Add compress_stack_depot flag" (details)
  935. [unroll] Fix a functional change in an NFC patch (details)
  936. Revert "[VE] Make VE official" (details)
  937. [mlir][linalg][bufferize] Bufferization of tensor.insert (details)
Commit d448fcd9b2238377dd8832ce9e35a37b59ef5aeb by balazs.benics
[analyzer][NFC] Introduce CallDescriptionSets

Sometimes we only want to decide if some function is called, and we
don't care which of the set.
This `CallDescriptionSet` will have the same behavior, except
instead of `lookup()` returning a pointer to the mapped value,
the `contains()` returns `bool`.
Internally, it uses the `CallDescriptionMap<bool>` for implementing the
behavior. It is preferred, to reuse the generic
`CallDescriptionMap::lookup()` logic, instead of duplicating it.
The generic version might be improved by implementing a hash lookup or
something along those lines.

Reviewed By: martong, Szelethus

Differential Revision: https://reviews.llvm.org/D113589
The file was modifiedclang/lib/StaticAnalyzer/Core/CallDescription.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CallDescription.h
Commit 6c512703a9e6e495afa0f44528821c27f28db795 by balazs.benics
[analyzer][NFC] Introduce CallDescription::matches() in addition to isCalled()

This patch introduces `CallDescription::matches()` member function,
accepting a `CallEvent`.
Semantically, `Call.isCalled(CD)` is the same as `CD.matches(Call)`.

The patch also introduces the `matchesAny()` variadic free function template.
It accepts a `CallEvent` and at least one `CallDescription` to match
against.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D113590
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CallDescription.h
The file was modifiedclang/lib/StaticAnalyzer/Core/CallDescription.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/CallEvent.cpp
Commit f18da190b0dba817d33ccd7727537f12304d8125 by balazs.benics
[analyzer][NFC] Switch to using CallDescription::matches() instead of isCalled()

This patch replaces each use of the previous API with the new one.
In variadic cases, it will use the ADL `matchesAny(Call, CDs...)`
variadic function.
Also simplifies some code involving such operations.

Reviewed By: martong, xazax.hun

Differential Revision: https://reviews.llvm.org/D113591
The file was modifiedclang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/CallEvent.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/cert/PutenvWithAutoChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MmapWriteExecChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/ValistChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/SimpleStreamChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/InnerPointerChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/ChrootChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/StringChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CallEvent.h
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
The file was modifiedclang/unittests/StaticAnalyzer/NoStateChangeFuncVisitorTest.cpp
The file was modifiedclang/unittests/StaticAnalyzer/ConflictingEvalCallsTest.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MIGChecker.cpp
Commit 9ad0a90baa8ca8067fe65086056fffd083c86796 by balazs.benics
[analyzer][NFC] Demonstrate the use of CallDescriptionSet

Reviewed By: martong, xazax.hun

Differential Revision: https://reviews.llvm.org/D113592
The file was modifiedclang/lib/StaticAnalyzer/Checkers/BasicObjCFoundationChecks.cpp
Commit de9d7e42aca29920e9918ecaed4ad9c45fa673f1 by balazs.benics
[analyzer][NFC] CallDescription should own the qualified name parts

Previously, CallDescription simply referred to the qualified name parts
by `const char*` pointers.
In the future we might want to dynamically load and populate
`CallDescriptionMaps`, hence we will need the `CallDescriptions` to
actually **own** their qualified name parts.

Reviewed By: martong, xazax.hun

Differential Revision: https://reviews.llvm.org/D113593
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CallDescription.h
The file was modifiedclang/lib/StaticAnalyzer/Core/CallDescription.cpp
Commit 97f1bf15b154ef32608fe17b82f2f312401d150c by balazs.benics
[analyzer][NFC] Consolidate the inner representation of CallDescriptions

`CallDescriptions` have a `RequiredArgs` and `RequiredParams` members,
but they are of different types, `unsigned` and `size_t` respectively.
In the patch I use only `unsigned` for both, that should be large enough
anyway.
I also introduce the `MaybeUInt` type alias for `Optional<unsigned>`.

Additionally, I also avoid the use of the //smart// less-than operator.

  template <typename T>
  constexpr bool operator<=(const Optional<T> &X, const T &Y);

Which would check if the optional **has** a value and compare the data
only after. I found it surprising, thus I think we are better off
without it.

Reviewed By: martong, xazax.hun

Differential Revision: https://reviews.llvm.org/D113594
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CallDescription.h
The file was modifiedclang/lib/StaticAnalyzer/Core/CallDescription.cpp
Commit e6ef134f3c77005438f9fb7c1d17d3c30747844e by balazs.benics
[analyzer][NFC] Use enum for CallDescription flags

Yeah, let's prefer a slightly stronger type representing this.

Reviewed By: martong, xazax.hun

Differential Revision: https://reviews.llvm.org/D113595
The file was modifiedclang/lib/StaticAnalyzer/Checkers/ContainerModeling.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/DebugIteratorModeling.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CallDescription.h
The file was modifiedclang/lib/StaticAnalyzer/Core/CallDescription.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/DebugContainerModeling.cpp
Commit d5de568cc7375281b14bd2632576bff7f4afabc3 by balazs.benics
[analyzer][NFC] MaybeUInt -> MaybeCount

I forgot to include this in D113594

Differential Revision: https://reviews.llvm.org/D113594
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CallDescription.h
The file was modifiedclang/lib/StaticAnalyzer/Core/CallDescription.cpp
Commit 7eec832def5717b1bddb72c3b99c3df4f7a2f6da by flo
[DSE] Improve handling of `strncpy` in Dead Store Elimination

Fixes PR#52062 and one of the remaining cases of PR#47644.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D114035
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was modifiedllvm/test/Transforms/DeadStoreElimination/libcalls.ll
Commit ffdace4892bd1f43121d365c22eb9c3fe79aeb6c by mingmingl
[SROA] Add new test cases to cover existing SROA behavior that structs will be scalarized.

Add an IR in unit test directory, which demonstrate the scalarization for struct allocations.
This is added to pave the way for an SROA change to skip scalarization for some cases.

Reviewed By: davidxl

Differential Revision: https://reviews.llvm.org/D114128
The file was addedllvm/test/Transforms/SROA/alloca-struct.ll
Commit 06dbb2856967a5497c6ddfad3d3fdfea20849f7e by thomasraoux
[mlir][vector] Remove usage of shapecast to remove unit dim

Instead of using shape_cast op in the pattern removing leading unit
dimensions we use extract/broadcast ops. This is part of the effort to
restrict ShapeCastOp fuirther in the future and only allow them to
convert to or from 1D vector.

This also adds extra canonicalization to fill the gaps in simplifying
broadcast/extract ops.

Differential Revision: https://reviews.llvm.org/D114205
The file was removedmlir/test/Dialect/Vector/vector-dim-one-shape-cast.mlir
The file was modifiedmlir/test/Dialect/Vector/canonicalize.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
The file was modifiedmlir/test/Dialect/Vector/vector-transforms.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
Commit 7cde5165131f1268a8506066275ef7938c58d156 by thomasraoux
[mlir][vector] NFC, move some vector patterns in a separate file

Move patterns related to dropping lead unit dim into their own file.

Differential Revision: https://reviews.llvm.org/D114265
The file was addedmlir/lib/Dialect/Vector/VectorDropLeadUnitDim.cpp
The file was modifiedmlir/lib/Dialect/Vector/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
Commit 9cdaf0b01b298dc05a213fca5943e23a2aec51a2 by jonathanchesterfield
[openmp][amdgpu][nfc] Inline interop_hsa_get_kernel_info into only caller
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/interop_hsa.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/interop_hsa.h
Commit 2997441b85c0ec94425e83316d7e63c32d8c5770 by i
[ELF] Support discarding .got.plt

Fix a null pointer dereference when .got.plt is discarded.

This also adds a test for discarding `.plt`.

Reviewed By: ikudrin

Differential Revision: https://reviews.llvm.org/D114180
The file was modifiedlld/ELF/SyntheticSections.cpp
The file was addedlld/test/ELF/linkerscript/discard-plt.s
Commit ff7f2cfa959bbc2effefb6f11f225b525e9029c8 by jay.foad
[AMDGPU] Add an implicit use of M0 to all V_MOV_B32_indirect_read/write

NFCI. Previously the implicit use was added to V_MOV_B32_indirect_read
when building the instruction. V_MOV_B32_indirect_write didn't have an
implicit use of M0 at all, but apparently it did not cause any problems.

Differential Revision: https://reviews.llvm.org/D114239
The file was modifiedllvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/VOP1Instructions.td
Commit 47555d73f6538cf2c092a7314e3c82c631ce4ccb by thomasraoux
[mlir][gpu] Extend shuffle op modes and add nvvm lowering

Add up, down and idx modes to gpu shuffle ops, also change the mode from
string to enum

Differential Revision: https://reviews.llvm.org/D114188
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
The file was modifiedmlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/nvvm.mlir
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td
The file was modifiedmlir/test/Dialect/GPU/ops.mlir
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
The file was modifiedmlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
The file was modifiedmlir/test/Target/LLVMIR/nvvmir.mlir
Commit bd22554af06e1f16dc9ff12eac8987f0ceebe8c1 by Krzysztof.Drewniak
[MLIR][GPU] Run generic LLVM optimizations when serializing (on AMD)

- Adds hooks that allow SerializeTo* passes to arbitrarily transform
the produced LLVM Module before it is passed to the code generation
passes.

- Uses these hooks within the SerializeToHsaco pass in order to run
LLVM optimizations and to set the optimization level on the
TargetMachine.

- Adds an optLevel parameter to SerializeToHsaco

Future work may include moving much of what's been added to
SerializeToHsaco to SerializeToBlob, but that would require
confirmation from the NVVM backend maintainers that it would be
appropriate to do so.

Depends on D114107

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D114113
The file was modifiedmlir/lib/Dialect/GPU/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/GPU/Passes.h
The file was modifiedmlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp
The file was modifiedmlir/lib/Dialect/GPU/Transforms/SerializeToBlob.cpp
Commit 1b4c0cb3918a9f2d12f8259407fc8bce053e78bf by Louis Dionne
[libc++] Avoid potential truncation warnings in std::abs test

One some platforms, -Wimplicit-int-conversion is enabled by default,
which can lead to additional warnings being triggered in this test.
Since we're only trying to test errors related to calling abs(), the
assignment is superfluous.

As a fly-by fix, correct one instance of ::abs to std::abs and made
the test a .verify.cpp test instead.

Differential Revision: https://reviews.llvm.org/D114244
The file was removedlibcxx/test/std/numerics/c.math/abs.fail.cpp
The file was addedlibcxx/test/std/numerics/c.math/abs.verify.cpp
Commit e1ce3dabf0c70d30a24f0586ddf2a965d730d30a by Louis Dionne
[libc++] Fix some tests that were broken in the single-threaded configuration

We never noticed it because our CI doesn't actually build against a C
library that doesn't have threading functionality, however building
against a truly thread-free platform surfaces these issues.

Differential Revision: https://reviews.llvm.org/D114242
The file was modifiedlibcxx/test/std/concepts/concepts.compare/concept.equalitycomparable/equality_comparable.compile.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/mutex.version.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.mutex/thread.once/thread.once.onceflag/default.pass.cpp
The file was modifiedlibcxx/test/libcxx/thread/thread.mutex/version.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.compile.fail.cpp
The file was modifiedlibcxx/test/std/concepts/concepts.compare/concept.equalitycomparable/equality_comparable_with.compile.pass.cpp
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was modifiedlibcxx/test/std/thread/thread.mutex/thread.once/thread.once.callonce/race.pass.cpp
The file was modifiedlibcxx/test/std/concepts/concepts.lang/concept.assignable/assignable_from.compile.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.mutex/thread.once/thread.once.onceflag/assign.compile.fail.cpp
The file was modifiedlibcxx/test/std/thread/thread.mutex/thread.once/thread.once.callonce/call_once.pass.cpp
The file was modifiedlibcxx/test/std/concepts/concepts.object/movable.compile.pass.cpp
The file was modifiedlibcxx/utils/generate_header_inclusion_tests.py
Commit e0f58444e126e80a0d43eb5b88622799910195e6 by Louis Dionne
[libc++] Fix feature test macro for __cpp_lib_to_chars

We would have been defining it in <utility> instead of <charconv>. For
the time being, this doesn't change anything since we don't implement
the feature test macro anyways.

Also, as a fly-by, this removes obsolete feature test macro tests. There
was a brief time back in the days when we wrote feature test macro tests
manually. In particular, we had test files for __cpp_lib_to_chars and
__cpp_lib_memory_resource. Since we now have a principled way of generating
these tests with scripts, this commit removes the obsolete (and empty)
tests for these two feature test macros.

Differential Revision: https://reviews.llvm.org/D114243
The file was modifiedlibcxx/include/version
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was addedlibcxx/test/std/language.support/support.limits/support.limits.general/charconv.version.pass.cpp
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/utility.version.pass.cpp
The file was removedlibcxx/test/std/language.support/support.limits/support.limits.general/charconv.pass.cpp
The file was removedlibcxx/test/std/language.support/support.limits/support.limits.general/memory_resource.version.pass.cpp
Commit d8e5a0c42bd8796cce9caa53aacab88c7cb2a3eb by zarko
[clang][NFC] Inclusive terms: replace some uses of sanity in clang

Rewording of comments to avoid using `sanity test, sanity check`.

Reviewed By: aaron.ballman, Quuxplusone

Differential Revision: https://reviews.llvm.org/D114025
The file was modifiedclang/lib/StaticAnalyzer/Core/Store.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/UnixAPIChecker.cpp
The file was modifiedclang/lib/Basic/DiagnosticIDs.cpp
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngine.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/include/clang/Analysis/CFG.h
The file was modifiedclang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MIGChecker.cpp
The file was modifiedclang/lib/Analysis/RetainSummaryManager.cpp
The file was modifiedclang/include/clang/AST/Redeclarable.h
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/lib/Basic/SourceManager.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
The file was modifiedclang/include/clang/CodeGen/CGFunctionInfo.h
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
The file was modifiedclang/lib/Sema/SemaLookup.cpp
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/lib/Tooling/Syntax/Tree.cpp
The file was modifiedclang/lib/Frontend/FrontendActions.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/lib/Analysis/BodyFarm.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
The file was modifiedclang/include/clang/Sema/Lookup.h
Commit b07b5bd72716625e0976a84d23652d94d8d0165a by arthur.j.odwyer
[libc++] Test that our algorithms never copy a user-provided comparator.

This is not mandated by the standard, so it goes in libcxx/test/libcxx/.
It's certainly arguable that the algorithms changed here
(`is_heap`, `is_sorted`, `min`, `max`) are harmless and we should
just let them copy their comparators once. But at the same time,
it's nice to have all our algorithms be 100% consistent and never
copy a comparator, not even once.

Differential Revision: https://reviews.llvm.org/D114136
The file was modifiedlibcxx/include/__algorithm/is_sorted_until.h
The file was modifiedlibcxx/include/__algorithm/is_heap.h
The file was modifiedlibcxx/include/__algorithm/max.h
The file was modifiedlibcxx/include/__algorithm/min_element.h
The file was addedlibcxx/test/libcxx/algorithms/robust_against_copying_comparators.pass.cpp
The file was modifiedlibcxx/test/std/algorithms/robust_against_adl.compile.pass.cpp
The file was modifiedlibcxx/include/__algorithm/binary_search.h
The file was modifiedlibcxx/include/__algorithm/max_element.h
The file was modifiedlibcxx/test/std/algorithms/robust_re_difference_type.compile.pass.cpp
The file was modifiedlibcxx/include/__algorithm/min.h
The file was modifiedlibcxx/include/__algorithm/is_heap_until.h
The file was modifiedlibcxx/include/__algorithm/is_sorted.h
Commit 04954824ee158fffe6653c7eb51c07347b36ff21 by jonathanchesterfield
[openmp][amdgpu][nfc] Simplify implicit args handling

Removes a +x/-x pair on the only store/load of a variable
and deletes some nearby dead code. Also reduces the size of the implicit
struct to reflect the code currently emitted by clang.

Differential Revision: https://reviews.llvm.org/D114270
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/internal.h
Commit 3f3680dff3e72881bd89241fe512ec8138edbc70 by dblaikie
DWARFVerifier: Simplify name lookups

No need to use the dynamic fallback query when the name type is known
statically at the call site.
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
Commit 3fcdd182e9784cb9c2d7ff54b44ec00bd6c91a87 by stellaraccident
NFC: Callout restriction on folding 0-result ops in documentation.

Differential Revision: https://reviews.llvm.org/D114271
The file was modifiedmlir/docs/Canonicalization.md
Commit 20f79f8caa3a333a34021f0028e828f97d79c2a1 by Krzysztof.Drewniak
[MLIR][GPU] Make the path to ROCm a runtime option

Our current build assumes that the path to ROCm we find at build time
will be the path at which ROCm is located when the built code is
executed. This commit adds a --rocm-path option to SerializeToHsaco,
and removes the HIP dependency that the SerializeToHsaco previously had.

Depends on D114113

(though the dependency is to ensure the diffs apply cleanly and to capture the dependency on D114107)

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D114114
The file was modifiedmlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp
The file was modifiedmlir/lib/Dialect/GPU/CMakeLists.txt
Commit 290cddcd139d668251821f11426f37481faf6d7f by Alex Lorenz
Allow __attribute__((swift_attr)) in attribute push pragmas

This change allows SwiftAttr to be used with #pragma clang attribute push
to add Swift attributes to large regions of header files.
We plan to use this to annotate headers with concurrency information.

Patch by: Becca Royal-Gordon

Differential Revision: https://reviews.llvm.org/D112773
The file was modifiedclang/include/clang/Basic/Attr.td
The file was modifiedclang/test/Misc/pragma-attribute-supported-attributes-list.test
The file was modifiedclang/test/AST/attr-swift_attr.m
Commit e059329b835aac1b93d764811b23c3cfd8b856c7 by Louis Dionne
[libc++][NFC] Add missing include in test
The file was modifiedlibcxx/test/support/uses_alloc_types.h
Commit e9d12c248013b2d2b9880436727857e0ec8a7085 by stefanp
[PowerPC][NFC] Add a series of codegen tests for vector reductions.

This patch only adds tests for PowerPC. The purpose of these tests
is to track what code is generated for various vector reductions.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D113801
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-or.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-umax.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-mul.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-add.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-umin.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-smin.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-smax.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-xor.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-and.ll
The file was addedllvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll
Commit 491efa7f31cbc39fe0aaad261a840cc5311346fb by spatel
[InstCombine] add/adjust tests for mask of sext i1; NFC

These are sibling transforms, but the test coverage was
uneven and incomplete.
The file was modifiedllvm/test/Transforms/InstCombine/and.ll
The file was modifiedllvm/test/Transforms/InstCombine/or.ll
Commit a075d67222832c234296ffd605f19e33023e6060 by apollo.mobility
[Sema] fix nondeterminism in ASTContext::getDeducedTemplateSpecializationType

`DeducedTemplateSpecializationTypes` is a `llvm::FoldingSet<DeducedTemplateSpecializationType>` [1],
where `FoldingSetNodeID` is based on the values: {`TemplateName`, `QualType`, `IsDeducedAsDependent`},
those values are also used as `DeducedTemplateSpecializationType` constructor arguments.

A `FoldingSetNodeID` created by the static `DeducedTemplateSpecializationType::Profile` may not be equal
to`FoldingSetNodeID` created by a member `DeducedTemplateSpecializationType::Profile` of an instance
created with the same {`TemplateName`, `QualType`, `IsDeducedAsDependent`}, which makes
`DeducedTemplateSpecializationTypes` lookups nondeterministic.

Specifically, while `IsDeducedAsDependent` value is passes to the constructor, `IsDependent()` method on
the created instance may return a different value, because `IsDependent` is not saved as is:
```name=clang/include/clang/AST/Type.h
  DeducedTemplateSpecializationType(TemplateName Template,  QualType DeducedAsType, bool IsDeducedAsDependent)
      : DeducedType(DeducedTemplateSpecialization, DeducedAsType,
                    toTypeDependence(Template.getDependence()) | // <~  also considers `TemplateName` parameter
                        (IsDeducedAsDependent ? TypeDependence::DependentInstantiation : TypeDependence::None)),
```
For example, if an instance A with key `FoldingSetNodeID {A, B, false}` is inserted. Then a key
`FoldingSetNodeID {A, B, true}` is probed:
If it happens to correspond to the same bucket in `FoldingSet` as the first key, and `A.Profile()` returns
`FoldingSetNodeID {A, B, true}`, then it's a hit.
If the bucket for the second key is different from the first key, instance A is not considered at all, and it's
a no hit, even if `A.Profile()` returns  `FoldingSetNodeID {A, B, true}`.

Since `TemplateName`, `QualType` parameter values involve memory pointers, the lookup result depend on allocator,
and may differ from run to run. When this is used as part of modules compilation, it may result in "module out of date"
errors, if imported modules are built on different machines.

This makes `ASTContext::getDeducedTemplateSpecializationType` consider `Template.isDependent()` similar
`DeducedTemplateSpecializationType` constructor.

Tested on a very big codebase, by running modules compilations from directories with varied path length
(seem to affect allocator seed).

1. https://llvm.org/docs/ProgrammersManual.html#llvm-adt-foldingset-h

Patch by Wei Wang and Igor Sugak!

Reviewed By: bruno

Differential Revision: https://reviews.llvm.org/D112481
The file was modifiedclang/include/clang/AST/Type.h
The file was modifiedclang/lib/AST/ASTContext.cpp
Commit d729f4c38fca91736ef1008660baccbd9d3552f6 by rdzhabarov
[mlir] Bug fix. Stream must outlive the pass manager.

Bug fix. Stream must outlive the pass manager.

Reviewed By: Chia-hungDuan

Differential Revision: https://reviews.llvm.org/D114277
The file was modifiedmlir/lib/Dialect/GPU/Transforms/SerializeToBlob.cpp
Commit 3f3bee42d22988d018834c58af244dee08a52d9c by quinn.pham
[NFC][llvm] Inclusive language: remove instance of master from Thumb2SizeReduction.cpp

[NFC] As part of using inclusive language within the llvm project, this patch
replaces master with main in `Thumb2SizeReduction.cpp`.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D114196
The file was modifiedllvm/lib/Target/ARM/Thumb2SizeReduction.cpp
Commit a6f53afbcb4d995139064276b5ad971ad7ced5e2 by Krzysztof.Drewniak
[MLIR][GPU] Link in device libraries during HSA compilation if needed

To perform some operations, such as sin() or printf(), code compiled
for AMD GPUs must be linked to a series of device libraries. This
commit adds support for linking in these libraries.

However, since these device libraries are delivered as LLVM bitcode,
raising the possibility of version incompatibilities, this commit only
links in libraries when the functions from those libraries are called
by the code being compiled.

This code also sets the math flags to their most conservative values,
as MLIR doesn't have a `-ffast-math` equivalent.

Depends on D114114

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D114117
The file was modifiedmlir/lib/Dialect/GPU/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/GPU/Transforms/SerializeToHsaco.cpp
Commit de11de308b6480fc35d901c7104f46918674418c by kyulee
[InstrProf] Use i32 for GEP index from lowering llvm.instrprof.increment

The `llvm.instrprof.increment` intrinsic uses `i32` for the index. We should use this same type for the index into the GEP instructions.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D114268
The file was modifiedclang/test/Profile/cxx-rangefor.cpp
The file was modifiedclang/test/Profile/branch-logical-mixed.cpp
The file was modifiedclang/test/Profile/c-ternary.c
The file was modifiedclang/test/Profile/cxx-throws.cpp
The file was modifiedllvm/test/Transforms/PGOProfile/counter_promo_exit_catchswitch.ll
The file was modifiedclang/test/Profile/cxx-stmt-initializers.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
The file was modifiedllvm/test/Instrumentation/InstrProfiling/runtime-counter-relocation.ll
The file was modifiedclang/test/Profile/objc-general.m
The file was modifiedclang/test/Profile/c-general.c
The file was modifiedclang/test/Profile/c-captured.c
The file was modifiedclang/test/Profile/cxx-lambda.cpp
The file was modifiedclang/test/Profile/cxx-class.cpp
The file was modifiedclang/test/CodeGen/profile-filter.c
The file was modifiedllvm/test/Transforms/PGOProfile/instr_entry_bb.ll
The file was modifiedclang/test/Profile/cxx-templates.cpp
The file was modifiedllvm/test/Instrumentation/InstrProfiling/atomic-updates.ll
Commit f764a1a5bd7c281d3d7cc3c6d7f1430711176762 by sam.mccall
[clangd] Avoid possible crash: apply configuration after binding methods

The configuration may kick off indexing, which may involve sending LSP
messages.
The crash is fiddly to reproduce in a hermetic test (we need background
indexing on without disk storage, and to handle server->client messages
in LSPClient...)

Fixes https://github.com/clangd/clangd/issues/926
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.cpp
Commit 241df03ce5f0949501454b9ac796ccc90d52ddfb by j-nagurne
[NFC] Test commit, add whitespace to end-of-line
The file was modifiedllvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
Commit 1bd4dc4f2854edf3035732416ec7e4adbddaf982 by nathan
[hmaptool] Port to python3

This is just a few trivial changes -- change the interpreter and fix a
few byte-vs-string issues.

Differential Revision: https://reviews.llvm.org/D107944
The file was modifiedclang/utils/hmaptool/hmaptool
Commit 97b9e8438e269a999969b08d4efe20c3d71013ca by 18738953+ksyx
[GVN][NFC] Remove redundant check

The if-check above deleted part guarantees that StoreOffset <= LoadOffset
and that StoreOffset + StoreSize >= LoadOffset + LoadSize, and given that
LoadOffset + LoadSize > LoadOffset when LoadSize > 0. Thus, this shows
StoreOffset + StoreSize > LoadOffset is guaranteed given LoadSize > 0,
while it could be meaningless to have a type with nonpositive size, so that
the check could be removed. The values are converted to signed types to
avoid unsigned operation with negative offsets.

Part of revision D100179
Reapply commit c35e8185d8c170c20e28956e0c9f3c1be895fefb with fixing problem
reported by mstorsjo
The file was modifiedllvm/lib/Transforms/Utils/VNCoercion.cpp
Commit 43f5f6916f0e2b0095a943eb19d06dfb8e13c727 by Lang Hames
[ORC][JITLink] Move JITDylib name into JITLinkDylib base class.

This will enable better error messages and debug logs in JITLink.
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Core.h
The file was modifiedllvm/lib/ExecutionEngine/Orc/Core.cpp
The file was modifiedllvm/include/llvm/ExecutionEngine/JITLink/JITLinkDylib.h
Commit 18f9351223488121cc88f252744a575156c617bf by VenkataRamanaiah.Nalamothu
[AMDGPU] Do not generate ELF symbols for the local branch target labels

The compiler was generating symbols in the final code object for local
branch target labels. This bloats the code object, slows down the loader,
and is only used to simplify disassembly.

Use '--symbolize-operands' with llvm-objdump to improve readability of the
branch target operands in disassembly.

Fixes: SWDEV-312223

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D114273
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/bypass-div.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/endcf-loop-header.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/skip-if-dead.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/udiv64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/bool-legalization.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/basic-branch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/salu-to-valu.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation-gfx10-branch-offset-bug.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/loop-prefetch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.v3f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mfma-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/trap-abis.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/multilevel-break.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/early-if-convert.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/collapse-endcf.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/urem64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/skip-branch-trap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idiv-licm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
The file was modifiedllvm/test/Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-crash.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/infinite-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-m0.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/byval-frame-setup.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/subvector-test.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/ctpop16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-condition-and.ll
The file was modifiedllvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/sgpr-copy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_int24.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amd.endpgm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/srem64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-skip.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-cfg-position.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uniform-crash.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr-load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/valu-i1.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-call.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ret_jump.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/uniform-cfg.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/loop_break.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wqm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sdiv64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/branch-relaxation-debug-info.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-addressing-si-noopt.ll
Commit d1abf481daf2aa0076bb2d4f25eab9f5ca59a05d by kazu
[llvm] Use range-based for loops (NFC)
The file was modifiedllvm/lib/Transforms/Utils/CloneModule.cpp
The file was modifiedllvm/lib/Transforms/Utils/MetaRenamer.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopSimplify.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/lib/Transforms/Utils/Evaluator.cpp
Commit 0dec59305a52e51be8ef70a3ccdc59b5235663b7 by Lang Hames
[ORC] Make JITDylib::AsynchronousSymbolQuerySet private.

This type does not need to be public
The file was modifiedllvm/include/llvm/ExecutionEngine/Orc/Core.h
Commit 1cb991e754053ce2b5d551eb6c1a0ce759ab381e by craig.topper
[X86] Add test case for pr52567. NFC
The file was addedllvm/test/CodeGen/X86/pr52567.ll
Commit a4373f6753fa9aa89d39fbd4ec9e273f76459a58 by craig.topper
[X86] Don't combine (x86cmp (trunc (movmsk (bitcast X))), 0) if the truncate discards unknown bits.

We have transform that tries turn a pmovmskb into movmskps/pd or
movmskps to movmskpd. This transform isn't valid if the truncate
discarded bits that might be set by the original movmsk.

We could fix this by inserting an AND after the new movmsk to discard
the equivalent of the truncated bits, but I've left that for later
patch.

Fixes PR52567.

Differential Revision: https://reviews.llvm.org/D114306
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/pr52567.ll
Commit 1f9ca5adbac08dcca73b9e12aa2c5ed777cc460e by uday
[MLIR] Avoid creation of buggy affine maps while replacing dimension and symbol

Initially before appending the newly composed dimension and symbols
to the dimension and symbol list whose size is to be passed in
AffineMap::get(), the call to the AffineMap::get() was made, resulting
in wrong dimCount and symbolCount being passed as argument. We move the
call to the AffineMap::get() after the diimension and symbol list are
updated.

Differential Revision: https://reviews.llvm.org/D114237
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
Commit 2f364f6f0d3a2420ca78cbd80abb186657180e05 by lebedev.ri
[NFC][X86][MCA] Add forgotten test coverage for AVX512's VPMOVM2[BWDQ] / VPMOV[BWDQ]2M
The file was modifiedllvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512dq.s
The file was modifiedllvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512bwvl.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Generic/resources-avx512bwvl.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Generic/resources-avx512bw.s
The file was modifiedllvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512dqvl.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Generic/resources-avx512dq.s
The file was modifiedllvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512dq.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Generic/resources-avx512dqvl.s
The file was modifiedllvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512dqvl.s
The file was modifiedllvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512bw.s
The file was modifiedllvm/test/tools/llvm-mca/X86/IceLakeServer/resources-avx512bwvl.s
The file was modifiedllvm/test/tools/llvm-mca/X86/SkylakeServer/resources-avx512bw.s
Commit da47a63e039428fdf8f827381fa87c84f36581ef by lebedev.ri
[NFC][X86][Costmodel] Add AVX512DQ runlines to trunc.ll/extend.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/trunc.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/extend.ll
Commit 7dbbb5d3a46e1526cfa126ae02a5856d7ce0fda9 by dimitry
compiler-rt: Use FreeBSD's elf_aux_info to detect AArch64 HW features

Using the out-of-line LSE atomics helpers for AArch64 on FreeBSD also
requires adding support for initializing __aarch64_have_lse_atomics
correctly. On Linux this is done with getauxval(3), on FreeBSD with
elf_aux_info(3), which has a slightly different interface.

Differential Revision: https://reviews.llvm.org/D109330
The file was modifiedcompiler-rt/lib/builtins/cpu_model.c
Commit fbfe8fcbc31d492d5538c09782b787bba89d01e5 by jhuber6
[Libomptarget] Remove undefined symbol in old runtime

A function with no definition was left in the old runtime, causing
linker errors when trying to compile.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D114264
The file was modifiedopenmp/libomptarget/deviceRTLs/target_interface.h
Commit ec7b0d4d3458cf42c4e40da2ea391b29ba1731dd by uday
[MLIR] Simplify Semi-affine expressions by rule based matching and replacing "expr - q * (expr floordiv q)" with  "expr mod q" expression.

Add rule based matching for detecting and transforming "expr - q * (expr floordiv q)"
to "expr mod q", where q is a symbolic exxpression, in simplifyAdd function.

Reviewed By: bondhugula, dcaballe

Differential Revision: https://reviews.llvm.org/D112985
The file was modifiedmlir/test/Dialect/Affine/simplify-affine-structures.mlir
The file was modifiedmlir/lib/IR/AffineExpr.cpp
Commit 401b76fdf2b328520cc71d829ea726b74bb2192f by arthur.j.odwyer
[libc++] [test] Eliminate libcpp-no-noexcept-function-type and libcpp-no-structured-bindings.

At this point, every supported compiler that claims a -std=c++17 mode
should also support these features.

Differential Revision: https://reviews.llvm.org/D113436
The file was modifiedlibcxx/test/std/utilities/tuple/tuple.tuple/tuple.helper/tuple_size_structured_bindings.pass.cpp
The file was modifiedlibcxxabi/test/catch_member_function_pointer_02.pass.cpp
The file was modifiedlibcxx/utils/libcxx/test/features.py
The file was modifiedlibcxxabi/test/catch_function_03.pass.cpp
The file was modifiedlibcxx/test/std/utilities/meta/meta.rel/is_nothrow_invocable.pass.cpp
Commit 1d007d0e5a929c3f5cb25aea18d6c8a16326c02e by spatel
[InstCombine] add tests for bitwise logic with bool op; NFC
The file was modifiedllvm/test/Transforms/InstCombine/and.ll
The file was modifiedllvm/test/Transforms/InstCombine/or.ll
Commit 337948ac6e2260fc4d5a1901b4f667a2a0a52ee3 by spatel
[InstCombine] add folds for binop with sexted bool and constant operands

This is a generalization/extension of the existing and/or
folds noted with TODO comments. Those have a one-use
constraint that is not necessary.

Potential follow-ups are noted by the TODO comments in
the new function. We can also call this function from
other binop visit* functions, but we need to add tests
first.

This solves:
https://llvm.org/PR52543

https://alive2.llvm.org/ce/z/NWuCR5
The file was modifiedllvm/test/Transforms/InstCombine/and.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/test/Transforms/InstCombine/or.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
Commit cf8efbd30e430fdd87a8120430d8e44ce0909f76 by flo
[VPlan] Wrap vector loop blocks in region.

A first step towards modeling preheader and exit blocks in VPlan as well.
Keeping the vector loop in a region allows for changing the VF as we
traverse region boundaries.

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D113182
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-dot-printing.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-widen-gep.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-printing.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/icmp-uniforms.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
Commit 25a9ee52f139edc71043fbb218818aa735faa7b4 by nikita.ppv
[CVP] Add tests for implied conditions using urem (NFC)
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/urem.ll
Commit cd84cab6b37f615d0babd0b1c7b9e3acef5586c2 by nikita.ppv
[LVI] Support urem in implied conditions

If (X urem M) >= C we know that X >= C. Make use of this fact
when computing the implied condition range.

In some cases we could also establish an upper bound, but that's
both tricker and not interesting in practice.

Alive: https://alive2.llvm.org/ce/z/R5ZGSW
The file was modifiedllvm/lib/Analysis/LazyValueInfo.cpp
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/urem.ll
Commit 0a2bde94a06cea489c33004d66f574204c771031 by nikita.ppv
[LVI] Drop requirement that modulus is constant

If we're looking only at the lower bound, the actual modulus
doesn't matter. This is a leftover from when I wanted to consider
the upper bound as well, where the modulus does matter.
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/urem.ll
The file was modifiedllvm/lib/Analysis/LazyValueInfo.cpp
Commit fefe20b99313d6b0738806d1504652c3b7edb9e0 by flx
[clang-tidy] performance-unnecessary-copy-initialization: Correctly match the type name of the thisPointertype.

The matching did not work correctly for pointer and reference types.

Differential Revision: https://reviews.llvm.org/D114212

Reviewed-by: courbet
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/performance-unnecessary-copy-initialization-excluded-container-types.cpp
The file was modifiedclang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
Commit aeba28bc62442f4d3a29cc189fd68fca48ee0612 by nikita.ppv
[DSE] Drop hasAnalyzableMemoryWrite() (NFCI)

The functionality of hasAnalyzableMemoryWrite() is effectively
subsumed by getLocForWriteEx(), which will return None if the
instruction is not analyzable. The implementations don't match
exactly (e.g. getLocForWriteEx() does not limit non-calls to
stores), but in conjunction with the isRemovable() check, it ends
up being the same.
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit df70cf5e140966458039975fe94971846bcf901d by lebedev.ri
[NFC][X86][Costmodel] Actually test +prefer-256-bit in replication-shuffle-related tests :(

While -prefer-256-bit indeed becomes complete with D114314,
the real-world (the one with +prefer-256-bit) coverage is lacking.

Hilarious.
The file was modifiedllvm/test/Analysis/CostModel/X86/extend.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-replication-i64.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/trunc.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-replication-i32.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-replication-i8.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-replication-i1.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-replication-i16.ll
Commit e74114add3b3e3caf9461ac019ce68b4cb2ab721 by arthur.j.odwyer
[libc++] [doc] Mark some spaceship-related LWG issues as "Complete."

LWG3330 has been "Completed" since D99309, which was in the 13.x timeframe.
Reviewed as part of D110738.
The file was modifiedlibcxx/docs/Status/Cxx20Issues.csv
The file was modifiedlibcxx/docs/Status/SpaceshipPapers.csv
Commit dca681fee93e12d1e06733b607dec9f11d538151 by joeloser93
[libc++][NFC] Fix typo in ranges::iterator_t synopsis

The `iterator_t` alias template is on `T` not a `R` like the other
neighboring alias templates. Fix the typo.
The file was modifiedlibcxx/include/ranges
Commit 6cc820a3e284cfd5f4d7f1c329e3c8eafb5fb5c3 by pengfei.wang
[X86][FP16] Relax the pattern condition for VZEXT_MOVL to match more cases

Fixes pr52560

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D114313
The file was modifiedllvm/test/CodeGen/X86/avx512fp16-mov.ll
The file was modifiedllvm/lib/Target/X86/X86InstrAVX512.td
Commit f6bce30cf9490265de9b5227df2af46b62564675 by kazu
[llvm] Use range-based for loops (NFC)
The file was modifiedllvm/lib/Bitcode/Writer/ValueEnumerator.cpp
The file was modifiedllvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modifiedllvm/lib/Bitcode/Writer/BitcodeWriter.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/lib/Analysis/MemoryDependenceAnalysis.cpp
The file was modifiedllvm/lib/Analysis/IntervalPartition.cpp
Commit 648157b05a1d5d17e03515e4858ccc70155f8c4e by i
[ELF] Move getOutputSectionName from Writer.cpp to LinkerScript.cpp. NFC

and internalize it.
The file was modifiedlld/ELF/Writer.h
The file was modifiedlld/ELF/Writer.cpp
The file was modifiedlld/ELF/LinkerScript.cpp
Commit 2b9c41189e75d61c49913f33923927771168cb58 by david.green
[AArch64] Extra testing for sinking splats to various instructions. NFC
The file was addedllvm/test/CodeGen/AArch64/sinksplat.ll
Commit 3234f2d9c1669459833e717d34c10296d78b7818 by llvm-dev
[ARM][ParallelDSP] Regenerate complex_dot_prod.ll test
The file was modifiedllvm/test/CodeGen/ARM/ParallelDSP/complex_dot_prod.ll
Commit ad48ef1e3142aafcf23ab9b8037e96c9208c2074 by arjunpitchanathan
[MLIR][NFC] Simplex::restoreRow: improve documentation
The file was modifiedmlir/include/mlir/Analysis/Presburger/Simplex.h
The file was modifiedmlir/lib/Analysis/Presburger/Simplex.cpp
Commit 73d52ee7859fb8b754bca02d789a460974aa33e6 by listmail
Add a best practice section on how to configure a fast builder

This is based on conversations with a couple of folks currently running buildbots. There's a couple pieces which didn't make it in, but this tries to cover the common themes.

Differential Revision: https://reviews.llvm.org/D114325
The file was modifiedllvm/docs/HowToAddABuilder.rst
Commit 357d6362891e057e8fc721bcf76917723f996a40 by llvm-dev
[PowerPC] Regenerate rlwinm2.ll test
The file was modifiedllvm/test/CodeGen/PowerPC/rlwinm2.ll
Commit eced44637cfbfda462888255ac812ad48544f7de by llvm-dev
[Thumb2] Regenerate ext + rot tests
The file was modifiedllvm/test/CodeGen/Thumb2/thumb2-uxt_rot.ll
The file was modifiedllvm/test/CodeGen/Thumb2/thumb2-sxt_rot.ll
Commit 4a5e1ffcf9b8fe2f57112aca2f0223b4a9c8773b by llvm-dev
[ARM] Regenerate sxt_rot.ll tests
The file was modifiedllvm/test/CodeGen/ARM/sxt_rot.ll
Commit fc981cedea073519e25af04bcf85c50cb37cc2c9 by kazu
[llvm] Use range-based for loops (NFC)
The file was modifiedllvm/lib/Target/Mips/Mips16FrameLowering.cpp
The file was modifiedllvm/lib/Target/MSP430/MSP430FrameLowering.cpp
The file was modifiedllvm/lib/CodeGen/PrologEpilogInserter.cpp
The file was modifiedllvm/lib/Target/ARM/ARMFrameLowering.cpp
The file was modifiedllvm/lib/Target/ARM/Thumb1FrameLowering.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
The file was modifiedllvm/lib/Target/Mips/MipsSEFrameLowering.cpp
Commit c133fb321f7ca6083ce15b6aa5bf89de6600e649 by kazu
[CodeGen] Use llvm::is_contained (NFC)
The file was modifiedllvm/lib/CodeGen/LiveRangeEdit.cpp
Commit 6f9cceb7751a6afdbf900d7dd7f84f9a5ce1c24d by jpienaar
[mlir] Move trait to InferTypeOpInterface

Step towards removing the hard coded behavior for this trait and to instead use common interface.

Differential Revision: https://reviews.llvm.org/D114208
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedflang/include/flang/Optimizer/Dialect/FIRDialect.td
The file was modifiedmlir/include/mlir/Dialect/Arithmetic/IR/ArithmeticOps.td
The file was modifiedmlir/lib/Dialect/StandardOps/CMakeLists.txt
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.h
The file was modifiedmlir/lib/Dialect/LLVMIR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.h
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
The file was modifiedmlir/include/mlir/Dialect/Quant/QuantOps.td
The file was modifiedmlir/test/Dialect/SPIRV/IR/bit-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td
The file was modifiedmlir/examples/standalone/include/Standalone/StandaloneOps.td
The file was modifiedmlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/include/mlir/Dialect/Math/IR/MathOps.td
The file was modifiedmlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
The file was modifiedmlir/test/IR/invalid-ops.mlir
The file was modifiedmlir/test/Dialect/SPIRV/IR/logical-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUDialect.h
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
The file was modifiedmlir/include/mlir/Interfaces/InferTypeOpInterface.td
The file was modifiedmlir/include/mlir/Dialect/X86Vector/X86Vector.td
The file was modifiedmlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td
Commit e5a4d0f1498c51858ee9e6682b235389f500ed15 by jpienaar
[mlir] Fix unused function warning (NFC)

Delete function no longer needed as all derived classes override
printer.
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
Commit 1dc62f2653f837745251bd905940c11962469b45 by nikolasklauser
[libc++] Implement P1272R4 (std::byteswap)

Implement P1274R4

Reviewed By: Quuxplusone, Mordante, #libc

Spies: jloser, lebedev.ri, mgorny, libcxx-commits, arichardson

Differential Revision: https://reviews.llvm.org/D114074
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/docs/Status/Cxx2bPapers.csv
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/bit.version.pass.cpp
The file was addedlibcxx/test/std/numerics/bit/byteswap.pass.cpp
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was modifiedlibcxx/include/module.modulemap
The file was modifiedlibcxx/include/version
The file was modifiedlibcxx/docs/FeatureTestMacroTable.rst
The file was addedlibcxx/include/__bit/byteswap.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/bit/byteswap.module.verify.cpp
The file was modifiedlibcxx/include/bit
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp
Commit 0a413506a29e9d9ab0af1156d5474fe78072d554 by llvmgnsyncbot
[gn build] Port 1dc62f2653f8
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit a60b63940a656b01b44d1db749bd4130e3739b27 by joeloser93
[libc++][NFC] Sort includes in __ranges/concepts.h

Differential Revision: https://reviews.llvm.org/D114328
The file was modifiedlibcxx/include/__ranges/concepts.h
Commit b72b56016a6b586a22a49f145c924c03e4239b1d by mcgrathr
NFC: clang-format lib/Transforms/Instrumentation/InstrProfiling.cpp

Differential Revision: https://reviews.llvm.org/D114343
The file was modifiedllvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
Commit ea5421bd0db3e6782f60c53a7055eb11abed09c3 by kazu
[llvm] Use range-based for loops (NFC)
The file was modifiedllvm/lib/Target/XCore/XCoreFrameLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCFrameLowering.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
Commit 49e3838145dff1ec91c2e67a2cb562775c8d2a08 by kazu
[llvm] Use make_early_inc_range (NFC)
The file was modifiedllvm/lib/Target/Hexagon/HexagonPeephole.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiFrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600Packetizer.cpp
Commit af0ecfccae82ade32581959d61fe86f573d08def by pc.wang
[RISCV] Generate pseudo instruction li

Add an alias of `addi [x], zero, imm` to generate pseudo
instruction li, which makes assembly mush more readable.
For existed tests, users can update them by running script
`llvm/utils/update_llc_test_checks.py`.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D112692
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
The file was modifiedllvm/test/CodeGen/RISCV/alu32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbb-zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbs.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/selectcc-to-shiftand.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast-large-vector.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/shrinkwrap.ll
The file was modifiedllvm/test/CodeGen/RISCV/shifts.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/jumptable.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-vrgather.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/srem-lkk.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/i32-icmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/usub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/RISCV/rotl-rotr.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
The file was modifiedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_function_name.ll.expected
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/split-sp-adjust.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/combine-sats.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-lp64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll
The file was modifiedllvm/test/CodeGen/RISCV/lsr-legaladdimm.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-load-store.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbs.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-ilp32f-ilp32d-common.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
The file was modifiedllvm/test/CodeGen/RISCV/usub_sat.ll
The file was modifiedllvm/test/MC/RISCV/rvi-aliases-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64i-aliases-valid.s
The file was modifiedllvm/test/CodeGen/RISCV/atomic-rmw.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/stepvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-bit-preserving-dagcombines.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-shuffles.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-common.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-ilp32.ll
The file was modifiedllvm/test/CodeGen/RISCV/shift-masked-shamt.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-const.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vreductions-mask.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
The file was modifiedllvm/test/MC/RISCV/rv64zba-aliases-valid.s
The file was modifiedllvm/test/CodeGen/RISCV/float-br-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/zext-with-load-is-free.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
The file was modifiedllvm/test/MC/RISCV/numeric-reg-names.s
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
The file was modifiedllvm/test/CodeGen/RISCV/addimm-mulimm.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmaccu.ll
The file was modifiedllvm/test/CodeGen/RISCV/fp-imm.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
The file was modifiedllvm/test/CodeGen/RISCV/pr51206.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll
The file was modifiedllvm/test/CodeGen/RISCV/imm.ll
The file was modifiedllvm/test/CodeGen/RISCV/stack-slot-size.ll
The file was modifiedllvm/test/CodeGen/RISCV/mul.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-calling-conv.ll
The file was modifiedllvm/test/CodeGen/RISCV/remat.ll
The file was modifiedllvm/test/MC/RISCV/rv64zbs-aliases-valid.s
The file was modifiedllvm/test/CodeGen/RISCV/half-arith.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zba.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rem.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vector-strided-load-store.ll
The file was modifiedllvm/test/CodeGen/RISCV/split-offsets.ll
The file was modifiedllvm/test/CodeGen/RISCV/frame.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulhu-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-arith.ll
The file was modifiedllvm/test/MC/RISCV/rv32i-aliases-valid.s
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
The file was modifiedllvm/test/CodeGen/RISCV/atomic-signext.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rvv-vscale.i32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-previous-failure.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-buildvec.ll
The file was modifiedllvm/test/CodeGen/RISCV/alloca.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/urem-lkk.ll
The file was modifiedllvm/test/MC/RISCV/compress-rv32i.s
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-arith.ll
The file was modifiedllvm/test/CodeGen/RISCV/half-br-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zba.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/interleave-crash.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll
The file was modifiedllvm/test/CodeGen/RISCV/ssub_sat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/extract-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-intrinsics.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/flt-rounds.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/xaluo.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
The file was modifiedllvm/test/CodeGen/RISCV/codemodel-lowering.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rvv-vscale.i64.ll
The file was modifiedllvm/test/CodeGen/RISCV/alu64.ll
The file was modifiedllvm/test/CodeGen/RISCV/uadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
The file was modifiedllvm/test/CodeGen/RISCV/atomic-load-store.ll
The file was modifiedllvm/test/CodeGen/RISCV/vec3-setcc-crash.ll
The file was modifiedllvm/test/CodeGen/RISCV/copysign-casts.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll
The file was modifiedllvm/test/CodeGen/RISCV/srem-vector-lkk.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-cc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/sadd_sat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulh-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/div.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
The file was modifiedllvm/test/CodeGen/RISCV/legalize-fneg.ll
The file was modifiedllvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
The file was modifiedllvm/test/CodeGen/RISCV/indirectbr.ll
The file was modifiedllvm/test/CodeGen/RISCV/vararg.ll
The file was modifiedllvm/test/CodeGen/RISCV/sext-zext-trunc.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/sadd_sat_plus.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/combine-splats.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64m-w-insts-legalization.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbb.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-constant-xor.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-br-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/branch-relaxation.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-fp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
The file was modifiedllvm/test/CodeGen/RISCV/ssub_sat_plus.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbb.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
The file was modifiedllvm/test/CodeGen/RISCV/half-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/uadd_sat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/urem-vector-lkk.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/memory-args.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll
The file was modifiedllvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
The file was modifiedllvm/test/CodeGen/RISCV/analyze-branch.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
The file was modifiedllvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
The file was modifiedllvm/test/CodeGen/RISCV/half-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/sink-icmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-half.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/select-optimize-multiple.ll
Commit a05b694b1e1d742d7702c1774abfaf98f502f04b by ikudrin
[ELF][NFC] Do not pass region name to expandMemoryRegion()

The name can be easily got on-site.

Differential Revision: https://reviews.llvm.org/D114228
The file was modifiedlld/ELF/LinkerScript.cpp
Commit 6a3958247aeeacdbf40833151220b089f066c82f by dvyukov
tsan: add another fork test

Add a fork test that models what happens on Mac
where fork calls malloc/free inside of our atfork
callbacks.

Reviewed By: vitalybuka, yln

Differential Revision: https://reviews.llvm.org/D114250
The file was addedcompiler-rt/test/tsan/Linux/fork_deadlock.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
Commit 2ac339ef5f0feca2abe2b8a1720839c58184166c by yedeng.yd
[C++20] [Coroutines] Warn for deprecated form 'for co_await'

The form 'for co_await' is part of CoroutineTS instead of C++20.
So if we detected the use of 'for co_await' in C++20, we should emit
a warning at least.
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td
The file was modifiedclang/include/clang/Basic/DiagnosticParseKinds.td
The file was modifiedclang/test/SemaCXX/co_await-range-for.cpp
The file was modifiedclang/lib/Parse/ParseStmt.cpp
Commit 83484f8472ad7f8ab91b4e944a6f092e8f4d16a8 by mail
Fix nits in clang-tidy's documentation (NFC)

Add commas, articles, and conjunctions where missing.
The file was modifiedclang-tools-extra/docs/clang-tidy/index.rst
Commit 760d4d03d5d3fc0e0d6e4222f670e5fd068645f2 by david.green
[AArch64] Sink splat shuffles to lane index intrinsics

This teaches AArch64TargetLowering::shouldSinkOperands to sink splat
shuffles to certain neon intrinsics, so that they can make use of the
lane variants of the instructions that are available.

Differential Revision: https://reviews.llvm.org/D112994
The file was modifiedllvm/test/CodeGen/AArch64/sinksplat.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/Transforms/CodeGenPrepare/AArch64/sink-free-instructions.ll
Commit b5f20372a82f72f03d47181b87fb55f62772324f by kbobyrev
[clangd] IncludeCleaner: Mark possible expr resolutions as used

Fixes: https://github.com/clangd/clangd/issues/934

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D114287
The file was modifiedclang-tools-extra/clangd/IncludeCleaner.cpp
The file was modifiedclang-tools-extra/clangd/unittests/IncludeCleanerTests.cpp
Commit a82942dd07ea652081f8f293b73801323a4dbbe9 by mail
Add missing clang-tidy args in index.rst (NFC)

The RST docs have gone out of sync with the command-line args that the
clang-tidy program actually supports.
The file was modifiedclang-tools-extra/docs/clang-tidy/index.rst
Commit 84bf5e328664db2e744c4651c52d2460b1733d09 by klimek
Fix various problems found by fuzzing.

1. IndexTokenSource::getNextToken cannot return nullptr; some code was
still written assuming it can; make getNextToken more resilient against
incorrect input and fix its call-sites.

2. Change various asserts that can happen due to user provided input to
conditionals in the code.
The file was modifiedclang/lib/Format/WhitespaceManager.cpp
The file was modifiedclang/lib/Format/UnwrappedLineParser.cpp
The file was modifiedclang/lib/Format/ContinuationIndenter.cpp
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
Commit 2f1c037bbdc4a949e83466d6b315002d71c67731 by gchatelet
[libc] Remove unused variable
The file was modifiedlibc/src/__support/str_to_float.h
Commit a7027bb7997184fd1e6d2ba370ebd4f109a6e737 by diegocaballero
[LV] Pre-commit test for D111846

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D112054
The file was addedllvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
Commit d92aabc33666e83612c93e7c9c5c454510ba9b07 by arjunpitchanathan
[MLIR][NFC] Simplex: remove repeated words in comment
The file was modifiedmlir/include/mlir/Analysis/Presburger/Simplex.h
Commit 4d21b64464ac548ec8442bc0d2a7e984ba78bd88 by sjoerd.meijer
[BPI] Look-up tables for non-loop branches. NFC.

This adds and uses look-up tables for non-loop branch probabilities, which have
have probabilities directly encoded into the tables for the different condition
codes. Compared to having this logic inlined in different functions, as it used
to be the case, I think this is compacter and thus also easier to check/cross
reference. This also adds a test for pointer heuristics that was missing.

Differential Revision: https://reviews.llvm.org/D114009
The file was modifiedllvm/lib/Analysis/BranchProbabilityInfo.cpp
The file was addedllvm/test/Analysis/BranchProbabilityInfo/pointer_heuristics.ll
Commit a9e236bed835c58be381dadb973a1db0681e4795 by nicolas.vasilache
[mlir][Vector] Add a vblendps-based impl for transpose8x8 (both intrin and inline_asm)

This revision follows up on the conversation titled:

```[llvm-dev] Understanding and controlling some of the AVX shuffle emission paths```

The revision adds a vblendps-based implementation for transpose8x8 and further distinguishes between and intrinsics and an inline_asm implementation.

This results in roughly 20% fewer cycles as reported by llvm-mca:

After this revision (intrinsic version, resolves to virtually identical assembly as per the llvm-dev discussion, no vblendps instruction is emitted):
```
Iterations:        100
Instructions:      5900
Total Cycles:      2415
Total uOps:        7300

Dispatch Width:    6
uOps Per Cycle:    3.02
IPC:               2.44
Block RThroughput: 24.0

Cycles with backend pressure increase [ 89.90% ]
Throughput Bottlenecks:
  Resource Pressure       [ 89.65% ]
  - SKXPort1  [ 0.04% ]
  - SKXPort2  [ 12.42% ]
  - SKXPort3  [ 12.42% ]
  - SKXPort5  [ 89.52% ]
  Data Dependencies:      [ 37.06% ]
  - Register Dependencies [ 37.06% ]
  - Memory Dependencies   [ 0.00% ]
```

After this revision (inline_asm version, vblendps instructions are indeed emitted):
```
Iterations:        100
Instructions:      6300
Total Cycles:      2015
Total uOps:        7700

Dispatch Width:    6
uOps Per Cycle:    3.82
IPC:               3.13
Block RThroughput: 20.0

Cycles with backend pressure increase [ 83.47% ]
Throughput Bottlenecks:
  Resource Pressure       [ 83.18% ]
  - SKXPort0  [ 14.49% ]
  - SKXPort1  [ 14.54% ]
  - SKXPort2  [ 19.70% ]
  - SKXPort3  [ 19.70% ]
  - SKXPort5  [ 83.03% ]
  - SKXPort6  [ 14.49% ]
  Data Dependencies:      [ 39.75% ]
  - Register Dependencies [ 39.75% ]
  - Memory Dependencies   [ 0.00% ]
```

An accessible copy of the conversation is available [here](https://gist.github.com/nicolasvasilache/68c7f34012584b0e00f335bcb374ede0).

Reviewed By: ftynse, dcaballe

Differential Revision: https://reviews.llvm.org/D114335
The file was modifiedmlir/test/lib/Dialect/Vector/CMakeLists.txt
The file was modifiedutils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
The file was modifiedmlir/test/Dialect/Vector/vector-transpose-lowering.mlir
The file was modifiedmlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
The file was modifiedmlir/include/mlir/Dialect/X86Vector/Transforms.h
The file was modifiedmlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
The file was addedmlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir
Commit 0ccc44cec067abbc702d5d3afb44e0395c55820d by gysit
[mlir][linalg] Fix tile and fuse for outermost reduction.

Tile and fuse failed if the outermost tile loop is a reduction dimension. Add the necessary check to handle outermost reductions and introduce a test case to verify the change.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114012
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
Commit 789c88e80e878ed866a2d8cfe29c7fd36082274c by nicolas.vasilache
[mlir] Fix unintentional mutation by VectorType/RankedTensorType::Builder dropDim

Differential Revision: https://reviews.llvm.org/D113933
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was modifiedmlir/include/mlir/IR/BuiltinTypes.h
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
Commit 4348cd42c385e71b63e5da7e492172cff6a79d7b by diegocaballero
[LV] Drop integer poison-generating flags from instructions that need predication

This patch fixes PR52111. The problem is that LV propagates poison-generating flags (`nuw`/`nsw`, `exact`
and `inbounds`) in instructions that contribute to the address computation of widen loads/stores that are
guarded by a condition. It may happen that when the code is vectorized and the control flow within the loop
is linearized, these flags may lead to generating a poison value that is effectively used as the base address
of the widen load/store. The fix drops all the integer poison-generating flags from instructions that
contribute to the address computation of a widen load/store whose original instruction was in a basic block
that needed predication and is not predicated after vectorization.

Reviewed By: fhahn, spatel, nlopes

Differential Revision: https://reviews.llvm.org/D111846
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/invariant-store-vectorization.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/vector-reverse-mask4.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
Commit e3d386ea27336edc04ae4fd324ab4337b9f3cf16 by gysit
[mlir][linalg] Add a tile and fuse on tensors pattern.

Add a pattern to apply the new tile and fuse on tensors method. Integrate the pattern into the CodegenStrategy and use the CodegenStrategy to implement the tests.

Depends On D114012

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114067
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/LinalgStrategyPasses.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/CodegenStrategy.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir
The file was modifiedmlir/test/lib/Dialect/Linalg/TestLinalgCodegenStrategy.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile-and-fuse-sequence-on-tensors.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
Commit 050cc1cd6e6882eadba6e5ea7b588ca0b8aa1b12 by nicolas.vasilache
[mlir] Add InitializeNativeTargetAsmParser to ExecutionEngine.

This is required to allow python to work with lowerings that use inline_asm.

Differential Revision: https://reviews.llvm.org/D114338
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/lib/CAPI/ExecutionEngine/ExecutionEngine.cpp
The file was modifiedmlir/lib/ExecutionEngine/CMakeLists.txt
Commit 8d09dd61c381b9c037da0c172b7b4592d9503d2c by lebedev.ri
[X86][TTI] Costmodel for AVX512DQ's VPMOVM2[DQ] / VPMOV[DQ]2M instructions

Much like the VPMOVM2[BW] / VPMOV[BW]2M from AVX512BW,
these either sign-extent the mask register into a vector,
or pack the mask from vector register.

Apparently, we didn't even have MCA tests for these,
added in rG2f364f6f0d3a2420ca78cbd80abb186657180e05,
so i'm just guessing that their perf characteristics
are optimal.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D114314
The file was modifiedllvm/test/Analysis/CostModel/X86/trunc.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/extend.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll
Commit 704d92607d26e696daba596b72cb70effe79a872 by lebedev.ri
[X86][TTI] Finish costmodel for AVX512BW's VPMOVM2[BW] / VPMOV[BW]2M instructions

Apparently my methodology was suboptimal, and not only did miss all the +VL tuples,
i also missed some plain tuples. I believe, this adds everything missing.
Indeed, these manual costmodels are just not okay long-term.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D114334
The file was modifiedllvm/test/Analysis/CostModel/X86/extend.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/trunc.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-replication-i1.ll
Commit 56db1c072c92be36fb1d76aa30487ad62dc58ea8 by simon.moll
[DA][NFC] Update publication - add remarks

Update the reference publication for the SyncDependenceAnalysis and Divergence Analysis.  Fix phrasing, formatting. Add comments on reducible loop limitation.

Reviewed By: sameerds

Differential Revision: https://reviews.llvm.org/D114146
The file was modifiedllvm/lib/Analysis/SyncDependenceAnalysis.cpp
The file was modifiedllvm/lib/Analysis/DivergenceAnalysis.cpp
Commit 955c72c35caf68fe4e2f026da67c6fdcd31d01ad by bradley.smith
[AArch64][ARM] Add missing SVE/SVE2 features from Cortex-A710

Differential Revision: https://reviews.llvm.org/D114169
The file was modifiedllvm/unittests/Support/TargetParserTest.cpp
The file was modifiedllvm/include/llvm/Support/AArch64TargetParser.def
Commit f7751a3a4218229c59adced4964831f7a57d256d by gysit
[mlir][linalg] Remove tile and fuse test pass (NFC).

Remove the tile and fuse test pass that has been replaced by codegen strategy.

Depends On D114067

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114068
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
Commit 106f3074996c69ab732c6371d5ad6b25fcfd4fa5 by tpopp
Rename MlirExecutionEngine lookup to lookupPacked

The purpose of the change is to make clear whether the user is
retrieving the original function or the wrapper function, in line with
the invoke commands. This new functionality is useful for users that
already have defined their own packed interface, so they do not want the
extra layer of indirection, or for users wanting to the look at the
resulting primary function rather than the wrapper function.

All locations, except the python bindings now have a `lookupPacked`
method that matches the original `lookup` functionality. `lookup`
still exists, but with new semantics.

- `lookup` returns the function with a given name. If `bool f(int,int)`
is compiled, `lookup` will return a reference to `bool(*f)(int,int)`.
- `lookupPacked` returns the packed wrapper of the function with the
given name. If `bool f(int,int)` is compiled, `lookupPacked` will return
`void(*mlir_f)(void**)`.

Differential Revision: https://reviews.llvm.org/D114352
The file was modifiedmlir/lib/Bindings/Python/ExecutionEngineModule.cpp
The file was modifiedmlir/lib/ExecutionEngine/ExecutionEngine.cpp
The file was modifiedmlir/include/mlir-c/ExecutionEngine.h
The file was modifiedmlir/lib/CAPI/ExecutionEngine/ExecutionEngine.cpp
The file was modifiedmlir/include/mlir/ExecutionEngine/ExecutionEngine.h
The file was modifiedmlir/lib/ExecutionEngine/JitRunner.cpp
Commit 32c43241e716280d3443d684416826b1e7e5781b by gysit
[mlir][linalg] Always generate an extract/insert slice pair when tiling output tensors.

Adapt tiling to always generate an extract/insert slice pair for output tensors even if the tensor is not tiled. Having an explicit extract/insert slice pair simplifies followup transformations such as padding and bufferization. In particular, it makes read and written iteration argument slices explicit.

Depends On D114067

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114085
The file was modifiedmlir/test/Dialect/Linalg/tile-and-fuse-on-tensors.mlir
The file was modifiedmlir/test/Dialect/Linalg/fusion-tensor-pattern.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
Commit 247a1a55eb6a58199006565d594c6f6c6b58b736 by gysit
[mlir][linalg] Use getAsOpFoldResult in padding (NFC).

After padding, we introduce a ExtractSliceOp to get the final unpadded result. This revision uses getAsOpFoldResult to compute the size of the unpadded result, which guarantees the result type has a partially static shape if some of the sizes of the unpadded result are statically known. At the moment, we rely on canonicalization to cleanup the types after padding.

Depends On D114085

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114153
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
Commit 7c8ae65f2c3d5c1a6aba2f7ee7588f9f76f94f84 by pavel
[lldb/test] Make it possible to run the mock gdb server on a single thread

This is a preparatory commit to enable mocking of qemu startup. That
will involve running the mock server in a separate process, so there's
no need for multithreading.

Initialization is moved from the start function into the constructor
(which can then take an actual socket instead of a class), and the run
method is made public.

Depends on D114156.

Differential Revision: https://reviews.llvm.org/D114157
The file was modifiedlldb/packages/Python/lldbsuite/test/gdbclientutils.py
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbgdbclient.py
Commit 7f09ab08de5ae8f8bd77f5c02c70b991277eb1ae by pavel
[lldb] Fix [some] leaks in python bindings

Using an lldb_private object in the bindings involves three steps
- wrapping the object in it's lldb::SB variant
- using swig to convert/wrap that to a PyObject
- wrapping *that* in a lldb_private::python::PythonObject

Our SBTypeToSWIGWrapper was only handling the middle part. This doesn't
just result in increased boilerplate in the callers, but is also a
functionality problem, as it's very hard to get the lifetime of of all
of these objects right. Most of the callers are creating the SB object
(step 1) on the stack, which means that we end up with dangling python
objects after the function terminates. Most of the time this isn't a
problem, because the python code does not need to persist the objects.
However, there are legitimate cases where they can do it (and even if
the use case is not completely legitimate, crashing is not the best
response to that).

For this reason, some of our code creates the SB object on the heap, but
it has another problem -- it never gets cleaned up.

This patch begins to add a new function (ToSWIGWrapper), which does all
of the three steps, while properly taking care of ownership. In the
first step, I have converted most of the leaky code (except for
SBStructuredData, which needs a bit more work).

Differential Revision: https://reviews.llvm.org/D114259
The file was modifiedlldb/bindings/python/python-swigsafecast.swig
The file was modifiedlldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
The file was modifiedlldb/bindings/python/python-wrapper.swig
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
Commit d633db8f9dd4a361e60a9030c82adc490d5797e3 by nikita.ppv
[SCEV] Fix and validate ValueExprMap/ExprValueMap consistency

This adds validation for consistency of ValueExprMap and
ExprValueMap, and fixes identified issues:

* Addrec construction directly wrote to ValueExprMap in a few places,
  without updating ExprValueMap. Add a helper to ensures they stay
  consistent. The adjustment in forgetSymbolicName() explicitly
  drops the old value from the map, so that we don't rely on it
  being overwritten.
* forgetMemoizedResultsImpl() was dropping the SCEV from
  ExprValueMap, but not dropping the corresponding entries from
  ValueExprMap.

Differential Revision: https://reviews.llvm.org/D113349
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/more-dq-form-prepare.ll
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
Commit 0512bf354063098723ba683c63a972eb1a1f74ee by arjunpitchanathan
[MLIR] PresburgerSetTest: fix comment and add a test case
The file was modifiedmlir/unittests/Analysis/PresburgerSetTest.cpp
Commit 1b927b68b66ef54d5cdc36eeecfe9a006e976f1b by gchatelet
[libc] add memmove basic building blocks

Differential Revision: https://reviews.llvm.org/D113321
The file was modifiedlibc/src/string/memory_utils/elements.h
The file was modifiedlibc/src/string/memory_utils/elements_x86.h
The file was modifiedlibc/test/src/string/memory_utils/elements_test.cpp
Commit 62e9acad0a511070e5eebfd9d53c1774edeecf13 by nikita.ppv
Revert "[SCEV] Fix and validate ValueExprMap/ExprValueMap consistency"

This reverts commit d633db8f9dd4a361e60a9030c82adc490d5797e3.

Causes bootstrap assertion failures:
https://lab.llvm.org/buildbot/#/builders/168/builds/3459/steps/9/logs/stdio
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/test/CodeGen/PowerPC/more-dq-form-prepare.ll
Commit e69d50d9ff3e2608c2153c8e54b5044e05a0c34d by dvyukov
tsan: disable instrumentation in runtime callbacks in tests

All runtime callbacks must be non-instrumented with the new tsan runtime
(it's now more picky with respect to recursion into runtime).
Disable instrumentation in Darwin tests as we do in all other tests now.

Differential Revision: https://reviews.llvm.org/D114348
The file was modifiedcompiler-rt/test/tsan/Darwin/external-swift-debugging.cpp
The file was modifiedcompiler-rt/test/tsan/Darwin/debug_external.cpp
Commit 1784fe0532a69ead17793bced060a9bf9d232027 by dvyukov
tsan: new runtime (v3)

This change switches tsan to the new runtime which features:
- 2x smaller shadow memory (2x of app memory)
- faster fully vectorized race detection
- small fixed-size vector clocks (512b)
- fast vectorized vector clock operations
- unlimited number of alive threads/goroutimes

Depends on D112602.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D112603
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_sync_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_windows.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_shadow_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_dense_alloc.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_java.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mutexset.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_flags.cpp
The file was modifiedcompiler-rt/test/tsan/mutexset7.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_shadow.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_stack_test.cpp
The file was modifiedcompiler-rt/lib/tsan/check_analyze.sh
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_defs.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_trace_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform.h
The file was modifiedcompiler-rt/test/tsan/memcpy_race.cpp
The file was modifiedcompiler-rt/test/tsan/free_race2.c
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_trace.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_access.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_flags_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was modifiedcompiler-rt/test/tsan/memcmp_race.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_flags.inc
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mutexset.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_proc.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
The file was removedcompiler-rt/lib/tsan/rtl/tsan_update_shadow_word.inc
The file was modifiedcompiler-rt/lib/tsan/go/tsan_go.cpp
The file was modifiedcompiler-rt/lib/tsan/CMakeLists.txt
The file was modifiedcompiler-rt/lib/tsan/go/build.bat
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
The file was modifiedcompiler-rt/lib/tsan/go/buildgo.sh
Commit 137d3474ca39a9af6130519a41b62dd58672a5c0 by kai.wang
[RISCV] Reverse the order of loading/storing callee-saved registers.

Currently, we restore the return address register as the last restoring
instruction in the epilog. The next instruction is `ret` usually. It is
a use of return address register. In some microarchitectures, there is
load-to-use data hazard. To avoid the load-to-use data hazard, we could
separate the load instruction from its use as far as possible. In this
patch, we reverse the order of restoring callee-saved registers to
increase the distance of `load ra` and `ret` in the epilog.

Differential Revision: https://reviews.llvm.org/D113967
The file was modifiedllvm/test/CodeGen/RISCV/select-cc.ll
The file was modifiedllvm/test/CodeGen/RISCV/atomic-signext.ll
The file was modifiedllvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll
The file was modifiedllvm/test/CodeGen/RISCV/urem-lkk.ll
The file was modifiedllvm/test/CodeGen/RISCV/shadowcallstack.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/large-rvv-stack-size.mir
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbb.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbb.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
The file was modifiedllvm/test/CodeGen/RISCV/xaluo.ll
The file was modifiedllvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll
The file was modifiedllvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll
The file was modifiedllvm/test/CodeGen/RISCV/interrupt-attr.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/memory-args.ll
The file was modifiedllvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll
The file was modifiedllvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
The file was modifiedllvm/test/CodeGen/RISCV/double-arith.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-common.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/localvar.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
The file was modifiedllvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
The file was modifiedllvm/test/CodeGen/RISCV/fp16-promote.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-intrinsics.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-ilp32.ll
The file was modifiedllvm/test/CodeGen/RISCV/exception-pointer-register.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
The file was modifiedllvm/test/CodeGen/RISCV/half-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-bit-preserving-dagcombines.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64i-complex-float.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll
The file was modifiedllvm/test/CodeGen/RISCV/alloca.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll
The file was modifiedllvm/test/CodeGen/RISCV/stack-realignment.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
The file was modifiedllvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll
The file was modifiedllvm/test/CodeGen/RISCV/callee-saved-gprs.ll
The file was modifiedllvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
The file was modifiedllvm/test/CodeGen/RISCV/stack-store-check.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-br-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/copysign-casts.ll
The file was modifiedllvm/test/CodeGen/RISCV/srem-lkk.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-arith.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-intrinsics.ll
The file was modifiedllvm/test/CodeGen/RISCV/calls.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/fastcc-int.ll
The file was modifiedllvm/test/CodeGen/RISCV/atomic-rmw.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll
The file was modifiedllvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-lp64.ll
The file was modifiedllvm/test/CodeGen/RISCV/large-stack.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32i-rv64i-float-double.ll
The file was modifiedllvm/test/CodeGen/RISCV/calling-conv-half.ll
The file was modifiedllvm/test/CodeGen/RISCV/remat.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/emergency-slot.mir
The file was modifiedllvm/test/CodeGen/RISCV/half-intrinsics.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
The file was modifiedllvm/test/CodeGen/RISCV/interrupt-attr-callee.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/addi-scalable-offset.mir
The file was modifiedllvm/test/CodeGen/RISCV/half-arith.ll
The file was modifiedllvm/test/CodeGen/RISCV/vararg.ll
The file was modifiedllvm/test/CodeGen/RISCV/half-mem.ll
The file was modifiedllvm/test/CodeGen/RISCV/shifts.ll
The file was modifiedllvm/test/CodeGen/RISCV/srem-vector-lkk.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll
The file was modifiedllvm/test/CodeGen/RISCV/frame-info.ll
The file was modifiedllvm/test/CodeGen/RISCV/frame.ll
The file was modifiedllvm/test/CodeGen/RISCV/shrinkwrap.ll
The file was modifiedllvm/test/CodeGen/RISCV/aext-to-sext.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll
The file was modifiedllvm/test/CodeGen/RISCV/urem-vector-lkk.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-fcmp.ll
The file was modifiedllvm/test/CodeGen/RISCV/mul.ll
Commit dc9b5550b2238d65bcaa937c412d51802d819aeb by zarko
[NFC][llvm][Hexagon] Inclusive Terms remove uses of sanity in Hexagon taget

Most changes are rewording comments but there are some assertions that I rephrased.

Reviewed By: kparzysz

Differential Revision: https://reviews.llvm.org/D114132
The file was modifiedllvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonGenInsert.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonGenMux.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Hexagon/pipeliner/swp-phi-start.mir
The file was modifiedllvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
The file was modifiedllvm/test/CodeGen/Hexagon/abi-padding-2.ll
The file was modifiedllvm/lib/Target/Hexagon/BitTracker.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonBitTracker.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
Commit 02298c15d5e0e51185bc26ec04d230a851d8b05b by a.bataev
[SLP][NFC]Add a test that reveals the problem in the emission of
vector int division with undefs.
The file was addedllvm/test/Transforms/SLPVectorizer/X86/arith-div-undef.ll
Commit 59a26448a60e8f2469e5f0a42a4faf87631cc20c by kazu
[Target] Use range-based for loops (NFC)
The file was modifiedllvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
The file was modifiedllvm/lib/Target/Mips/MipsExpandPseudo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonGenInsert.cpp
The file was modifiedllvm/lib/Target/Mips/MipsConstantIslandPass.cpp
The file was modifiedllvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
Commit bf20a3b9b94a5b6fc97fdba4546391c30ad26a22 by kazu
Use std::string::substr (NFC)
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/utils/TableGen/AsmWriterInst.cpp
The file was modifiedclang/lib/Frontend/Rewrite/RewriteModernObjC.cpp
The file was modifiedclang/lib/Frontend/Rewrite/RewriteObjC.cpp
Commit ffc32efd1cd6a34659e2c559e9ba6ee923b1637a by gabor.marton
[Analyzer][Core] Simplify IntSym in SValBuilder

Make the SimpleSValBuilder capable to simplify existing IntSym
expressions based on a newly added constraint on the sub-expression.

Differential Revision: https://reviews.llvm.org/D113754
The file was addedclang/test/Analysis/svalbuilder-simplify-intsym.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
Commit cc9fdedba7c9b19fed24a7b67f63a3a2e7a729bd by koraq
[libc++] Improve CMake include directory search.

This patch has been tested in D70631, but it should be reviewed
separately.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D114248
The file was modifiedlibcxx/src/CMakeLists.txt
Commit 7c2d51474aae87635de8f9ecbcdf622d376269a9 by thakis
[asm] Allow labels as operands in intel asm syntax

This makes a line in llvm/test/CodeGen/X86/asm-block-labels.ll pass
with `asm inteldialect` too.

I don't know if this is something one can hit in practice with inline
asm. The test is from 2007 (4646aa3e337aa) but in 2009 blockaddr was
introduced and e.g. `__asm__ __volatile__("brl %0" :: "X"(&&foo) : "memory");`
compiles to

    call void asm sideeffect "brl $0", "X,..."(i8* blockaddress(@func, %1))

nowadays (thanks to jrtc27 for that example!).

(6c4d255bf3d64 switched clang to blockaddress on an opt-in basis,
e4801f7844bb added docs for it, 31b132c0b781 added IR support.)

I half-heartedly tried to build clang 2.8 locally, but it didn't
just build. And 2.8 didn't have a prebuilt clang binary yet.

The motivation is to make EmitGCCInlineAsmStr() and EmitMSInlineAsmStr()
more alike, and maybe we should delete this code form EmitGCCInlineAsmStr()
instead. But since it's just 3 lines and it's reachable from LLVM IR,
let's do the safer thing for now.

Differential Revision: https://reviews.llvm.org/D114329
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
The file was modifiedllvm/test/CodeGen/X86/asm-block-labels.ll
Commit 2fb3c05b34a061cddd757b4c39b6095acf42e9f4 by thakis
[asm] Merge EmitMSInlineAsmStr() and EmitGCCInlineAsmStr()

This basically reverts 1778831a3d1, which split them.
Since they were split 9 years ago, EmitGCCInlineAsmStr() grew a bunch of
features that usually weren't added to EmitMSInlineAsmStr(), and
that was usually a mistake.  D71677, D113932, D114167 are all examples
of where things were backported to EmitMSInlineAsmStr().

The names were also not great. EmitMSInlineAsmStr() used to be called for `asm
inteldialect`, which clang produces for Microsoft-style __asm { ... } blocks as
well for GCC-style __asm__ / asm statements with -masm=intel. On the other hand,
EmitGCCInlineAsmStr() used to be called for `asm`, whic clang produces for
GCC-style __asm__ / asm statements with -masm=att (the default).

It's also less code (23 insertions, 188 deletions).

No behavior change.

Differential Revision: https://reviews.llvm.org/D114330
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
Commit 04a6dc06a07b9eb89834a4ae80f56749de7474e7 by nikolasklauser
[libc++] [NFC] Mark P0858R0 as implemented

P0858R0 seems to be implemented. D93830 sets `__cpp_lib_string_view` and D80452 sets `__cpp_lib_array_constexpr`.

Reviewed By: Quuxplusone, Mordante, ldionne, #libc

Spies: libcxx-commits

Differential Revision: https://reviews.llvm.org/D114344
The file was modifiedlibcxx/docs/Status/Cxx20Papers.csv
Commit e7cee55c9d6b178baae3388ae2f620b44cf51e63 by Louis Dionne
[libc++] Remove uses of printf in some test support headers

In the test suite, we generally don't use printf or other reporting
utilities. It's not that it wouldn't be useful, it's just that some
platforms don't support IO.

Instead, we try to keep test cases small and self-contained so that
we can reasonably easily reproduce failures locally and debug them.
This patch removes printf in some of the last places in the test suite
that used it. The only remaining places are in a deque test and in the
filesystem tests. The filesystem tests are arguably fine to keep using
IO, since we're testing <filesystem>. The deque test will be handled
separately.

Differential Revision: https://reviews.llvm.org/D114282
The file was modifiedlibcxx/test/support/controlled_allocators.h
The file was modifiedlibcxx/test/support/uses_alloc_types.h
The file was modifiedlibcxx/test/support/type_id.h
Commit a62b60167ddbc23602ea20d65a41b2cd1ce5953a by pklausler
[flang] Predefine unit 0 connected to stderr

This is a near-universal language extension; external unit 0
is preconnected to the standard error output.

Differential Revision: https://reviews.llvm.org/D114298
The file was modifiedflang/docs/Extensions.md
The file was modifiedflang/module/iso_fortran_env.f90
The file was modifiedflang/runtime/unit.cpp
Commit 774f7832fb2539b20e5e93ae675a0b7428e4f2f2 by Louis Dionne
[runtimes] Do not force -stdlib=libc++ on Apple platforms

It is pointless to specify -stdlib=libc++ on Apple platforms since
that is the default anyway.

Differential Revision: https://reviews.llvm.org/D114283
The file was modifiedruntimes/CMakeLists.txt
Commit 9c5982ef8e95a0b5acdbd0d2599fbd87526abe2e by zinenko
[mlir] support recursive types in type conversion infra

MLIR supports recursive types but they could not be handled by the conversion
infrastructure directly as it would result in infinite recursion in
`convertType` for elemental types. Support this case by keeping the "call
stack" of nested type conversions in the TypeConverter class and by passing it
as an optional argument to the individual conversion callback. The callback can
then check if a specific type is present on the stack more than once to detect
and handle the recursive case.

This approach is preferred to the alternative approach of having a separate
callback dedicated to handling only the recursive case as the latter was
observed to introduce ~3% time overhead on a 50MB IR file even if it did not
contain recursive types.

This approach is also preferred to keeping a local stack in type converters
that need to handle recursive types as that would compose poorly in case of
out-of-tree or cross-project extensions.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D113579
The file was modifiedmlir/test/lib/Dialect/Test/TestPatterns.cpp
The file was modifiedmlir/docs/DialectConversion.md
The file was modifiedmlir/include/mlir/Transforms/DialectConversion.h
The file was modifiedmlir/lib/Transforms/Utils/DialectConversion.cpp
The file was modifiedmlir/test/Transforms/test-legalize-type-conversion.mlir
Commit 93284120f28c82503138f3e594358349ed0ab37f by antiagainst
[mlir][vector] Fix TransferOpReduceRank for 0-D tensors

We cannot unconditionally generate memref.load ops for such cases;
need to check the source's type.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114376
The file was modifiedmlir/lib/Dialect/Vector/VectorTransferPermutationMapRewritePatterns.cpp
The file was modifiedmlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
Commit ed8b5b37abb12bd8e7bf7b3f8ec28187ad79a927 by fmayer
[hwasan] fix arguments to symbolizer.

new versions do not accept -inlining of -functions (tested with 11 and
13).

Reviewed By: hctim

Differential Revision: https://reviews.llvm.org/D114303
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize
Commit 996ef895cd3d1313665a42fc8e20d1d4e1cf2a28 by pklausler
[flang] Add -fno-automatic, refine IsSaved()

This legacy option (available in other Fortran compilers with various
spellings) implies the SAVE attribute for local variables on subprograms
that are not explicitly RECURSIVE.  The SAVE attribute essentially implies
static rather than stack storage.  This was the default setting in Fortran
until surprisingly recently, so explicit SAVE statements & attributes
could be and often were omitted from older codes.  Note that initialized
objects already have an implied SAVE attribute, and objects in COMMON
effectively do too, as data overlays are extinct; and since objects that are
expected to survive from one invocation of a procedure to the next in static
storage should probably be explicit initialized in the first place, so the
use cases for this option are somewhat rare, and all of them could be
handled with explicit SAVE statements or attributes.

This implicit SAVE attribute must not apply to automatic (in the Fortran sense)
local objects, whose sizes cannot be known at compilation time.  To get the
semantics of IsSaved() right, the IsAutomatic() predicate was moved into
Evaluate/tools.cpp to allow for dynamic linking of the compiler.  The
redundant predicate IsAutomatic() was noticed, removed, and its uses replaced.

GNU Fortran's spelling of the option (-fno-automatic) was added to
the clang-based driver and used for basic sanity testing.

Differential Revision: https://reviews.llvm.org/D114209
The file was modifiedclang/lib/Driver/ToolChains/Flang.cpp
The file was modifiedflang/test/Driver/driver-help.f90
The file was modifiedflang/lib/Evaluate/tools.cpp
The file was modifiedflang/lib/Semantics/runtime-type-info.cpp
The file was modifiedflang/test/Semantics/save01.f90
The file was addedflang/test/Semantics/save02.f90
The file was modifiedflang/include/flang/Semantics/tools.h
The file was modifiedflang/lib/Semantics/resolve-names-utils.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedflang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedflang/include/flang/Common/Fortran-features.h
The file was modifiedflang/include/flang/Evaluate/tools.h
The file was modifiedflang/test/Driver/driver-help-hidden.f90
The file was modifiedflang/lib/Semantics/tools.cpp
The file was modifiedflang/test/Semantics/entry01.f90
Commit 5f18ae39880fa9e67fbfe9dcc2c3f18242626daf by dvyukov
Revert "tsan: new runtime (v3)"

Summary:
This reverts commit 1784fe0532a69ead17793bced060a9bf9d232027.

Broke some bots:
https://lab.llvm.org/buildbot#builders/57/builds/12365
http://green.lab.llvm.org/green/job/clang-stage1-RA/25658/

Reviewers: vitalybuka, melver

Subscribers:
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_stack_test.cpp
The file was modifiedcompiler-rt/test/tsan/free_race2.c
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
The file was addedcompiler-rt/lib/tsan/rtl/tsan_update_shadow_word.inc
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp
The file was modifiedcompiler-rt/test/tsan/memcmp_race.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_flags.inc
The file was modifiedcompiler-rt/test/tsan/mutexset7.cpp
The file was modifiedcompiler-rt/lib/tsan/go/buildgo.sh
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mutexset.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_proc.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_shadow_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_flags_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_shadow.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_dense_alloc.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_flags.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_sync_test.cpp
The file was modifiedcompiler-rt/lib/tsan/CMakeLists.txt
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_trace_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/test/tsan/memcpy_race.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_windows.cpp
The file was modifiedcompiler-rt/lib/tsan/check_analyze.sh
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp
The file was modifiedcompiler-rt/lib/tsan/go/build.bat
The file was modifiedcompiler-rt/lib/tsan/go/tsan_go.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_java.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_trace.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_access.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mutexset.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_defs.h
Commit 344cef6695e9af05ed9fa5bb96b3a475c7a4df4b by arthur.j.odwyer
[libc++] Granularize the <random> header. NFCI.

Actually there's one functional change here, which is that users can
no longer depend on <random> to include all of C++20 <concepts>. That
inclusion is so new that we believe nobody should be depending on it
yet, even in the presence of Hyrum's Law. We keep the includes of <vector>,
<algorithm>, etc., so as not to break pre-C++20 Hyrum's Law users.

Differential Revision: https://reviews.llvm.org/D114281
The file was addedlibcxx/include/__random/poisson_distribution.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/default_random_engine.module.verify.cpp
The file was addedlibcxx/include/__random/log2.h
The file was addedlibcxx/include/__random/ranlux.h
The file was addedlibcxx/include/__random/linear_congruential_engine.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/shuffle_order_engine.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/geometric_distribution.module.verify.cpp
The file was addedlibcxx/include/__random/fisher_f_distribution.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/lognormal_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/subtract_with_carry_engine.module.verify.cpp
The file was addedlibcxx/include/__random/cauchy_distribution.h
The file was addedlibcxx/include/__random/gamma_distribution.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/weibull_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/piecewise_linear_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/discard_block_engine.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/linear_congruential_engine.module.verify.cpp
The file was addedlibcxx/include/__random/piecewise_linear_distribution.h
The file was addedlibcxx/include/__random/discard_block_engine.h
The file was addedlibcxx/include/__random/is_seed_sequence.h
The file was addedlibcxx/include/__random/mersenne_twister_engine.h
The file was addedlibcxx/include/__random/weibull_distribution.h
The file was addedlibcxx/include/__random/shuffle_order_engine.h
The file was modifiedlibcxx/include/random
The file was addedlibcxx/include/__random/binomial_distribution.h
The file was addedlibcxx/include/__random/piecewise_constant_distribution.h
The file was addedlibcxx/include/__random/student_t_distribution.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/bernoulli_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/normal_distribution.module.verify.cpp
The file was addedlibcxx/include/__random/independent_bits_engine.h
The file was modifiedlibcxx/include/module.modulemap
The file was addedlibcxx/include/__random/uniform_random_bit_generator.h
The file was modifiedlibcxx/include/__random/uniform_int_distribution.h
The file was addedlibcxx/include/__random/discrete_distribution.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/extreme_value_distribution.module.verify.cpp
The file was addedlibcxx/include/__random/chi_squared_distribution.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/gamma_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/fisher_f_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/independent_bits_engine.module.verify.cpp
The file was addedlibcxx/include/__random/bernoulli_distribution.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/knuth_b.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/ranlux.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/chi_squared_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/poisson_distribution.module.verify.cpp
The file was addedlibcxx/include/__random/lognormal_distribution.h
The file was addedlibcxx/include/__random/exponential_distribution.h
The file was addedlibcxx/include/__random/normal_distribution.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/exponential_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/log2.module.verify.cpp
The file was addedlibcxx/include/__random/default_random_engine.h
The file was addedlibcxx/include/__random/extreme_value_distribution.h
The file was addedlibcxx/include/__random/geometric_distribution.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/mersenne_twister_engine.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/generate_canonical.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/negative_binomial_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/piecewise_constant_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/is_seed_sequence.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/seed_seq.module.verify.cpp
The file was modifiedlibcxx/include/CMakeLists.txt
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/uniform_real_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/cauchy_distribution.module.verify.cpp
The file was modifiedlibcxx/test/std/numerics/rand/rand.eng/rand.eng.lcong/params.fail.cpp
The file was addedlibcxx/include/__random/generate_canonical.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/random_device.module.verify.cpp
The file was addedlibcxx/include/__random/uniform_real_distribution.h
The file was addedlibcxx/include/__random/knuth_b.h
The file was addedlibcxx/include/__random/negative_binomial_distribution.h
The file was addedlibcxx/include/__random/random_device.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/binomial_distribution.module.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/student_t_distribution.module.verify.cpp
The file was addedlibcxx/include/__random/seed_seq.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/uniform_random_bit_generator.module.verify.cpp
The file was addedlibcxx/include/__random/subtract_with_carry_engine.h
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/random/discrete_distribution.module.verify.cpp
Commit d8380ad977e94498e170b06449c81f1fc27da7b5 by arthur.j.odwyer
[libc++] [P1614] Implement [cmp.alg]'s std::{strong,weak,partial}_order.

This does not include `std::compare_*_fallback`; those are coming later.

There's still an open question of how to implement std::strong_order
for `long double`, which has 80 value bits and 48 padding bits on x86-64,
and which is presumably *not* IEEE 754-compliant on PPC64 and so on.
So that part is left unimplemented.

Differential Revision: https://reviews.llvm.org/D110738
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/compare/weak_order.module.verify.cpp
The file was addedlibcxx/test/std/language.support/cmp/cmp.alg/strong_order_long_double.verify.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/compare/strong_order.module.verify.cpp
The file was addedlibcxx/include/__compare/partial_order.h
The file was modifiedlibcxx/include/module.modulemap
The file was addedlibcxx/include/__utility/priority_tag.h
The file was addedlibcxx/include/__compare/weak_order.h
The file was addedlibcxx/include/__compare/strong_order.h
The file was modifiedlibcxx/include/utility
The file was modifiedlibcxx/include/CMakeLists.txt
The file was addedlibcxx/test/std/language.support/cmp/cmp.alg/weak_order.pass.cpp
The file was addedlibcxx/test/std/language.support/cmp/cmp.alg/partial_order.pass.cpp
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/utility/priority_tag.module.verify.cpp
The file was addedlibcxx/test/std/language.support/cmp/cmp.alg/strong_order.pass.cpp
The file was modifiedlibcxx/docs/Status/Cxx20Issues.csv
The file was addedlibcxx/test/libcxx/diagnostics/detail.headers/compare/partial_order.module.verify.cpp
The file was modifiedlibcxx/include/compare
Commit 71e1f0caf4b6d0dea0c926fe55eca5de673c0832 by llvmgnsyncbot
[gn build] Port 344cef6695e9
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit 22de6e37064105081987528558311a7f5cac7e35 by llvmgnsyncbot
[gn build] Port d8380ad977e9
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit 2e67276d984d9d03e24487c987570a8e091759d0 by manojgupta
libfuzzer: Disable broken tests for arm

libfuzzer was recently enabled for Arm32 in D112091.
A few tests apparently do not work with arm32 so disable them.
The list of tests was obtained from
https://lab.llvm.org/buildbot/#/builders/190/builds/513

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D114312
The file was modifiedcompiler-rt/test/fuzzer/msan-param-unpoison.test
The file was modifiedcompiler-rt/test/fuzzer/acquire-crash-state.test
The file was modifiedcompiler-rt/test/fuzzer/msan-custom-mutator.test
The file was modifiedcompiler-rt/test/fuzzer/sigint.test
The file was modifiedcompiler-rt/test/fuzzer/compressed.test
The file was modifiedcompiler-rt/test/fuzzer/msan.test
The file was modifiedcompiler-rt/test/fuzzer/value-profile-div.test
Commit c0efe8f266355bf7fa71f722d6ae39d422459673 by Louis Dionne
[libc++][NFC] Reformat comment about D68480 support
The file was modifiedlibcxx/test/std/thread/thread.barrier/arrive.pass.cpp
The file was modifiedlibcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_notify_all.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.barrier/arrive_and_wait.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.semaphore/binary.pass.cpp
The file was modifiedlibcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_wait.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.barrier/arrive_and_drop.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.semaphore/release.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.semaphore/acquire.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.semaphore/timed.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.barrier/completion.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.semaphore/try_acquire.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.latch/try_wait.pass.cpp
The file was modifiedlibcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_notify_one.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.latch/count_down.pass.cpp
The file was modifiedlibcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_wait_explicit.pass.cpp
The file was modifiedlibcxx/test/std/thread/thread.latch/arrive_and_wait.pass.cpp
Commit c5bf8d6f764c94744e66fa8189d524e1d416bad8 by cjdb
[libcxx][NFC] adds status entry for ranges algorithms

Differential Revision: https://reviews.llvm.org/D114295
The file was modifiedlibcxx/docs/Status/Ranges.rst
The file was addedlibcxx/docs/Status/RangesAlgorithms.csv
Commit b8bba3d8016852a858daa76035cbe270ae0e14d8 by cjdb
[libcxx][NFC] adds var-const@ as the owner for the uninitialised algos
The file was modifiedlibcxx/docs/Status/RangesAlgorithms.csv
Commit c407769f5e6c81d56de0b251aed5750a16a7651c by Stanislav.Mekhanoshin
[InstCombine] (~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) & (c | (b ^ a)))

Transform
```
(~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) & (c | (b ^ a)))
```
And swapped case:
```
(a | ~(b & c)) & ~(a & (b ^ c)) --> ~(a | b) | (a ^ b ^ c)
```

```
----------------------------------------
define i3 @src(i3 %a, i3 %b, i3 %c) {
%0:
  %or1 = or i3 %b, %c
  %not1 = xor i3 %or1, 7
  %and1 = and i3 %a, %not1
  %xor1 = xor i3 %b, %c
  %or2 = or i3 %xor1, %a
  %not2 = xor i3 %or2, 7
  %or3 = or i3 %and1, %not2
  ret i3 %or3
}
=>
define i3 @tgt(i3 %a, i3 %b, i3 %c) {
%0:
  %obc = or i3 %b, %c
  %xbc = xor i3 %b, %c
  %o = or i3 %a, %xbc
  %and = and i3 %obc, %o
  %r = xor i3 %and, 7
  ret i3 %r
}
Transformation seems to be correct!
```
```
----------------------------------------
define i4 @src(i4 %a, i4 %b, i4 %c) {
%0:
  %and1 = and i4 %b, %c
  %not1 = xor i4 %and1, 15
  %or1 = or i4 %not1, %a
  %xor1 = xor i4 %b, %c
  %and2 = and i4 %xor1, %a
  %not2 = xor i4 %and2, 15
  %and3 = and i4 %or1, %not2
  ret i4 %and3
}
=>
define i4 @tgt(i4 %a, i4 %b, i4 %c) {
%0:
  %xor1 = xor i4 %b, %c
  %xor2 = xor i4 %xor1, %a
  %or1 = or i4 %a, %b
  %not1 = xor i4 %or1, 15
  %or2 = or i4 %xor2, %not1
  ret i4 %or2
}
Transformation seems to be correct!
```

Differential Revision: https://reviews.llvm.org/D112955
The file was modifiedllvm/test/Transforms/InstCombine/and-xor-or.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit 1a76a3a7e42db75f23b1be1eaac4f0390b4ba2b0 by listmail
[docs] Incorprate first round of feedback on D114325

This builds on the text landed in 73d52ee78, and incorporates the points that Renato brought up.

Differential Revision: https://reviews.llvm.org/D114325
The file was modifiedllvm/docs/HowToAddABuilder.rst
Commit 944071eca2c880d7437658b3461737c388a2bed2 by vyng
[lld-macho] Don't replace local personality symbol with LazySymbol

Follup-up to D107533, where we replaced local syms with non-local.
It doesn't make sense to replace local symbol with lazy.

Differential Revision: https://reviews.llvm.org/D110040
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was modifiedlld/MachO/UnwindInfoSection.cpp
The file was addedlld/test/MachO/objc-uses-custom-personality.s
Commit 5684a614dd1c1912feda712be0b14923b7c92c00 by mascasa
[HWASan] Remove -Wa,-mrelax-relocations=no flag.

We no longer need it after https://reviews.llvm.org/D113220.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D113221
The file was modifiedcompiler-rt/test/hwasan/lit.cfg.py
The file was modifiedcompiler-rt/test/hwasan/TestCases/global.c
Commit e0b7bee7cf8ece5ec41c8343b61e1daf651e4f3a by joker.eph
Revert "[mlir][Vector] Add a vblendps-based impl for transpose8x8 (both intrin and inline_asm)"

This reverts commit a9e236bed835c58be381dadb973a1db0681e4795.
This broke the Windows build:

mlir\include\mlir/Dialect/X86Vector/Transforms.h(28): error C2061: syntax error: identifier 'uint'
The file was removedmlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir
The file was modifiedmlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
The file was modifiedmlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
The file was modifiedutils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
The file was modifiedmlir/test/Dialect/Vector/vector-transpose-lowering.mlir
The file was modifiedmlir/include/mlir/Dialect/X86Vector/Transforms.h
The file was modifiedmlir/test/lib/Dialect/Vector/CMakeLists.txt
Commit a40dcd060e9d374d68df53b881d62e4de2bc310a by emaste
[Driver] correct typo in FreeBSD 14 test

The test specified amd64-unknown-freebsd40.0 rather than 14.0.  Since
40 is greater than 14 the test (for behaviour new in FreeBSD 14) worked
despite the typo.

Fixes: 699d47472c3f
Reviewed by: dim (in D77776)
The file was modifiedclang/test/Driver/freebsd.cpp
Commit 8bfcf1ab6c6d92e8b6f21ec3a32cfc4ae4079e7d by spatel
[InstCombine] move/add tests for binops with sext operand; NFC
The file was modifiedllvm/test/Transforms/InstCombine/and.ll
The file was modifiedllvm/test/Transforms/InstCombine/or.ll
The file was modifiedllvm/test/Transforms/InstCombine/binop-cast.ll
Commit 78dc50e5a1a3a477ed80d3011eae59bc12562c3c by spatel
[InstCombine] avoid 'tmp' usage in test files; NFC

The update script ( utils/update_test_checks.py ) warns against this
because it can conflict with the default FileCheck names given to
anonymous values in the IR.
The file was modifiedllvm/test/Transforms/InstCombine/getelementptr.ll
Commit cbb75129b7cfcd50a527acf96469b2ad980352c1 by spatel
[InstCombine] regenerate test checks; NFC

Avoid phantom (cosmetic value naming) diffs in potential future patches.
The file was modifiedllvm/test/Transforms/InstCombine/compare-signs.ll
The file was modifiedllvm/test/Transforms/InstCombine/select-icmp-and.ll
The file was modifiedllvm/test/Transforms/InstCombine/and-compare.ll
Commit 3028bca6a987e424365ca67f6dc29e037e52ea11 by pifon
[mlir] Move AllocationOpInterface to Bufferize/IR/AllocationOpInterface.td.

Remove the interface from op defs in MemRefOps.td and make it an external model.

This is the first PR of many that will move bufferization-related ops, interfaces, passes to Dialect/Bufferize.
RFC: https://llvm.discourse.group/t/rfc-dialect-for-bufferization-related-ops/4712
It is still debated if the comprehensive bufferization has to be moved there as well, so for now I am just moving the "gradual" bufferization.

Differential Revision: https://reviews.llvm.org/D114147
The file was modifiedmlir/lib/Transforms/CMakeLists.txt
The file was modifiedmlir/lib/Transforms/BufferDeallocation.cpp
The file was addedmlir/lib/Dialect/Bufferization/IR/CMakeLists.txt
The file was addedmlir/include/mlir/Dialect/Bufferization/IR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Interfaces/SideEffectInterfaces.td
The file was addedmlir/include/mlir/Dialect/Bufferization/IR/AllocationOpInterface.h
The file was modifiedmlir/include/mlir/Dialect/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
The file was modifiedmlir/lib/Dialect/CMakeLists.txt
The file was addedmlir/include/mlir/Dialect/Bufferization/IR/AllocationOpInterface.td
The file was addedmlir/lib/Dialect/Bufferization/IR/AllocationOpInterface.cpp
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was addedmlir/lib/Dialect/Bufferization/CMakeLists.txt
The file was addedmlir/include/mlir/Dialect/Bufferization/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
Commit ad501054f1b5ce0aca47c931aa03a22706e4ff8d by quinn.pham
[NFC][clang] Inclusive language: rename master variable to controller in debug-info tests

[NFC] As part of using inclusive language within the llvm project, this patch
replaces master with controller in these tests.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D114108
The file was modifiedcross-project-tests/debuginfo-tests/llgdb-tests/blocks.m
The file was modifiedclang/test/CodeGenObjC/debug-info-block-helper.m
Commit de18b7dee6a81e5e790c8e8060065b1ef72d13ed by pifon
Revert "[mlir] Move AllocationOpInterface to Bufferize/IR/AllocationOpInterface.td."

This reverts commit 3028bca6a987e424365ca67f6dc29e037e52ea11.
For some reason using FallbackModel works with CMake and does not work
with bazel. Using `ExternalModel` works. I will check what's going on
and resubmit tomorrow.
The file was removedmlir/include/mlir/Dialect/Bufferization/IR/AllocationOpInterface.h
The file was removedmlir/lib/Dialect/Bufferization/IR/CMakeLists.txt
The file was modifiedmlir/lib/Transforms/BufferDeallocation.cpp
The file was modifiedmlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
The file was removedmlir/include/mlir/Dialect/Bufferization/CMakeLists.txt
The file was removedmlir/include/mlir/Dialect/Bufferization/IR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Interfaces/SideEffectInterfaces.td
The file was modifiedmlir/lib/Dialect/CMakeLists.txt
The file was removedmlir/include/mlir/Dialect/Bufferization/IR/AllocationOpInterface.td
The file was modifiedmlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
The file was modifiedmlir/lib/Transforms/CMakeLists.txt
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/include/mlir/Dialect/CMakeLists.txt
The file was removedmlir/lib/Dialect/Bufferization/IR/AllocationOpInterface.cpp
The file was removedmlir/lib/Dialect/Bufferization/CMakeLists.txt
Commit 44a3916f78b0a0842e7b4c3827a48b4a44cb3a60 by jay.foad
[AMDGPU] Allow VOP3 source modifiers in fpow expansion

Differential Revision: https://reviews.llvm.org/D114353
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/fpow.ll
Commit 592504aa26ebe917174e9dd07ecf816a5030a121 by quinn.pham
[NFC][llvm] Inclusive language: replace master with main in 2007-04-02-RegScavengerAssert.ll

[NFC] As part of using inclusive language within the llvm project, this patch
replaces master with main in `2007-04-02-RegScavengerAssert.ll`.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D114276
The file was modifiedllvm/test/CodeGen/ARM/2007-04-02-RegScavengerAssert.ll
Commit 8e2fd879e6f91b1e4fdf6217a667079aaeaece99 by Jinsong Ji
[PowerPC] [Clang] Enable Intel intrinsics support on FreeBSD

This enables Intel intrinsics support on FreeBSD.

Thanks to @pkubaj who noticed this feature was missing

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D113451
The file was modifiedclang/lib/Headers/ppc_wrappers/pmmintrin.h
The file was modifiedclang/lib/Headers/ppc_wrappers/smmintrin.h
The file was modifiedclang/test/CodeGen/ppc-mm-malloc.c
The file was modifiedclang/lib/Headers/ppc_wrappers/emmintrin.h
The file was modifiedclang/lib/Headers/ppc_wrappers/mmintrin.h
The file was modifiedclang/test/CodeGen/ppc-mmintrin.c
The file was modifiedclang/test/CodeGen/ppc-xmmintrin.c
The file was modifiedclang/test/CodeGen/ppc-tmmintrin.c
The file was modifiedclang/lib/Driver/CMakeLists.txt
The file was modifiedclang/test/CodeGen/ppc-pmmintrin.c
The file was addedclang/lib/Driver/ToolChains/PPCFreeBSD.h
The file was modifiedclang/lib/Headers/ppc_wrappers/xmmintrin.h
The file was modifiedclang/lib/Driver/Driver.cpp
The file was modifiedclang/lib/Headers/ppc_wrappers/tmmintrin.h
The file was modifiedclang/test/CodeGen/ppc-smmintrin.c
The file was modifiedclang/lib/Headers/ppc_wrappers/mm_malloc.h
The file was addedclang/lib/Driver/ToolChains/PPCFreeBSD.cpp
Commit 42bfd059bf80c9b61b263747bfa31d97ac38b0c7 by pklausler
[flang] Move IsCoarray() to fix shared library build

The predicate IsCoarray() needs to be in libFortranEvaluate so that
IsSaved() can call it without breaking the shared library build.

Pushed without pre-commit review as I'm moving code around and
the fix to the shared build is confirmed.
The file was modifiedflang/include/flang/Semantics/tools.h
The file was modifiedflang/lib/Evaluate/tools.cpp
The file was modifiedflang/include/flang/Evaluate/tools.h
The file was modifiedflang/lib/Semantics/tools.cpp
Commit 692131f41aa1a8b4e1f7606546d206201ae2e55c by haowei
[compiler-rt] Explicitly set dependency on libcxx for MemProfUnitTest

MemProfUnitTest now depends on libcxx but the dependency is not
explicitly expressed in build system, causing build races. This patch
addresses this issue.

Differential Revision: https://reviews.llvm.org/D114267
The file was modifiedcompiler-rt/lib/memprof/tests/CMakeLists.txt
Commit 65b82b928ee5860a976c26d7efa93b7bae5c6183 by llvmgnsyncbot
[gn build] Port 8e2fd879e6f9
The file was modifiedllvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Commit 2e6a0a8b81d7be948491ce39d241695dc1385429 by walter erquinigo
[lldb] Load the fblldb module automatically

Summary:
```
// Facebook only:
// We want to load automatically the fblldb python module as soon as lldb or
// lldb-vscode start. This will ensure that logging and formatters are enabled
// by default.
//
// As we want to have a mechanism for not triggering this by default, if the
// user is starting lldb disabling .lldbinit support, then we also don't load
// this module. This is equivalent to appending this line to all .lldbinit
// files.
//
// We don't have the fblldb module on windows, so we don't include it for that
// build.
```

Test Plan:
the fbsymbols module is loaded automatically

```
./bin/lldb
(lldb) help fbsymbols
Facebook {mini,core}dump utility.  Expects 'raw' input (see 'help raw-input'.)
```

Reviewers: wanyi

Reviewed By: wanyi

Subscribers: mnovakovic, serhiyr, phabricatorlinter

Differential Revision: https://phabricator.intern.facebook.com/D29372804

Tags: accept2ship

Signature: 29372804:1624567770:07836e50e576bd809124ed80a6bc01082190e48f

[lldb] Load fblldbinit instead of fblldb

Summary: Once accepted, it'll merge it with the existing commit in our branch so that we keep the commit list as short as possible.

Test Plan: https://www.internalfb.com/diff/D30293094

Reviewers: aadsm, wanyi

Reviewed By: aadsm

Subscribers: mnovakovic, serhiyr

Differential Revision: https://phabricator.intern.facebook.com/D30293211

Tags: accept2ship

Signature: 30293211:1628880953:423e2e543cade107df69da0ebf458e581e54ae3a
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
Commit fcd288b52aa708e061ad633c8efa1183a7e6b926 by walter erquinigo
[formatters] Add a libstdcpp formatter for  for unordered_map, unordered_set, unordered_multimap, unordered_multiset

This diff adds a data formatter and tests for libstdcpp's unordered_map, unordered_set, unordered_multimap, unordered_multiset

Reviewed By: wallace

Differential Revision: https://reviews.llvm.org/D113760
The file was modifiedlldb/examples/synthetic/gnu_libstdcpp.py
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/Makefile
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/unordered/Makefile
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/main.cpp
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/unordered/TestDataFormatterUnordered.py
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/unordered/main.cpp
Commit 91f78eb5cf93e80a0e9679b98bca81291e97e1e1 by walter erquinigo
Revert "[lldb] Load the fblldb module automatically"

This reverts commit 2e6a0a8b81d7be948491ce39d241695dc1385429.

It was pushed by mistake..
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
Commit 615ecd8afc43b3ac5aa54053bff26002a0ce7ce6 by mascasa
[HWASan] Move LTO test to separate file.

The test fails on Android for an unknown reason but is still worth
having for x86.
The file was addedcompiler-rt/test/hwasan/TestCases/lto.c
The file was modifiedcompiler-rt/test/hwasan/TestCases/global.c
Commit 6149e57dc1313d32c85524f8009a1249e0b8f4d1 by flo
[ThreadPool] Support returning futures with results.

This patch adjusts ThreadPool::async to return futures that wrap
the result type of the passed in callable.

To do so, ThreadPool::asyncImpl first creates a shared promise. The
result of the promise is set in a new callable that first executes the
task. The callable is added to the task queue.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D114183
The file was modifiedllvm/unittests/Support/ThreadPool.cpp
The file was modifiedllvm/include/llvm/Support/ThreadPool.h
The file was modifiedllvm/lib/Support/ThreadPool.cpp
Commit 2975f37d8d4ffb8fd2b0950d6851c5fab93b4a19 by morbo
[llvm-diff] Implement diff of PHI nodes

Implement diff of PHI nodes

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D114211
The file was modifiedllvm/tools/llvm-diff/lib/DifferenceEngine.cpp
The file was addedllvm/test/tools/llvm-diff/phinode.ll
Commit 98daa4e425b02a0c27d53992e80510bda65809c5 by groverkss
[MLIR] Fix incorrect removal of source loop in loop fusion

This patch fixes a bug in loop fusion pass where the source loop was removed
even when the fused loop did not cover all iterations of the source loop.

This was because the fast hueristic check for checking if source loop and
fused loop have same iterations did not take into account steps in loop.

Reviewed By: dcaballe, bondhugula

Differential Revision: https://reviews.llvm.org/D114164
The file was modifiedmlir/test/Transforms/loop-fusion-4.mlir
The file was modifiedmlir/lib/Analysis/Utils.cpp
Commit a4b92d61580d9a1ef9f4946ffe8d0bb6949596a8 by snehasishk
[memprof] Remove the "Live on exit:" print for text format.

We dropped the printing of live on exit blocks in rG1243cef245f6 -
the commit changed the insertOrMerge logic. Remove the message since it
is no longer needed (all live blocks are inserted into the hashmap)
before serializing/printing the profile. Furthermore, the original
intent was to capture evicted blocks so it wasn't entirely correct.

Also update the binary format test invocation to remove the redundant
print_text directive now that it is the default.

Differential Revision: https://reviews.llvm.org/D114285
The file was modifiedcompiler-rt/lib/memprof/memprof_allocator.cpp
The file was modifiedcompiler-rt/test/memprof/TestCases/memprof_profile_dump.cpp
Commit f6718fc6d30219816a20235984e84db2e1f96fd8 by groverkss
[mlir] FlatAffineConstraint parsing for unit tests

This patch adds functionality to parse FlatAffineConstraints from a
StringRef with the intention to be used for unit tests. This should
make the construction of FlatAffineConstraints easier for testing
purposes.

The patch contains an example usage of the functionality in a unit test that
uses FlatAffineConstraints.

Reviewed By: bondhugula, grosser

Differential Revision: https://reviews.llvm.org/D113275
The file was addedmlir/unittests/Analysis/AffineStructuresParser.h
The file was modifiedmlir/include/mlir/Parser.h
The file was addedmlir/unittests/Analysis/AffineStructuresParser.cpp
The file was addedmlir/unittests/Analysis/AffineStructuresParserTest.cpp
The file was modifiedmlir/unittests/Analysis/AffineStructuresTest.cpp
The file was modifiedmlir/lib/Parser/AffineParser.cpp
The file was modifiedmlir/unittests/Analysis/CMakeLists.txt
Commit 2dec2aa3ad083dbde838809f0e8c7ae31110e111 by emaste
[Driver] Default to libc++ on FreeBSD

All supported FreeBSD releases use libc++, so default to it if the
target's major version is not specified.

Reviewed by: dim, emaste
Differential Revision: https://reviews.llvm.org/D77776
The file was modifiedclang/test/Driver/freebsd.cpp
The file was modifiedclang/lib/Driver/ToolChains/FreeBSD.cpp
Commit 966b72098363d44adf2882b9c34fcdbe344ff913 by benny.kra
[mlir][memref] Fix expanded shape ops memref.cast folding with changed type

`memref.expand_shape` has verification logic to make sure
result dim must be static if all the collapsing src dims are static.

This can be relaxed once expand_shape supports more dynamism.

Differential Revision: https://reviews.llvm.org/D114391
The file was modifiedmlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
The file was modifiedmlir/test/Dialect/MemRef/canonicalize.mlir
Commit 7aafe467d2aa6307d34c5762b8c3bf843d713737 by i
[ELF] Simplify a condition with config->copyRelocs. NFC
The file was modifiedlld/ELF/InputFiles.cpp
Commit ae5348a38eb1668cd9042d9a5207dc32bc4edb87 by jonathanchesterfield
[openmp][amdgpu] Make plugin robust to presence of explicit implicit arguments

OpenMP (compiler) does not currently request any implicit kernel
arguments. OpenMP (runtime) allocates and initialises a reasonable guess at
the implicit kernel arguments anyway.

This change makes the plugin check the number of explicit arguments, instead
of all arguments, and puts the pointer to hostcall buffer in both the current
location and at the offset expected when implicit arguments are added to the
metadata by D113538.

This is intended to keep things running while fixing the oversight in the
compiler (in D113538). Once that patch lands, and a following one marks
openmp kernels that use printf such that the backend emits an args element
with the right type (instead of hidden_node), the over-allocation can be
removed and the hardcoded 8*e+3 offset replaced with one read from the
.offset of the corresponding metadata element.

Reviewed By: estewart08

Differential Revision: https://reviews.llvm.org/D114274
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/internal.h
Commit 2f5d6a0ea51b8c9ac3d241dbdd05f96e35193a26 by smeenai
[MachO] Fix struct size assertion

std::vector can have different sizes depending on the STL's debug level,
so account for its size separately. (You could argue that we should be
accounting for all the other members separately as well, but that would
be very unergonomic, and std::vector is the only one that's caused
problems so far.)
The file was modifiedlld/MachO/InputSection.cpp
Commit d02b318af636a887e85741a5fe699fe3852d1199 by pklausler
[flang] Remove typo that affected complex namelist input

A recent patch to real/complex formatted input included what must
have been an editing hiccup: "++ ++p" instead of "++p".  This
compiles, and it broke the consumption of the trailing ')' of a
complex value in namelist input by skipping over the character.

Extend existing test to cover this case.

Differential Revision: https://reviews.llvm.org/D114297
The file was modifiedflang/unittests/Runtime/NumericalFormatTest.cpp
The file was modifiedflang/runtime/edit-input.cpp
Commit 9cd7c534e27c2558ef16e14d4440bd838320334b by huihuiz
[InstCombine] Enable fold select into operand for FAdd,  FMul, FSub and FDiv.

For FAdd, FMul, FSub and FDiv, fold select into one of the operands to enable
further optimizations, i.e., floating-point reduction detection.

Turn code:
  %C = fadd %A, %B
  %D = select %cond, %C, %A

into:
  %C = select %cond, %B, -0.000000e+00
  %D = fadd %A, %C

Alive2 verification (with --disable-undef-input), timed out otherwise.
FAdd - https://alive2.llvm.org/ce/z/eUxN4Y
FMul - https://alive2.llvm.org/ce/z/5SWZz4
FSub - https://alive2.llvm.org/ce/z/Dhj8dU
FDiv - https://alive2.llvm.org/ce/z/Yj_NA2

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D113442
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/reduction-inloop.ll
The file was modifiedllvm/test/Transforms/InstCombine/select-binop-foldable-floating-point.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
Commit e3dea5cf0e326366ab95a49d167fde8b0816e292 by walter erquinigo
[formatters] Add a formatter for libstdc++ optional

Besides adding the formatter and the summary, this makes the libcxx
tests also work for this case.

This is the polished version of https://reviews.llvm.org/D114266,
authored by Danil Stefaniuc.

Differential Revision: https://reviews.llvm.org/D114403
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/optional/TestDataFormatterLibcxxOptional.py
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/optional/main.cpp
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/TestDataFormatterGenericOptional.py
The file was modifiedlldb/source/API/SBValue.cpp
The file was modifiedlldb/examples/synthetic/gnu_libstdcpp.py
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/Makefile
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/optional/Makefile
The file was modifiedlldb/bindings/interface/SBValue.i
The file was modifiedlldb/include/lldb/API/SBValue.h
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/main.cpp
Commit bb0d8e4bd9bc9426a5092368f086f52293dcc186 by pklausler
[flang] Correct the argument keyword for AIMAG(Z=...)

It was X= in the intrinsics table.

Differential Revision: https://reviews.llvm.org/D114296
The file was modifiedflang/lib/Evaluate/intrinsics.cpp
Commit a2c76312ed0acd9cb8a1ac03c94c1464a2dbb208 by walter erquinigo
Attempt to fix e3dea5cf0e326366ab95a49d167fde8b0816e292

https://lab.llvm.org/buildbot/#/builders/17/builds/13728 found an issue
in the optional formatter.
The file was modifiedlldb/examples/synthetic/gnu_libstdcpp.py
Commit b1083830d609cd984eee189c6dffccbc25df0408 by springerm
[mlir][linalg][bufferize][NFC] Clean up headers and function visibility

Differential Revision: https://reviews.llvm.org/D113964
The file was modifiedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.h
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
Commit 8d0994ed21b2fa063bc530ece580109d55593d29 by springerm
[mlir][linalg][bufferize][NFC] Remove special casing of CallOps

Differential Revision: https://reviews.llvm.org/D113966
The file was modifiedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.h
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.cpp
Commit 26c0dd83ab0d1dc408856e50a80ca8d186e634cc by springerm
[mlir][linalg][bufferize][NFC] Move helper function to op interface

This is in preparation of changing the op traversal during bufferization.

Differential Revision: https://reviews.llvm.org/D114040
The file was modifiedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.h
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.h
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/CMakeLists.txt
Commit fb99686bfd82061d07877228e4737f98fa4e83d4 by springerm
[mlir][linalg][bufferize] Limited support for scf.execute_region

Add support for analysis only.

Differential Revision: https://reviews.llvm.org/D114055
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-module-bufferize-invalid.mlir
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
Commit d5b73a70a0611fc6c082e20acb6ce056980c8323 by kazu
[llvm] Use range-based for loops (NFC)
The file was modifiedllvm/lib/CodeGen/MachineFunction.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCExpandAtomicPseudoInsts.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonGenInsert.cpp
The file was modifiedllvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
The file was modifiedllvm/lib/CodeGen/BranchRelaxation.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCCTRLoops.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCBranchSelector.cpp
The file was modifiedllvm/lib/Target/Sparc/LeonPasses.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCFrameLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
The file was modifiedllvm/lib/Target/Sparc/DelaySlotFiller.cpp
The file was modifiedllvm/lib/Target/Sparc/SparcFrameLowering.cpp
Commit e5a8c8c883f1f3f91f40c883dd4f613aca0f7105 by joker.eph
[mlir] Refactoring a few Parser APIs

Refactored two new parser APIs parseGenericOperationAfterOperands and
parseCustomOperationName out of parseGenericOperation and parseCustomOperation.

Motivation: Sometimes an op can be printed in a special way if certain criteria
is met. While parsing, we need to handle all the versions.
`parseGenericOperationAfterOperands` is handy in situation where we already
parsed the operands and decide to fall back to default parsing.

`parseCustomOperationName` is useful when we need to know details (dialect,
operation name etc.) about a parsed token meant to be an mlir operation.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D113719
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.cpp
The file was addedmlir/test/IR/pretty_printed_region_op.mlir
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/include/mlir/IR/OpImplementation.h
The file was modifiedmlir/lib/Parser/Parser.cpp
Commit b2729fda60dbda595e7b5974279d8f860bce75ab by nicolas.vasilache
[mlir][Vector] Add a vblendps-based impl for transpose8x8 (both intrin and inline_asm)

This revision follows up on the conversation titled:

```[llvm-dev] Understanding and controlling some of the AVX shuffle emission paths```

The revision adds a vblendps-based implementation for transpose8x8 and further distinguishes between and intrinsics and an inline_asm implementation.

This results in roughly 20% fewer cycles as reported by llvm-mca:

After this revision (intrinsic version, resolves to virtually identical assembly as per the llvm-dev discussion, no vblendps instruction is emitted):
```
Iterations:        100
Instructions:      5900
Total Cycles:      2415
Total uOps:        7300

Dispatch Width:    6
uOps Per Cycle:    3.02
IPC:               2.44
Block RThroughput: 24.0

Cycles with backend pressure increase [ 89.90% ]
Throughput Bottlenecks:
  Resource Pressure       [ 89.65% ]
  - SKXPort1  [ 0.04% ]
  - SKXPort2  [ 12.42% ]
  - SKXPort3  [ 12.42% ]
  - SKXPort5  [ 89.52% ]
  Data Dependencies:      [ 37.06% ]
  - Register Dependencies [ 37.06% ]
  - Memory Dependencies   [ 0.00% ]
```

After this revision (inline_asm version, vblendps instructions are indeed emitted):
```
Iterations:        100
Instructions:      6300
Total Cycles:      2015
Total uOps:        7700

Dispatch Width:    6
uOps Per Cycle:    3.82
IPC:               3.13
Block RThroughput: 20.0

Cycles with backend pressure increase [ 83.47% ]
Throughput Bottlenecks:
  Resource Pressure       [ 83.18% ]
  - SKXPort0  [ 14.49% ]
  - SKXPort1  [ 14.54% ]
  - SKXPort2  [ 19.70% ]
  - SKXPort3  [ 19.70% ]
  - SKXPort5  [ 83.03% ]
  - SKXPort6  [ 14.49% ]
  Data Dependencies:      [ 39.75% ]
  - Register Dependencies [ 39.75% ]
  - Memory Dependencies   [ 0.00% ]
```

An accessible copy of the conversation is available [here](https://gist.github.com/nicolasvasilache/68c7f34012584b0e00f335bcb374ede0).

Differential Revision: https://reviews.llvm.org/D114393
The file was addedmlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir
The file was modifiedutils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
The file was modifiedmlir/test/Dialect/Vector/vector-transpose-lowering.mlir
The file was modifiedmlir/include/mlir/Dialect/X86Vector/Transforms.h
The file was modifiedmlir/test/lib/Dialect/Vector/CMakeLists.txt
The file was modifiedmlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
The file was modifiedmlir/lib/Dialect/X86Vector/Transforms/AVXTranspose.cpp
Commit 06d0d449d8555ae5f1ac33e8d4bb4ae40eb080d3 by martin
[COFF] [ARM64] Create symbols with regular intervals for relocations against temporary symbols

For relocations against temporary symbols (that don't persist in
the object file), we normally adjust them to reference the start of
the section.

For adrp relocations, the immediate offset from the referenced
symbol is stored in the opcode as the 21 bit signed immediate; this
means that the symbol referenced must be within +/- 1 MB from the
referenced symbol.

Create label symbols with regular intervals (1 MB intervals). For
relocations against temporary symbols, pick the preceding added
offset symbol and make the relocation against that instead of
against the start of the section.

This should fix the root issue behind
https://bugs.llvm.org/show_bug.cgi?id=52378.

Differential Revision: https://reviews.llvm.org/D114340
The file was modifiedllvm/lib/MC/WinCOFFObjectWriter.cpp
The file was addedllvm/test/MC/AArch64/coff-relocations-offset.s
Commit 7c15da67614eca9272553ecfe8c1a0f6f68c134b by martin
[LLD] [COFF] Interpret the immediate in ARM64 adr/adrp relocations as signed 21 bit

This matches how MS link.exe interprets this relocation.

Differential Revision: https://reviews.llvm.org/D114347
The file was modifiedlld/COFF/Chunks.cpp
The file was modifiedlld/test/COFF/arm64-relocs-imports.test
Commit 4e5488afb27a64d12a76b770cc86bab8074e9c57 by martin
[AArch64] [COFF] Move jump tables back to the readonly section

This essentially reverts f5884d255e78305d41c28c6e001a460ff83981d8
(D57277).

That commit was made as a workaround since LLVM back then didn't
support cross-section relative relocations (IMAGE_REL_ARM64_REL32)
in COFF for ARM64. Support for this was implemented later,
in d5c5cf5ce8d921fc8c5e1b608c298a1ffa688d37 (D99572) and
382c505d9cfca8adaec47aea2da7bbcbc00fc05c (D102217).

The commit that moved jump tables to the function section noted
that it woud be ideal to utilize IMAGE_REL_ARM64_REL32.

Differential Revision: https://reviews.llvm.org/D113576
The file was modifiedllvm/test/CodeGen/AArch64/win64-jumptable.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
Commit d703b922961e0d02a5effdd4bfbb23ad50a3cc9f by martin
[LLD] [COFF] Omit section symbols and IMAGE_SYM_CLASS_LABEL from the PE symbol table

The section symbols aren't of much practical use when looking at
a linked image. This shrinks one observed mingw style unstripped
binary by 14%.

IMAGE_SYM_CLASS_LABEL is in spirit the same as a temporary assembler
label that isn't emitted on the object file level at all.

Differential Revision: https://reviews.llvm.org/D113866
The file was modifiedlld/test/COFF/symtab.test
The file was modifiedlld/COFF/Writer.cpp
The file was modifiedlld/test/COFF/strtab-size.s
Commit dc79d73605305f9dfaa7eb777b6ed317363bdb04 by david.green
[ARM] Add an test for showing the incorrect aliasing info around masked loads/stores. NFC
The file was addedllvm/test/CodeGen/Thumb2/mve-masked-store-mmo.ll
Commit 8ea3e70fb02e59ddfd6a050344c7d177b11104f7 by david.green
[X86] Regenerate X86/vmaskmov-offset.ll check lines as per new mir format. NFC
The file was modifiedllvm/test/CodeGen/X86/vmaskmov-offset.ll
Commit 59f4b3d3081535b61609f12ea5f638905616fcbc by qiucofan
[PowerPC] Implement more fusion types for Power10

This implements the rest of Power10 instruction fusion pairs, according
to user manual, including 'wide immediate', 'load compare', 'zero move'
and 'SHA3 assist'.

Only 'SHA3 assist' is enabled by default.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D112912
The file was modifiedllvm/lib/Target/PowerPC/PPCMacroFusion.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCMacroFusion.def
The file was modifiedllvm/test/CodeGen/PowerPC/macro-fusion.mir
Commit 32b6c17b29079e7d2ac61cdc90b10983ee97d78d by david.green
[SDAG] Use UnknownSize for masked load/store MMO size

A masked load or store will load a potentially unknown number of bytes
from a memory location - that is not generally known at compile time.
They do not necessarily load/store the entire vector width, and treating
them as such can lead to incorrect aliasing information (for example, if
the underlying object is smaller than the size of the vector).

This makes sure that the MMO is given an unknown size to represent this.
which is less accurate that "may load/store from up to 16 bytes", but
less incorrect that "will load/store from 16 bytes".

Differential Revision: https://reviews.llvm.org/D113888
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-store-mmo.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineFunction.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
The file was modifiedllvm/test/CodeGen/X86/vmaskmov-offset.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/test/CodeGen/X86/masked_compressstore.ll
Commit c7cc70c8f87789ba04a8610162de4ad135d99e16 by pifon
Revert "Revert "[mlir] Move AllocationOpInterface to Bufferize/IR/AllocationOpInterface.td.""

This reverts and fixes commit de18b7dee6a81e5e790c8e8060065b1ef72d13ed.
The file was addedmlir/include/mlir/Dialect/Bufferization/IR/AllocationOpInterface.h
The file was modifiedmlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
The file was addedmlir/lib/Dialect/Bufferization/IR/CMakeLists.txt
The file was modifiedmlir/lib/Transforms/BufferDeallocation.cpp
The file was addedmlir/lib/Dialect/Bufferization/CMakeLists.txt
The file was addedmlir/lib/Dialect/Bufferization/IR/AllocationOpInterface.cpp
The file was modifiedmlir/include/mlir/Interfaces/SideEffectInterfaces.td
The file was addedmlir/include/mlir/Dialect/Bufferization/IR/AllocationOpInterface.td
The file was modifiedmlir/lib/Transforms/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
The file was modifiedmlir/lib/Dialect/CMakeLists.txt
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was addedmlir/include/mlir/Dialect/Bufferization/CMakeLists.txt
The file was addedmlir/include/mlir/Dialect/Bufferization/IR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/CMakeLists.txt
Commit a5fff58781f30ff3fd7a3f56948552cf7b8842bb by flo
[ThreadPool] Do not return shared futures.

The only users of returned futures from ThreadPool is llvm-reduce after
D113857.

There should be no cases where multiple threads wait on the same future,
so there should be no need to return std::shared_future<>. Instead return
plain std::future<>.

If users need to share a future between multiple threads, they can share
the futures themselves.

Reviewed By: Meinersbur, mehdi_amini

Differential Revision: https://reviews.llvm.org/D114363
The file was modifiedmlir/include/mlir/IR/Threading.h
The file was modifiedllvm/include/llvm/Support/ThreadPool.h
Commit 47e2644c89b3be6faa0f5cc4c70ef96ec295da9a by ybrevnov
[DSE][NFC] Introduce "doesn't overwrite" return code for isOverwrite

Add OR_None code to indicate that there is no overwrite. This has no any effect for current uses but will be used in one of the next patches building support for PHI translation.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D105098
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit e7cb3283c8032d89e81b3958b0fd73064ed5e839 by mydeveloperday
[clang-format] [PR52527] can join * with /* to form an outside of comment error C4138

https://bugs.llvm.org/show_bug.cgi?id=52527

The follow patch ensures there is always a space between * and /* to prevent transforming
```
void foo(* /* comment */)(int bar);
```
into
```
void foo(*/* comment */)(int bar);
```

Differential Revision: https://reviews.llvm.org/D114142
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
Commit 1cb3cfd932a0f26e5bfc5d944f63239242fa8ec3 by mydeveloperday
[clang-format] [NFC] build clang-format with -Wall

When building clang-format with -Wall on Visual Studio 20119 we see the following, prevent this the only -Wall error
```
..FormatTokenLexer.cpp(45) : warning C4868: compiler may not enforce left-to-right evaluation order in braced initializer list
```
Reviewed By: HazardyKnusperkeks
Differential Revision: https://reviews.llvm.org/D113844
The file was modifiedclang/lib/Format/FormatTokenLexer.cpp
Commit ebd47b0fb78fa11758da6ffcd3e6b415cbb8fa28 by dvyukov
tsan: new runtime (v3)

This change switches tsan to the new runtime which features:
- 2x smaller shadow memory (2x of app memory)
- faster fully vectorized race detection
- small fixed-size vector clocks (512b)
- fast vectorized vector clock operations
- unlimited number of alive threads/goroutimes

Differential Revision: https://reviews.llvm.org/D112603
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_shadow.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
The file was modifiedcompiler-rt/lib/tsan/go/tsan_go.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_flags.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_proc.cpp
The file was modifiedcompiler-rt/lib/tsan/check_analyze.sh
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_dense_alloc.h
The file was modifiedcompiler-rt/test/tsan/bench_threads.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/test/tsan/memcpy_race.cpp
The file was modifiedcompiler-rt/test/tsan/mutexset7.cpp
The file was modifiedcompiler-rt/lib/tsan/CMakeLists.txt
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_flags_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_windows.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_defs.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_flags.inc
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was modifiedcompiler-rt/test/tsan/memcmp_race.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mutexset.h
The file was modifiedcompiler-rt/test/tsan/free_race2.c
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_sync_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_java.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_trace.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mutexset.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_shadow_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_access.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.cpp
The file was modifiedcompiler-rt/lib/tsan/go/buildgo.sh
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform.h
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_stack_test.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_trace_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
The file was removedcompiler-rt/lib/tsan/rtl/tsan_update_shadow_word.inc
The file was modifiedcompiler-rt/lib/tsan/go/build.bat
Commit 5ee625bf6b5ee6dcbe4b3eea4d41894a35b58fa8 by jay.foad
[AMDGPU] Fix the name of a test case
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.mulo.ll
Commit f66b69a3925c547b1ee8ea93800f4bf7e31f407b by weratt
[lldb] Fix lookup for global constants in namespaces

LLDB uses mangled name to construct a fully qualified name for global
variables. Sometimes DW_TAG_linkage_name attribute is missing from
debug info, so LLDB has to rely on parent entries to construct the
fully qualified name.

Currently, the fallback is handled when the parent DW_TAG is either
DW_TAG_compiled_unit or DW_TAG_partial_unit, which may not work well
for global constants in namespaces. For example:

  namespace ns {
    const int x = 10;
  }

may produce the following debug info:

  <1><2a>: Abbrev Number: 2 (DW_TAG_namespace)
     <2b>   DW_AT_name        : (indirect string, offset: 0x5e): ns
  <2><2f>: Abbrev Number: 3 (DW_TAG_variable)
     <30>   DW_AT_name        : (indirect string, offset: 0x61): x
     <34>   DW_AT_type        : <0x3c>
     <38>   DW_AT_decl_file   : 1
     <39>   DW_AT_decl_line   : 2
     <3a>   DW_AT_const_value : 10

Since the fallback didn't handle the case when parent tag is
DW_TAG_namespace, LLDB wasn't able to match the variable by its fully
qualified name "ns::x". This change fixes this by additional check
if the parent is a DW_TAG_namespace.

Reviewed By: werat, clayborg

Differential Revision: https://reviews.llvm.org/D112147
The file was modifiedlldb/test/API/lang/cpp/global_variables/main.cpp
The file was modifiedlldb/test/API/lang/cpp/global_variables/TestCPPGlobalVariables.py
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
Commit cdc476ab2f7d4aaabdd220f94c6446afdb6a339d by diana.picus
[fir] Set !fir.len_param_index conversion to unimplemented

This patch is part of the upstreaming effort from fir-dev.

The conversion of len_param_index in fir-dev is incomplete, so for now
we're marking this as unimplemented until we can settle on a design for
the runtime support of LEN parameters.

Differential Revision: https://reviews.llvm.org/D114241

Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
The file was modifiedflang/lib/Optimizer/CodeGen/CodeGen.cpp
The file was modifiedflang/test/Fir/convert-to-llvm-invalid.fir
Commit f24d9313cc9fe9f6cd70f606c1dc8f8213587468 by springerm
[mlir][linalg][bufferize][NFC] Specify bufferize traversal in `bufferize`

The interface method `bufferize` controls how (and it what order) nested ops are traversed. This simplifies bufferization of scf::ForOps and scf::IfOps, which used to need special rules in scf::YieldOp.

Differential Revision: https://reviews.llvm.org/D114057
The file was modifiedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.td
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.cpp
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/LinalgInterfaceImpl.cpp
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
Commit e7026aba004934cad5487256601af7690757d09f by nicolas.vasilache
[mlir][Vector] Thread 0-d vectors through ExtractElementOp.

This revision starts making concrete use of 0-d vectors to extend the semantics of
ExtractElementOp.
In the process a new VectorOfAnyRank Tablegen OpBase.td is added to allow progressive transition to supporting 0-d vectors by gradually opting in.

Differential Revision: https://reviews.llvm.org/D114387
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/test/Dialect/Vector/ops.mlir
The file was modifiedmlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
The file was addedmlir/test/Integration/Dialect/Vector/CPU/test-0-d-vectors.mlir
The file was modifiedmlir/test/Dialect/Vector/invalid.mlir
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
Commit 3ff4e5f2a4a6a0e124356b2ad8793270ebbb16c1 by nicolas.vasilache
[mlir][Vector] Thread 0-d vectors through InsertElementOp.

This revision makes concrete use of 0-d vectors to extend the semantics of
InsertElementOp.

Reviewed By: dcaballe, pifon2a

Differential Revision: https://reviews.llvm.org/D114388
The file was modifiedmlir/test/Dialect/Vector/invalid.mlir
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-0-d-vectors.mlir
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
The file was modifiedmlir/test/Dialect/Vector/ops.mlir
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
Commit fd759d42c9f84d16efa99a59620cbb3e6836fed4 by zahira.ammarguellat
Revert "The _Float16 type is supported on x86 systems with SSE2 enabled."

This reverts commit 6623c02d70c3732dbea59c6d79c69501baf9627b.
The change seems to be breaking build of compiler-rt on Debian.
The file was modifiedclang/test/SemaCXX/Float16.cpp
The file was addedclang/test/CodeGen/X86/avx512fp16-abi.c
The file was addedclang/test/CodeGen/X86/avx512fp16-complex.c
The file was removedclang/test/CodeGen/X86/fp16-complex.c
The file was modifiedclang/test/Sema/Float16.c
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/lib/Basic/Targets/X86.cpp
The file was removedclang/test/CodeGen/X86/Float16-arithmetic.c
The file was removedclang/test/CodeGen/X86/fp16-abi.c
The file was modifiedclang/test/Sema/conversion-target-dep.c
The file was modifiedclang/docs/LanguageExtensions.rst
Commit 871418c5b0d0b6b61c24e3523bcb176c4c571217 by david.green
[ARM] Expand rev.ll test with more triples. NFC

Useful in showing Thumb2 and Thumb1 rev instructions as well as the arm
already tested, as well as testing the more canonical llvm.bswap.i16
form.
The file was modifiedllvm/test/CodeGen/ARM/rev.ll
Commit 13fa4fcfe70eaf5fdef6f8520fe134ac1d9955b1 by Louis Dionne
[libc++] Tidy up how %T and %t are created during configuration checks

Instead of having ad-hoc cleanup in various places, handle all creation
and removal of temporary files and directories inside _makeConfigTest.

As a fly-by, also remove testPrefix since we don't keep any source file
around anymore. Setting a prefix for the files is hence not useful anymore.

Differential Revision: https://reviews.llvm.org/D114390
The file was modifiedlibcxx/utils/libcxx/test/dsl.py
Commit e6cd157407a24f7be1c15dbf949bac98400ff96d by spatel
[InstCombine] add tests for logical select; NFC
The file was modifiedllvm/test/Transforms/InstCombine/logical-select.ll
Commit 430ad9697d143b4c408acf0d0d01c17830ac2bb3 by spatel
[InstCombine] enhance bitwise select matching

I noticed that adding a seemingly unrelated fold for xor caused
regressions on similar patterns, and this is one of the
underlying causes.

This could also be a variation for code as seen in:
https://llvm.org/PR34047
...although that exact example should be fixed after:
D113035 / c36b7e21bd8f

The vector test shows that we are actually missing a potential
canonicalization for bitcast-of-sext-of-not or the inverse.
The scalar test shows that even if we had that canonicalization,
it would still be possible to see this pattern due to extra uses.

https://alive2.llvm.org/ce/z/y2BAgi
The file was modifiedllvm/test/Transforms/InstCombine/logical-select.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit b0784d1d14246e5d662172e9af6e85776b81fdf0 by Jinsong Ji
[PowerPC] Remove FreeBSD test in mm-malloc.c due to cross-compilation limitation

Fix failures on powerpc BE buildbots
https://lab.llvm.org/buildbot/#/builders/93/builds/6031
https://lab.llvm.org/buildbot/#/builders/100/builds/10836
https://lab.llvm.org/buildbot/#/builders/52/builds/12719
The file was modifiedclang/test/CodeGen/ppc-mm-malloc.c
Commit e13246a2ec3dfc13838d43099ca9111c780d2c5e by Yaxun.Liu
[HIP] Add HIP scope atomic operations

Add an AtomicScopeModel for HIP and support for OpenCL builtins
that are missing in HIP.

Patch by: Michael Liao

Revised by: Anshil Ghandi

Reviewed by: Yaxun Liu

Differential Revision: https://reviews.llvm.org/D113925
The file was modifiedclang/include/clang/Basic/Builtins.def
The file was modifiedclang/include/clang/AST/Expr.h
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
The file was modifiedclang/lib/Frontend/InitPreprocessor.cpp
The file was addedclang/test/CodeGenCUDA/atomic-ops.cu
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/lib/CodeGen/CGAtomic.cpp
The file was modifiedclang/include/clang/Basic/SyncScope.h
Commit 12887a202404471ddf77f9fae658700573cbebe8 by gabor.marton
[Analyzer][Core] Better simplification in SimpleSValBuilder::evalBinOpNN

Make the SValBuilder capable to simplify existing
SVals based on a newly added constraints when evaluating a BinOp.

Before this patch, we called `simplify` only in some edge cases.
However, we can and should investigate the constraints in all cases.

Differential Revision: https://reviews.llvm.org/D113753
The file was modifiedclang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
The file was addedclang/test/Analysis/svalbuilder-simplify-in-evalbinop.cpp
Commit 1e65b93f3ac9974672402111cf2e06bf0901dbc9 by simon.moll
[VP] Canonicalize macros of VPIntrinsics.def

Usage and naming of macros in VPIntrinsics.def has been inconsistent. Rename all property macros to VP_PROPERTY_<name>.  Use BEGIN/END scope macros to attach properties to vp intrinsics and SDNodes (instead of specifying either directly with the property macro).
A follow-up patch has documentation on how the macros are (intended) to be used.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D114144
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/lib/IR/IntrinsicInst.cpp
The file was modifiedllvm/include/llvm/IR/VPIntrinsics.def
The file was modifiedllvm/unittests/IR/VPIntrinsicTest.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit aa9b90ca441d09969cab5555158f1db6341de3c1 by Yaxun.Liu
Fix warning due to default switch label

Fix warning due to default label in switch which covers all enumeration values
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
Commit b472bd855ed85691d0d03ef1808c82b780d23721 by Yaxun.Liu
[NFC] Let Microsoft mangler accept GlobalDecl

This is a follow up of https://reviews.llvm.org/D75700
where support of GlobalDecl with Microsoft mangler
is incomplete.

Reviewed by: Artem Belevich, Reid Kleckner

Differential Revision: https://reviews.llvm.org/D113490
The file was modifiedclang/lib/AST/MicrosoftMangle.cpp
Commit 9e03e8c99ec57e91cd146dfaa6c5cadde4600d32 by Alexander Timofeev
[AMDGPU] Enable fneg and fabs divergence-driven instruction selection.

Detailed description: We currently have a set of patterns to select ISD::FNEG and ISD::FABS to the bitwise operations.  We need to make them predicated to select the VALU or SALU bitwise operation variant according to the SDNode divergence bit.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D114257
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptosi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fabs.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fneg-fabs.f64.ll
The file was addedllvm/test/CodeGen/AMDGPU/fneg-fabs-divergence-driven-isel.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fneg.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-select.mir
Commit c075566c8df081c965b690997a06020e1abec962 by paul.robinson
[PS4][TLI] Remove redundant line
The file was modifiedllvm/lib/Analysis/TargetLibraryInfo.cpp
Commit d45cb1d7ea911f43922c7f07e2c819cc8592a70d by kazu
[llvm] Use range-based for loops (NFC)
The file was modifiedllvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
The file was modifiedllvm/lib/Target/ARM/ARMConstantIslandPass.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonGenInsert.cpp
The file was modifiedllvm/lib/CodeGen/LiveVariables.cpp
The file was modifiedllvm/lib/CodeGen/RegisterCoalescer.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
The file was modifiedllvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonStoreWidening.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
Commit a114f151930d29967963fd22f328a906638a2818 by dvyukov
[lldb] Deflake TestTsanBasic.py

The test flaked on bots:
http://green.lab.llvm.org/green/job/lldb-cmake/38666/
The test expects that tsan will detect a single race
with concurrent memory accesses. TSan doesn't do this reliably.
Run 100 iterations of the racing threads, which should
make the race much more likely to be detected.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D114444
The file was modifiedlldb/test/API/functionalities/tsan/basic/main.c
Commit d75ed9864acb15d1543e839fe4627c9b1d867c22 by dvyukov
tsan: disable signal_sync2.cpp test on powerpc64

Fails 1 out of 10 runs on powerpc bots:
https://lab.llvm.org/buildbot/#/builders/121/builds/13391

Reviewed By: nemanjai

Differential Revision: https://reviews.llvm.org/D114426
The file was modifiedcompiler-rt/test/tsan/signal_sync2.cpp
Commit 5c77aa2b917c5b21b3f9c6d355ca2f9a0a81b95d by listmail
[unroll] Use early return in shouldFullUnroll [nfc]
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
Commit 38211bbab1d949f682271abba0171424a5a335ab by Yaxun.Liu
[HIP] Fix device stub name for Windows

This is a follow up of https://reviews.llvm.org/D68578
where device stub name is changed for Itanium
mangling but not Microsoft mangling.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D113491
The file was modifiedclang/include/clang/AST/GlobalDecl.h
The file was modifiedclang/lib/AST/MicrosoftMangle.cpp
The file was modifiedclang/test/CodeGenCUDA/kernel-stub-name.cu
Commit b00fc198224efa038a7469e068dd920b3f1aba75 by hoy
profi - a flow-based profile inference algorithm: Part I (out of 3)

The benefits of sampling-based PGO crucially depends on the quality of profile
data. This diff implements a flow-based algorithm, called profi, that helps to
overcome the inaccuracies in a profile after it is collected.

Profi is an extended and significantly re-engineered classic MCMF (min-cost
max-flow) approach suggested by Levin, Newman, and Haber [2008, Complementing
missing and inaccurate profiling using a minimum cost circulation algorithm]. It
models profile inference as an optimization problem on a control-flow graph with
the objectives and constraints capturing the desired properties of profile data.
Three important challenges that are being solved by profi:
- "fixing" errors in profiles caused by sampling;
- converting basic block counts to edge frequencies (branch probabilities);
- dealing with "dangling" blocks having no samples in the profile.

The main implementation (and required docs) are in SampleProfileInference.cpp.
The worst-time complexity is quadratic in the number of blocks in a function,
O(|V|^2). However a careful engineering and extensive evaluation shows that
the running time is (slightly) super-linear. In particular, instances with
1000 blocks are solved within 0.1 second.

The algorithm has been extensively tested internally on prod workloads,
significantly improving the quality of generated profile data and providing
speedups in the range from 0% to 5%. For "smaller" benchmarks (SPEC06/17), it
generally improves the performance (with a few outliers) but extra work in
the compiler might be needed to re-tune existing optimization passes relying on
profile counts.

Reviewed By: wenlei, hoy

Differential Revision: https://reviews.llvm.org/D109860
The file was addedllvm/test/Transforms/SampleProfile/Inputs/profile-inference.prof
The file was modifiedllvm/lib/Transforms/Utils/CMakeLists.txt
The file was modifiedllvm/lib/Transforms/Utils/SampleProfileLoaderBaseUtil.cpp
The file was addedllvm/test/Transforms/SampleProfile/profile-inference.ll
The file was modifiedllvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was addedllvm/lib/Transforms/Utils/SampleProfileInference.cpp
The file was addedllvm/include/llvm/Transforms/Utils/SampleProfileInference.h
Commit 18086186ab5ac7698db0fbc45c58cff2a7747da6 by listmail
[unroll] Remove two dead variable assignments [nfc]

These variables are not out-params, and we immediately return after assigning them.  Thus, the assignments are dead and just confusing.

I believe these used to be out-params, but they're not any more.
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
Commit 065f777d2740653fac79fe44cda121bce11013b8 by listmail
Revert "profi - a flow-based profile inference algorithm: Part I (out of 3)"

This reverts commit b00fc198224efa038a7469e068dd920b3f1aba75.  This change fails to build (link) on ubuntu x86,
The file was removedllvm/lib/Transforms/Utils/SampleProfileInference.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
The file was removedllvm/test/Transforms/SampleProfile/profile-inference.ll
The file was removedllvm/test/Transforms/SampleProfile/Inputs/profile-inference.prof
The file was modifiedllvm/lib/Transforms/Utils/CMakeLists.txt
The file was removedllvm/include/llvm/Transforms/Utils/SampleProfileInference.h
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was modifiedllvm/lib/Transforms/Utils/SampleProfileLoaderBaseUtil.cpp
Commit 0a00d64e322f28f5f65f5b2d507d12757883478a by flo
[LAA] Turn aggregate type check into assertion (NFCI).

getPtrStride should not be called with aggregate access types. There's
also an old TODO.

Turn the check into an assertion.
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
Commit c933c2eb334660c131f4afc9d194fafb0cec0423 by nemanja.i.ibm
[PowerPC] Add BCD add/sub/cmp builtins

Support for builtins that use bcdadd./bcdsub. to add/subtract
Binary Coded Decimal values as well as to determine validity
and compare BCD values.

Differential revision: https://reviews.llvm.org/D114088
The file was modifiedllvm/lib/Target/PowerPC/P9InstrResources.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrAltivec.td
The file was modifiedllvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was addedllvm/test/CodeGen/PowerPC/bcd-intrinsics.ll
The file was modifiedllvm/lib/Target/PowerPC/P10InstrResources.td
Commit 03d8bc184a3129f0e519bf08ef45f0349cfa1f90 by listmail
[indvars] Fix lftr crash when preheader is terminated by switch

This was found by oss-fuzz.  The switch will get canonicalized to a branch, but if it hasn't been when we run LFTR, we crashed on an unneeded assert.
The file was modifiedllvm/test/Transforms/IndVarSimplify/lftr.ll
The file was modifiedllvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Commit 1df7289af66c630480a676e2a5347dca5a3ede15 by pirama
[compiler-rt/profile] Include __llvm_profile_get_magic in module signature

The INSTR_PROF_RAW_MAGIC_* number in profraw files should match during
profile merging.  This causes an error with 32-bit and 64-bit variants
of the same code.  The module signatures for the two binaries are
identical but they use different INSTR_PROF_RAW_MAGIC_* causing a
failure when profile-merging is used.  Including it when computing the
module signature yields different signatures for the 32-bit and 64-bit
profiles.

Differential Revision: https://reviews.llvm.org/D114054
The file was modifiedcompiler-rt/lib/profile/InstrProfilingMerge.c
Commit 0d3add216f04b99ed1db1a05c39975d4a9c83e6b by zarko
[llvm][NFC] Inclusive language: Reword replace uses of sanity in llvm/lib/Transform comments and asserts

Reworded some comments and asserts to avoid usage of `sanity check/test`

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D114372
The file was modifiedllvm/lib/Transforms/IPO/PartialInlining.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
The file was modifiedllvm/lib/Transforms/Utils/InlineFunction.cpp
The file was modifiedllvm/lib/Transforms/Utils/GuardUtils.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LICM.cpp
The file was modifiedllvm/lib/Transforms/Scalar/Reassociate.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
Commit 38ed1db7e8740fce236d1893ff9e20cc22ef0ada by i
[ELF] Support non-RAX/non-adjacent R_X86_64_GOTPC32_TLSDESC/R_X86_64_TLSDESC_CALL

The current TLSDESC optimization code assumes:
```
leaq x@tlsdesc(%rip), %rax
call *x@tlscall(%rax)       # adjacent
```

From https://gitlab.freedesktop.org/mesa/mesa/-/issues/5665 , it seems that the
two instructions may not be adjacent in GCC 10's output:
```
leaq x@tlsdesc(%rip), %rax
something else
call *x@tlscall(%rax)
```

This patch supports the case. While here, support non-RAX registers for
R_X86_64_GOTPC32_TLSDESC, in case the compiler generates inefficient:

```
leaq x@tlsdesc(%rip), %rcx  # or %rdx, %rbx, %rdi, ...
movq %rcx, %rax
call *x@tlscall(%rax)       # GNU ld/gold error for non-RAX
```

Differential Revision: https://reviews.llvm.org/D114416
The file was modifiedlld/test/ELF/x86-64-tlsdesc-gd.s
The file was modifiedlld/docs/ReleaseNotes.rst
The file was modifiedlld/test/ELF/invalid/x86-64-tlsdesc-gd.s
The file was modifiedlld/ELF/Arch/X86_64.cpp
Commit 286248db2c320e4b4f30dbddbeba3db993ca6e5d by 2998727+wrengr
[mlir][sparse] Moving integration tests that merely use the Python API

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D114192
The file was removedmlir/test/python/dialects/sparse_tensor/test_SpMM.py
The file was addedmlir/test/Integration/Dialect/SparseTensor/python/test_SpMM.py
The file was addedmlir/test/Integration/Dialect/SparseTensor/python/lit.local.cfg
Commit 884b6dd311422bbfac62b8a90fbfff8e77ba8121 by hoy
profi - a flow-based profile inference algorithm: Part I (out of 3)

The benefits of sampling-based PGO crucially depends on the quality of profile
data. This diff implements a flow-based algorithm, called profi, that helps to
overcome the inaccuracies in a profile after it is collected.

Profi is an extended and significantly re-engineered classic MCMF (min-cost
max-flow) approach suggested by Levin, Newman, and Haber [2008, Complementing
missing and inaccurate profiling using a minimum cost circulation algorithm]. It
models profile inference as an optimization problem on a control-flow graph with
the objectives and constraints capturing the desired properties of profile data.
Three important challenges that are being solved by profi:
- "fixing" errors in profiles caused by sampling;
- converting basic block counts to edge frequencies (branch probabilities);
- dealing with "dangling" blocks having no samples in the profile.

The main implementation (and required docs) are in SampleProfileInference.cpp.
The worst-time complexity is quadratic in the number of blocks in a function,
O(|V|^2). However a careful engineering and extensive evaluation shows that
the running time is (slightly) super-linear. In particular, instances with
1000 blocks are solved within 0.1 second.

The algorithm has been extensively tested internally on prod workloads,
significantly improving the quality of generated profile data and providing
speedups in the range from 0% to 5%. For "smaller" benchmarks (SPEC06/17), it
generally improves the performance (with a few outliers) but extra work in
the compiler might be needed to re-tune existing optimization passes relying on
profile counts.

Reviewed By: wenlei, hoy

Differential Revision: https://reviews.llvm.org/D109860
The file was addedllvm/test/Transforms/SampleProfile/profile-inference.ll
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was addedllvm/test/Transforms/SampleProfile/Inputs/profile-inference.prof
The file was modifiedllvm/lib/Transforms/Utils/SampleProfileLoaderBaseUtil.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
The file was modifiedllvm/lib/Transforms/Utils/CMakeLists.txt
The file was addedllvm/include/llvm/Transforms/Utils/SampleProfileInference.h
The file was addedllvm/lib/Transforms/Utils/SampleProfileInference.cpp
Commit 1345bc5e16c06a5d42102ba555f2bab09be6838a by quinn.pham
[NFC][llvm] Inclusive language: remove instance of master in LiveRangeUtils.h

[NFC] As part of using inclusive language within the llvm project, this patch
replaces master with primary in `LiveRangeUtils.h`.

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D114191
The file was modifiedllvm/lib/CodeGen/LiveRangeUtils.h
Commit 791e71a799d8afb1179007450519825796b3c308 by llvmgnsyncbot
[gn build] Port 884b6dd31142
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Commit 165a5c62de1b085b1b9ca0430aa46e7026d0a82c by mehrnoosh.heidarpour
[InstCombine] Add test cases for D114339; NFC

Adding test cases for XOR logic folds with base result.
Differential Revision: https://reviews.llvm.org/D114436
The file was modifiedllvm/test/Transforms/InstCombine/xor.ll
Commit b57e2f071a2e47147a57c52a6a8c6aa062230cd8 by ravishankarm
[mlir][Linalg] Add pad vectorization patterns into LinalgStrategyVectorize passes.

Add an option to control whether these patterns are added to the
pattern list or not.

Differential Revision: https://reviews.llvm.org/D114290
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/LinalgStrategyPasses.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/CodegenStrategy.h
Commit 1392b654ff6573ca2dba4101f72e990822539c7d by joker.eph
Revert "profi - a flow-based profile inference algorithm: Part I (out of 3)"

This reverts commit 884b6dd311422bbfac62b8a90fbfff8e77ba8121.
The windows build is broken with a linker error.
The file was removedllvm/include/llvm/Transforms/Utils/SampleProfileInference.h
The file was modifiedllvm/lib/Transforms/Utils/CMakeLists.txt
The file was removedllvm/test/Transforms/SampleProfile/profile-inference.ll
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
The file was removedllvm/lib/Transforms/Utils/SampleProfileInference.cpp
The file was modifiedllvm/lib/Transforms/Utils/SampleProfileLoaderBaseUtil.cpp
The file was removedllvm/test/Transforms/SampleProfile/Inputs/profile-inference.prof
Commit 44bb69b1e012bdc905aa679008ee7ed3d71061b1 by llvmgnsyncbot
[gn build] Port 1392b654ff65
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Commit 54eec7cafc396f3d1444aacf4f1ed71fceb4e503 by rob.suderman
[mlir][tosa] Separate tosa.transpose_conv decomposition and added stride support

Transpose convolution decomposition is now performed in a separate pass. This
allows padding / constant propagation to be performed at the TOSA level. It
also adds support for striding when there is no dilation.

Differential Revision: https://reviews.llvm.org/D114409
The file was modifiedmlir/lib/Dialect/Tosa/Transforms/CMakeLists.txt
The file was addedmlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
The file was addedmlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
The file was modifiedmlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
The file was modifiedmlir/include/mlir/Dialect/Tosa/Transforms/Passes.h
The file was modifiedmlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
The file was modifiedmlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
Commit 0f1e52afa92fd6b687f4d69203b72e99a9228edb by rob.suderman
[mlir][tosa] Materialize tosa.pad value and fold noop pads

Padding now can explicitly specify the padding value when non-zero is wanted.
This also includes bypassing pads when the pad does nothing.

Differential Revision: https://reviews.llvm.org/D113611
The file was modifiedmlir/lib/Dialect/Tosa/IR/TosaOps.cpp
The file was modifiedmlir/test/Dialect/Tosa/canonicalize.mlir
The file was modifiedmlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
Commit 14d743457c3d5c8154644375bac1094481ab4eaf by spatel
[InstSimplify] add tests for xor logic fold; NFC
The file was modifiedllvm/test/Transforms/InstSimplify/xor.ll
Commit cdc80a6017076daea28e62a9efb0b3d8a53d8fce by Vitaly Buka
[NFC][sanitizer] Move StackStore::Allocated into cpp file
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.h
Commit b80affb8a1494560c83c6d2bf1164ff8fe031401 by Vitaly Buka
[NFC][sanitizer] Early return for empty StackTraces

Current callers should filter them out anyway,
but with this patch we don't need rely on that assumption.
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.cpp
Commit b5a927b972b2c07b4597e93ed0b57803bfc0e6ae by dimitry
[lldb] Move create_relative_symlink function up in CMake hierarchy

Configuring lldb with `LLDB_ENABLE_PYTHON=OFF` and `LLDB_ENABLE_LUA=ON` results in a CMake error:

    CMake Error at lldb/bindings/lua/CMakeLists.txt:47 (create_relative_symlink):
      Unknown CMake command "create_relative_symlink".
    Call Stack (most recent call first):
      lldb/CMakeLists.txt:117 (finish_swig_lua)

This is because the CMake function `create_relative_symlink` only exists in `lldb/bindings/python/CMakeLists.txt`, and not in `lldb/bindings/lua/CMakeLists.txt`.

Move the function to `lldb/bindings/CMakeLists.txt`, so it is available for all language bindings.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D114465
The file was modifiedlldb/bindings/CMakeLists.txt
The file was modifiedlldb/bindings/python/CMakeLists.txt
Commit 67a1c45def8a75061203461ab0060c75c864df1c by Vitaly Buka
[NFC][sanitizer] Add StackStoreTest

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D114463
The file was addedcompiler-rt/lib/sanitizer_common/tests/sanitizer_stack_store_test.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/CMakeLists.txt
Commit bf1138491a2ba12dce0c3ff2ad6a18f093428539 by xur
[SampleFDO] Recompute BFI if the sample loader changes BPI

The MIR sample loader changes the branch probability but not BFI.
Here we force a recompute of BFI if the branch probabilities are
changed.

Also register the MIR FSAFDO passes properly.

Differential Revision: https://reviews.llvm.org/D114400
The file was addedllvm/test/CodeGen/X86/fsafdo_test3.ll
The file was modifiedllvm/lib/CodeGen/MIRSampleProfile.cpp
The file was modifiedllvm/lib/CodeGen/CodeGen.cpp
Commit abd86619cf5e389995e8cb325ddb570d86a0715f by Vitaly Buka
[NFC][sanitizer] Extract StackTraceHeader struct
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.cpp
Commit b1a68b170c44e8d5298800a080444c0b82366e51 by Vitaly Buka
[NFC][sanitizer] Make method const
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.h
Commit 892648b18a8cc3b8a08528112adfa74bdd432f8b by spatel
[InstSimplify] fold xor logic of 2 variables

(a & b) ^ (~a | b) --> ~a

I was looking for a shortcut to reduce some of the complex logic
folds that are currently up for review (D113216
and others in that stack), and I found this missing from
instcombine/instsimplify.

There is a trade-off in putting it into instsimplify: because
we can't create new values here, we need a strict 'not' op (no
undef elements). Otherwise, the fold is not valid:
https://alive2.llvm.org/ce/z/k_AGGj

If this was in instcombine instead, we could create the proper
'not'. But having the fold here benefits other passes like GVN
that use instsimplify as an analysis.

There is a related fold where 'and' and 'or' are swapped, and
that is planned as a follow-up commit.

Differential Revision: https://reviews.llvm.org/D114462
The file was modifiedllvm/test/Transforms/InstSimplify/xor.ll
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
Commit 4ba5da8e3d38f38ed7845c22baadd8908729c520 by walter erquinigo
Improve optional formatter

As suggested by @labath in https://reviews.llvm.org/D114403, we should
make the formatter more resilient to corrupted data. The Libcxx version
explicitly checks for engaged = 1, so we can do that as well for safety.

Differential Revision: https://reviews.llvm.org/D114450
The file was modifiedlldb/examples/synthetic/gnu_libstdcpp.py
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/TestDataFormatterGenericOptional.py
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/LibCxxOptional.cpp
Commit a48501150b9ef64fd61d24f8cef2645237facc44 by walter erquinigo
Make some libstd++ formatters safer

We need to add checks that ensure that some core variables are valid, so
that we avoid printing out garbage data. The worst that could happen is
that an non-initialized variable is being printed as something with
123123432 children instead of 0.

Differential Revision: https://reviews.llvm.org/D114458
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/TestDataFormatterGenericMultiMap.py
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/LibCxxUnorderedMap.cpp
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/main.cpp
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/bitset/TestDataFormatterGenericBitset.py
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/forward_list/TestDataFormatterGenericForwardList.py
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/unordered/TestDataFormatterGenericUnordered.py
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/main.cpp
The file was modifiedlldb/examples/synthetic/gnu_libstdcpp.py
Commit 193bf2e820520dd4a2d5ed0e7d50ee45e8127071 by walter erquinigo
[formatters] Capping size limitation avoidance for the libcxx and libcpp bitset data formatters.

This diff is avoiding the size limitation introduced by the capping size for the libcxx and libcpp bitset data formatters.

Reviewed By: wallace

Differential Revision: https://reviews.llvm.org/D114461
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/GenericBitset.cpp
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/bitset/main.cpp
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/bitset/TestDataFormatterGenericBitset.py
Commit 4961fcfbcf688e5cd9580578b1e4eadce1dfc42e by jurahul
Move dependency llvm:AllTargetsAsmParsers from Translation to ExecutionEngine.

- Fixes a minor issue in https://reviews.llvm.org/D114338, which seems incorrectly
  added the llvm:AllTargetsAsmParsers dependency to Translation in bazel build files.

Differential Revision: https://reviews.llvm.org/D114471
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Commit 9a9d9a9b00af5b60514ab9ada09ba02dfb86945e by walter erquinigo
[formatters] List and forward_list capping_size determination and application

This diff is adding the capping_size determination for the list and forward list, to limit the number of children to be displayed. Also it modifies and unifies tests for libcxx and libstdcpp list data formatter.

Reviewed By: wallace

Differential Revision: https://reviews.llvm.org/D114433
The file was modifiedlldb/bindings/interface/SBTarget.i
The file was modifiedlldb/examples/synthetic/gnu_libstdcpp.py
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/list/main.cpp
The file was modifiedlldb/include/lldb/API/SBTarget.h
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/list/loop/Makefile
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/list/loop/TestDataFormatterGenericListLoop.py
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/list/Makefile
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/forward_list/main.cpp
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/list/main.cpp
The file was modifiedlldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/list/Makefile
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/list/main.cpp
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/list/TestDataFormatterGenericList.py
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libstdcpp/list/TestDataFormatterStdList.py
The file was modifiedlldb/source/API/SBTarget.cpp
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/list/loop/TestDataFormatterLibcxxListLoop.py
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/list/loop/main.cpp
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/list/TestDataFormatterLibcxxList.py
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/forward_list/TestDataFormatterGenericForwardList.py
The file was removedlldb/test/API/functionalities/data-formatter/data-formatter-stl/libcxx/list/Makefile
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/list/loop/Makefile
The file was addedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/list/loop/main.cpp
Commit 877433ad453cd1bd77497ec47828074b6e010edb by walter erquinigo
Fix a48501150b9ef64fd61d24f8cef2645237facc44

Issue in https://lab.llvm.org/buildbot/#/builders/96/builds/14682.

Making the test deterministic.
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/TestDataFormatterGenericMultiMap.py
The file was modifiedlldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/multimap/main.cpp
Commit 73a05cc8dfa114e29cd4d463c77a5577571c8c56 by flo
[LAA] Move visitPointers up in file (NFC).

This allows easier re-use in earlier functions.
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
Commit 273a0c8bc9c774aa0d5982c23dc3d62b68ef4338 by Matthew.Arsenault
PrologEpilogInserter: Use explicit control for scavenge slot placement

AMDGPU is unusual in that the both stack is indexed in the same
direction as stack growth (up). We therefore always need the emergency
stack slots placed as low as possible to ensure they are in range of
load/store instruction immediate offsets. The existing logic is mostly
OK, but failed if we required stack realignment.

I don't understand what the existing control isFPCloseToIncomingSP is
supposed to mean, but can only be used to stop placing the scavenge
slots earlier. Make this explicit so that targets can opt-in rather
than opt-out only.
The file was modifiedllvm/include/llvm/CodeGen/TargetFrameLowering.h
The file was modifiedllvm/lib/Target/Mips/MipsFrameLowering.h
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.h
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/flat-scratch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
The file was modifiedllvm/lib/CodeGen/TargetFrameLoweringImpl.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-hi16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/need-fp-from-vgpr-spills.ll
The file was modifiedllvm/lib/CodeGen/PrologEpilogInserter.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZFrameLowering.h
The file was modifiedllvm/test/CodeGen/AMDGPU/store-hi16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-lo16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-offset-calculation.ll
Commit c9cb8edc519e4fa80b28fb4e0cc2bd8423742d21 by nemanja.i.ibm
[PowerPC] Allow scalars for asm constraint "v" with VSX

Similarly to what GCC does, we should allow scalars with
the "v" constraint rather than introducing unnecessary
new constraints for scalars in Altivec registers.

Differential revision: https://reviews.llvm.org/D113635
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h
The file was addedllvm/test/CodeGen/PowerPC/scalars-in-altivec-regs.ll
Commit 09256fe980ddc46be36ab4460ae1850aa46f094e by Vitaly Buka
[sanitizer] Add DenseMap::forEach
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_dense_map.h
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_dense_map_test.cpp
Commit 4058637f7ac6c0c44c90604b041dafa6b24e641b by Vitaly Buka
[NFC][sanitizer] Reuse forEach for operator==
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_dense_map.h
Commit 6c06d8e310bd926f8c9ed63118c38b28075f4de3 by fmayer
[stack-safety] Check SCEV constraints at memory instructions.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D113160
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/local.ll
The file was modifiedllvm/lib/Analysis/StackSafetyAnalysis.cpp
The file was modifiedllvm/test/Analysis/StackSafetyAnalysis/memintrin.ll
Commit 26d1edfb105bdc857733c3bb8697a9f73828bde7 by fmayer
[hwasan] support python3 in hwasan_sanitize

Verified no diff exist between previous version, new version python 2, and python 3 for an example stack.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D114404
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize
Commit 75a1bee05db7ca4277cf93545834110409c75bc9 by ivan.butygin
[mlir][spirv] Add math to OpenCL conversion

Differential Revision: https://reviews.llvm.org/D113780
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVOCLOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td
The file was modifiedmlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
The file was addedmlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
The file was modifiedmlir/test/Conversion/ArithmeticToSPIRV/arithmetic-to-spirv.mlir
The file was addedmlir/test/Conversion/MathToSPIRV/math-to-glsl-spirv.mlir
The file was removedmlir/test/Conversion/MathToSPIRV/math-to-spirv.mlir
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
The file was modifiedmlir/test/Target/SPIRV/ocl-ops.mlir
Commit 661a232e34845a89789c4d617b9c764eded002a1 by Stanislav.Mekhanoshin
[AMDGPU] Remove a no-op check in the gfx90a hazard recognizer

Also rename helper function accordingly.

Differential Revision: https://reviews.llvm.org/D114289
The file was modifiedllvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
Commit 402a406323194e0eaecfb793416e8c7528befc29 by Vitaly Buka
[NFC][sanitizer] Test for b80affb8a149
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_stack_store_test.cpp
Commit 6889592ebcdea168f9e7a5dc91b8549527e4dbf7 by Vitaly Buka
[NFC][sanitizer] Limit StackStore stack size/tag to 1 byte

Nothing uses more than 8bit now. So the rest of the headers can store other data.
kStackTraceMax is 256 now, but all sanitizers by default store just 20-30 frames here.
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stack_store.cpp
Commit 22ced33a2f769815834efdd0eb0b25172c6f8a61 by zequanwu
[LLDB][NativePDB] Allow find functions by full names

I don't see a reason why not to. If we allows lookup functions by full names,
I can change the test case in D113930 to use `lldb-test symbols --find=function --name=full::name --function-flags=full ...`,
though the duplicate method decl prolem is still there for `lldb-test symbols --dump-ast`.
That's a seprate bug, we can fix it later.

Differential Revision: https://reviews.llvm.org/D114467
The file was modifiedlldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
The file was addedlldb/test/Shell/SymbolFile/NativePDB/find-functions.cpp
Commit 8ec0f221843c51096cf3e7a479e780be371388a8 by joker.eph
Update fir.insert_on_range syntax to make the range more explicit (NFC)

Also replace ArrayAttr with IndexElementsAttr to model subscript dimensions.
An array of attribute is a sparse inefficient storage, with an API that
requires to unpack/repack integers at every call site.
Instead we can store dense array of integer as IndexElementsAttr.

Reviewed By: clementval, kiranchandramohan

Differential Revision: https://reviews.llvm.org/D112899
The file was modifiedflang/lib/Optimizer/CodeGen/CodeGen.cpp
The file was modifiedflang/test/Fir/convert-to-llvm.fir
The file was modifiedflang/include/flang/Optimizer/Dialect/FIROps.td
The file was modifiedflang/test/Fir/fir-ops.fir
The file was modifiedflang/lib/Optimizer/Dialect/FIROps.cpp
The file was modifiedflang/test/Fir/invalid.fir
Commit 07333810caee48e94587891191a970be8a117fcf by JunMa
Revert "Revert "Revert "Recommit "Revert "[CVP] processSwitch: Remove default case when switch cover all possible values."""""

This reverts commit c93f93b2e3f28997f794265089fb8138dd5b5f13.
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was modifiedllvm/test/Transforms/CorrelatedValuePropagation/basic.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/Local.h
Commit 17eb6b61de4b4d7a35680254a59118a0e3fa8dc9 by JunMa
Revert "[Taildup] Don't tail-duplicate loop header with multiple successors as its latches"

This reverts commit 1f9fa549841a2ec55aa5a131bfaf83f0383c4713.
The file was modifiedllvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll
The file was modifiedllvm/lib/CodeGen/TailDuplicator.cpp
Commit d7d7ffe254d53cf0860126ab4c3f5db18c927892 by 2998727+wrengr
[mlir][sparse] Adding wrappers for constantOverheadTypeEncoding

Minor code cleanup

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D114392
The file was modifiedmlir/lib/Dialect/SparseTensor/Transforms/SparseTensorConversion.cpp
Commit 8bd08a9fd705dce07d7cd76711532432b575ed78 by uday
[MLIR] Remove duplicate `Pass` suffix from ViewOpGraph class name

Remove duplicate `Pass` suffix from view-op-graph pass class name. The
extra suffix would lead to methods like registerViewOpGraphPassPass
being generated.

Differential Revision: https://reviews.llvm.org/D114459
The file was modifiedmlir/lib/Transforms/ViewOpGraph.cpp
The file was modifiedmlir/include/mlir/Transforms/Passes.td
Commit 1150f02c77b81adca4d0c67afdef23321e93db89 by rtrieu
Revert "tsan: new runtime (v3)"

This reverts commit ebd47b0fb78fa11758da6ffcd3e6b415cbb8fa28.
This was causing unexpected behavior in programs.
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_flags.inc
The file was modifiedcompiler-rt/lib/tsan/go/build.bat
The file was modifiedcompiler-rt/lib/tsan/go/buildgo.sh
The file was modifiedcompiler-rt/lib/tsan/CMakeLists.txt
The file was modifiedcompiler-rt/test/tsan/mutexset7.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_flags_test.cpp
The file was modifiedcompiler-rt/test/tsan/bench_threads.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_access.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.h
The file was modifiedcompiler-rt/lib/tsan/go/tsan_go.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.cpp
The file was modifiedcompiler-rt/lib/tsan/check_analyze.sh
The file was modifiedcompiler-rt/test/tsan/memcmp_race.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_defs.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_trace.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mutexset.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_shadow.h
The file was addedcompiler-rt/lib/tsan/rtl/tsan_update_shadow_word.inc
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_flags.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
The file was modifiedcompiler-rt/test/tsan/free_race2.c
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_sync_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_windows.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_trace_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mutexset.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_java.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_shadow_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_dense_alloc.h
The file was modifiedcompiler-rt/test/tsan/memcpy_race.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_proc.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_stack_test.cpp
Commit 02710413a32afbd6eeeff0fd56c960f4c4e21629 by bixia
Accept symmetric sparse matrix in Matrix Market Exchange Format.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D114402
The file was modifiedmlir/test/CMakeLists.txt
The file was modifiedmlir/lib/ExecutionEngine/SparseTensorUtils.cpp
The file was addedmlir/test/Integration/data/test_symmetric.mtx
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
Commit 55792b5ac44e4c0d3a8feb8a793d60d58e38cf20 by Vitaly Buka
[sanitizer] Fail instead of crash without real_pthread_create
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Commit 8cdf1c1edb937b192d162f299127fad8d9dc0faa by ikudrin
[ELF] Support the "read-only" memory region attribute

The attribute 'r' allows (or disallows for the negative case) read-only
sections, i.e. ones without the SHF_WRITE flag, to be assigned to the
memory region. Before the patch, lld could put a section in the wrong
region or fail with "error: no memory region specified for section".

Differential Revision: https://reviews.llvm.org/D113771
The file was modifiedlld/ELF/ScriptParser.cpp
The file was addedlld/test/ELF/linkerscript/memory-attr.test
The file was modifiedlld/ELF/LinkerScript.cpp
The file was modifiedlld/ELF/LinkerScript.h
Commit 078da26b1ce3e509b9705bba95686e4ef8b8e480 by abinav.puthanpurayil
[AMDGPU] Check for unneeded shift mask in shift PatFrags.

The existing constrained shift PatFrags only dealt with masked shift
from OpenCL front-ends. This change copies the
X86DAGToDAGISel::isUnneededShiftMask() function to AMDGPU and uses it in
the shift PatFrag predicates.

Differential Revision: https://reviews.llvm.org/D113448
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/imm16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/constrained-shift.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/extract-lowbits.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sra.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Commit b9fd7247a71d7ab652c3e827b7018d6ea446024e by Vitaly Buka
[sanitizer] Add Abs<T>
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common.h
Commit ba4411e7c6a5879ce8acf246b0cd03ec738d9d6b by courbet
[clang-tidy] performance-unnecessary-copy-initialization: Fix false negative.

`isConstRefReturningMethodCall` should be considering
`CXXOperatorCallExpr` in addition to `CXXMemberCallExpr`. Clang considers
these to be distinct (`CXXOperatorCallExpr` derives from `CallExpr`, not
`CXXMemberCallExpr`), but we don't care in the context of this
check.

This is important because of
`std::vector<Expensive>::operator[](size_t) const`.

Differential Revision: https://reviews.llvm.org/D114249
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/performance-unnecessary-copy-initialization.cpp
The file was modifiedclang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/performance-unnecessary-copy-initialization-excluded-container-types.cpp
Commit 7f5d9bf13a7d872dc173d09598743c006f59d6b8 by ivan.butygin
[mlir][scf] Canonicalize scf.while with unused results

Differential Revision: https://reviews.llvm.org/D114291
The file was modifiedmlir/lib/Dialect/SCF/SCF.cpp
The file was modifiedmlir/test/Dialect/SCF/canonicalize.mlir
Commit c2441b6b89bfe52a16f6c5ed5a0a49c9a02daf2a by rosie.sumpter
[LoopVectorize] Add vector reduction support for fmuladd intrinsic

Enables LoopVectorize to handle reduction patterns involving the
llvm.fmuladd intrinsic.

Differential Revision: https://reviews.llvm.org/D111555
The file was modifiedllvm/lib/Analysis/IVDescriptors.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/reduction-inloop.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/include/llvm/Analysis/IVDescriptors.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
Commit 991074012a6c9a294c5c64cf51502934a8e9bb36 by rosie.sumpter
[LoopVectorize] Propagate fast-math flags for VPInstruction

In-loop vector reductions which use the llvm.fmuladd intrinsic involve
the creation of two recipes; a VPReductionRecipe for the fadd and a
VPInstruction for the fmul. If the call to llvm.fmuladd has fast-math flags
these should be propagated through to the fmul instruction, so an
interface setFastMathFlags has been added to the VPInstruction class to
enable this.

Differential Revision: https://reviews.llvm.org/D113125
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
The file was modifiedllvm/include/llvm/IR/Operator.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/IR/Operator.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-printing.ll
Commit 2d33327f9d4c154e7454c2d830c1caa8e6850f4f by rosie.sumpter
[LoopVectorize] Print fast-math flags for VPReductionRecipe
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-printing.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
Commit df32a39dd0f68383a1685a4571715edb70664969 by rosie.sumpter
[LoopVectorize][CostModel] Update cost model for fmuladd intrinsic

This patch updates the cost model for ordered reductions so that a call
to the llvm.fmuladd intrinsic is modelled as a normal fmul instruction
plus the cost of an ordered fadd reduction.

Differential Revision: https://reviews.llvm.org/D111630
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 6f82264dbb02028d4ec4940aeb6d716dded6e879 by pavel
[lldb/gdb-remote] Remove more non-stop mode remnants

The read thread handling is completely dead code now that non-stop mode
no longer exists.
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
Commit 8ef460fc5137816c0bcc9ec471e7d60d3cc2f5ee by flo
[llvm-reduce] Add parallel chunk processing.

This patch adds parallel processing of chunks. When reducing very large
inputs, e.g. functions with 500k basic blocks, processing chunks in
parallel can significantly speed up the reduction.

To allow modifying clones of the original module in parallel, each clone
needs their own LLVMContext object. To achieve this, each job parses the
input module with their own LLVMContext. In case a job successfully
reduced the input, it serializes the result module as bitcode into a
result array.

To ensure parallel reduction produces the same results as serial
reduction, only the first successfully reduced result is used, and
results of other successful jobs are dropped. Processing resumes after
the chunk that was successfully reduced.

The number of threads to use can be configured using the -j option.
It defaults to 1, which means serial processing.

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D113857
The file was modifiedllvm/tools/llvm-reduce/deltas/Delta.cpp
The file was modifiedllvm/tools/llvm-reduce/CMakeLists.txt
The file was modifiedllvm/test/tools/llvm-reduce/operands-skip.ll
Commit bb273a35a02a00dbba8549e858df310f4b6a32b1 by springerm
[mlir][linalg][bufferize][NFC] Move tensor interface impl to new build target

This makes ComprehensiveBufferize entirely independent of the tensor dialect.

Differential Revision: https://reviews.llvm.org/D114217
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/LinalgInterfaceImpl.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.h
The file was addedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/TensorInterfaceImpl.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was addedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/TensorInterfaceImpl.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferizePass.cpp
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Commit 93fc91610f427f42b77fa36a65a70b9b86225c37 by mydeveloperday
[clang-format] NFC - recent changes caused clang-format to no longer be clang-formatted.

The following 2 commits caused files in clang-format to no longer be clang-formatted.

we would lose our "clean" status https://releases.llvm.org/13.0.0/tools/clang/docs/ClangFormattedStatus.html

c2271926a4fc  - Make clang-format fuzz through Lexing with asserts enabled (https://github.com/llvm/llvm-project/commit/c2271926a4fc )

84bf5e328664 - Fix various problems found by fuzzing. (https://github.com/llvm/llvm-project/commit/84bf5e328664)

Reviewed By: HazardyKnusperkeks, owenpan

Differential Revision: https://reviews.llvm.org/D114430
The file was modifiedclang/lib/Format/SortJavaScriptImports.cpp
The file was modifiedclang/lib/Format/TokenAnalyzer.cpp
The file was modifiedclang/lib/Format/WhitespaceManager.cpp
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
The file was modifiedclang/lib/Format/Format.cpp
Commit 734e2386ffb34e5ab5fbdc1063fd11e6a2a632ce by david.green
[ARM] Add fma and update fadd/fmul predicated select tests. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-selectop2.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-selectop3.ll
Commit 764b35d89f57a9052d84898422a865dc2e08edca by dvyukov
tsan: extend mmap test

Test size larger than clear_shadow_mmap_threshold,
which is handled differently.

Depends on D114348.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D114366
The file was modifiedcompiler-rt/test/tsan/ignored-interceptors-mmap.cpp
Commit d9af9c2c5a53c9ba6aa0255240a2a40e8bea27aa by david.green
[ARM] Fold floating point select(binop) patterns

Similar to D84091 which added extra predicated folds for integer operations
using the identity element of the operation, this adds them for floating
point operations for the form `BinOp(x, select(p, y, Identity))`. They are
folded back to predicated versions of the operator, with fadd having the
identity -0.0, fsub using the identity 0.0 and fmul using 1.0.

Differential Revision: https://reviews.llvm.org/D113574
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-selectop3.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
Commit b8f68ad9cdb11d585acc6c38ad124b32efb6178a by jeremy.morse
[DebugInfo][InstrRef] Avoid crash when values optimised out late in sdag

It appears that we can emit all the instructions for a function, including
debug instructions, and then optimise some of the values out late.
Specifically, in the attached test case, an argument gets optimised out
after DBG_VALUE / DBG_INSTR_REFs are created. This confuses
MachineFunction::finalizeDebugInstrRefs, which expects to be able to find a
defining instruction, and crashes instead.

Fix this by identifying when there's no defining instruction, and
translating that instead into a DBG_VALUE $noreg.

Differential Revision: https://reviews.llvm.org/D114476
The file was modifiedllvm/lib/CodeGen/MachineFunction.cpp
The file was addedllvm/test/DebugInfo/X86/instr-ref-sdag-empty-vreg.ll
Commit cf40ca026f9193c46c3db1f3cb2ac0dff5f2b695 by david.sherwood
[NFC] Tidy up SelectionDAGBuilder::visitIntrinsicCall to use existing sdl debug loc

In quite a few places we were calling getCurSDLoc() to get the debug
location, but this is already a local variable `sdl`.

Differential Revision: https://reviews.llvm.org/D114447
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Commit ca9d149e07551257813a7c9913efdfbbc23774a1 by springerm
[mlir][linalg][bufferize][NFC] Move vector interface impl to new build target

This makes ComprehensiveBufferize entirely independent of the vector dialect.

Differential Revision: https://reviews.llvm.org/D114218
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/CMakeLists.txt
The file was addedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/VectorInterfaceImpl.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was addedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/VectorInterfaceImpl.h
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferizePass.cpp
Commit 581f837355b9523bd3217fb05eed3d577d51b95d by david.green
[ARM] Fold (fadd x, (vselect c, y, -1.0)) into (vselect c, (fadd x, y), x)

This is similar to D113574, but as a DAG combine, not tablegen patterns.
Doing the fold as a DAG combine allows the fadd to be folded with a
fmul, finally producing a predicated vfma. It performs the same fold of
fadd(x, vselect(p, y, -0.0)) to vselect p, (fadd x, y), x) using -0.0 as
the identity value of a fadd.

Differential Revision: https://reviews.llvm.org/D113584
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-selectop3.ll
Commit 976f3b3c9eba0835d5ab7d191bd2e88ceda86ebe by carl.ritson
[AMDGPU] Only allow implicit WQM in pixel shaders

Implicit derivatives are only valid in pixel shaders,
hence only implicitly enable WQM for pixel shaders.
This avoids unintended WQM in other shader types (e.g. compute)
when image sampling instructions are used.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D114414
The file was modifiedllvm/test/CodeGen/AMDGPU/memory_clause.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wqm.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
Commit c52ff0cfcbf46b81d3df868a259d94910cd15c9a by georgiev
  [LLDB/test] lldbutil check_breakpoint() - check target instance

Check test.target instance type before we attempt to get the breakpoint.
This fix is suggested by 'clayborg'.
Ref: https://reviews.llvm.org/D111899#inline-1090156
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbutil.py
Commit 8a52bd82e36855b3ad842f2535d0c78a97db55dc by jay.foad
[AMDGPU] Only select VOP3 forms of VOP2 instructions

Change VOP_PAT_GEN to default to not generating an instruction selection
pattern for the VOP2 (e32) form of an instruction, only for the VOP3
(e64) form. This allows SIFoldOperands maximum freedom to fold copies
into the operands of an instruction, before SIShrinkInstructions tries
to shrink it back to the smaller encoding.

This affects the following VOP2 instructions:
v_min_i32
v_max_i32
v_min_u32
v_max_u32
v_and_b32
v_or_b32
v_xor_b32
v_lshr_b32
v_ashr_i32
v_lshl_b32

A further cleanup could simplify or remove VOP_PAT_GEN, since its
optional second argument is never used.

Differential Revision: https://reviews.llvm.org/D114252
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/extract-lowbits.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ctpop16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/stack-realign.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot8u.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/bfe-patterns.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/inline-asm.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/commute-shifts.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/flat-scratch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/idot8s.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/select-constant-xor.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sext-in-reg.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/test/CodeGen/AMDGPU/ashr.v2i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ssubsat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.v2i16.ll
Commit d7e03df719464354b20a845b7853be57da863924 by jay.foad
[AMDGPU] Implement widening multiplies with v_mad_i64_i32/v_mad_u64_u32

Select SelectionDAG ops smul_lohi/umul_lohi to
v_mad_i64_i32/v_mad_u64_u32 respectively, with an addend of 0.
v_mul_lo, v_mul_hi and v_mad_i64/u64 are all quarter-rate instructions
so it is better to use one instruction than two.

Further improvements are possible to make better use of the addend
operand, but this is already a strict improvement over what we have
now.

Differential Revision: https://reviews.llvm.org/D113986
The file was modifiedllvm/test/CodeGen/AMDGPU/udiv.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/bypass-div.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.mulo.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mad_64_32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul_int24.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
Commit 3cf4a2c6203b5777d56f0c04fb743b85a041d6f9 by llvm-dev
[DAG] SimplifyDemandedBits - simplify rotl/rotr to shl/srl

If we only demand bits from one half of a rotation pattern, see if we can simplify to a logical shift.

For the ARM rev16 patterns, I had to drop a fold to prevent srl(bswap()) -> rotr(bswap) -> srl(bswap) infinite loops. I've replaced this with an isel PatFrag which should do the same task.

https://alive2.llvm.org/ce/z/iroxki (rol -> shl by amt iff demanded bits has at least as many trailing zeros as the shift amount)
https://alive2.llvm.org/ce/z/4ez_U- (ror -> shl by revamt iff demanded bits has at least as many trailing zeros as the reverse shift amount)
https://alive2.llvm.org/ce/z/cD7dR- (ror -> lshr by amt iff demanded bits has at least as many leading zeros as the shift amount)
https://alive2.llvm.org/ce/z/_XGHtQ (rol -> lshr by revamt iff demanded bits has at least as many leading zeros as the reverse shift amount)

Differential Revision: https://reviews.llvm.org/D114354
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/rotate_vec.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrInfo.td
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-128.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-256.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb.td
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-512.ll
Commit 2191d502a8576c5d46f8771d5f0d353eb525b9b9 by jeremy.morse
[DebugInfo] Check both instr-ref and DBG_VALUE modes of sdag tests

In these test updates for instruction referencing, I've added specific
instr-ref RUN lines, and kep thte DBG_VALUE-based variable location check
lines too. This is because argument handling is really fiddly, and I figure
it's worth duplicating the testing to ensure it's definitely correct.

There's also dbg-value-superreg-copy2.mir, a dtest for where varaible
locations go when virtual registers are coalesced together. I don't think
there's an instruction referencing specific test for this, so have
duplicated that to for instruction referencing.

Differential Revision: https://reviews.llvm.org/D114262
The file was modifiedllvm/test/DebugInfo/X86/dbg-value-funcarg.ll
The file was modifiedllvm/test/DebugInfo/X86/dbg-value-funcarg2.ll
The file was addedllvm/test/CodeGen/X86/dbg-value-superreg-copy2.mir
The file was modifiedllvm/test/DebugInfo/X86/dbg-value-arg-movement.ll
The file was modifiedllvm/test/DebugInfo/X86/dbg-value-funcarg3.ll
Commit 1b5a43ac3f1113cd0512752e021fc70740726698 by klimek
Clean up clang-format tech debt.

Make all code go through FormatTokenSource instead of going around it, which
makes changes to TokenSource brittle.

Add LLVM_DEBUG in FormatTokenSource to be able to follow the token stream.
The file was modifiedclang/lib/Format/UnwrappedLineParser.cpp
Commit 06677d6a9faef9f57c3b3c79906e4bba18ebee8a by dvyukov
sanitizer_common: remove SANITIZER_USE_MALLOC

It was introduced in:
9cffc9550b75 tsan: allow to force use of __libc_malloc in sanitizer_common
and used in:
512a18e51819 tsan: add standalone deadlock detector
and later used for Go support.
But now both uses are gone. Nothing defines SANITIZER_USE_MALLOC.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D114514
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_allocator.cpp
Commit a68b52e0a33382f241a250c1d67bed1141727447 by dvyukov
tsan: add another fork deadlock test

The test tries to provoke internal allocator to be locked during fork
and then force the child process to use the internal allocator.
This test sometimes deadlocks with the new tsan runtime.

Depends on D114514.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D114515
The file was addedcompiler-rt/test/tsan/Linux/fork_multithreaded4.cpp
Commit f911c397dc9ee5849dff265b872b8df7458bf1e0 by jeremy.morse
[DebugInfo] Adjust x86 location-list tests for instruction referencing

This patch updates location lists in various x86 tests to reflect what
instruction referencing produces. There are two flavours of change:
* Not following a register copy immediately, because instruction
   referencing can make some slightly smarter decisions,
* Extended ranges, due to having additional information.

The register changes aren't that interesting, it's just a choice between
equally legitimate registers that instr-ref does differently. The extended
ranges are largely due to following stack restores better.

Differential Revision: https://reviews.llvm.org/D114362
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-4.ll
The file was modifiedllvm/test/DebugInfo/X86/live-debug-values-remove-range.ll
The file was modifiedllvm/test/DebugInfo/X86/sdag-combine.ll
The file was modifiedllvm/test/DebugInfo/COFF/pieces.ll
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-5.ll
The file was modifiedllvm/test/DebugInfo/X86/spill-nospill.ll
The file was modifiedllvm/test/DebugInfo/COFF/register-variables.ll
The file was modifiedllvm/test/DebugInfo/X86/pieces-3.ll
Commit b7bf937bbee38c2db0c0640176ef618d9c746538 by nemanja.i.ibm
[PowerPC] Provide XL-compatible vec_round implementation

The XL implementation of vec_round for vector double uses
"round-to-nearest, ties to even" just as the vector float
`version does. However clang and gcc use "round-to-nearest-away"
for vector double and "round-to-nearest, ties to even"
for vector float.

The XL behaviour is implemented under the __XL_COMPAT_ALTIVEC__
macro similarly to other instances of incompatibility.

Differential revision: https://reviews.llvm.org/D113642
The file was modifiedllvm/test/CodeGen/PowerPC/read-set-flm.ll
The file was modifiedclang/test/CodeGen/builtins-ppc-vsx.c
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedclang/test/CodeGen/builtins-ppc-xlcompat.c
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
Commit e3d8ebe158562fb945d473319f4f5c2de25a9a02 by djordje.todorovic
[llvm-dwarfdump][Statistics] Handle LTO cases with cross CU referencing

With link-time optimizations enabled, resulting DWARF mayend up containing
cross CU references (through the DW_AT_abstract_origin attribute).
Consider the following example:

// sum.c
__attribute__((always_inline)) int sum(int a, int b)
{
     return a + b;
}
// main.c
extern int sum(int, int);
int main()
{
     int a = 5, b = 10, c = sum(a, b);
     return 0;
}

Compiled as follows:

$ clang -g -flto -fuse-ld=lld main.c sum.c -o main

Results in the following DWARF:

-- sum.c CU: abstract instance tree
...
0x000000b0:   DW_TAG_subprogram
                DW_AT_name ("sum")
                DW_AT_decl_file ("sum.c")
                DW_AT_decl_line (1)
                DW_AT_prototyped (true)
                DW_AT_type (0x000000d3 "int")
                DW_AT_external (true)
                DW_AT_inline (DW_INL_inlined)

0x000000bc:     DW_TAG_formal_parameter
                  DW_AT_name ("a")
                  DW_AT_decl_file ("sum.c")
                  DW_AT_decl_line (1)
                  DW_AT_type (0x000000d3 "int")

0x000000c7:     DW_TAG_formal_parameter
                  DW_AT_name ("b")
                  DW_AT_decl_file ("sum.c")
                  DW_AT_decl_line (1)
                  DW_AT_type (0x000000d3 "int")
...
-- main.c CU: concrete inlined instance tree
...
0x0000006d:     DW_TAG_inlined_subroutine
                  DW_AT_abstract_origin (0x00000000000000b0 "sum")
                  DW_AT_low_pc (0x00000000002016ef)
                  DW_AT_high_pc (0x00000000002016f1)
                  DW_AT_call_file ("main.c")
                  DW_AT_call_line (5)
                  DW_AT_call_column (0x19)

0x00000081:       DW_TAG_formal_parameter
                    DW_AT_location (DW_OP_reg0 RAX)
                    DW_AT_abstract_origin (0x00000000000000bc "a")

0x00000088:       DW_TAG_formal_parameter
                    DW_AT_location (DW_OP_reg2 RCX)
                    DW_AT_abstract_origin (0x00000000000000c7 "b")
...

Note that each entry within the concrete inlined instance tree in
the main.c CU has a DW_AT_abstract_origin attribute which
refers to a corresponding entry within the abstract instance
tree in the sum.c CU.
llvm-dwarfdump --statistics did not properly report
DW_TAG_formal_parameters/DW_TAG_variables from concrete inlined
instance trees which had 0% location coverage and which
referred to a different CU, mainly because information about abstract
instance trees and their parameters/variables was stored
locally - just for the currently processed CU,
rather than globally - for all CUs.
In particular, if the concrete inlined instance tree from
the example above was to look like this
(i.e. parameter b has 0% location coverage, hence why it's missing):

0x0000006d:     DW_TAG_inlined_subroutine
                  DW_AT_abstract_origin (0x00000000000000b0 "sum")
                  DW_AT_low_pc (0x00000000002016ef)
                  DW_AT_high_pc (0x00000000002016f1)
                  DW_AT_call_file ("main.c")
                  DW_AT_call_line (5)
                  DW_AT_call_column (0x19)

0x00000081:       DW_TAG_formal_parameter
                    DW_AT_location (DW_OP_reg0 RAX)
                    DW_AT_abstract_origin (0x00000000000000bc "a")

llvm-dwarfdump --statistics would have not reported b as such.

Patch by Dimitrije Milosevic.

Differential revision: https://reviews.llvm.org/D113465
The file was addedllvm/test/tools/llvm-dwarfdump/X86/LTO_CCU_zero_loc_cov.ll
The file was modifiedllvm/tools/llvm-dwarfdump/Statistics.cpp
Commit 823fc8aa0681a861d1b74790ba77fd1f591c90b5 by spatel
[InstSimplify] add tests for xor logic; NFC
The file was modifiedllvm/test/Transforms/InstSimplify/xor.ll
Commit b326c058146fbd5d89f7c8ce9fb932b3851200d7 by spatel
[InstSimplify] fold xor logic of 2 variables, part 2

(~a & b) ^ (a | b) --> a

This is the swapped and/or (Demorgan?) sibling fold for
the fold added with D114462 ( 892648b18a8c ).

This case is easier to specify because we are returning
a root value, not a 'not':
https://alive2.llvm.org/ce/z/SRzj4f
The file was modifiedllvm/test/Transforms/InstSimplify/xor.ll
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
Commit 19be7f9702547c35224960f1a846e344576f8e31 by llvm-dev
[X86] Add D113970 tests cases for or-lea with no common bits.

Added tests are permutations of the pattern: (X & ~M) or (Y & M).

Differential Revision: https://reviews.llvm.org/D114078
The file was modifiedllvm/test/CodeGen/X86/or-lea.ll
Commit 73fd36963cc62931d695c9fda2026664962df754 by llvm-dev
[X86] Add BMI test coverage for for or-lea with no common bits tests

Ensure D113970 handles andnot patterns as well.
The file was modifiedllvm/test/CodeGen/X86/or-lea.ll
Commit a7648eb2aaf848e903dca46bb9efb75809570ef1 by flo
[LV] Use patterns in some induction tests, to make more robust. (NFC)
The file was modifiedllvm/test/Transforms/LoopVectorize/induction_plus.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-printing.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/induction.ll
Commit d32787230d52af709d67a0583a15727054231a0a by benny.kra
Revert "[DAG] SimplifyDemandedBits - simplify rotl/rotr to shl/srl"

This reverts commit 3cf4a2c6203b5777d56f0c04fb743b85a041d6f9.

It makes llc hang on the following test case.
```
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"

define dso_local void @_PyUnicode_EncodeUTF16() local_unnamed_addr #0 {
entry:
  br label %while.body117.i

while.body117.i:                                  ; preds = %cleanup149.i, %entry
  %out.6269.i = phi i16* [ undef, %cleanup149.i ], [ undef, %entry ]
  %0 = load i16, i16* undef, align 2
  %1 = icmp eq i16 undef, -10240
  br i1 %1, label %fail.i, label %cleanup149.i

cleanup149.i:                                     ; preds = %while.body117.i
  %or130.i = call i16 @llvm.bswap.i16(i16 %0) #2
  store i16 %or130.i, i16* %out.6269.i, align 2
  br label %while.body117.i

fail.i:                                           ; preds = %while.body117.i
  ret void
}

; Function Attrs: nofree nosync nounwind readnone speculatable willreturn
declare i16 @llvm.bswap.i16(i16) #1

attributes #0 = { "target-features"="+neon,+v8a" }
attributes #1 = { nofree nosync nounwind readnone speculatable willreturn }
attributes #2 = { mustprogress nofree norecurse nosync nounwind readnone uwtable willreturn "frame-pointer"="non-leaf" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+neon,+v8a" }
```
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb.td
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-512.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrInfo.td
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-128.ll
The file was modifiedllvm/test/CodeGen/X86/rotate_vec.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-256.ll
Commit 080ef0b6a698e41bbc356f5d96eb550f248642e2 by bradley.smith
[AArch64][SVE] Recognize all ones mask during fixed mask generation

Differential Revision: https://reviews.llvm.org/D114431
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-fixed-length-mask-opt.ll
Commit 8b86752c60f1d18f367fdd29f47bc3bd8646bbd2 by flo
[VPlan] Remove unused VPInstruction constructor. (NFC)

VPInstruction inherits from VPValue, so the constructor taking
ArrayRef<VPValue*> covers all cases that would be covered by the removed
constructor.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
Commit 408c0cc4eb6099d06cbd51fd4e205c2b39b2c8af by gchatelet
[libc] Fix wrong type for load/store of Repeated elements
The file was modifiedlibc/src/string/memory_utils/elements.h
Commit cd8d219536912b5ea04961af3a38955d8333bb3e by lebedev.ri
[X86][Costmodel] `getReplicationShuffleCost()`: promote 1 bit-wide elements to 32 bit when have AVX512DQ

I believe, this effectively completes `X86TTIImpl::getReplicationShuffleCost()`
for AVX512, other than the question of handling plain AVX512F,
where we end up with some really ugly "shuffles",
but then is there any CPU's that support AVX512, but not AVX512DQ/AVX512BW?

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D114315
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/shuffle-replication-i1.ll
Commit 5ba795c6e88519e84c0f7232a494a820ed4dfc52 by pengfei.wang
[X86][MS] Add test cases to show wrong alignment in vector variable arguments. NFC
The file was modifiedllvm/test/CodeGen/X86/vaargs-win32.ll
Commit 96beb30fbbcea87a3da7e984ba34951b0fa6deb5 by pavel
[lldb] Move GetSupportedArchitectureAtIndex to PlatformDarwin

All other platforms use GetSupportedArchitectures now.
The file was modifiedlldb/include/lldb/Target/Platform.h
The file was modifiedlldb/source/Target/RemoteAwarePlatform.cpp
The file was modifiedlldb/source/Target/Platform.cpp
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformDarwin.h
The file was modifiedlldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
The file was modifiedlldb/unittests/Target/RemoteAwarePlatformTest.cpp
Commit f3bfe1b41876add39d080067b504baa2ace97ecf by paul.robinson
Have yaml2obj describe all options in --help

Differential Revision: https://reviews.llvm.org/D114538
The file was modifiedllvm/tools/yaml2obj/yaml2obj.cpp
Commit 6ee69c0dea1e75d94015b2a794cd28c35c84f050 by quinn.pham
[NFC][X86] Inclusive language: Rename master label in x86-shrink-wrapping.ll

[NFC] As part of using inclusive language within the llvm project, this patch
renames the master label in `x86-shrink-wrapping.ll` to main.

Reviewed By: ZarkoCA

Differential Revision: https://reviews.llvm.org/D113940
The file was modifiedllvm/test/CodeGen/X86/x86-shrink-wrapping.ll
Commit 3b72448084052785b79566fa5bd374feb8ae3907 by courbet
[clang-tidy] Add unit tests for `DeclRefExprUtils`.

In preparation for D114539.
The file was modifiedclang-tools-extra/unittests/clang-tidy/CMakeLists.txt
The file was addedclang-tools-extra/unittests/clang-tidy/DeclRefExprUtilsTest.cpp
Commit a12192c755e32db74cd3ce73cfadb6797de9ce15 by llvmgnsyncbot
[gn build] Port 3b7244808405
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/unittests/clang-tidy/BUILD.gn
Commit 787b66eb5f747a8e0c650cd17a1977080c4f5b9e by peter.waller
[LoopAccessAnalysis][SVE] Bail out for scalable vectors

The supplied test case, reduced from real world code, crashes with a
'Invalid size request on a scalable vector.' error.

Since it's similar in spirit to an existing LAA test, rename the file to
generalize it to both.

Differential Revision: https://reviews.llvm.org/D114155
The file was removedllvm/test/Analysis/LoopAccessAnalysis/gep-induction-operand-typesize-warning.ll
The file was addedllvm/test/Analysis/LoopAccessAnalysis/scalable-vector-regression-tests.ll
The file was modifiedllvm/lib/Analysis/LoopAccessAnalysis.cpp
Commit 1cfa9b4d70fa71672e61943bf4c63b109f9bb4e2 by nicolas.vasilache
[mlir][Vector] NFC - Apply some clangd suggested fixes.
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
Commit 348389263ca545f0dd71aea505c595331d2a07c5 by dvyukov
tsan: lock internal allocator around fork

There is a small chance that the internal allocator is locked
during fork and then the new process is created with locked
internal allocator and any attempts to use it will deadlock.
For example, if detected a suppressed race in the parent during fork
and then another suppressed race after the fork.
This becomes much more likely with the new tsan runtime
as it uses the internal allocator for more things.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D114531
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_allocator_internal.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_allocator.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
Commit 6f85d68e6ab29e544b301d7ac84de2819b8d4b7a by dvyukov
tsan: include internal allocator into deadlock detection

Now that we lock the internal allocator around fork,
it's possible it will create additional deadlocks.
Add a fake mutex that substitutes the internal allocator
for the purposes of deadlock detection.

Depends on D114531.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D114532
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_defs.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.cpp
Commit f23b829a2635a6d833bdc81a12d6217b52ae9e45 by david.spickett
Fixed use of -o and -k in LLDB under Windows when statically compiled with vcruntime.

Right now if the LLDB is compiled under the windows with static vcruntime library, the -o and -k commands will not work.

The problem is that the LLDB create FILE* in lldb.exe and pass it to liblldb.dll which is an object from CRT.
Since the CRT is statically linked each of these module has its own copy of the CRT with it's own global state and the LLDB should not share CRT objects between them.

In this change I moved the logic of creating FILE* out of commands stream from Driver class to SBDebugger.
To do this I added new method: SBError SBDebugger::SetInputStream(SBStream &stream)

Command to build the LLDB:
cmake -G Ninja -DLLVM_ENABLE_PROJECTS="clang;lldb;libcxx"  -DLLVM_USE_CRT_RELEASE="MT" -DLLVM_USE_CRT_MINSIZEREL="MT" -DLLVM_USE_CRT_RELWITHDEBINFO="MT" -DP
YTHON_HOME:FILEPATH=C:/Python38 -DCMAKE_C_COMPILER:STRING=cl.exe -DCMAKE_CXX_COMPILER:STRING=cl.exe ../llvm

Command which will fail:
lldb.exe -o help

See discord discussion for more details: https://discord.com/channels/636084430946959380/636732809708306432/854629125398724628
This revision is for the further discussion.

Reviewed By: teemperor

Differential Revision: https://reviews.llvm.org/D104413
The file was modifiedlldb/bindings/interface/SBDebugger.i
The file was modifiedlldb/source/Core/Debugger.cpp
The file was modifiedlldb/tools/driver/Driver.cpp
The file was modifiedlldb/test/API/python_api/file_handle/TestFileHandle.py
The file was modifiedlldb/include/lldb/API/SBDebugger.h
The file was modifiedlldb/test/API/python_api/default-constructor/sb_debugger.py
The file was modifiedlldb/include/lldb/Core/Debugger.h
The file was modifiedlldb/source/API/SBDebugger.cpp
Commit 6b96b2a0bf65ff838d4dbf909a5120d4d1083e29 by 1.int32
[clang][AST] Check context of record in structural equivalence.

The AST structural equivalence check did not differentiate between
a struct and a struct with same name in different namespace. When
type of a member is checked it is possible to encounter such a case
and wrongly decide that the types are similar. This problem is fixed
by check for the namespaces of a record declaration.

Reviewed By: martong

Differential Revision: https://reviews.llvm.org/D113118
The file was modifiedclang/lib/AST/ASTStructuralEquivalence.cpp
The file was modifiedclang/unittests/AST/StructuralEquivalenceTest.cpp
Commit dee810e117ad442c426a1213277faa8b028751d5 by graham.hunter
[NFC][LAA] Precommit tests for forked pointers

Precommit for https://reviews.llvm.org/D108699
The file was addedllvm/test/Transforms/LoopVectorize/forked-pointers.ll
The file was addedllvm/test/Analysis/LoopAccessAnalysis/forked-pointers.ll
Commit f93520349695e121088382f4c8639b295dcabcd7 by llvm-dev
[AArch64] Add regression test for D114354
The file was modifiedllvm/test/CodeGen/AArch64/arm64-rev.ll
Commit eb00e79bd97446c2dd16f9937c299ef7919ecb60 by jeremy.morse
[DebugInfo] Reflect switched variable order from instruction referencing

Enabling instruction referencing causes a few variable locations to switch
order -- i.e., they switch position in the output DWARF, or sometimes the
order of DBG_VALUEs. Update a few tests to reflect this.

Differential Revision: https://reviews.llvm.org/D114261
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-3.ll
The file was modifiedllvm/test/DebugInfo/X86/constant-loclist.ll
The file was modifiedllvm/test/CodeGen/X86/debug-loclists.ll
The file was modifiedllvm/test/DebugInfo/X86/pieces-4.ll
The file was modifiedllvm/test/DebugInfo/X86/float_const_loclist.ll
Commit 133e25f946f87916da0e165855298c5f3394b752 by jeremy.morse
[DebugInfo][InstrRef] Ignore SP clobbers on call instructions even more

Avoid un-necessarily recreating DBG_VALUEs on call instructions.

In LiveDebugvalues we choose to ignore any clobbers of SP by call
instructions, as they're irrelevant to our model of the machine. We
currently do so for tracking register values (MTracker); do the same for
tracking variable locations (TTracker).

Test modified to endure that a duplicate DBG_VALUE is not created after the
call in struction in this test.

Differential Revision: https://reviews.llvm.org/D114365
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
The file was modifiedllvm/test/DebugInfo/X86/dbg-addr.ll
Commit a489d6c5e0158eb92025b27bce958595c20d3ecf by kstoimenov
[ASan] Moved __asan_test_only_reported_buggy_pointer to ReportGenericError, which is needed for shared optimzied callback tests.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D114486
The file was modifiedcompiler-rt/lib/asan/asan_report.cpp
The file was modifiedcompiler-rt/lib/asan/asan_rtl.cpp
Commit 06d4a76309cd97e25859770b3da29006ccac421a by wanyu9511
[NFC][AIX]Disable precompiled module file tests on AIX

The PCH reader looks for `__clangast` section in the precompiled module file, which is not present in the file on AIX, and we don't support writing this custom section in XCOFF yet.

Reviewed By: daltenty

Differential Revision: https://reviews.llvm.org/D114481
The file was modifiedclang/test/ClangScanDeps/modules-pch-common-submodule.c
The file was modifiedclang/test/ClangScanDeps/modules-pch-common-via-submodule.c
The file was modifiedclang/test/ClangScanDeps/modules-pch.c
The file was modifiedclang/test/PCH/debug-info-pch-path.c
Commit 0a58982b082df3b0b995a19f2cbed34228fda73d by ravishankarm
[mlir][Linalg] Remove alloc/dealloc pair as a callback.

The alloc dealloc pair generation callback is really central to the
bufferization algorithm, it modifies the state in a way that affects
correctness. This is not really a configurable option. Moving it to
BufferizationState removes what was probably the reason it was added
as a callback.

Differential Revision: https://reviews.llvm.org/D114417
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.cpp
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/TensorInterfaceImpl.cpp
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/LinalgInterfaceImpl.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/BufferizableOpInterface.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferizePass.cpp
Commit dc1aa8eacd1e0e554f206cc15d730f37ea90c4ea by nemanja.i.ibm
[PowerPC] Add missed clang portion of c933c2eb3346

The clang portion of c933c2eb3346 was missed as I made
some kind of mistake squashing the commits with git.
This patch just adds those.

The original review: https://reviews.llvm.org/D114088
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedclang/test/CodeGen/builtins-ppc-p8vector.c
Commit fb46e64a013a2c7457db3312da07db1b25ad5219 by flo
Revert "[ThreadPool] Do not return shared futures."

This reverts commit a5fff58781f30ff3fd7a3f56948552cf7b8842bb.

The offending commit broke building with LLVM_ENABLE_THREADS=OFF.
The file was modifiedllvm/tools/llvm-reduce/deltas/Delta.cpp
The file was modifiedmlir/include/mlir/IR/Threading.h
The file was modifiedllvm/include/llvm/Support/ThreadPool.h
Commit c79345fb7b149d9c952f8506c9e6c6317a5b4cd8 by zarko
[NFC][Clang][test] Inclusive language: Remove and rephrase uses of sanity test/check in clang/test

Part of work to use more inclusive terms in clang/llvm.
The file was modifiedclang/test/SemaObjCXX/instancetype.mm
The file was modifiedclang/test/SemaObjC/instancetype.m
The file was modifiedclang/test/Analysis/malloc-sizeof.cpp
The file was modifiedclang/test/Driver/arm-target-as-march-mcpu.s
The file was modifiedclang/test/SemaObjC/warn-retain-cycle.m
The file was modifiedclang/test/Analysis/additive-folding.cpp
The file was modifiedclang/test/Analysis/retain-release.m
The file was modifiedclang/test/SemaCXX/dllexport.cpp
The file was modifiedclang/test/Analysis/reference.cpp
The file was modifiedclang/test/SemaCXX/dllimport.cpp
The file was modifiedclang/test/Rewriter/rewrite-foreach-in-block.mm
The file was modifiedclang/test/SemaCXX/coroutines-exp-namespace.cpp
The file was modifiedclang/test/CodeGenObjCXX/arc.mm
The file was modifiedclang/test/Rewriter/instancetype-test.mm
The file was modifiedclang/test/Analysis/bitwise-ops.c
The file was modifiedclang/test/SemaObjC/conversion.m
The file was modifiedclang/test/Sema/dllimport.c
The file was modifiedclang/test/PCH/cxx11-statement-attributes.cpp
The file was modifiedclang/test/Driver/clang-g-opts.c
The file was modifiedclang/test/SemaObjC/arc-repeated-weak.mm
The file was modifiedclang/unittests/Analysis/CFGDominatorTree.cpp
The file was modifiedclang/test/Analysis/derived-to-base.cpp
The file was modifiedclang/test/SemaCXX/warn-thread-safety-analysis.cpp
The file was modifiedclang/test/Analysis/ctor.mm
The file was modifiedclang/test/CodeGen/attr-nodebug.c
The file was modifiedclang/unittests/AST/ASTImporterFixtures.h
The file was modifiedclang/test/Modules/target-features.m
The file was modifiedclang/test/Analysis/dtor.cpp
The file was modifiedclang/test/Sema/dllexport.c
The file was modifiedclang/test/CodeGenObjCXX/arc-attrs.mm
The file was modifiedclang/test/Analysis/comparison-implicit-casts.cpp
The file was modifiedclang/test/Sema/predef.c
The file was modifiedclang/test/Modules/va_list.m
The file was modifiedclang/test/SemaCXX/coroutines.cpp
The file was modifiedclang/test/Modules/framework-name.m
The file was modifiedclang/test/Analysis/expr-inspection.cpp
The file was modifiedclang/unittests/Tooling/Syntax/TokensTest.cpp
The file was modifiedclang/unittests/Sema/ExternalSemaSourceTest.cpp
The file was modifiedclang/test/Analysis/plist-html-macros.c
Commit a4fd8cb76f8169e26f17e04d9a265a28531e4520 by gysit
[mlir][linalg] Update failure conditions for padOperandToSmallestStaticBoundingBox.

Change the failure condition of padOperandToSmallestStaticBoundingBox to never fail if the operand is already statically sized.

In particular:
- if the padding value computation fails -> return failure if the operand shape is dynamic and success if it is static.
- if there is no extract slice op -> return failure if the operand shape is dynamic and success if it is static.

The latter change prevents padding from failure if the output operand passed by iteration argument is statically sized since in this case the extract / insert slice pairs are removed by canonicalization.

Depends On D114153

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114161
The file was modifiedmlir/test/lib/Dialect/Linalg/TestLinalgCodegenStrategy.cpp
The file was modifiedmlir/test/Dialect/Linalg/pad.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
Commit 9300b133c80dfc1a15135f9fb9c5afaf8a6805f8 by Stanislav.Mekhanoshin
Revert "[InstCombine] (~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) & (c | (b ^ a)))"

This reverts commit c407769f5e6c81d56de0b251aed5750a16a7651c.
The file was modifiedllvm/test/Transforms/InstCombine/and-xor-or.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit 86f186efea7b5f542ef3d9fa2e63fd485475e011 by gysit
[mlir][linalg] Add makeComposedPadHighOp.

Add the makeComposedPadHighOp method which creates a new PadTensorOp if necessary. If the source to pad is actually the result of a sequence of padded LinalgOps, the method checks if padding is needed or if we can use the padded result of the padded LinalgOp sequence directly.

Example:
```
%0 = tensor.extract_slice %arg0 [%iv0, %iv1] [%sz0, %sz1]
%1 = linalg.pad_tensor %0 low[0, 0] high[...] { linalg.yield %cst }
%2 = linalg.matmul ins(...) outs(%1)
%3 = tensor.extract_slice %2 [0, 0] [%sz0, %sz1]
```
when padding %3 return %2 instead of introducing
```
%4 = linalg.pad_tensor %3 low[0, 0] high[...] { linalg.yield %cst }
```

Depends On D114161

Reviewed By: nicolasvasilache, pifon2a

Differential Revision: https://reviews.llvm.org/D114175
The file was modifiedmlir/test/Dialect/Linalg/pad.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
Commit d42a6432aa37a6b9aa7e4f5209e9679c8a4c2fbb by zarko
[NFC][clang]Inclusive language: remove remaining uses of sanity

Missed some uses of sanity check in previous commits.
The file was modifiedclang/lib/StaticAnalyzer/Core/CoreEngine.cpp
The file was modifiedclang/utils/check_cfc/check_cfc.py
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/utils/TableGen/ASTTableGen.cpp
Commit b6e7b1be732d2b35c1452731883de812a818ff2a by gysit
[mlir][linalg] Simplify padding test (NFC).

The padding tests previously contained the tile loops. This revision removes the tile loops since padding itself does not consider the loops. Instead the induction variables are passed in as function arguments which promotes them to symbols in the affine expressions. Note that the pad-and-hoist.mlir test still exercises padding in the context of the full loop nest.

Depends On D114175

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D114227
The file was modifiedmlir/test/Dialect/Linalg/pad.mlir
Commit bfadc5dcbfa81da00b58de5e62b569faf24538e7 by jeremy.morse
[DebugInfo][InstrRef] Cope with win32 calls changing SP in LiveDebugValues

Almost all of the time, call instructions don't actually lead to SP being
different after they return. An exception is win32's _chkstk, which which
implements stack probes. We need to recognise that as modifying SP, so
that copies of the value are tracked as distinct vla pointers.

This patch adds a target frame-lowering hook to see whether stack probe
functions will modify the stack pointer, store that in an internal flag,
and if it's true then scan CALL instructions to see whether they're a
stack probe. If they are, recognise them as defining a new stack-pointer
value.

The added test exercises this behaviour: two calls to _chkstk should be
considered as producing two different values.

Differential Revision: https://reviews.llvm.org/D114443
The file was addedllvm/test/DebugInfo/MIR/InstrRef/win32-chkctk-modifies-esp.mir
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.h
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
The file was modifiedllvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
The file was modifiedllvm/include/llvm/CodeGen/TargetFrameLowering.h
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
Commit 2897b67665d1fa1177531e78cc93b3704c5aea12 by flo
[LV] Use OrigLoop instead of induction to get function. (NFC)

Upcoming changes will result in Induction not being set/used in some
cases. Use OrigLoop to get the function instead.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 187d9979f22e9e285d501b53c0978c1e80856fa1 by dimitry
cfi: fix more -Wformat warnings

Building cfi with recent clang on a 64-bit system results in the
following warnings:

    compiler-rt/lib/cfi/cfi.cpp:233:64: warning: format specifies type 'void *' but the argument has type '__sanitizer::uptr' (aka 'unsigned long') [-Wformat]
        VReport(1, "Can not handle: symtab > strtab (%p > %zx)\n", symtab, strtab);
                                                     ~~            ^~~~~~
                                                     %lu
    compiler-rt/lib/sanitizer_common/sanitizer_common.h:231:46: note: expanded from macro 'VReport'
        if ((uptr)Verbosity() >= (level)) Report(__VA_ARGS__); \
                                                 ^~~~~~~~~~~
    compiler-rt/lib/cfi/cfi.cpp:253:59: warning: format specifies type 'void *' but the argument has type '__sanitizer::uptr' (aka 'unsigned long') [-Wformat]
        VReport(1, "Can not handle: symtab %p, strtab %zx\n", symtab, strtab);
                                           ~~                 ^~~~~~
                                           %lu
    compiler-rt/lib/sanitizer_common/sanitizer_common.h:231:46: note: expanded from macro 'VReport'
        if ((uptr)Verbosity() >= (level)) Report(__VA_ARGS__); \
                                                 ^~~~~~~~~~~

Since `__sanitizer::uptr` has the same size as `size_t`, consistently
use `%z` as a printf specifier.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D114466
The file was modifiedcompiler-rt/lib/cfi/cfi.cpp
Commit 1ad7de9e92bc2977698e5f6d6493202b50c912d5 by Saleem Abdulrasool
Headers: exclude `#include_next <stdatomic.h>` on MSVC

The 14.31.30818 toolset has the following in the `stdatomic.h`:
~~~
#ifndef __cplusplus
#error <stdatomic.h> is not yet supported when compiling as C, but this is planned for a future release.
#endif
~~~

This results in clang failing to build existing code which relied on
`stdatomic.h` in C mode on Windows.  Simply fallback to the clang header
until that header is available as a complete implementation.
The file was modifiedclang/lib/Headers/stdatomic.h
Commit 496254cf802a21e1967b61dec48017b8ec831574 by a.bataev
[SLP]Improve analysis/emission of vector operands for alternate nodes.

Compiler has an analysis for perfect diamond matching but it does not
support nodes with main/alternate opcodes. The problem is that the
scalars themselves are different and might not match directly with other
nodes, but operands and main/alternate opcodes might match and compiler
might reuse some previously emitted vector instructions. Need to include
this analysis in the cost model and actual vector instructions emission
process.

Differential Revision: https://reviews.llvm.org/D114101
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/remark_alternate.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/transpose-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SLPVectorizer/AArch64/transpose.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 7e1dc12f440b2d4aef71d790be94c65d7e2b86a2 by Stanislav.Mekhanoshin
Move some tests from instcombine to phase ordering. NFC.

Tests from D113216 are now handled by Reassociate, GVN and BDCE
passes after D114462. Moving into phase ordering instead of
instcombine.
The file was modifiedllvm/test/Transforms/InstCombine/and-xor-or.ll
The file was addedllvm/test/Transforms/PhaseOrdering/reassociate-gvn-bdce.ll
Commit 175d68dd8db5fd9d892be3db46c9a8dc601ed968 by flo
[ConstraintElimination] Add additional tests.
The file was addedllvm/test/Transforms/ConstraintElimination/and-implied-by-operands.ll
The file was addedllvm/test/Transforms/ConstraintElimination/geps-inbounds-precondition-ub-in-use-blocks.ll
The file was addedllvm/test/Transforms/ConstraintElimination/uses-in-different-blocks.ll
Commit 3a183a49f26df2f94f985ba0790d2d89cdcdad15 by Louis Dionne
[libc++] Fix two tests that were failing in freestanding mode

We were defining `main()` but never returning from it.
The file was modifiedlibcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/util.smartptr.shared.const/shared_ptr_Y.pass.cpp
The file was removedlibcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of.deprecated.fail.cpp
The file was addedlibcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of.deprecated.verify.cpp
Commit f244166c475dd3d2f9ea1be9979c1ab1a4a5ddcc by Louis Dionne
[libc++] Handle armv7m in two architecture dependent tests
The file was modifiedlibcxx/test/std/language.support/cmp/cmp.alg/strong_order_long_double.verify.cpp
The file was modifiedlibcxx/test/libcxx/language.support/support.rtti/type.info/type_info.comparison.apple.compile.pass.cpp
Commit aa60d169ea62ee375910e684d20932519fe3f64f by apilipenko
[CVP] Add a cl::opt for canonicalization of signed relational comparisons

This canonicalization breaks the ability to discard checks in some cases.
Add a command line option to disable it. This option is on by default,
so the change is NFC.

See for details:
https://reviews.llvm.org/D112895#3149487
The file was modifiedllvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
Commit 7a0584fe3fd6b342d56251e92acc437961c8d29d by Louis Dionne
[libc++] Fix backdeployment annotations for std::filesystem

In 1fa27f2a10e8, we made <filesystem>'s iterator types model concepts
from <ranges>, but we forgot to add the appropriate availability
annotations. This broke back-deployment to platforms that don't have
<filesystem> for which we have availability annotations.

For some reason, this wasn't caught by our back-deployment CI.
I believe this is due to the fact that we use a slightly older
compiler in the CI, and perhaps that compiler does not honour
our `#pragma clang attribute push` properly.

Differential Revision: https://reviews.llvm.org/D114456
The file was modifiedlibcxx/test/libcxx/iterators/iterator.requirements/iterator.assoc.types/iterator.traits/legacy_iterator.compile.pass.cpp
The file was modifiedlibcxx/test/libcxx/iterators/iterator.requirements/iterator.assoc.types/iterator.traits/legacy_random_access_iterator.compile.pass.cpp
The file was modifiedlibcxx/test/libcxx/iterators/iterator.requirements/iterator.assoc.types/iterator.traits/legacy_forward_iterator.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/iterator.primitives/iterator.traits/cxx20_iterator_traits.compile.pass.cpp
The file was modifiedlibcxx/test/libcxx/iterators/iterator.requirements/iterator.assoc.types/iterator.traits/legacy_input_iterator.compile.pass.cpp
The file was modifiedlibcxx/test/libcxx/iterators/iterator.requirements/iterator.assoc.types/iterator.traits/legacy_bidirectional_iterator.compile.pass.cpp
The file was modifiedlibcxx/include/filesystem
Commit cd93ab8947a88470b3e1ef738a2947c0bfda667f by dblaikie
DWARFVerifier: Don't parse all units twice

Introduced/discussed in https://reviews.llvm.org/D38719

The header validation logic was also explicitly building the DWARFUnits
to validate. But then other calls, like "Units.getUnitForOffset" creates
the DWARFUnits again in the DWARFContext proper - so, let's avoid
creating the DWARFUnits twice by walking the DWARFContext's units rather
than building a new list explicitly.

This does reduce some verifier power - it means that any unit with a
header parsing failure won't get further validation, whereas the
verifier-created units were getting some further validation despite
invalid headers. I don't think this is a great loss/seems "right" in
some ways to me that if the header's invalid we should stop there.

Exposing the raw DWARFUnitVectors from DWARFContext feels a bit
sub-optimal, but gave simple access to the getUnitForOffset to keep the
rest of the code fairly similar.
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_debug_info.s
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_invalid_die_range.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_invalid_ranges.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_overlapping_lexical_block_ranges.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_invalid_ref_addr_between.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_invalid_stmt_list.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_curanges_incomplete.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_invalid_strp.yaml
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_invalid_rnglists.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_unit_header_chain.s
The file was modifiedllvm/test/DebugInfo/X86/skeleton-unit-verify.s
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_lexical_block_ranges.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_invalid_ref_addr.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_overlapping_cu_ranges.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_invalid_cu_ref.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_overlapping_function_ranges.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_die_ranges.yaml
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFVerifier.h
Commit 95875d246acbb47a58e621dcc54610a4a3035381 by zarko
[LLVM][NFC]Inclusive language: remove occurances of sanity check/test from llvm

Part of work to use more inclusive language in clang/llvm. Rewording
some comments and change function and variable names.
The file was modifiedllvm/lib/Analysis/VFABIDemangling.cpp
The file was modifiedllvm/lib/ProfileData/InstrProfReader.cpp
The file was modifiedllvm/lib/Bitcode/Reader/MetadataLoader.cpp
The file was modifiedllvm/lib/MCA/InstrBuilder.cpp
The file was modifiedllvm/lib/InterfaceStub/ELFObjHandler.cpp
The file was modifiedllvm/lib/CodeGen/TwoAddressInstructionPass.cpp
The file was modifiedllvm/include/llvm/Support/Mutex.h
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
The file was modifiedllvm/lib/MCA/Stages/ExecuteStage.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
The file was modifiedllvm/include/llvm/Support/RWMutex.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
The file was modifiedllvm/lib/ProfileData/SampleProfReader.cpp
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/lib/Analysis/IRSimilarityIdentifier.cpp
The file was modifiedllvm/lib/IR/PassTimingInfo.cpp
The file was modifiedllvm/lib/Analysis/PHITransAddr.cpp
The file was modifiedllvm/lib/IR/Instructions.cpp
The file was modifiedllvm/lib/ProfileData/Coverage/CoverageMappingReader.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/include/llvm/Analysis/Lint.h
The file was modifiedllvm/include/llvm/MCA/HardwareUnits/Scheduler.h
The file was modifiedllvm/include/llvm/IR/Verifier.h
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/lib/MC/MCELFStreamer.cpp
The file was modifiedllvm/include/llvm/Transforms/Instrumentation/AddressSanitizer.h
The file was modifiedllvm/lib/AsmParser/LLParser.cpp
The file was modifiedllvm/lib/IR/SafepointIRVerifier.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
The file was modifiedllvm/include/llvm/Analysis/VectorUtils.h
The file was modifiedllvm/lib/CodeGen/DeadMachineInstructionElim.cpp
Commit 68e2231f8724eec26c9fcf5c5330fae897f9435f by Louis Dionne
[libc++] Value-initialize unique_ptr's deleter_type

According to the C++ standard, the stored pointer and the stored deleter
should be value-initialized.

Differential Revision: https://reviews.llvm.org/D113612
The file was modifiedlibcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.ctor/default.pass.cpp
The file was modifiedlibcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.ctor/pointer.pass.cpp
The file was modifiedlibcxx/test/support/deleter_types.h
The file was modifiedlibcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.ctor/nullptr.pass.cpp
The file was modifiedlibcxx/include/__memory/unique_ptr.h
Commit cb395f66ac3ce60427ca2b99580e716ac6dd551a by antiagainst
[mlir][spirv] Change the return type for {Min|Max}VersionBase

For synthesizing an op's implementation of the generated interface
from {Min|Max}Version, we need to define an `initializer` and
`mergeAction`. The `initializer` specifies the initial version,
and `mergeAction` specifies how version specifications from
different parts of the op should be merged to generate a final
version requirements.

Previously we use the specified version enum as the type for both
the initializer and thus the final return type. This means we need
to perform `static_cast` over some hopefully not used number (`~0u`)
as the initializer. This is quite opaque and sort of not guaranteed
to work. Also, there are ops that have an enum attribute where some
values declare version requirements (e.g., enumerant `B` requires
v1.1+) but some not (e.g., enumerant `A` requires nothing). Then a
concrete op instance with `A` will still declare it implements the
version interface (because interface implementation is static for
an op) but actually theirs no requirements for version.

So this commit changes to use an more explicit `llvm::Optional`
to wrap around the returned version enum.  This should make it
more clear.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D108312
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVAvailability.td
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/UpdateVCEPass.cpp
The file was modifiedmlir/test/lib/Dialect/SPIRV/TestAvailability.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
Commit 7bd87a03fdf1559569db1820abb21b6a479b0934 by ezhulenev
Promote readability by factoring out creation of min/max operation. Remove unnecessary divisions.

Reviewed By: ezhulenev

Differential Revision: https://reviews.llvm.org/D110680
The file was modifiedmlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp
The file was modifiedmlir/test/Integration/Dialect/Async/CPU/test-async-parallel-for-2d.mlir
Commit d3bb4fec2a5a698773b6b4a3758f166113aa2b8c by springerm
[mlir][linalg][bufferize][NFC] Move arith interface impl to new build target

This makes ComprehensiveBufferize entirely independent of the arith dialect.

Differential Revision: https://reviews.llvm.org/D114219
The file was addedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ArithInterfaceImpl.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferizePass.cpp
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
The file was addedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/ArithInterfaceImpl.h
Commit 0332d105b9ad7f1f0ffca7e78b71de8b3a48f158 by vtjnash
GlobalISel: remove assert that memcpy Src and Dst addrspace must be identical

The LangRef does not require these arguments to have the same type.

Differential Revision: https://reviews.llvm.org/D93154
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
Commit 23d505571d5180e497b88bde6719d6f2e9879f1a by uday
[NFC] Improve debug message in getAsIntegerSet

Improve debug message in getAsIntegerSet. Add missing trailing new line
and position info.

Differential Revision: https://reviews.llvm.org/D114511
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
Commit 8a8c655fe7c37665471d06b3e8cdff74f6b8ed3e by springerm
[mlir][SCF] Fix off-by-one bug in affine analysis

This change is NFC. There were two issues when passing/reading upper bounds into/from FlatAffineConstraints that negate each other, so the bug was not apparent. However, it made debugging harder because some constraints in the FlatAffineConstraints were off by one when dumping all constraints.

Differential Revision: https://reviews.llvm.org/D114137
The file was modifiedmlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
Commit ee1bf186723abb933b2c337e589c5958167f3cbe by springerm
[mlir][SCF] Further simplify affine maps during `for-loop-canonicalization`

* Implement `FlatAffineConstraints::getConstantBound(EQ)`.
* Inject a simpler constraint for loops that have at most 1 iteration.
* Taking into account constant EQ bounds of FlatAffineConstraint dims/symbols during canonicalization of the resulting affine map in `canonicalizeMinMaxOp`.

Differential Revision: https://reviews.llvm.org/D114138
The file was modifiedmlir/include/mlir/Analysis/AffineStructures.h
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedmlir/test/Dialect/SCF/for-loop-canonicalization.mlir
The file was modifiedmlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
Commit 25d173499effd978435e433196003f964293f8d9 by uday
[MLIR] Rename test/python/dialects/math.py -> math_dialect.py

Rename test/python/dialects/math.py -> math_dialect.py to avoid a
collision with a Python standard package of the same name. These test
scripts are run by path and are not part of a package. Python apparently
implicitly adds the containing directory to its PYTHONPATH. As such,
test scripts with common names run the risk of conflicting with global
names and resolution of an import for the latter happens to the former.

Differential Revision: https://reviews.llvm.org/D114568
The file was addedmlir/test/python/dialects/math_dialect.py
The file was removedmlir/test/python/dialects/math.py
Commit 371290dfd400c5c26843b9c127ae13968cafdf2e by i
[ELF] Remove unneeded DF_STATIC_TLS for EM_386 local-exec TLS

which is also untested.
The file was modifiedlld/ELF/Arch/X86.cpp
Commit 5922dd91f8db24c29d6ae3b1fd57d8b836e521bd by i
[ELF] Rename hasStaticTlsModel to hasTlsIe

and remove unneeded atomic.
The file was modifiedlld/ELF/SyntheticSections.cpp
The file was modifiedlld/ELF/Arch/X86_64.cpp
The file was modifiedlld/ELF/Arch/RISCV.cpp
The file was modifiedlld/ELF/Arch/X86.cpp
The file was modifiedlld/ELF/Arch/Hexagon.cpp
The file was modifiedlld/ELF/Config.h
Commit 6ca8fde226e907db13bc538e721af8724f0e92d0 by i
[ELF] Emit DF_STATIC_TLS only for -shared

This matches GNU ld and saves 2 words for executables.
The file was modifiedlld/test/ELF/x86-64-static-tls-model.s
The file was modifiedlld/ELF/SyntheticSections.cpp
The file was modifiedlld/test/ELF/x86-64-tls-ie.s
The file was modifiedlld/test/ELF/i386-tls-opt-iele-nopic.s
Commit c0e3bb4d4ba3064c42fb8e1ee9f001235d9af04c by pavel
[lldb] Fix TestFileHandle.py

- remove the decorator which is no longer available in main
- remove dependence on revision number, which are not available in all
  builds
The file was modifiedlldb/test/API/python_api/file_handle/TestFileHandle.py
Commit 8804d08e9921b86eb96e993af5d753f63f3c8829 by 1.int32
Revert "[clang][AST] Check context of record in structural equivalence."

Revert commit 6b96b2a0bf65ff838d4dbf909a5120d4d1083e29 because Windows
test failure.
The file was modifiedclang/unittests/AST/StructuralEquivalenceTest.cpp
The file was modifiedclang/lib/AST/ASTStructuralEquivalence.cpp
Commit 72e4f4a2a117f97118692857d91210fc62c066b0 by mydeveloperday
[clang-format] [PR47936] AfterControlStatement: MultiLine breaks AllowShortFunctionsOnASingleLine

https://bugs.llvm.org/show_bug.cgi?id=47936

Using the MultiLine setting for BraceWrapping.AfterControlStatement appears to disable AllowShortFunctionsOnASingleLine, even in cases without any control statements

Reviewed By: HazardyKnusperkeks, curdeius

Differential Revision: https://reviews.llvm.org/D114521
The file was modifiedclang/lib/Format/UnwrappedLineFormatter.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
Commit a5c2f7828796ce9c3e19e78fbd783fb0206b971d by springerm
[mlir][interfaces] Add insideMutuallyExclusiveRegions helper

Add a helper function to ControlFlowInterfaces for checking if two ops
are in mutually exclusive regions according to RegionBranchOpInterface.

Utilize this new helper in Linalg ComprehensiveBufferize. This makes the
analysis independent of the SCF dialect and generalizes it to other ops
that implement RegionBranchOpInterface.

Differential Revision: https://reviews.llvm.org/D114220
The file was modifiedmlir/lib/Interfaces/ControlFlowInterfaces.cpp
The file was modifiedmlir/unittests/Interfaces/CMakeLists.txt
The file was addedmlir/unittests/Interfaces/ControlFlowInterfacesTest.cpp
The file was modifiedmlir/include/mlir/Interfaces/ControlFlowInterfaces.h
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
Commit 467acf3b6ba27858801e8a7865a315455b92c0ee by ivan.butygin
[mlir][spirv] Float atomics should not imply Shader

Differential Revision: https://reviews.llvm.org/D114551
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
Commit cdd37e2e47f757d2130f741d8e720098bf920c40 by kadircet
[clangd] Disable hicpp-invalid-access-moved inside clangd
The file was modifiedclang-tools-extra/clangd/TidyProvider.cpp
Commit 8dae0b6b6c9a0256908820b9ef4bc04f0119666b by ivan.butygin
[mlir][spirv] arith::RemSIOp OpenCL lowering

Differential Revision: https://reviews.llvm.org/D114524
The file was modifiedmlir/lib/Conversion/ArithmeticToSPIRV/ArithmeticToSPIRV.cpp
The file was modifiedmlir/test/Conversion/ArithmeticToSPIRV/arithmetic-to-spirv.mlir
The file was modifiedmlir/test/Conversion/MathToSPIRV/math-to-glsl-spirv.mlir
The file was modifiedmlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
Commit 3e67cf21a19a0e8917bdbab6f0cecd4880f3fbe2 by tbaeder
[clang][driver] Add -fplugin-arg- to pass arguments to plugins

From GCC's manpage:
-fplugin-arg-name-key=value
   Define an argument called key with a value of value for the
   plugin called name.

Since we don't have a key-value pair similar to gcc's plugin_argument
struct, simply accept key=value here anyway and pass it along as-is to
plugins.

This translates to the already existing '-plugin-arg-pluginname arg'
that clang cc1 accepts.

There is an ambiguity here because in clang, both the plugin name
as well as the option name can contain dashes, so when e.g. passing

-fplugin-arg-foo-bar-foo

it is not clear whether the plugin is foo-bar and the option is foo,
or the plugin is foo and the option is bar-foo. GCC solves this by
interpreting all dashes as part of the option name. So dashes can't be
part of the plugin name in this case.

Differential Revision: https://reviews.llvm.org/D113250
The file was modifiedclang/docs/ClangPlugins.rst
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td
The file was modifiedclang/test/Frontend/plugin-call-super.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/examples/CallSuperAttribute/CallSuperAttrInfo.cpp
The file was addedclang/test/Driver/plugin-driver-args.cpp
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 3c228573bcb8833019ab443b6ef738514688c20a by pifon
Revert "[mlir][SCF] Further simplify affine maps during `for-loop-canonicalization`"

This reverts commit ee1bf186723abb933b2c337e589c5958167f3cbe.

It breaks IREE lowering. Reverting the commit for now while we
investigate what's going on.
The file was modifiedmlir/include/mlir/Analysis/AffineStructures.h
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedmlir/test/Dialect/SCF/for-loop-canonicalization.mlir
The file was modifiedmlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
Commit 48107eaa07e26f9bc5b24af2d5351793cc64db46 by springerm
[mlir][linalg][bufferize][NFC] Move SCF interface impl to new build target

This makes ComprehensiveBufferize entirely independent of the SCF dialect.

Differential Revision: https://reviews.llvm.org/D114221
The file was addedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/SCFInterfaceImpl.cpp
The file was addedmlir/include/mlir/Dialect/Linalg/ComprehensiveBufferize/SCFInterfaceImpl.h
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/CMakeLists.txt
The file was modifiedutils/bazel/llvm-project-overlay/mlir/BUILD.bazel
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/Linalg/ComprehensiveBufferize/ComprehensiveBufferize.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferizePass.cpp
Commit 3a700cabdcbadb2a1a5961fd380a103cd7f867b3 by david.green
[SDAG] Allow Unknown sizes when refining MMO alignments. NFC

The changes in D113888 / 32b6c17b29079e7d altered the memory size of a
masked store, as it will store an unknown number of bytes not the full
vector size. We can have situations where the masked stores is legalized
and then turned to a normal store, as the mask is known to be all ones.
This creates a store with an unknown size MMO that was hitting this
assert.

The store created can be given a better size in a followup patch. This
currently adjusts the assert to handle unknown sizes.
The file was modifiedllvm/test/CodeGen/X86/masked_store.ll
The file was modifiedllvm/lib/CodeGen/MachineOperand.cpp