Changes

Summary

  1. [ARM] Fix inline assembly referencing floating point registers on soft-float targets (details)
  2. [SelectionDAG] Bail out of mergeTruncStores when not optimizing (details)
  3. [lld-macho] Temporarily disable lc-linker-option.ll on Windows (details)
  4. [msan] Add stat-family interceptors on Linux (details)
  5. [ARM] Use correct name of floating point ceil intrinsic in test. (details)
  6. [Driver][OpenBSD] Some improvements to the external assembler handling (details)
  7. [MLIR][OpenMP] Add support for ordered construct (details)
  8. [modules] While merging ObjCInterfaceDecl definitions, merge them as decl contexts too. (details)
  9. [Codegen] Set ARITH_FENCE as meta-instruction (details)
Commit cb9a0dc293cf4ca451d625c6a54e491d8c11e591 by kosov.pavel
[ARM] Fix inline assembly referencing floating point registers on soft-float targets

Fixes PR: https://bugs.llvm.org/show_bug.cgi?id=52230

Reviewed By: nickdesaulniers

Differential Revision: https://reviews.llvm.org/D112135

OS Laboratory, Huawei Russian Research Institute, Saint-Petersburg
The file was modifiedclang/lib/Basic/Targets/ARM.cpp
The file was modifiedclang/lib/Basic/Targets/ARM.h
The file was addedclang/test/Sema/arm_inline_asm_constraints_no_fp_regs.c
Commit 6ea7437ca5a4f8aff895d940cd8b0e5b65419f86 by aeubanks
[SelectionDAG] Bail out of mergeTruncStores when not optimizing

With unoptimized code, we may see lots of stores and spend too much time in mergeTruncStores.

Fixes PR51827.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D111596
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 9ef55ddc3fe20bcf7d91cce5da67d2c483361272 by jezng
[lld-macho] Temporarily disable lc-linker-option.ll on Windows

It's currently using a symlink, which is not supported on Windows.
The file was modifiedlld/test/MachO/lc-linker-option.ll
Commit 4e1a6c07052b466a2a1cd0c3ff150e4e89a6d87a by eugenis
[msan] Add stat-family interceptors on Linux

Add following interceptors on Linux: stat, lstat, fstat, fstatat.

This fixes use-of-uninitialized value on platforms with GLIBC 2.33+.
In particular: Arch Linux, Ubuntu hirsute/impish.

The tests should have also been failing during the release on the mentioned platforms, but I cannot find any related discussion.

Most likely, the regression was introduced by glibc commit [[ https://github.com/bminor/glibc/commit/8ed005daf0ab03e142500324a34087ce179ae78e | 8ed005daf0ab03e14250032 ]]:
all stat-family functions are now exported as shared functions.

Before, some of them (namely stat, lstat, fstat, fstatat) were provided as a part of libc_noshared.a and called their __xstat dopplegangers. This is still true for Debian Sid and earlier Ubuntu's. stat interceptors may be safely provided for them, no problem with that.

Closes https://github.com/google/sanitizers/issues/1452.
See also https://jira.mariadb.org/browse/MDEV-24841

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D111984
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
The file was modifiedcompiler-rt/lib/msan/msan_interceptors.cpp
Commit b75f3dd88e25d73e75981dda1ccfa36a9a7a54ce by craig.topper
[ARM] Use correct name of floating point ceil intrinsic in test.

The intrinsic is called llvm.ceil not llvm.fceil. The checks weren't
strong enough to notice that a call to llvm.fceil was emitted in
the final assembly.
The file was modifiedllvm/test/CodeGen/ARM/vfloatintrinsics.ll
Commit 34188f237f2574dda2447d85fe2b1aa65b5321ce by brad
[Driver][OpenBSD] Some improvements to the external assembler handling

- Pass CPU variant for ARM
- Pass MIPS CPU in addition to the ABI
The file was modifiedclang/lib/Driver/ToolChains/OpenBSD.cpp
The file was modifiedclang/test/Driver/openbsd.c
Commit dc2be87ecf10f2f1cf05f638a72256387c78f1c1 by qiaopeixin
[MLIR][OpenMP] Add support for ordered construct

This patch supports the ordered construct in OpenMP dialect following
Section 2.19.9 of the OpenMP 5.1 standard. Also lowering to LLVM IR
using OpenMP IRBduiler. Lowering to LLVM IR for ordered simd directive
is not supported yet since LLVM optimization passes do not support it
for now.

Reviewed By: kiranchandramohan, clementval, ftynse, shraiysh

Differential Revision: https://reviews.llvm.org/D110015
The file was modifiedmlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
The file was modifiedmlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
The file was modifiedmlir/test/Dialect/OpenMP/ops.mlir
The file was modifiedmlir/test/Target/LLVMIR/openmp-llvm.mlir
The file was modifiedmlir/test/Dialect/OpenMP/invalid.mlir
The file was modifiedmlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Commit c5931267db26d71351c634df06006d9c818ff158 by vsapsai
[modules] While merging ObjCInterfaceDecl definitions, merge them as decl contexts too.

While working on https://reviews.llvm.org/D110280 I've tried to merge
decl contexts as it seems to be correct and matching our handling of
decl contexts from different modules. It's not required for the fix in
https://reviews.llvm.org/D110280 but it revealed a missing diagnostic,
so separating this change into a separate commit.

Renamed some variables to distinguish diagnostic like "declaration of
'x' does not match" for different cases.

Differential Revision: https://reviews.llvm.org/D110287
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp
The file was modifiedclang/test/Modules/odr_hash.mm
Commit edff0070a126d9a27263958dbb22133f4ed6526e by shengchen.kan
[Codegen] Set ARITH_FENCE as meta-instruction

ARITH_FENCE, which was added by https://reviews.llvm.org/D99675,
should be a meta-instruction b/c it only emits comments "ARITH_FENCE".

Reviewed By: pengfei, LuoYuanke

Differential Revision: https://reviews.llvm.org/D112127
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h
The file was modifiedllvm/unittests/MIR/MachineMetadata.cpp