FailedChanges

Summary

  1. [X86] Add knownbits tests showing missing shift amount demanded elts (details)
  2. [SelectionDAG] ComputeKnownBits - Add DemandedElts support to (details)
  3. [SelectionDAG] ComputeNumSignBits - Use getValidShiftAmountConstant for (details)
  4. [InstSimplify] move tests for select from InstCombine; NFC (details)
  5. [MIPS][ELF] Use PC-relative relocations in .eh_frame when possible (details)
  6. [MIPS] Don't emit R_(MICRO)MIPS_JALR relocations against data symbols (details)
  7. [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below (details)
  8. Add missing triples to tests in 0c29d3ff2233696f663ae34a8aeda23c750ac68f (details)
  9. Sema::getOwningModule - take const Decl* type. (details)
  10. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  11. Fix some cppcheck shadow variable warnings. NFCI. (details)
  12. Merge isVectorType() and getAs<VectorType> calls to silence clang static (details)
  13. Fix cppcheck uninitialized variable in DiffTree() constructor warning. (details)
  14. [RISCV] Handle globals and block addresses in asm operands (details)
  15. [Clang][Driver] Re-use the calling process instead of creating a new (details)
  16. [mlir][Linalg] Update ReshapeOp::build to be more idiomatic (details)
  17. [Inlining] Add PreInlineThreshold for the new pass manager (details)
  18. [mlir] Added missing GPU lowering ops. (details)
  19. [mlir] m_Constant() (details)
  20. [DebugInfo] Make debug line address size mismatch non-fatal to parsing (details)
  21. [ThinLTO] Add additional ThinLTO pipeline testing with new PM (details)
  22. [AArch64][SVE] Add patterns for some arith SVE instructions. (details)
  23. [Scheduler] Remove superfluous casts. NFC (details)
  24. [X86] Add AVX2 known signbits codegen tests (details)
  25. [X86][SSE] Add sitofp(ashr(x,y)) test case with non-uniform shift value (details)
  26. [SelectionDAG] ComputeNumSignBits add (details)
  27. [LegalizeTypes] Add SoftenFloatResult support for (details)
  28. [lldb/Scripts] Remove SWIG bot (details)
  29. Fix tests for builtbot failures (details)
  30. [lldb/Docs] Extend description section of the main page (details)
  31. [X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-uniform shift (details)
  32. AMDGPU/GlobalISel: Simplify assert (details)
  33. AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF (details)
  34. AMDGPU/GlobalISel: Add some baseline tests for vector extract (details)
  35. AMDGPU/GlobalISel: Set insert point after waterfall loop (details)
  36. [SelectionDAG] ComputeNumSignBits add (details)
  37. AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap} (details)
  38. Try number 2 for fixing bot failures (details)
  39. Unbreak the mlir build after 202ab273e6eca134b69882f100c666fcd3affbcf (details)
  40. Fix readability-identifier-naming missing member variables (details)
  41. Hopefully last fix for bot failures (details)
  42. [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands. (details)
  43. [X86][Disassembler] Fix a bug when disassembling an empty string (details)
  44. Add a couple of missed wildcards in debug-pass-manager output checking (details)
  45. Revert "[ThinLTO] Add additional ThinLTO pipeline testing with new PM" (details)
  46. [gn build] (manually) port b4a99a061f51 (details)
  47. [clangd] Render header of hover card as a heading (details)
  48. [clangd] Include expression in DecltypeTypeLoc sourcerange while (details)
  49. [lldb-server] Remove dead CMake code (details)
  50. [Clang] Always set -z now linker option on Fuchsia (details)
  51. Rework be15dfa88fb1 such that it works with GlobalISel which doesn't use (details)
  52. [LTO] Constify lto::Config reference passed to backends (NFC) (details)
  53. [Dsymutil][Debuginfo][NFC] #3 Refactor dsymutil to separate DWARF (details)
  54. [InstCombine] add tests for select --> copysign; NFC (details)
  55. Fix a test case by adding -fno-delayed-template-parsing. (details)
  56. [NFC][clang][IFS] Adding braces to if-statement as prep for D71301. (details)
  57. [clang][IFS] Prevent Clang-IFS from Leaking symbols from inside a block. (details)
Commit 89ba150240a45cac88216b6127efb523fb9506b0 by llvm-dev
[X86] Add knownbits tests showing missing shift amount demanded elts
handling.
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/known-bits-vector.ll (diff)
Commit 6d1a8fd447934387605ea11d35e1b62866b7d093 by llvm-dev
[SelectionDAG] ComputeKnownBits - Add DemandedElts support to
getValidShiftAmountConstant/getValidMinimumShiftAmountConstant()
The file was modifiedllvm/test/CodeGen/X86/known-bits-vector.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
Commit 376bc39c829fab7ad14424c5418c03ed6649d839 by llvm-dev
[SelectionDAG] ComputeNumSignBits - Use getValidShiftAmountConstant for
shift opcodes
getValidShiftAmountConstant handles out of bounds shift amounts for us,
allowing us to remove the local handling.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
Commit 26d2ace9e2305266be888e15392be29e3145163d by spatel
[InstSimplify] move tests for select from InstCombine; NFC
InstCombine has transforms that would enable these simplifications in an
indirect way, but those transforms are unsafe and likely to be removed.
The file was modifiedllvm/test/Transforms/InstCombine/select.ll (diff)
The file was modifiedllvm/test/Transforms/InstSimplify/select.ll (diff)
Commit 894f742acb977a09285dcab024e50c2cf6bce578 by Alexander.Richardson
[MIPS][ELF] Use PC-relative relocations in .eh_frame when possible
When compiling position-independent executables, we now use
DW_EH_PE_pcrel | DW_EH_PE_sdata4. However, the MIPS ABI does not define
a 64-bit PC-relative ELF relocation so we cannot use sdata8 for the
large code model case. When using the large code model, we fall back to
the previous behaviour of generating absolute relocations.
With this change clang-generated .o files can be linked by LLD without
having to pass -Wl,-z,notext (which creates text relocations). This is
simpler than the approach used by ld.bfd, which rewrites the
.eh_frame section to convert absolute relocations into relative
references.
I saw in D13104 that apparently ld.bfd did not accept pc-relative
relocations for MIPS ouput at some point. However, I also checked that
recent ld.bfd can process the clang-generated .o files so this no longer
seems true.
Reviewed By: atanasyan Differential Revision:
https://reviews.llvm.org/D72228
The file was addedlld/test/ELF/mips-eh_frame-pic.s
The file was modifiedllvm/lib/MC/MCObjectFileInfo.cpp (diff)
The file was modifiedllvm/lib/Object/RelocationResolver.cpp (diff)
The file was modifiedllvm/test/DebugInfo/Mips/eh_frame.ll (diff)
The file was modifiedllvm/test/MC/Mips/eh-frame.s (diff)
Commit 8e8ccf4712cf58562a91c197da3efd4f9963ce0d by Alexander.Richardson
[MIPS] Don't emit R_(MICRO)MIPS_JALR relocations against data symbols
The R_(MICRO)MIPS_JALR optimization only works when used against
functions. Using the relocation against a data symbol (e.g. function
pointer) will cause some linkers that don't ignore the hint in this case
(e.g. LLD prior to commit 5bab291b7b) to generate a relative branch to
the data symbol which crashes at run time. Before this patch, LLVM was
erroneously emitting these relocations against local-dynamic TLS
function pointers and global function pointers with internal visibility.
Reviewers: atanasyan, jrtc27, vstefanovic Reviewed By: atanasyan
Differential Revision: https://reviews.llvm.org/D72571
The file was modifiedllvm/lib/Target/Mips/MipsISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/Mips/reloc-jalr.ll (diff)
Commit da33762de8531914d4d0dae16bfce2192f02bc79 by pablo.barrio
[AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below
Summary: The Pointer Authentication Extension (PAC) was added in
Armv8.3-A. Some instructions are implemented in the HINT space to allow
compiling code common to CPUs regardless of whether they feature PAC or
not, and still benefit from PAC protection in the PAC-enabled CPUs.
The 8.3-specific mnemonics were currently enabled in any architecture,
and LLVM was emitting them in assembly files when PAC code generation
was enabled. This was ok for compilations where both LLVM codegen and
the integrated assembler were used. However, the LLVM codegen was not
compatible with other assemblers (e.g. GAS). Given the fact that the
approach from these assemblers (i.e. to disallow Armv8.3-A mnemonics if
compiling for Armv8.2-A or lower) is entirely reasonable, this patch
makes LLVM to emit HINT when building for Armv8.2-A and below, instead
of PACIASP, AUTIASP and friends. Then, LLVM assembly should be
compatible with other assemblers.
Reviewers: samparker, chill, LukeCheeseman
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71658
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td (diff)
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll (diff)
The file was modifiedllvm/test/MC/AArch64/armv8.3a-signed-pointer.s (diff)
The file was modifiedllvm/test/CodeGen/AArch64/sign-return-address.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/speculation-hardening-loads.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll (diff)
Commit 0b91e78a719065c67b33bf82b0cde3d4ecfe3b7d by sam.mccall
Add missing triples to tests in 0c29d3ff2233696f663ae34a8aeda23c750ac68f
so they target the right arch.
The file was modifiedllvm/test/CodeGen/X86/align-branch-boundary-default.s (diff)
The file was modifiedllvm/test/CodeGen/X86/align-branch-boundary-default.ll (diff)
Commit 7af67259cdd66811941514a263dd0f81c491d8f1 by llvm-dev
Sema::getOwningModule - take const Decl* type.
Fixes static analyzer warning that const_cast was being used despite
only const methods being called.
The file was modifiedclang/lib/Sema/SemaOverload.cpp (diff)
The file was modifiedclang/include/clang/Sema/Sema.h (diff)
Commit 40311f9724953541ab7b755fb6a96b31c1e63f00 by llvm-dev
Fix "pointer is null" static analyzer warnings. NFCI.
Use castAs<> instead of getAs<> since the pointers are always
dereferenced and castAs will perform the null assertion for us.
The file was modifiedclang/lib/AST/ASTContext.cpp (diff)
Commit 025941785faf25a3d9ba2c1e7682ca6c2ad063af by llvm-dev
Fix some cppcheck shadow variable warnings. NFCI.
The file was modifiedclang/lib/AST/ASTContext.cpp (diff)
Commit 4647aae72f33b8742eb42c1fb869ebd4fdbb3038 by llvm-dev
Merge isVectorType() and getAs<VectorType> calls to silence clang static
analyzer warning. NFCI.
The file was modifiedclang/lib/AST/ASTDiagnostic.cpp (diff)
Commit b11027a08620dce2887377c830be239a4af478b6 by llvm-dev
Fix cppcheck uninitialized variable in DiffTree() constructor warning.
NFCI.
The file was modifiedclang/lib/AST/ASTDiagnostic.cpp (diff)
Commit 043c5eafa8789d76b06b93d157c928830c4d0814 by luismarques
[RISCV] Handle globals and block addresses in asm operands
Summary: These seem to be the machine operand types currently needed by
the RISC-V target.
Reviewers: asb, lenary Reviewed By: lenary Tags: #llvm Differential
Revision: https://reviews.llvm.org/D72275
The file was modifiedllvm/lib/Target/RISCV/RISCVAsmPrinter.cpp (diff)
The file was modifiedllvm/test/CodeGen/RISCV/inline-asm.ll (diff)
Commit b4a99a061f517e60985667e39519f60186cbb469 by alexandre.ganea
[Clang][Driver] Re-use the calling process instead of creating a new
process for the cc1 invocation
With this patch, the clang tool will now call the -cc1 invocation
directly inside the same process. Previously, the -cc1 invocation was
creating, and waiting for, a new process. This patch therefore reduces
the number of created processes during a build, thus it reduces build
times on platforms where process creation can be costly (Windows) and/or
impacted by a antivirus. It also makes debugging a bit easier, as
there's no need to attach to the secondary -cc1 process anymore,
breakpoints will be hit inside the same process.
Crashes or signaling inside the -cc1 invocation will have the same
side-effect as before, and will be reported through the same means.
This behavior can be controlled at compile-time through the
CLANG_SPAWN_CC1 cmake flag, which defaults to OFF. Setting it to ON will
revert to the previous behavior, where any -cc1 invocation will
create/fork a secondary process. At run-time, it is also possible to
tweak the CLANG_SPAWN_CC1 environment variable. Setting it and will
override the compile-time setting. A value of 0 calls -cc1 inside the
calling process; a value of 1 will create a secondary process, as
before.
Differential Revision: https://reviews.llvm.org/D69825
The file was modifiedclang/CMakeLists.txt (diff)
The file was modifiedclang/include/clang/Config/config.h.cmake (diff)
The file was modifiedclang/test/Driver/fsanitize-blacklist.c (diff)
The file was modifiedclang/test/Driver/clang_f_opts.c (diff)
The file was modifiedclang/tools/driver/driver.cpp (diff)
The file was modifiedclang/test/CMakeLists.txt (diff)
The file was modifiedclang/include/clang/Driver/Job.h (diff)
The file was modifiedclang/test/Driver/unknown-arg.c (diff)
The file was addedclang/test/Driver/cc1-spawnprocess.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp (diff)
The file was modifiedclang/include/clang/Driver/Driver.h (diff)
The file was modifiedclang/lib/Driver/Job.cpp (diff)
The file was modifiedclang/test/Driver/warning-options_pedantic.cpp (diff)
Commit e653d306ce90e5612796d8adce9eb34b1c10e85a by ntv
[mlir][Linalg] Update ReshapeOp::build to be more idiomatic
Summary: This diff makes it easier to create a `linalg.reshape` op and
adds an EDSC builder api test to exercise the new builders.
Reviewers: ftynse, jpienaar
Subscribers: mehdi_amini, rriddle, burmako, shauheen, antiagainst,
arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72580
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td (diff)
The file was modifiedmlir/test/EDSC/builder-api-test.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/Linalg/EDSC/Intrinsics.h (diff)
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp (diff)
Commit 6b686703e63f0e992438ce445cbe4b3e78b94ea4 by kazu
[Inlining] Add PreInlineThreshold for the new pass manager
Summary: This patch makes it easy to try out different preinlining
thresholds with a command-line switch just like -preinline-threshold for
the legacy pass manager.
Reviewers: davidxl
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72618
The file was modifiedllvm/lib/Passes/PassBuilder.cpp (diff)
Commit 202ab273e6eca134b69882f100c666fcd3affbcf by julian.gross
[mlir] Added missing GPU lowering ops.
Summary: This diff adds missing GPU lowering ops to MLIR.
Reviewers: herhut, pifon2a, ftynse
Tags: #pre-merge_beta_testing, #llvm
Differential Revision: https://reviews.llvm.org/D72439
The file was modifiedmlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir (diff)
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp (diff)
The file was modifiedmlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp (diff)
The file was modifiedmlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir (diff)
Commit 81e7922e83cf9782a39f4072e20eab8ab1e99828 by zinenko
[mlir] m_Constant()
Summary: Introduce m_Constant() which allows matching a constant
operation without forcing the user also to capture the attribute value.
Differential Revision: https://reviews.llvm.org/D72397
The file was modifiedmlir/test/IR/test-matchers.mlir (diff)
The file was modifiedmlir/lib/IR/Builders.cpp (diff)
The file was modifiedmlir/test/lib/IR/TestMatchers.cpp (diff)
The file was modifiedmlir/include/mlir/IR/Matchers.h (diff)
Commit 07804f75a6cc506fada40c474f1e60840ce737d8 by james.henderson
[DebugInfo] Make debug line address size mismatch non-fatal to parsing
Reasonable assumptions can be made when a parsed address length does not
match the expected length, so there's no need for this to be fatal.
Reviewed by: ikudrin
Differential Revision: https://reviews.llvm.org/D72154
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp (diff)
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp (diff)
Commit 2af97be8027a0823b88d4b6a07fc5eedb440bc1f by tejohnson
[ThinLTO] Add additional ThinLTO pipeline testing with new PM
Summary: I've added some more extensive ThinLTO pipeline testing with
the new PM, motivated by the bug fixed in D72386.
I beefed up llvm/test/Other/new-pm-pgo.ll a little so that it tests
ThinLTO pre and post link with PGO, similar to the testing for the
default pipelines with PGO.
Added new pre and post link PGO tests for both instrumentation and
sample PGO that exhaustively test the pipelines at different
optimization levels via opt.
Added a clang test to exhaustively test the post link pipeline invoked
for distributed builds. I am currently only testing O2 and O3 since
these are the most important for performance.
It would be nice to add similar exhaustive testing for full LTO, and for
the old PM, but I don't have the bandwidth now and this is a start to
cover some of the situations that are not currently default and were
under tested.
Reviewers: wmi
Subscribers: mehdi_amini, inglorion, hiraditya, steven_wu, dexonsmith,
jfb, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72538
The file was addedllvm/test/Other/Inputs/new-pm-thinlto-samplepgo-defaults.prof
The file was addedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was addedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was addedllvm/test/Other/Inputs/new-pm-thinlto-prelink-pgo-defaults.proftext
The file was addedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was modifiedllvm/test/Other/new-pm-pgo.ll (diff)
The file was addedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was addedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Commit 2d7e757a836abb54590daa25fce626283adafadf by danilo.carvalho.grael
[AArch64][SVE] Add patterns for some arith SVE instructions.
Summary: Add patterns for the following instructions:
- smax, smin, umax, umin
Reviewers: sdesmalen, huntergr, rengolin, efriedma, c-rhodes, mgudim,
kmclaughlin
Subscribers: amehsan
Differential Revision: https://reviews.llvm.org/D71779
The file was addedllvm/test/CodeGen/AArch64/sve-int-arith-imm.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td (diff)
Commit 90555d9253437d53fe03c26db73faf9c0ca14c82 by david.green
[Scheduler] Remove superfluous casts. NFC
The file was modifiedllvm/lib/CodeGen/TargetInstrInfo.cpp (diff)
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp (diff)
Commit ee4aa1a228b31ec8b8bd3c4a793c7fa92fec88d6 by llvm-dev
[X86] Add AVX2 known signbits codegen tests
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll (diff)
Commit 7afaa0099b907842b281c25c2a57937a2c307d3b by llvm-dev
[X86][SSE] Add sitofp(ashr(x,y)) test case with non-uniform shift value
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll (diff)
Commit 38e2c01221a9751c0b797417747200d2e9513b9f by llvm-dev
[SelectionDAG] ComputeNumSignBits add
getValidMinimumShiftAmountConstant() ISD::SRA support
Allows us to handle more non-uniform SRA sign bits cases
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll (diff)
Commit 05366870eed154c7eb48c7cc3873ea5188f54cc9 by weiwei64
[LegalizeTypes] Add SoftenFloatResult support for
STRICT_SINT_TO_FP/STRICT_UINT_TO_FP
Some target like arm/riscv with soft-float will have compiling crash
when using -fno-unsafe-math-optimization option. This patch will add the
missing strict FP support to SoftenFloatRes_XINT_TO_FP.
Differential Revision: https://reviews.llvm.org/D72277
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp (diff)
The file was modifiedllvm/test/CodeGen/ARM/fp-intrinsics.ll (diff)
Commit f2bbe8ede057af13b56949f24bbfb436f8a55f97 by Jonas Devlieghere
[lldb/Scripts] Remove SWIG bot
This is no longer used or maintained.
Differential revision: https://reviews.llvm.org/D72539
The file was removedlldb/scripts/swig_bot_lib/client.py
The file was removedlldb/scripts/swig_bot.py
The file was removedlldb/scripts/swig_bot_lib/remote.py
The file was removedlldb/scripts/swig_bot_lib/server.py
The file was removedlldb/scripts/swig_bot_lib/local.py
Commit bb2e5f5e454245c8e7e9e4c9bf7a463c64604292 by tejohnson
Fix tests for builtbot failures
Should fix most of the buildbot failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f, by loosening up the matching
on the AnalysisProxy output.
Added in --dump-input=fail on the one test that appears to be something
different, so I can hopefully debug it better.
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll (diff)
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll (diff)
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll (diff)
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll (diff)
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll (diff)
Commit 9d30d769041b14c0ff29770d59027e679e6b7edc by Jonas Devlieghere
[lldb/Docs] Extend description section of the main page
The current description is a bit terse. I've copy/pasted the
introduction form the website.
The file was modifiedlldb/docs/man/lldb.rst (diff)
Commit ffc05d0dbc88b89756d553ff32abefe720d27742 by llvm-dev
[X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-uniform shift
value
Shows that for non-uniform SHL shifts we fail to determine the minimum
number of sign bits remaining (based off the maximum shift amount value)
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll (diff)
Commit 7d9b0a61c32b95fdc73228266d3f14687a8ada95 by arsenm2
AMDGPU/GlobalISel: Simplify assert
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
Commit ca19d7a3993c69633826ae388155c9ad176b11df by arsenm2
AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF
The branch target needs to be changed depending on whether there is an
unconditional branch or not.
Loops also need to be similarly fixed, but compiling a simple testcase
end to end requires another set of patches that aren't upstream yet.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
Commit 2f090cc8f1a3144c81b024bdc52ec1ae49dc0def by arsenm2
AMDGPU/GlobalISel: Add some baseline tests for vector extract
A future change will try to fold constant offsets into the loop which
these will stress.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir (diff)
Commit 3d8f1b2d22be79aab3d246fa5bc9c24b911b0bd2 by arsenm2
AMDGPU/GlobalISel: Set insert point after waterfall loop
The current users of the waterfall loop utility functions do not make
use of the restored original insert point. The insertion is either done,
or they set the insert point somewhere else. A future change will want
to insert instructions after the waterfall loop, but figuring out the
point after the loop is more difficult than ensuring the insert point is
there after the loop.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
Commit c6fcd5d115b62280669719c5ead436904c93d6cb by llvm-dev
[SelectionDAG] ComputeNumSignBits add
getValidMaximumShiftAmountConstant() for ISD::SHL support
Allows us to handle non-uniform SHL shifts to determine the minimum
number of sign bits remaining (based off the maximum shift amount value)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll (diff)
Commit 203801425d222555fa2617fff19ecd861525429f by arsenm2
AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap}
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.swap.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.add.gfx10.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.add.ll
Commit 292562c0046c72ea1ed229dbe13a89dca73e5b89 by tejohnson
Try number 2 for fixing bot failures
Additional fixes for bot failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f. Remove more exact matching on
AnalyisManagers, as they can vary. Also allow different orders between
LoopAnalysis and BranchProbabilityAnalysis as that can vary due to both
being accessed in the parameter list of a call.
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll (diff)
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll (diff)
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll (diff)
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll (diff)
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll (diff)
Commit a2cd4fe6bf2a4e37d5f69b0b19cb1134a14e2970 by benny.kra
Unbreak the mlir build after 202ab273e6eca134b69882f100c666fcd3affbcf
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp (diff)
The file was modifiedmlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp (diff)
Commit fb79ef524171c96a9f3df025ac7a8a3e00fdc0b4 by aaron
Fix readability-identifier-naming missing member variables
Fixes PR41122 (missing fixes for member variables in a destructor) and
PR29005 (does not rename class members in all locations).
The file was modifiedclang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp (diff)
The file was addedclang-tools-extra/test/clang-tidy/checkers/readability-identifier-naming-member-decl-usage.cpp
Commit 7aed43b60739653b13b8503f9df4c958c44feed8 by tejohnson
Hopefully last fix for bot failures
Hopefully final bot fix for last few failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f.
Looks like sometimes the "llvm::" preceeding objects get printed in the
debug pass manager output and sometimes they don't. Replace with
wildcard matching.
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll (diff)
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll (diff)
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll (diff)
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll (diff)
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll (diff)
Commit 484a7472f1aa6906f2b66dc33bcf69cc8d5b9f29 by puyan
[llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands.
This patch makes it so that cases where multiple instructions that
differ only in their FrameIndex MachineOperand values no longer collide.
For instance:
%1:_(p0) = G_FRAME_INDEX %stack.0
%2:_(p0) = G_FRAME_INDEX %stack.1
Prior to this patch these instructions would collide together.
Differential Revision: https://reviews.llvm.org/D71583
The file was addedllvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir
The file was modifiedllvm/lib/CodeGen/MIRVRegNamerUtils.cpp (diff)
Commit 64a93afc3c630c39e5c583e4f67aef5821d635b6 by maskray
[X86][Disassembler] Fix a bug when disassembling an empty string
readPrefixes() assumes insn->bytes is non-empty. The code path is not
exercised in llvm-mc because llvm-mc does not feed empty input to
MCDisassembler::getInstruction().
This bug is uncovered by a5994c789a2982a770254ae1607b5b4cb641f73c. An
empty string did not crash before because the deleted regionReader()
allowed UINT64_C(-1) as insn->readerCursor.
  Bytes.size() <= Address -> R->Base
0 <= UINT64_C(-1) - UINT32_C(-1)
The file was modifiedllvm/unittests/MC/Disassembler.cpp (diff)
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp (diff)
Commit cb988a858abbaf1a1ae0fe03f2a1dae692131ea9 by tejohnson
Add a couple of missed wildcards in debug-pass-manager output checking
Along with the previous fix for bot failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f, need to add a wildcard in a
couple of places where my local output did not print "llvm::" but the
bot is.
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll (diff)
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll (diff)
Commit 6288f86e870c7bb7fe47cc138320b9eb34c93941 by tejohnson
Revert "[ThinLTO] Add additional ThinLTO pipeline testing with new PM"
This reverts commit 2af97be8027a0823b88d4b6a07fc5eedb440bc1f.
After attempting to fix bot failures from matching issues (mostly due to
inconsistent printing of "llvm::" prefixes on objects, and
AnalysisManager objects being printed differntly, I am now seeing some
differences I don't understand (real differences in the passes being
printed). Giving up at this point to allow the bots to recover. Will
revisit later.
The file was removedllvm/test/Other/Inputs/new-pm-thinlto-prelink-pgo-defaults.proftext
The file was modifiedllvm/test/Other/new-pm-pgo.ll (diff)
The file was removedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was removedllvm/test/Other/Inputs/new-pm-thinlto-samplepgo-defaults.prof
The file was removedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was removedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was removedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was removedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
Commit 2b530053e9d696ada9269e7396180fc6262d2861 by thakis
[gn build] (manually) port b4a99a061f51
The file was modifiedllvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn (diff)
Commit 15078d7202b410fd15eedc49d2ab2e4fe9a9f177 by kadircet
[clangd] Render header of hover card as a heading
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72625
The file was modifiedclang-tools-extra/clangd/FormattedString.cpp (diff)
The file was modifiedclang-tools-extra/clangd/FormattedString.h (diff)
The file was modifiedclang-tools-extra/clangd/Hover.cpp (diff)
The file was modifiedclang-tools-extra/clangd/unittests/FormattedStringTests.cpp (diff)
The file was modifiedclang-tools-extra/clangd/unittests/HoverTests.cpp (diff)
Commit f5465e74ef4c9e24f867002aa598dc9e6481ead3 by kadircet
[clangd] Include expression in DecltypeTypeLoc sourcerange while
building SelectionTree
Summary: Currently AST only contains the location for `decltype`
keyword, therefore we were skipping expressions inside decltype while
building selection tree.
This patch extends source range in such cases to contain the expression
as well. A proper fix would require changes to Sema and DecltypeTypeLoc
to contain these location information.
Fixes https://github.com/clangd/clangd/issues/250.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72594
The file was modifiedclang-tools-extra/clangd/Selection.cpp (diff)
The file was modifiedclang-tools-extra/clangd/unittests/SelectionTests.cpp (diff)
Commit 2bb154591fab6c1d3a99d63ef03c234f0a363410 by apl
[lldb-server] Remove dead CMake code
No files in lldb-server are including a header from a plugin without the
whole path to the header relative to the lldb source directory. There is
no need to include the specific directories as a result.
The file was modifiedlldb/tools/lldb-server/CMakeLists.txt (diff)
Commit 231875e111facf6d15553dff9d7c04d3e9e4a404 by phosek
[Clang] Always set -z now linker option on Fuchsia
This should be the default on Fuchsia.
Differential Revision: https://reviews.llvm.org/D70576
The file was modifiedclang/test/Driver/fuchsia.c (diff)
The file was modifiedclang/lib/Driver/ToolChains/Fuchsia.cpp (diff)
The file was modifiedclang/test/Driver/fuchsia.cpp (diff)
Commit a0f4600f4f0ece1d4779544513f5a70c6f0d78bf by daniel_l_sanders
Rework be15dfa88fb1 such that it works with GlobalISel which doesn't use
EVT
Summary: be15dfa88fb1 broke GlobalISel's usage of getSetCCInverse()
which currently appears to be limited to our out-of-tree backend.
GlobalISel doesn't use EVT's and isn't able to derive them from the
information it has as it doesn't distinguish between integer and
floating point types (that distinction is made by operations rather than
values). Bring back the bool version of getSetCCInverse() in a way that
doesn't break the intent of be15dfa88fb1 but also allows GlobalISel to
continue using it.
Reviewers: spatel, bogner, arichardson
Reviewed By: arichardson
Subscribers: rovka, hiraditya, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72309
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/ISDOpcodes.h (diff)
Commit d0aad9f56e1588effa94b15804b098e6307da6b4 by tejohnson
[LTO] Constify lto::Config reference passed to backends (NFC)
The lto::Config object saved on the global LTO object should not be
updated by any of the LTO backends. Otherwise we could run into
interference between threads utilizing it. Motivated by some proposed
changes that would have caused it to get modified in the ThinLTO
backends.
The file was modifiedllvm/include/llvm/LTO/LTOBackend.h (diff)
The file was modifiedllvm/lib/LTO/LTO.cpp (diff)
The file was modifiedllvm/include/llvm/LTO/LTO.h (diff)
The file was modifiedllvm/lib/LTO/LTOBackend.cpp (diff)
Commit f163755eb0a86508d3bfe1822b7f635952b66104 by a.v.lapshin
[Dsymutil][Debuginfo][NFC] #3 Refactor dsymutil to separate DWARF
optimizing part.
Summary: This is the next portion of patches for dsymutil.
Create DwarfEmitter interface to generate all debug info tables. Put
DwarfEmitter into DwarfLinker library and make
tools/dsymutil/DwarfStreamer to be child of DwarfEmitter.
It passes check-all testing. MD5 checksum for clang .dSYM bundle matches
for the dsymutil with/without that patch.
Reviewers: JDevlieghere, friss, dblaikie, aprantl
Reviewed By: JDevlieghere
Subscribers: merge_guards_bot, hiraditya, thegameg, probinson,
llvm-commits
Tags: #llvm, #debug-info
Differential Revision: https://reviews.llvm.org/D72476
The file was modifiedllvm/lib/DWARFLinker/DWARFLinker.cpp (diff)
The file was modifiedllvm/include/llvm/DWARFLinker/DWARFLinker.h (diff)
The file was modifiedllvm/tools/dsymutil/DwarfLinkerForBinary.cpp (diff)
The file was modifiedllvm/tools/dsymutil/DwarfLinkerForBinary.h (diff)
The file was modifiedllvm/tools/dsymutil/DwarfStreamer.cpp (diff)
The file was modifiedllvm/tools/dsymutil/DwarfStreamer.h (diff)
Commit 69f4cea413991a2a96635c58272bd4205f3e0c36 by spatel
[InstCombine] add tests for select --> copysign; NFC
This is testing for another (possibly final) transform suggested in:
https://bugs.llvm.org/show_bug.cgi?id=44153
The file was modifiedllvm/test/Transforms/InstCombine/select.ll (diff)
Commit c1b13a1b17719aebace1b3be7a6ac7f90b1901a6 by aaron
Fix a test case by adding -fno-delayed-template-parsing.
The file was modifiedclang-tools-extra/test/clang-tidy/checkers/readability-identifier-naming-member-decl-usage.cpp (diff)
Commit b7526cc21ce55c8b53250df3d659fbdae3f894a7 by puyan
[NFC][clang][IFS] Adding braces to if-statement as prep for D71301.
Just trying to make https://reviews.llvm.org/D71301 look cleaner.
The file was modifiedclang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp (diff)
Commit bd8c8827d96f09be502f0da6897c1aef89e45c30 by puyan
[clang][IFS] Prevent Clang-IFS from Leaking symbols from inside a block.
Built libdispatch with clang interface stubs. Ran into some block
related issues. Basically VarDecl symbols can leak out because I wasn't
checking the case where a VarDecl is contained inside a BlockDecl
(versus a method or function).
This patch checks that a VarDecl is not a child decl of a BlockDecl.
This patch also does something very similar for c++ lambdas as well.
Differential Revision: https://reviews.llvm.org/D71301
The file was addedclang/test/InterfaceStubs/blocks.c
The file was modifiedclang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp (diff)
The file was addedclang/test/InterfaceStubs/lambda.cpp