Started 7 mo 2 days ago
Took 1 hr 55 min

Build clang-d381022-g502b3bfc6a71-t18949-b18949.tar.gz (Feb 25, 2021 9:29:37 AM)


No known issues detected

Build Log

  1. [RISCV] Support fixed-length vector i2fp/fp2i conversions (details)
  2. [RISCV] Update RVV ISA section-header comments. NFC. (details)
  3. [mlir][NFC] Add missing namespace qualifier to ODS generated code (details)
  4. [clang][sema] Ignore xor-used-as-pow if both sides are macros (details)
  5. Fix a test case that should check whether or not it is passed into lld (details)
  6. [RISCV] Add isel pattern to match X > -1 to bgez. (details)
  7. [arm builtin crosscompile docs] alphabetize flags, no behavior change (details)
  8. [arm builtin crosscompile docs] add COMPILER_RT_BUILD_MEMPROF=OFF (details)
  9. [RISCV] Teach CleanupVSETVLI to remove 'vsetvli zero, zero, vtype' when the vtype matches the previous vsetvli or vsetivli (details)
  10. [IndVars] Add test cases inspired by PR48965. (details)
  11. [CodeGen] Format code comment to 80 columns. NFC. (details)
  12. [MLIR][affine-loop-fusion] Handle defining ops between the source and dest loops (details)
  13. [mlir] Check 'iter_args' in 'isLoopParallel' utility (details)
  14. [SampleFDO][NFC] Refactor: make SampleProfileLoaderBaseImpl a template class (details)
  15. [AMDGPU] require s-memtime-inst for __builtin_amdgcn_s_memtime (details)

Started by upstream project relay-test-suite-verify-machineinstrs build number 9386
originally caused by:

This run spent:

  • 1 hr 31 min waiting;
  • 1 hr 55 min build duration;
  • 1 hr 55 min total from scheduled to completion.
Revision: c816513763961852ae753378e0525dd8e508d168
  • refs/remotes/origin/main
Revision: 502b3bfc6a713e5b6640faf48e72de08d7cb0aba
Repository: http://labmaster3.local/git/llvm-project.git
  • detached
Revision: f48d431f44610e339d00a33d57564c6029c4ff43
  • refs/remotes/origin/main
Revision: 37a356505b2a5add8065f1bdfc6c6bd7072d0e3a
  • refs/remotes/origin/main