Changes

Summary

DWARFDie:DWARFTypePrinter: Add common utility function for checking where parentheses are required (details)
[RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD (details)
llvm/cmake: fix a typo (details)
[X86][Atom] Fix (U)COMISS/SD uops, latency and throughput (details)
[mlir][emitc] Fix indent in CondBranchOp and block label (details)

Commit ae0873483d9393d35bd5bdbfcb2bfb843c335cd5 by dblaikie DWARFDie:DWARFTypePrinter: Add common utility function for checking where parentheses are required
	llvm/lib/DebugInfo/DWARF/DWARFDie.cpp (diff)
Commit dee5a8ca325f3c752534442233cb601910e918c4 by ben.shi [RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SHADD Optimize (add (shl x, c0), (shl y, c1)) -> (SLLI (SHADD x, y), c1), if c0-c1 == 1/2/3. Reviewed By: craig.topper, luismarques Differential Revision: https://reviews.llvm.org/D108916
	llvm/lib/Target/RISCV/RISCVISelLowering.cpp (diff)
	llvm/test/CodeGen/RISCV/rv32zba.ll (diff)
	llvm/test/CodeGen/RISCV/rv64zba.ll (diff)
Commit b7ec8f3dcbcdf6d27902688c8eac0e6196061cb3 by sylvestre llvm/cmake: fix a typo
	llvm/CMakeLists.txt (diff)
Commit e381d8b24329cae6408205f74d0d6d9eaa6b29cf by llvm-dev [X86][Atom] Fix (U)COMISS/SD uops, latency and throughput Both ports are required, for reg and mem variants - we can also use the WriteFComX class directly and remove the unnecessary InstRW overrides. Matches what Intel AoM / Agner / InstLatX64 report as well.
	llvm/test/tools/llvm-mca/X86/Atom/resources-sse2.s (diff)
	llvm/test/tools/llvm-mca/X86/Atom/resources-sse1.s (diff)
	llvm/lib/Target/X86/X86ScheduleAtom.td (diff)
Commit 9de88fc0eac1bfc719dfd63a32b7eb069489407e by xndchn [mlir][emitc] Fix indent in CondBranchOp and block label 1. Add missing indent in CondBranchOp 2. Remove indent in block label Differential Revision: https://reviews.llvm.org/D109805
	mlir/lib/Target/Cpp/TranslateToCpp.cpp (diff)