|
 | libc/src/stdlib/ldiv.h |
 | libc/test/src/stdlib/div_test.cpp |
 | libc/src/stdlib/div.cpp |
 | libc/test/src/inttypes/CMakeLists.txt (diff) |
 | libc/src/inttypes/CMakeLists.txt (diff) |
 | libc/test/src/stdlib/CMakeLists.txt (diff) |
 | libc/src/stdlib/div.h |
 | libc/test/src/stdlib/ldiv_test.cpp |
 | libc/src/stdlib/lldiv.cpp |
 | libc/test/src/stdlib/lldiv_test.cpp |
 | libc/spec/stdc.td (diff) |
 | libc/src/inttypes/imaxdiv.h |
 | libc/src/stdlib/lldiv.h |
 | libc/config/linux/aarch64/entrypoints.txt (diff) |
 | libc/test/src/stdlib/DivTest.h |
 | libc/config/linux/x86_64/entrypoints.txt (diff) |
 | libc/src/__support/integer_operations.h (diff) |
 | libc/src/stdlib/CMakeLists.txt (diff) |
 | libc/test/src/inttypes/imaxdiv_test.cpp |
 | libc/config/linux/api.td (diff) |
 | libc/src/inttypes/imaxdiv.cpp |
 | libc/src/stdlib/ldiv.cpp |
Commit
471217cff8e5c827f2ee52175a1c94584699cab2
by mkazantsevRevert "Revert "[IndVars] Replace PHIs if loop exits on 1st iteration""
This reverts commit 6fec6552f54885ae06bf76b35f9f1173a0561a4c.
The patch was reverted on incorrect claim that this patch may break LCSSA form when the loop is not in a simplify form. All IndVars' transform insure that the loop is in simplify and LCSSA form, so if it wasn't broken before this transform, it will also not be broken after it.
|
 | llvm/test/Transforms/IndVarSimplify/eliminate-exit-no-dl.ll (diff) |
 | llvm/test/Transforms/IndVarSimplify/floating-point-iv.ll (diff) |
 | llvm/test/Transforms/IndVarSimplify/eliminate-backedge.ll (diff) |
 | llvm/lib/Transforms/Scalar/IndVarSimplify.cpp (diff) |
Commit
e9d34c54290e277e075aed33036fddae77b5f582
by mkazantsev[NFC] Add assert and test showing that revert of D109596 wasn't justified
All transforms of IndVars have prerequisite requirement of LCSSA and LoopSimplify form and rely on it. Added test that shows that this actually stands.
|
 | llvm/test/Transforms/IndVarSimplify/eliminate-backedge.ll (diff) |
 | llvm/lib/Transforms/Scalar/IndVarSimplify.cpp (diff) |
|
 | libc/src/stdlib/CMakeLists.txt (diff) |
|
 | libc/src/inttypes/CMakeLists.txt (diff) |
 | libc/src/stdlib/CMakeLists.txt (diff) |
Commit
966922320f09b8bf6e4a69a32f344b3acec36434
by pavel[lldb] Remove two #ifndef linux from Platform.cpp
These have been here since r215992, guarding the calls to HostInfo, but their purpose unclear -- HostInfoLinux provides these functions and they work fine.
|
 | lldb/source/Target/Platform.cpp (diff) |
|
 | mlir/include/mlir/IR/OpBase.td (diff) |
Commit
ec03bbe8a74ae593d0ea5d8bf55c337e395873d1
by vlad.vinogradov[mlir] Fix bug in partial dialect conversion
The discussion on forum: https://llvm.discourse.group/t/bug-in-partial-dialect-conversion/4115
The `applyPartialConversion` didn't handle the operations, that were marked as illegal inside dynamic legality callback. Instead of reporting error, if such operation was not converted to legal set, the method just added it to `unconvertedSet` in the same way as unknown operations.
This patch fixes that and handle dynamically illegal operations as well.
The patch includes 2 fixes for existing passes:
* `tensor-bufferize` - explicitly mark `std.return` as legal. * `convert-parallel-loops-to-gpu` - ugly fix with marking visited operations to avoid recursive legality checks.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D108505
|
 | mlir/lib/Conversion/SCFToGPU/SCFToGPUPass.cpp (diff) |
 | mlir/test/Transforms/test-legalizer-full.mlir (diff) |
 | mlir/test/lib/Dialect/Test/TestOps.td (diff) |
 | mlir/test/Transforms/test-legalizer.mlir (diff) |
 | mlir/test/lib/Dialect/Test/TestPatterns.cpp (diff) |
 | mlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp (diff) |
 | mlir/lib/Transforms/Utils/DialectConversion.cpp (diff) |
 | mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp (diff) |
 | mlir/include/mlir/Conversion/SCFToGPU/SCFToGPU.h (diff) |
|
 | mlir/lib/Analysis/Presburger/Simplex.cpp (diff) |
 | mlir/unittests/Analysis/Presburger/SimplexTest.cpp (diff) |
|
 | llvm/CMakeLists.txt (diff) |
Commit
7f6a4826ac49e4c7075f80930480045bf983483c
by flo[CaptureTracking] Allow passing LI to PointerMayBeCapturedBefore (NFC).
isPotentiallyReachable can use LoopInfo to return earlier. This patch allows passing an optional LI to PointerMayBeCapturedBefore. Used in D109844.
Reviewed By: nikic, asbirlea
Differential Revision: https://reviews.llvm.org/D109978
|
 | llvm/include/llvm/Analysis/CaptureTracking.h (diff) |
 | llvm/lib/Analysis/CaptureTracking.cpp (diff) |
Commit
bdcf4b9b9620afe24d17132027a7d12e2f1a598b
by kareem.ergawy[MLIR][Linalg] Make detensoring cost-model more flexible.
So far, the CF cost-model for detensoring was limited to discovering pure CF structures. This means, if while discovering the CF component, the cost-model found any op that is not detensorable, it gives up on detensoring altogether. This patch makes it a bit more flexible by cleaning-up the detensorable component from non-detensorable ops without giving up entirely.
Reviewed By: silvas
Differential Revision: https://reviews.llvm.org/D109965
|
 | mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp (diff) |
 | mlir/test/Dialect/Linalg/detensorize_while_impure_cf.mlir |
 | mlir/test/Dialect/Linalg/detensorize_while_failure.mlir |
|
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.cpp (diff) |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteRegisterContext.h (diff) |
|
 | lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp (diff) |
 | lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py (diff) |
Commit
92c9b28347c38cc15adf20223ed272abe8ec0227
by david.spickettRevert "[AArch64][SVE] Teach cost model that masked loads/stores are cheap"
This reverts commit 734708e04f84b72f1ae7c8b35c002b8bf97dc064.
Due to build failures on the 2 stage SVE VLS bot. https://lab.llvm.org/buildbot/#/builders/176/builds/908/steps/11/logs/stdio
|
 | llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp (diff) |
 | llvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll |
|
 | mlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp (diff) |
 | mlir/lib/Dialect/Tensor/Transforms/Bufferize.cpp (diff) |
Commit
13aa102e07695297fd17f68913c343c95a7c56ad
by Tim NorthoverAArch64: use ldp/stp for 128-bit atomic load/store in v.84 onwards
v8.4 says that normal loads/stores of 128-bytes are single-copy atomic if they're properly aligned (which all LLVM atomics are) so we no longer need to do a full RMW operation to guarantee we got a clean read.
|
 | llvm/lib/Target/AArch64/AArch64ISelLowering.h (diff) |
 | llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp (diff) |
 | llvm/test/CodeGen/AArch64/atomic-ops-lse.ll (diff) |
 | llvm/lib/Target/AArch64/AArch64Subtarget.h (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/v8.4-atomic-128.ll |
 | llvm/test/CodeGen/AArch64/v8.4-atomic-128.ll |
 | llvm/lib/Target/AArch64/AArch64.td (diff) |
 | llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp (diff) |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic-128.ll (diff) |
Commit
ca3bebd8440f9f88f1457dad9c12933b73d9590f
by Justas.Janickas[OpenCL] Supports optional writing to 3d images in C++ for OpenCL 2021
Adds support for a feature macro __opencl_c_3d_image_writes in C++ for OpenCL 2021 enabling a respective optional core feature from OpenCL 3.0.
This change aims to achieve compatibility between C++ for OpenCL 2021 and OpenCL 3.0.
Differential Revision: https://reviews.llvm.org/D109328
|
 | clang/lib/Sema/SemaType.cpp (diff) |
 | clang/test/SemaOpenCL/unsupported-image.cl (diff) |
 | clang/test/Misc/opencl-c-3.0.incorrect_options.cl (diff) |
|
 | clang/CODE_OWNERS.TXT (diff) |
|
 | clang/lib/Sema/SemaType.cpp (diff) |
Commit
c8cb7f611fdf4d96c4d23a75aa48c93cca38646f
by bjorn.a.pettersson[NewPM] Make InlinerPass (aka 'inline') a parameterized pass
In default pipelines the ModuleInlinerWrapperPass is adding the InlinerPass to the pipeline twice, once due to MandatoryFirst (passing true in the ctor) and then a second time with false as argument.
To make it possible to bisect and reduce opt test cases for this part of the pipeline we need to be able to choose between the two different variants of the InlinerPass when running opt. This patch is changing 'inline' to a CGSCC_PASS_WITH_PARAMS in the PassRegistry, making it possible run opt with both -passes=cgscc(inline) and -passes=cgscc(inline<only-mandatory>).
Reviewed By: aeubanks, mtrofin
Differential Revision: https://reviews.llvm.org/D109877
|
 | llvm/include/llvm/Transforms/IPO/Inliner.h (diff) |
 | llvm/lib/Passes/PassRegistry.def (diff) |
 | llvm/lib/Transforms/IPO/Inliner.cpp (diff) |
 | llvm/lib/Passes/PassBuilder.cpp (diff) |
Commit
e4c46ddd91eba5ec162225abc1e47aa3c6c13516
by petar.avramovic[GlobalISel] Improve elimination of dead instructions in legalizer
Add eraseInstr(s) utility functions. Before deleting an instruction collects its use instructions. After deletion deletes use instructions that became trivially dead. This patch clears all dead instructions in existing legalizer mir tests.
Differential Revision: https://reviews.llvm.org/D109154
|
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-usubo.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-usube.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.s16.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ffloor.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/bug-legalization-artifact-combiner-dead-def.mir (diff) |
 | llvm/test/CodeGen/X86/GlobalISel/legalize-lshr-scalar.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir (diff) |
 | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memmove.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-uaddo.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smax.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-extracts.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-trunc.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-extract.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-unmerge-values.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpyinline.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir (diff) |
 | llvm/test/CodeGen/X86/GlobalISel/legalize-ashr-scalar.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-uadde.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-bswap.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcanonicalize.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir (diff) |
 | llvm/lib/CodeGen/GlobalISel/Legalizer.cpp (diff) |
 | llvm/test/CodeGen/X86/GlobalISel/legalize-shl-scalar.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir (diff) |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/zextLoad_and_sextLoad.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-zext.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubsat.mir (diff) |
 | llvm/lib/CodeGen/GlobalISel/Utils.cpp (diff) |
 | llvm/include/llvm/CodeGen/GlobalISel/Utils.h (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-phi-insertpt-decrement.mir (diff) |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/constants.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-mul.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir (diff) |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsin.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddo.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shuffle-vector.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sub.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umax.mir (diff) |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/zext_and_sext.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zext.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-extract-vector-elt.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memcpy.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-add.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/artifact-find-value.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssubo.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir (diff) |
 | llvm/test/CodeGen/ARM/GlobalISel/arm-legalize-fp.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-sadde.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-umin.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcos.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usube.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-extload.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-memset.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-smin.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir (diff) |
 | llvm/test/CodeGen/Mips/GlobalISel/legalizer/trunc.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-ssube.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-saddsat.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-build-vector.s16.mir (diff) |
 | llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir (diff) |
 | llvm/test/CodeGen/AArch64/GlobalISel/legalize-merge-values.mir (diff) |
Commit
b1099120ff963d0a0f1de12e3315b1ee4e4ed7e7
by mgorny[lldb] [gdb-remote] Always send PID when detaching w/ multiprocess
Always send PID in the detach packet when multiprocess extensions are enabled. This is required by qemu's GDB server, as plain 'D' packet results in an error and the emulated system is not resumed.
Differential Revision: https://reviews.llvm.org/D110033
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 | lldb/test/API/functionalities/gdb_remote_client/TestGDBRemoteClient.py (diff) |
 | lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp (diff) |
Commit
d6929aaa67c7996a69451e301970408362af909e
by clementval[mlir][openacc] Make use of the second counter extension in DataOp translation
Make use of runtime extension for the second reference counter used in structured data region. This extension is implemented in D106510 and D106509.
Differential Revision: https://reviews.llvm.org/D106517
|
 | mlir/test/Target/LLVMIR/openacc-llvm.mlir (diff) |
 | mlir/lib/Target/LLVMIR/Dialect/OpenACC/OpenACCToLLVMIRTranslation.cpp (diff) |
|
 | llvm/lib/MCA/Stages/InstructionTables.cpp (diff) |
|
 | llvm/lib/Target/X86/X86TargetTransformInfo.cpp (diff) |
|
 | llvm/lib/Object/MachOObjectFile.cpp (diff) |
Commit
6d7b3d6b3a8dbd62650b6c3dae1fe904a8ae9048
by Alexander.RichardsonFix CLANG_ENABLE_STATIC_ANALYZER=OFF building all analyzer source
Since https://reviews.llvm.org/D87118, the StaticAnalyzer directory is added unconditionally. In theory this should not cause the static analyzer sources to be built unless they are referenced by another target. However, the clang-cpp target (defined in clang/tools/clang-shlib) uses the CLANG_STATIC_LIBS global property to determine which libraries need to be included. To solve this issue, this patch avoids adding libraries to that property if EXCLUDE_FROM_ALL is set.
In case something like this comes up again: `cmake --graphviz=targets.dot` is quite useful to see why a target is included as part of `ninja all`.
Reviewed By: thakis
Differential Revision: https://reviews.llvm.org/D109611
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 | llvm/cmake/modules/AddLLVM.cmake (diff) |
 | clang/cmake/modules/AddClang.cmake (diff) |
 | clang/lib/StaticAnalyzer/CMakeLists.txt (diff) |
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 | llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-condbr.test |
 | llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir |
 | llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected |
 | llvm/test/tools/UpdateTestChecks/update_mir_test_checks/lit.local.cfg |
Commit
817e23d481be52e6e0fd779efce2beb105e8c7b6
by Alexander.Richardson[update_mir_test_checks.py] Use -NEXT FileCheck directories
Previously the script emitted output using plain CHECK directives. This can result in a test passing even if there are some instructions between CHECK directives that should have been removed. It also makes debugging tests that have the output in a different order more difficult since FileCheck can match with a later line and then complain about the "wrong" directive not being found.
This will cause quite large diffs when updating existing tests, but I'm not sure we need an opt-in flag here.
Depends on D109765 (pre-commit tests)
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D109767
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 | llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-condbr.mir.expected (diff) |
 | llvm/test/CodeGen/X86/GlobalISel/select-phi.mir (diff) |
 | llvm/utils/update_mir_test_checks.py (diff) |