Changes

Summary

  1. [RISCV] Restrict performANY_EXTENDCombine to prevent an infinite loop. (details)
  2. [RISCV] Fix grammar in a comment. NFC (details)
  3. Revert "[lldb] Temporarily bump the max length of the pexpect error message to diagnose an lldb-aarch64 test failure" (details)
  4. [NFC][PowerPC] Fix spe.ll to work with update_llc_test_checks.py again (details)
  5. [mlir] harden result type verification in llvm.call (details)
  6. [mlir] run the verifier before translating a module (details)
  7. [llvm] Replace LLVM_ATTRIBUTE_NORETURN with C++11 [[noreturn]] (details)
  8. [mlir][sparse] use proper type alias for filename ptr (details)
  9. Simplify allowing pragma float_control in a linkage specification (details)
  10. Revert "Revert of D49126 [PredicateInfo] Use custom mangling to support ssa_copy with unnamed types." (details)
  11. [PredicateInfo] Use Intrinsic::getDeclaration now that it handles unnamed types. (details)
  12. [LoopFlatten] Fix bug where SCEVCouldNotCompute object is used (details)
  13. [trace] Introduce Hierarchical Trace Representation (HTR) and add  command for Intel PT trace visualization (details)
  14. tsan: remove unused pc arguments (details)
  15. tsan: remove mblock types (details)
  16. tsan: add more micro benchmarks (details)
Commit 54588bcc052e5b08f90e672c33d0c1ad4eda2424 by craig.topper
[RISCV] Restrict performANY_EXTENDCombine to prevent an infinite loop.

The sign_extend we insert here can get turned into a zero_extend if
the sign bit is known zero. This can enable a setcc combine that
shrinks compares with zero_extend. This reduces the use count of
the zero_extend allowing other combines to turn it back into an
any_extend.

This restricts the combine to only cases where the result is used
by a CopyToReg. This works for my original motivating case. I
hope the CopyToReg use will prevent any converted extends from
turning back into an any_extend.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D106754
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was addedllvm/test/CodeGen/RISCV/pr51206.ll
Commit 3106f85945468970b81d86c296d37b485415a398 by craig.topper
[RISCV] Fix grammar in a comment. NFC
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit 83c752bfa6071f34c8c4564a379d99b1b94f604a by Raphael Isemann
Revert "[lldb] Temporarily bump the max length of the pexpect error message to diagnose an lldb-aarch64 test failure"

This reverts commit 5db8e232126fc4c0f5d5b0339bdc5a49830268d1. The test has
been disabled since then on the bot and we got the logs we wanted.
The file was modifiedlldb/third_party/Python/module/pexpect-4.6/pexpect/pty_spawn.py
Commit 6e8660a7d65a30e3abcb4c588047c1328ab7d28e by jrtc27
[NFC][PowerPC] Fix spe.ll to work with update_llc_test_checks.py again

Using split-file does not work with update_llc_test_checks.py. It's also
mostly redundant, as the single and double tests can just use a single
llc and FileCheck invocation for each FPU type using -check-prefixes
rather than -check-prefix, and update_llc_test_checks.py will merge what
it can. Only test_dasmconst needs to be SPE-only and so is pulled out
into its own mall file (rather than using sed to preprocess the file and
keep it commented out for EFPU2, which would work, but is ugly).

As well as cutting down on the number of RUN lines, this also results in
test_fma's CHECK lines being merged for both FPUs.

Reviewed By: kiausch

Differential Revision: https://reviews.llvm.org/D106969
The file was modifiedllvm/test/CodeGen/PowerPC/spe.ll
The file was addedllvm/test/CodeGen/PowerPC/spe-hwdouble.ll
Commit c1f719d1a749eaf4a4964292e3eed6ab2766f2c5 by zinenko
[mlir] harden result type verification in llvm.call

The verifier of the llvm.call operation was not checking for mismatches between
the number of operation results and the number of results in the signature of
the callee. Furthermore, it was possible to construct an llvm.call operation
producing an SSA value of !llvm.void type, which should not exist. Add the
verification and treat !llvm.void result type as absence of call results.
Update the GPU conversions to LLVM that were mistakenly assuming that it was
fine for llvm.call to produce values of !llvm.void type and ensure these calls
do not produce results.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D106937
The file was modifiedmlir/lib/Conversion/GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp
The file was modifiedmlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
The file was modifiedmlir/test/Conversion/GPUToVulkan/invoke-vulkan.mlir
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
Commit 49f745f59cbe1eda4653d917cc7d8d0b586fc6a4 by zinenko
[mlir] run the verifier before translating a module

In translation from MLIR to another IR, run the MLIR verifier on the parsed
module to ensure only valid modules are given to the translation. Previously,
we would send any module that could be parsed to the translation, including
semantically invalid modules, leading to surprising errors or lack thereof down
the pipeline.

Depends On D106937

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D106938
The file was modifiedmlir/lib/Translation/Translation.cpp
Commit 6da3d8b19c32c76bb503b1a71fc167a0487ef200 by i
[llvm] Replace LLVM_ATTRIBUTE_NORETURN with C++11 [[noreturn]]

[[noreturn]] can be used since Oct 2016 when the minimum compiler requirement was bumped to GCC 4.8/MSVC 2015.

Note: the definition of LLVM_ATTRIBUTE_NORETURN is kept for now.
The file was modifiedllvm/include/llvm/TableGen/Error.h
The file was modifiedllvm/tools/llvm-cxxdump/llvm-cxxdump.cpp
The file was modifiedllvm/tools/llvm-rc/llvm-rc.cpp
The file was modifiedllvm/include/llvm/Support/Error.h
The file was modifiedllvm/lib/Support/SmallVector.cpp
The file was modifiedllvm/tools/llvm-ifs/ErrorCollector.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/Coroutines.cpp
The file was modifiedllvm/tools/llvm-cvtres/llvm-cvtres.cpp
The file was modifiedllvm/tools/llvm-readobj/llvm-readobj.h
The file was modifiedllvm/include/llvm/Support/ErrorHandling.h
The file was modifiedllvm/lib/Support/Unix/Unix.h
The file was modifiedllvm/tools/llvm-strings/llvm-strings.cpp
The file was modifiedllvm/include/llvm/MC/MCContext.h
The file was modifiedllvm/include/llvm/Support/CrashRecoveryContext.h
The file was modifiedllvm/include/llvm/Support/Windows/WindowsSupport.h
The file was modifiedllvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
The file was modifiedllvm/tools/llc/llc.cpp
The file was modifiedllvm/tools/llvm-lipo/llvm-lipo.cpp
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
The file was modifiedllvm/lib/Support/Windows/Process.inc
The file was modifiedllvm/tools/llvm-ar/llvm-ar.cpp
The file was modifiedllvm/tools/lli/lli.cpp
The file was modifiedllvm/tools/llvm-readobj/llvm-readobj.cpp
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
The file was modifiedllvm/lib/Support/Process.cpp
The file was modifiedllvm/tools/split-file/split-file.cpp
The file was modifiedllvm/lib/Support/Unix/Process.inc
The file was modifiedllvm/tools/llvm-profgen/ErrorHandling.h
The file was modifiedllvm/tools/llvm-ifs/ErrorCollector.h
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.h
The file was modifiedllvm/lib/Support/CrashRecoveryContext.cpp
The file was modifiedllvm/include/llvm/Support/Process.h
The file was modifiedllvm/tools/llvm-mt/llvm-mt.cpp
Commit 2b013a6c8a7de6d204ce610f69fd981b181cee2c by ajcbik
[mlir][sparse] use proper type alias for filename ptr

Reviewed By: gussmith23

Differential Revision: https://reviews.llvm.org/D106904
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sampled_matmul.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_flatten.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_spmm.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_matvec.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_mttkrp.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/dense_output.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum.mlir
The file was modifiedmlir/test/Integration/Dialect/SparseTensor/CPU/sparse_out_simple.mlir
Commit 71f0359a9defbf3e35828189629f166508390d5d by aaron
Simplify allowing pragma float_control in a linkage specification

This amends b0ef3d8f666fa6008abb09340b73d9340d442569 based on a suggestion from James Y Knight.
The file was modifiedclang/lib/Sema/SemaAttr.cpp
Commit dc5570d149ca6a0931413bf1ad469eb8f9517f82 by jeroen.dobbelaere
Revert "Revert of D49126 [PredicateInfo] Use custom mangling to support ssa_copy with unnamed types."

This reverts commit 77080a1eb6061df2dcfae8ac84b85ad4d1e02031.

This change introduced issues detected with EXPENSIVE_CHECKS. Reverting to restore the
needed function cleanup. A next patch will then just improve on the name mangling.
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/condprop.ll
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/edge.ll
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/unnamed-types.ll
The file was modifiedllvm/test/Other/debugcounter-predicateinfo.ll
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/testandor.ll
The file was modifiedllvm/lib/Transforms/Utils/PredicateInfo.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/PredicateInfo.h
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/diamond.ll
Commit 03b8c69d06f810f13d0b74d06dabea37c43e5b78 by jeroen.dobbelaere
[PredicateInfo] Use Intrinsic::getDeclaration now that it handles unnamed types.

This is a second attempt to fix the EXPENSIVE_CHECKS issue that was mentioned  In D91661#2875179 by @jroelofs.

(The first attempt was in D105983)

D91661 more or less completely reverted D49126 and by doing so also removed the cleanup logic of the created declarations and calls.
This patch is a replacement for D91661 (which must itself be reverted first). It replaces the custom declaration creation with the
generic version and shows the test impact. It also tracks the number of NamedValues to detect if a new prototype was added instead
of looking at the available users of a prototype.

Reviewed By: jroelofs

Differential Revision: https://reviews.llvm.org/D106147
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/testandor.ll
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/unnamed-types.ll
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/condprop.ll
The file was modifiedllvm/lib/Transforms/Utils/PredicateInfo.cpp
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/diamond.ll
The file was modifiedllvm/test/Other/debugcounter-predicateinfo.ll
The file was modifiedllvm/lib/IR/Module.cpp
The file was modifiedllvm/include/llvm/IR/Module.h
The file was modifiedllvm/test/Transforms/Util/PredicateInfo/edge.ll
Commit bc43078fe835e19782a90ad2f464ebdc150911de by sjoerd.meijer
[LoopFlatten] Fix bug where SCEVCouldNotCompute object is used

The SCEV method getBackedgeTakenCount() returns a SCEVCouldNotCompute
object if the backedge-taken count is unpredictable. This fix ensures
there is no longer an attempt to use such an object to find the trip
count.

Patch by: Rosie Sumpter.

Differential Revision: https://reviews.llvm.org/D106970
The file was modifiedllvm/test/Transforms/LoopFlatten/loop-flatten-negative.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopFlatten.cpp
Commit aad17c55a8116cd3831d4392d909139702019d65 by walter erquinigo
[trace] Introduce Hierarchical Trace Representation (HTR) and add  command for Intel PT trace visualization

This diff introduces Hierarchical Trace Representation (HTR) and creates the `thread trace export ctf  -f <filename> -t <thread_id>` command to export an Intel PT trace's HTR to Chrome Trace Format (CTF) for visualization.

See `lldb/docs/htr.rst` for context/documentation on HTR.

**Overview of Changes**
    - Add HTR documentation (see `lldb/docs/htr.rst`)
    - Add HTR structures (layer, block, block metadata)
    - Implement "Basic Super Block" HTR pass
    - Add 'thread trace export ctf' command to export the HTR of an Intel PT
      trace to Chrome Trace Format (CTF)

As this diff is the first iteration of HTR and trace visualization, future diffs will build on this work by generalizing the internal design of HTR and implementing new HTR passes that provide better trace summarization/visualization.

See attached video for an example of Intel PT trace visualization:
{F17851042}

Original Author: jj10306

Submitted by: wallace

Reviewed By: wallace, clayborg

Differential Revision: https://reviews.llvm.org/D105741
The file was modifiedlldb/source/Plugins/TraceExporter/ctf/CommandObjectThreadTraceExportCTF.cpp
The file was addedlldb/source/Plugins/TraceExporter/common/TraceHTR.h
The file was modifiedlldb/source/Plugins/TraceExporter/ctf/CMakeLists.txt
The file was modifiedlldb/source/Plugins/TraceExporter/CMakeLists.txt
The file was modifiedlldb/source/Plugins/TraceExporter/ctf/TraceExporterCTFOptions.td
The file was addedlldb/source/Plugins/TraceExporter/common/CMakeLists.txt
The file was addedlldb/docs/htr.rst
The file was modifiedlldb/source/Plugins/TraceExporter/ctf/CommandObjectThreadTraceExportCTF.h
The file was addedlldb/test/API/commands/trace/intelpt-trace/export_ctf_test_program.cpp
The file was addedlldb/source/Plugins/TraceExporter/common/TraceHTR.cpp
The file was addedlldb/test/API/commands/trace/TestTraceExport.py
The file was addedlldb/test/API/commands/trace/intelpt-trace/export_ctf_test_program.out
Commit 5acdfb7eda96dd3931803897476eeeb97eb943cb by dvyukov
tsan: remove unused pc arguments

Remove pc argument of ThreadIgnoreEnd, ThreadIgnoreSyncEnd
and AcquireGlobal functions. It's unused and in some places
we don't even have a pc and pass 0 anyway.
Don't confuse readers and don't pretend that pc is needed
and that passing 0 is somehow deficient.

Use simpler convention for ThreadIgnoreBegin and ThreadIgnoreSyncBegin:
accept only pc instread of pc+save_stack. 0 pc means "don't save stack".

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D106973
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_inl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_ann.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/go/tsan_go.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_java.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
Commit b5bc386ca109599c56084619934f17a996997532 by dvyukov
tsan: remove mblock types

We used to count number of allocations/bytes based on the type
and maybe record them in heap block headers.
But that's all in the past, now it's not used for anything.
Remove the mblock type.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D106971
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_report.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/go/tsan_go.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_stack_trace.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_ann.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_mman.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_mman_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
Commit c4cb9b64dd350f0d675e12d38ea54f4e0c3ceb37 by dvyukov
tsan: add more micro benchmarks

1. Add a set of micro benchmarks for memory accesses,
   mem* functions and unaligned accesses.
2. Add support for multiple benchmarks in a single binary
   (or it would require 12 new benchmark binaries).
3. Remove the "clock growth" machinery,
   it affects the current tsan runtime by increasing size of
   all vector clocks, but this won't be relevant for the new
   tsan runtime.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D106961
The file was addedcompiler-rt/test/tsan/bench_memory_access.cpp
The file was modifiedcompiler-rt/test/tsan/bench.h