Changes

Summary

  1. tsan: always setup sigaction signal handler (details)
  2. tsan: remove "expected" races (details)
  3. sanitizers: build tests with -g (details)
  4. tsan: introduce Tid and StackID typedefs (details)
  5. tsan: prevent insertion of memset into BenignRaceImpl (details)
  6. [profile][test] Delete --path-equivalence=/tmp,%S (details)
  7. [lldb] [DWARF-5] Be lazier about loading .dwo files (details)
  8. [Clang][AArch64] Inline assembly support for the ACLE type 'data512_t' (details)
  9. [AArch64] Add a Machine Value Type for 8 consecutive registers (details)
  10. [AArch64] Legalize MVT::i64x8 in DAG isel lowering (details)
Commit 53a526790d841beb04294f232982796d0803dd3c by dvyukov
tsan: always setup sigaction signal handler

Currently we setup either sigaction signal handler with 3 arguments
or old style signal handler with 1 argument depending on user handler type.
This unnecessarily complicates code. Always setup sigaction handler.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D107186
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Commit 5b30ebed96ad64d08ab7ffcc75a10785737ed191 by dvyukov
tsan: remove "expected" races

"Expected" races is a very ancient facility used in tsanv1 tests.
It's not used/needed anymore. Remove it.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D107175
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_flags.inc
The file was modifiedcompiler-rt/lib/tsan/tests/unit/tsan_flags_test.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_ann.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
Commit 3ea3b6b2d411e1507a5a81d29d2ae5de11555202 by dvyukov
sanitizers: build tests with -g

We currently build tests without -g, which is quite inconvenient.
Crash stacks don't have line numbers, gdb don't how line numbers either.
Always build tests with -g.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D107168
The file was modifiedcompiler-rt/CMakeLists.txt
Commit 103d075b05d1b1b70c317e662b1c31f836fcff20 by dvyukov
tsan: introduce Tid and StackID typedefs

Currently we inconsistently use u32 and int for thread ids,
there are also "unique tid" and "os tid" and just lots of other
things identified by integers.
Additionally new tsan runtime will introduce yet another
thread identifier that is very different from current tids.
Similarly for stack IDs, it's easy to confuse u32 with other
integer identifiers. And when a function accepts u32 or a struct
contains u32 field, it's not always clear what it is.

Add Tid and StackID typedefs to make it clear what is what.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107152
The file was modifiedcompiler-rt/lib/tsan/go/tsan_go.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_ignoreset.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_fd.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_report.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_report.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_ignoreset.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_sync.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_fd.h
Commit 61da95e8a16a71b58661af6d4c33975cb6aa9568 by dvyukov
tsan: prevent insertion of memset into BenignRaceImpl

Some bots started failing with the following error
after changing Alloc to New. Change it back.

ThreadSanitizer: CHECK failed: ((locked[i].recursion)) == ((0))
4 __sanitizer::CheckedMutex::CheckNoLocks()
5 __tsan::ScopedInterceptor::~ScopedInterceptor()
6 memset
7 __tsan::New<__tsan::ExpectRace>()
8 __tsan::AddExpectRace()
9 BenignRaceImpl()

Differential Revision: https://reviews.llvm.org/D107212
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_ann.cpp
Commit 18ec93d9e60c687bfb2b39269f7f81d47b71a179 by i
[profile][test] Delete --path-equivalence=/tmp,%S

This causes the test to fail if %S is under /tmp
The file was modifiedcompiler-rt/test/profile/Linux/instrprof-comdat.test
Commit fb09f365ae28920666ddfd466fb09b44b9cb7be1 by jan.kratochvil
[lldb] [DWARF-5] Be lazier about loading .dwo files

This change makes sure that DwarfUnit does not load a .dwo file until
necessary. I also take advantage of DWARF 5's guarantee that the first
support file is also the primary file to make it possible to create
a compile unit without loading the .dwo file.

Testcases now require Linux as it is needed for -gsplit-dwarf.

Review By: jankratochvil, dblaikie

Differential Revision: https://reviews.llvm.org/D100299
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/lit.local.cfg
The file was modifiedlldb/include/lldb/Symbol/CompileUnit.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
The file was addedlldb/test/Shell/SymbolFile/DWARF/dwarf5-lazy-dwo.c
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
The file was addedlldb/test/Shell/SymbolFile/DWARF/split-optimized.c
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/x86/dwp.s
The file was modifiedlldb/source/Symbol/CompileUnit.cpp
Commit 29b263a34f1afbae9c95bf48eab7e8aac8132a80 by alexandros.lamprineas
[Clang][AArch64] Inline assembly support for the ACLE type 'data512_t'

In LLVM IR terms the ACLE type 'data512_t' is essentially an aggregate
type { [8 x i64] }. When emitting code for inline assembly operands,
clang tries to scalarize aggregate types to an integer of the equivalent
length, otherwise it passes them by-reference. This patch adds a target
hook to tell whether a given inline assembly operand is scalarizable
so that clang can emit code to pass/return it by-value.

Differential Revision: https://reviews.llvm.org/D94098
The file was addedclang/test/CodeGen/aarch64-ls64-inline-asm.c
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
The file was modifiedclang/lib/Basic/Targets/AArch64.cpp
The file was modifiedclang/lib/CodeGen/CGStmt.cpp
The file was modifiedclang/lib/CodeGen/TargetInfo.h
Commit 3094e5389b3dfb046eebcb549f7f4b814258863e by alexandros.lamprineas
[AArch64] Add a Machine Value Type for 8 consecutive registers

Adds MVT::i64x8, a Machine Value Type needed for lowering inline assembly
operands which materialize a sequence of eight general purpose registers.

Differential Revision: https://reviews.llvm.org/D94096
The file was modifiedllvm/include/llvm/Support/MachineValueType.h
The file was modifiedllvm/lib/CodeGen/ValueTypes.cpp
The file was modifiedllvm/include/llvm/CodeGen/ValueTypes.td
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
Commit 7d940432c46be83b8fcb5dbefee439585fa820cd by alexandros.lamprineas
[AArch64] Legalize MVT::i64x8 in DAG isel lowering

This patch legalizes the Machine Value Type introduced in D94096 for loads
and stores. A new target hook named getAsmOperandValueType() is added which
maps i512 to MVT::i64x8. GlobalISel falls back to DAG for legalization.

Differential Revision: https://reviews.llvm.org/D94097
The file was modifiedllvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/ls64-inline-asm.ll