FailedChanges

Summary

  1. [Orc][examples] Adopt ExecutorProcessControl API and re-enable LLJITWithRemoteDebugging (details)
  2. [DAGCombiner] don't try to partially reduce add-with-overflow ops (details)
  3. [lldb] Assert filecache and live memory match on debug under a setting (details)
  4. [libomptarget][amdgpu] Update printed plugin name (details)
  5. Set TargetCPUName for AIX to default to pwr7. (details)
  6. [ELF] Add two new tests showing broken .tbss alignment if first in PT_TLS (details)
  7. [ELF] Align the first section of a PT_TLS even if its type is SHT_NOBITS (details)
  8. [CodeGen] Remove getPseudoProbeAttribute and addPseudoProbeAttribute (NFC) (details)
  9. [DWARF5] Only fallback to manual index if no entry was found (details)
  10. [libc] rewrite aarch64 memcmp implementation (details)
  11. tsan: add another test for atomics (details)
  12. [PowerPC] Fix return type of XL compat CAS (details)
  13. Revert "[LoopFlatten] Fix missed LoopFlatten opportunity" (details)
  14. tsan: add intrusive doubly-linked list (details)
  15. [lld-macho] Support common symbols in bitcode (but differently from ld64) (details)
  16. [lld-macho][nfc] Simplify common-symbol-coalescing test (details)
  17. tsan: restore Initialize call in Java entry points (details)
  18. tsan: s/CHECK/DCHECK/ in tsan_interface_java.cpp (details)
  19. tsan: introduce LazyInitialize (details)
  20. [mlir][linalg] Format bufferization debug print outs (NFC). (details)
  21. Add an escape-hatch for conversion of funcs with blocking awaits to coroutines. (details)
  22. Handle subregs and superregs in callee-saved register mask (details)
  23. [OpenMP][Tools][Tests][NFC] Address flaky archer tests (details)
  24. [clang][patch][FPEnv] Make initialization of C++ globals strictfp aware (details)
Commit 058935145d6b0c600c35e8b83fa150896c725f8d by Stefan Gränitz
[Orc][examples] Adopt ExecutorProcessControl API and re-enable LLJITWithRemoteDebugging

The API change originated from D104694. The LLJITWithRemoteDebugging example and the test for it were disabled while it was in the works.
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/CMakeLists.txt
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/LLJITWithRemoteDebugging.cpp
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
The file was modifiedllvm/test/Examples/OrcV2Examples/lljit-with-remote-debugging.test
The file was modifiedllvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.h
The file was modifiedllvm/test/Examples/lit.local.cfg
Commit fa6b2c9915ba27e1e97f8901ea4aa877f331fb9f by spatel
[DAGCombiner] don't try to partially reduce add-with-overflow ops

This transform was added with D58874, but there were no tests for overflow ops.
We need to change this one way or another because it can crash as shown in:
https://llvm.org/PR51238

Note that if there are no uses of an overflow op's bool overflow result, we
reduce it to a regular math op, so we continue to fold that case either way.
If we have uses of both the math and the overflow bool, then we are likely
not saving anything by creating an independent sub instruction as seen in
the test diffs here.

This patch makes the behavior in SDAG consistent with what we do in
instcombine AFAICT.

Differential Revision: https://reviews.llvm.org/D106983
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-add.ll
The file was modifiedllvm/test/CodeGen/AArch64/addsub.ll
Commit 77e9d10f0fbfe04a14e6ce61753376dd78e0c2f0 by augusto2112
[lldb] Assert filecache and live memory match on debug under a setting
The file was modifiedlldb/source/Target/TargetProperties.td
The file was modifiedlldb/test/Shell/lit-lldb-init.in
The file was modifiedlldb/source/Core/Section.cpp
The file was modifiedlldb/include/lldb/Target/Target.h
The file was modifiedlldb/source/Target/Target.cpp
The file was modifiedlldb/include/lldb/Core/Section.h
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py
Commit a90da62adb212a5c2ac957de25a4b98e7694588d by jonathanchesterfield
[libomptarget][amdgpu] Update printed plugin name
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/dynamic_hsa/hsa.cpp
Commit c3c1826c310c42244c7cad8d0c6af3a368fcd064 by schmeise
Set TargetCPUName for AIX to default to pwr7.

Summary:
Set the TargetCPUName for AIX to default to pwr7, removing the setting
of it based on the major/minor of the OS version, which previously
set it to pwr4 for AIX 7.1 and earlier. The old code would also set it to
pwr4 when the OS version was not specified and with the change, it will
default it to pwr7 in all cases.

Author: Jamie Schmeiser <schmeise@ca.ibm.com>
Reviewed By:hubert.reinterpretcast (Hubert Tong)
Differential Revision: https://reviews.llvm.org/D107063
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
The file was modifiedclang/test/Driver/aix-mcpu-default.c
Commit b96bb7899fe319278ad7809f3c647b944bc00c6c by jrtc27
[ELF] Add two new tests showing broken .tbss alignment if first in PT_TLS

This is a similar problem to D66658, where we are too aggressive in not
aligning NOBITS sections, and the tests are based on the ones added for
that fix. If a .tbss section is first in a PT_TLS segment (i.e. there is
no .tdata section) then, although it doesn't need to be aligned such
that address and offset are congruent modulo the page size, they do need
to be congruent modulo the segment alignment, otherwise the whole PT_TLS
will be unaligned.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D106986
The file was addedlld/test/ELF/linkerscript/tls-nobits-offset.s
The file was addedlld/test/ELF/tls-nobits-offset.s
Commit cfaa5bf4ce62266897d27c8c0f3474e555ab87e5 by jrtc27
[ELF] Align the first section of a PT_TLS even if its type is SHT_NOBITS

This is somewhat of a repeat of D66658 but for sections in PT_TLS
segments. Although such sections don't need to be aligned such that
address and offset are congruent modulo the page size, they do need
to be congruent modulo the segment alignment, otherwise the
whole PT_TLS will be unaligned. We therefore use the normal calculation
to determine the section's address within the PT_LOAD rather than
bailing out early due to being SHT_NOBITS.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D106987
The file was modifiedlld/ELF/Writer.cpp
The file was modifiedlld/test/ELF/linkerscript/tls-nobits-offset.s
The file was modifiedlld/test/ELF/tls-nobits-offset.s
Commit 416f3ff8038c24ebfe4dd4c1708c4c4fee41a083 by kazu
[CodeGen] Remove getPseudoProbeAttribute and addPseudoProbeAttribute (NFC)

The last uses of these functions were removed on Jun 17, 2021 in
commit bd52495518808bdbf24f4d8e9e20774d6d2e3333.
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h
Commit 2e9853e0e9ff263a948ebef70221fd0cec9c4830 by jan.kratochvil
[DWARF5] Only fallback to manual index if no entry was found

If we succeed at gathering global variables for a compile
unit, there is no need to fallback to generating a manual index.

Reviewed By: jankratochvil

Differential Revision: https://reviews.llvm.org/D106355
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DebugNamesDWARFIndex.cpp
Commit cd2f5d5b496d43924c27e22f8abd9cff9266d028 by gchatelet
[libc] rewrite aarch64 memcmp implementation

This patch is simply rearranging the code layout so it's easier to understand.

Differential Revision: https://reviews.llvm.org/D106641
The file was modifiedlibc/src/string/aarch64/memcmp.cpp
The file was modifiedlibc/src/string/memory_utils/elements.h
Commit 5697841f66cee81ef58a0d7cb22e5820206c24c6 by dvyukov
tsan: add another test for atomics

Add a test where atomic-release happens while
another thread spins calling load-acquire.
This can expose some interesting interleavings
of release and acquire.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107055
The file was addedcompiler-rt/test/tsan/atomic_norace2.cpp
Commit e4902e69e99d07d6d311425d87d4c1d075b72bf8 by lkail
[PowerPC] Fix return type of XL compat CAS

`__compare_and_swap*` should return `i32` rather than `i1`.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D107077
The file was modifiedclang/test/CodeGen/builtins-ppc-xlcompat-cas.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit fab5659c79410f50b38b2986f3dc8412f3ad9a81 by rosie.sumpter
Revert "[LoopFlatten] Fix missed LoopFlatten opportunity"

This reverts commit 2df8bf9339e43de63d8d28e07182e1d6d7ffb843.

Reverting because it causes an assertion failure.
The file was modifiedllvm/test/Transforms/LoopFlatten/loop-flatten-negative.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopFlatten.cpp
The file was modifiedllvm/test/Transforms/LoopFlatten/loop-flatten.ll
Commit f821a55c5e7847edd0b3bf70543b318d6bcbcd0a by dvyukov
tsan: add intrusive doubly-linked list

Add intrusive doubly-linked list container template, IList.
It will be used in the new tsan runtime.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107050
The file was modifiedcompiler-rt/lib/tsan/CMakeLists.txt
The file was addedcompiler-rt/lib/tsan/rtl/tsan_ilist.h
The file was addedcompiler-rt/lib/tsan/tests/unit/tsan_ilist_test.cpp
The file was modifiedcompiler-rt/lib/tsan/tests/unit/CMakeLists.txt
Commit e49374f9e0c02dae575f26f969677534b94eac3d by jezng
[lld-macho] Support common symbols in bitcode (but differently from ld64)

ld64 seems to handle common symbols in bitcode rather
bizarrely. They follow entirely different precedence rules from their
non-bitcode counterparts. I initially tried to emulate ld64 in D106597,
but I'm not sure the extra complexity is worth it, especially given that
common symbols are not, well, very common.

This diff accords common bitcode symbols the same precedence as regular
common symbols, just as we treat all other pairs of bitcode and
non-bitcode symbol types. The tests document ld64's behavior in detail,
just in case we want to revisit this.

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D107027
The file was addedlld/test/MachO/lto-common-symbol-resolution.ll
The file was addedlld/test/MachO/lto-common-symbol-coalescing.ll
The file was modifiedlld/MachO/InputFiles.cpp
Commit a26bb9cc056c7ef97247e1a55d3cd71c7d4fb7d6 by jezng
[lld-macho][nfc] Simplify common-symbol-coalescing test
The file was modifiedlld/test/MachO/common-symbol-coalescing.s
Commit 0bc10d9a8ed072c280ec07cd814671dae887a943 by dvyukov
tsan: restore Initialize call in Java entry points

We used to call Initialize in every Java point.
That was removed in 6563bb53b5 ("tsan: don't use caller/current PC in Java interfaces").
The intention was to add a single Initialize to __tsan_java_init instead.
Do that.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107069
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_java.cpp
Commit 17f650cb0078a85ec8e0d69116cf9140aca7323a by dvyukov
tsan: s/CHECK/DCHECK/ in tsan_interface_java.cpp

We are very paranoid with CHECKs in all Java entry points.
These CHECKs were added along with Java support.
At that point it wasn't clear what exactly to expect from JVM part
and if JVM part is correct or not. Thus CHECK paranoia.
These CHECKs never fired in practice, but we pay runtime cost
in every entry point all the time.
Replace CHECKs with DCHECKs.

Depends on D107069.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107071
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interface_java.cpp
Commit 9e9599ef782384847e734dfdb89d34a4bb8c6710 by dvyukov
tsan: introduce LazyInitialize

We call non-inlinable Initialize from all interceptors/syscalls,
but most of the time runtime is already initialized and this just
introduces unnecessary overhead.
Add LazyInitialize that (1) inlinable, (2) does nothing if
.preinit_array is enabled (expected case on Linux).

Depends on D107071.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D107072
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.cpp
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_rtl.h
Commit 2a342c7c1ee18817a5f8bb4d32cfc4bce6f9aecd by gysit
[mlir][linalg] Format bufferization debug print outs (NFC).

Change the formatting of the debug print outs to elide unnecessary information.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D106661
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
Commit 9a5bc83660ed6978521dcfa4faac140cf5b2e895 by ezhulenev
Add an escape-hatch for conversion of funcs with blocking awaits to coroutines.

Currently TFRT does not support top-level coroutines, so this functionality will allow to have a single blocking await at the top level until TFRT implements the necessary functionality.

Reviewed By: ezhulenev

Differential Revision: https://reviews.llvm.org/D106730
The file was modifiedmlir/include/mlir/Dialect/Async/Passes.td
The file was modifiedmlir/lib/Dialect/Async/IR/Async.cpp
The file was modifiedmlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
The file was modifiedmlir/test/Dialect/Async/async-to-async-runtime-eliminate-blocking.mlir
The file was modifiedmlir/include/mlir/Dialect/Async/IR/AsyncDialect.td
Commit 95ef464ac9d1972953709c57449ac178771cd221 by jrtc27
Handle subregs and superregs in callee-saved register mask

If a target lists both a subreg and a superreg in a callee-saved
register mask, the prolog will spill both aliasing registers. Instead,
don't spill the subreg if a superreg is being spilled. This case is hit by the
PowerPC SPE code, as well as a modified RISC-V backend for CHERI I maintain out
of tree.

Reviewed By: jhibbits

Differential Revision: https://reviews.llvm.org/D73170
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict.ll
The file was modifiedllvm/test/CodeGen/PowerPC/spe.ll
The file was modifiedllvm/lib/CodeGen/PrologEpilogInserter.cpp
Commit 4acc2f29a278ff2a0a4d683dd6d706cc2f7123fd by protze
[OpenMP][Tools][Tests][NFC] Address flaky archer tests

Adding more concurrent threads significantly increases the
chance that the data race can be observed during testing.
The file was modifiedopenmp/tools/archer/tests/races/task-taskwait-nested.c
The file was modifiedopenmp/tools/archer/tests/races/critical-unrelated.c
The file was modifiedopenmp/tools/archer/tests/races/task-two.c
The file was modifiedopenmp/tools/archer/tests/races/lock-nested-unrelated.c
The file was modifiedopenmp/tools/archer/tests/races/lock-unrelated.c
The file was modifiedopenmp/tools/archer/tests/races/task-dependency.c
The file was modifiedopenmp/tools/archer/tests/races/parallel-simple.c
The file was modifiedopenmp/tools/archer/tests/races/task-taskgroup-unrelated.c
Commit bc5b5ea037dbadd281c59248ae9d2742b51c69ed by melanie.blower
[clang][patch][FPEnv] Make initialization of C++ globals strictfp aware

@kpn pointed out that the global variable initialization functions didn't
have the "strictfp" metadata set correctly, and @rjmccall said that there
was buggy code in SetFPModel and StartFunction, this patch is to solve
those problems. When Sema creates a FunctionDecl, it sets the
FunctionDeclBits.UsesFPIntrin to "true" if the lexical FP settings
(i.e. a combination of command line options and #pragma float_control
settings) correspond to ConstrainedFP mode. That bit is used when CodeGen
starts codegen for a llvm function, and it translates into the
"strictfp" function attribute. See bugs.llvm.org/show_bug.cgi?id=44571

Reviewed By: Aaron Ballman

Differential Revision: https://reviews.llvm.org/D102343
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/test/CodeGen/fp-floatcontrol-class.cpp
The file was modifiedclang/lib/CodeGen/CGObjC.cpp
The file was modifiedclang/include/clang/AST/DeclCXX.h
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was modifiedclang/lib/Sema/SemaDeclCXX.cpp
The file was modifiedclang/test/CodeGen/fp-floatcontrol-stack.cpp
The file was modifiedclang/unittests/Sema/ExternalSemaSourceTest.cpp
The file was modifiedclang/lib/CodeGen/CodeGenFunction.cpp
The file was modifiedclang/lib/Sema/SemaLambda.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/lib/AST/DeclCXX.cpp
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/lib/CodeGen/CodeGenFunction.h
The file was modifiedclang/lib/Sema/SemaLookup.cpp
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/include/clang/AST/Decl.h
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp