1. [SVE][LSR] Teach LSR to enable simple scaled-index addressing mode generation for SVE. (details)
  2. Allow signposts to take advantage of deferred string substitution (details)
  3. Remove redundant environment variable XLA_FLAGS. (details)
  4. [compiler-rt][hwasan] Add newline between record_addr lines on frame record dumps (details)
  5. [mlir:OpFormatGen] Add Support for `$_ctxt` in the transformer. (details)
  6. [NFC][sanitizer] clang-format some code (details)
  7. [PowerPC] Export 16 byte load-store instructions (details)
  8. [lld][MachO] Add support for LC_DATA_IN_CODE (details)
  9. [libc++][ci] Enable modules in the Runtimes build (details)
  10. Do not merge LocalInstantiationScope for template specialization (details)
Commit 1c096bf09ffd3d51665b60942d6bde19e7dbbd5a by huihuiz
[SVE][LSR] Teach LSR to enable simple scaled-index addressing mode generation for SVE.

Currently, Loop strengh reduce is not handling loops with scalable stride very well.

Take loop vectorized with scalable vector type <vscale x 8 x i16> for instance,
(refer to test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll added).

Memory accesses are incremented by "16*vscale", while induction variable is incremented
by "8*vscale". The scaling factor "2" needs to be extracted to build candidate formula
i.e., "reg(%in) + 2*reg({0,+,(8 * %vscale)}". So that addrec register reg({0,+,(8*vscale)})
can be reused among Address and ICmpZero LSRUses to enable optimal solution selection.

This patch allow LSR getExactSDiv to recognize special cases like "C1*X*Y /s C2*X*Y",
and pull out "C1 /s C2" as scaling factor whenever possible. Without this change, LSR
is missing candidate formula with proper scaled factor to leverage target scaled-index
addressing mode.

Note: This patch doesn't fully fix AArch64 isLegalAddressingMode for scalable
vector. But allow simple valid scale to pass through.

Reviewed By: sdesmalen

Differential Revision:
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-lsr-scaled-index-addressing-mode.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fold-vscale.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 035217ff515b8ecdc871e39fa840f3cba1b9cec7 by Adrian Prantl
Allow signposts to take advantage of deferred string substitution

One nice feature of the os_signpost API is that format string
substitutions happen in the consumer, not the logging
application. LLVM's current Signpost class doesn't take advantage of
this though and instead always uses a static "Begin/End %s" format

This patch uses variadic macros to allow the API to be used as
intended. Unfortunately, the primary use-case I had in mind (the
LLDB_SCOPED_TIMER() macro) does not get much better from this, because
__PRETTY_FUNCTION__ is *not* a macro, but a static string, so
signposts created by LLDB_SCOPED_TIMER() still use a static "%s"
format string. At least LLDB_SCOPED_TIMERF() works as intended.

This reapplies the previously reverted patch with additional include
order fixes for non-modular builds of LLDB.

Differential Revision:
The file was modifiedlldb/source/Utility/Timer.cpp
The file was modifiedllvm/include/llvm/Support/Signposts.h
The file was modifiedllvm/lib/Support/Signposts.cpp
The file was modifiedlldb/include/lldb/Utility/Timer.h
The file was modifiedllvm/lib/Support/Timer.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
The file was modifiedlldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
Commit 6c848c28c2f495f97a8fce879bd0624d61272d24 by jacobhegna
Remove redundant environment variable XLA_FLAGS.

If the flag is not set, the script in tensorflow will
default it to the correct value. However, in TF 2.5, the way the value is set in
TensorFlowCompile.cmake file triggers a build error.

Reviewed By: mtrofin

Differential Revision:
The file was modifiedllvm/cmake/modules/TensorFlowCompile.cmake
Commit 312011899ac3c48a77f4c5a069000f8aa93a8873 by leonardchan
[compiler-rt][hwasan] Add newline between record_addr lines on frame record dumps

If SymbolizePC failes, it's possible for the newline to not be emitted.

Differential Revision:
The file was modifiedcompiler-rt/lib/hwasan/hwasan_report.cpp
Commit 853a614864754cd4b000f03a7ab8fbba103d6177 by silvasean
[mlir:OpFormatGen] Add Support for `$_ctxt` in the transformer.

This is useful for "build tuple" type ops. In my case, in npcomp, I have
an op:

// Result type is `!torch.tuple<!torch.tensor, !torch.tensor>`.
torch.prim.TupleConstruct %0, %1 : !torch.tensor, !torch.tensor

and the context is required for the `Torch::TupleType::get` call (for
the case of an empty tuple).

The handling of these FmtContext's in the code is pretty ad-hoc -- I didn't
attempt to rationalize it and just made a targeted fix. As someone
unfamiliar with the code I had a hard time seeing how to more broadly fix
the situation.

Differential Revision:
The file was modifiedmlir/test/lib/Dialect/Test/
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/tools/mlir-tblgen/OpFormatGen.cpp
The file was modifiedmlir/test/mlir-tblgen/op-format.mlir
Commit b8919fb0eac15d13c5f56d3d30ce378a588dd78c by Vitaly Buka
[NFC][sanitizer] clang-format some code
The file was modifiedcompiler-rt/lib/asan/asan_rtl.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
The file was modifiedcompiler-rt/lib/asan/asan_internal.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_stacktrace.h
The file was modifiedcompiler-rt/lib/interception/interception.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_errno.h
The file was modifiedcompiler-rt/lib/asan/asan_poisoning.cpp
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
The file was modifiedcompiler-rt/lib/asan/asan_interceptors.cpp
The file was modifiedcompiler-rt/lib/asan/asan_malloc_linux.cpp
The file was modifiedcompiler-rt/lib/asan/asan_shadow_setup.cpp
The file was modifiedcompiler-rt/lib/asan/asan_mapping_myriad.h
The file was modifiedcompiler-rt/lib/asan/asan_new_delete.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_symbolizer_markup.cpp
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
The file was modifiedcompiler-rt/lib/asan/asan_mapping.h
The file was modifiedcompiler-rt/lib/ubsan/ubsan_platform.h
Commit 1c450c3d7ec01d9daaf9f2651da93b01e7790ffd by lkail
[PowerPC] Export 16 byte load-store instructions

Export `lq`, `stq`, `lqarx` and `stqcx.` in preparation for implementing 16-byte lock free atomic operations on AIX.
Add a new register class `g8prc` for these instructions, since these instructions require even-odd register pair.

Reviewed By: nemanjai, jsji, #powerpc

Differential Revision:
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
The file was modifiedllvm/test/MC/PowerPC/ppc64-encoding-bookII.s
The file was modifiedllvm/lib/Target/PowerPC/
The file was modifiedllvm/test/MC/PowerPC/ppc64-encoding.s
The file was modifiedllvm/lib/Target/PowerPC/
The file was modifiedllvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
The file was modifiedllvm/lib/Target/PowerPC/
The file was modifiedllvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
The file was modifiedllvm/lib/Target/PowerPC/
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was addedllvm/test/CodeGen/PowerPC/ldst-16-byte.mir
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.h
The file was addedllvm/test/CodeGen/PowerPC/ldst-16-byte-asm.mir
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding-bookII.txt
The file was modifiedllvm/test/MC/Disassembler/PowerPC/ppc64-encoding.txt
The file was modifiedllvm/lib/Target/PowerPC/
Commit 928394d10918c97880ef36e4e9853888b0d55207 by alexshap
[lld][MachO] Add support for LC_DATA_IN_CODE

Add first bits for emitting LC_DATA_IN_CODE.

Test plan: make check-lld-macho

Differential revision:
The file was modifiedlld/MachO/SyntheticSections.h
The file was modifiedlld/MachO/Writer.cpp
The file was modifiedlld/MachO/InputSection.h
The file was modifiedlld/test/MachO/local-got.s
The file was modifiedlld/MachO/InputFiles.cpp
The file was addedlld/test/MachO/data-in-code.s
The file was modifiedlld/MachO/InputFiles.h
The file was modifiedlld/MachO/SyntheticSections.cpp
The file was modifiedlld/test/MachO/headerpad.s
Commit 1b87573aaf8ad6a0e1edaac7ab7b34a28f8f41bb by Louis Dionne
[libc++][ci] Enable modules in the Runtimes build

The runtimes build has assertions enabled, which is necessary to catch
some of the modules-related issues we've been seeing recently. This
patch enables testing with modules in the runtimes build so as to cover
those cases.

In the future, a better solution would be to systematically use versions
of Clang that have assertions enabled. However, the Clangs we release
currently don't have assertions enabled by default, which causes a
challenge for the CI (we could try to build our own Clang from ToT with
assertions in the CI, but that poses some problems).

Differential Revision:
The file was modifiedlibcxx/utils/ci/run-buildbot
Commit 79f9cfbc21e02555258523ea77c3dd389891cfb3 by Yaxun.Liu
Do not merge LocalInstantiationScope for template specialization

A lambda in a function template may be recursively instantiated. The recursive
lambda will cause a lambda function instantiated multiple times, one inside another.
The inner LocalInstantiationScope should not be marked as MergeWithParentScope
since it already has references to locals properly substituted, otherwise it causes
assertion due to the check for duplicate locals in merged LocalInstantiationScope.

Reviewed by: Richard Smith

Differential Revision:
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was addedclang/test/SemaCXX/recursive-lambda.cpp