SuccessChanges

Summary

  1. [PowerPC] Removed `-DLLVM_ENABLE_PROJECTS=flang` from PowerPC flang buildbot (details)
Commit 4adb6aa495ee9484d7f2e15c93e7685bdc603cc7 by albionapc
[PowerPC] Removed `-DLLVM_ENABLE_PROJECTS=flang` from PowerPC flang buildbot

With `FLANG_NEW_DRIVER` default to on now, it is necessary to remove this
option for the bot to be able to build again.

Differential Revision: https://reviews.llvm.org/D102626
The file was modifiedbuildbot/osuosl/master/config/builders.py (diff)

Summary

  1. [LV] Add -scalable-vectorization=<option> flag. (details)
  2. MachineBasicBlock: add liveout iterator aware of which liveins are defined by the runtime. (details)
  3. Reformat GSYMCreator.cpp (details)
  4. Avoid calculating the string hash twice in GsymCreator::insertString. (details)
  5. Move FunctionInfo in addFunctionInfo rather than copying. (details)
  6. Use a non-recursive mutex in GsymCreator. (details)
  7. [X86] Limit X86InterleavedAccessGroup to handle the same type case only (details)
  8. [analyzer] Check the checker name, rather than the ProgramPointTag when silencing a checker (details)
  9. [x86] Fix FMF propagation test (details)
  10. tsan: mark sigwait as blocking (details)
  11. [NFC][SimplifyCFG] removeEmptyCleanup(): use BasicBlock::phis() (details)
  12. [NFCI][SimplifyCFG] removeEmptyCleanup(): streamline PHI node updating (details)
  13. [NFCI][SimplifyCFG] removeEmptyCleanup(): use DeleteDeadBlock() (details)
  14. [HIP] Tighten checks in hip-include-path.hip test case (details)
  15. [X86] Remove copy + paste typos in AtomWriteResPair comment. (details)
  16. [X86] Atom (pre-SLM) doesn't support PTEST instructions (details)
  17. [clang] Fix a crash on CheckArgAlignment. (details)
  18. Reapply "[clang][deps] Support inferred modules" (details)
  19. [SDAG] propagate FMF from target-specific IR intrinsics (details)
  20. [ARM][NEON] Combine base address updates for vst1x intrinsics (details)
Commit 4f86aa650c40196754df22c421d551d129c9149a by sander.desmalen
[LV] Add -scalable-vectorization=<option> flag.

This patch adds a new option to the LoopVectorizer to control how
scalable vectors can be used.

Initially, this suggests three levels to control scalable
vectorization, although other more aggressive options can be added in
the future.

The possible options are:
- Disabled:   Disables vectorization with scalable vectors.
- Enabled:    Vectorize loops using scalable vectors or fixed-width
              vectors, but favors fixed-width vectors when the cost
              is a tie.
- Preferred:  Like 'Enabled', but favoring scalable vectors when the
              cost-model is inconclusive.

Reviewed By: paulwalker-arm, vkmr

Differential Revision: https://reviews.llvm.org/D101945
The file was modifiedllvm/test/Transforms/LoopVectorize/metadata-width.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-scalable.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/scalable-vf-hint.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-analysis.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-large-strides.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-masked-loadstore.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/RISCV/scalable-vf-hint.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/scalable-loop-unpredicated-body-scalar-tail.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/eliminate-tail-predication.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/scalable-reduction-inloop.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
The file was modifiedllvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-extract-last-veclane.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-type-conv.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/masked-op-cost.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
Commit c1dc267258e06bb69e1ca217d1d8ce2d15b8757f by Tim Northover
MachineBasicBlock: add liveout iterator aware of which liveins are defined by the runtime.

Using this in RegAlloc fast reduces register pressure, and in some cases allows
x86 code to compile that wouldn't before.
The file was addedllvm/test/CodeGen/X86/regalloc-tight-invoke.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/RegAllocFast.cpp
The file was modifiedllvm/test/CodeGen/X86/fast-isel-cmp-branch.ll
The file was modifiedllvm/lib/CodeGen/MachineBasicBlock.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineBasicBlock.h
Commit e102fd50f9c62ffe2d0fe04827d0a8b85250118f by simon.giesecke
Reformat GSYMCreator.cpp

Differential Revision: https://reviews.llvm.org/D102483
The file was modifiedllvm/lib/DebugInfo/GSYM/GsymCreator.cpp
Commit f29c4c60978c41914fadb064eec46086e66f07c0 by simon.giesecke
Avoid calculating the string hash twice in GsymCreator::insertString.

Do the single hash calculation before acquiring the lock, to reduce
lock contention. If Copy is true, and the string was not yet contained
in the StringStorage, use the new address from StringStorage, but
reuse the hash we already calculated.

Differential Revision: https://reviews.llvm.org/D102484
The file was modifiedllvm/lib/DebugInfo/GSYM/GsymCreator.cpp
Commit 4ea4d9c066b6e6f24756538d3d366d559499be3d by simon.giesecke
Move FunctionInfo in addFunctionInfo rather than copying.

Differential Revision: https://reviews.llvm.org/D102485
The file was modifiedllvm/lib/DebugInfo/GSYM/GsymCreator.cpp
Commit 81b2fcf26fcaff1dfc7fcc30eb0de79d643e85e6 by simon.giesecke
Use a non-recursive mutex in GsymCreator.

There doesn't seem to be a need to support recursive locking,
and a recursive mutex is unnecessarily inefficient.

Differential Revision: https://reviews.llvm.org/D102486
The file was modifiedllvm/include/llvm/DebugInfo/GSYM/GsymCreator.h
The file was modifiedllvm/lib/DebugInfo/GSYM/GsymCreator.cpp
Commit ca23a38e373142a18ab56700ba4f3b947bfe9db0 by pengfei.wang
[X86] Limit X86InterleavedAccessGroup to handle the same type case only

The current implementation assumes the destination type of shuffle is the same as the decomposed ones. Add the check to avoid crush when the condition is not satisfied.

This fixes PR37616.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D102751
The file was modifiedllvm/test/CodeGen/X86/x86-interleaved-access.ll
The file was modifiedllvm/lib/Target/X86/X86InterleavedAccess.cpp
Commit 479ea2a8ed95544d2f5aaede34bfe5c298ae8bdb by dkszelethus
[analyzer] Check the checker name, rather than the ProgramPointTag when silencing a checker

The program point created by the checker, even if it is an error node,
might not be the same as the name under which the report is emitted.
Make sure we're checking the name of the checker, because thats what
we're silencing after all.

Differential Revision: https://reviews.llvm.org/D102683
The file was modifiedclang/lib/StaticAnalyzer/Core/BugReporter.cpp
The file was modifiedclang/test/Analysis/malloc.cpp
The file was addedclang/test/Analysis/silence-checkers-malloc.cpp
Commit 1230b4cee18705068fda0efdac8f2c0304987fe5 by frgossen
[x86] Fix FMF propagation test
The file was modifiedllvm/test/CodeGen/X86/fmf-propagation.ll
Commit c1eaa1168a9000eac587e55d7f171df813c5340b by dvyukov
tsan: mark sigwait as blocking

Add a test case reported in:
https://github.com/google/sanitizers/issues/1401
and fix it.
The code assumes sigwait will process other signals.

Reviewed By: vitalybuka

Differential Revision: https://reviews.llvm.org/D102057
The file was addedcompiler-rt/test/tsan/signal_block2.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
Commit a0be08164622bf938855ff5d19dd8e9d0c96b9b3 by lebedev.ri
[NFC][SimplifyCFG] removeEmptyCleanup(): use BasicBlock::phis()
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit bb5d613aba347c3ab3fcbf1507c22d2301f5b47d by lebedev.ri
[NFCI][SimplifyCFG] removeEmptyCleanup(): streamline PHI node updating
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 8c2b535d6c38d1a54c5a23301325112f00a341f7 by lebedev.ri
[NFCI][SimplifyCFG] removeEmptyCleanup(): use DeleteDeadBlock()

This required some changes to, instead of eagerly making PHI's
in the UnwindDest valid as-if the BB is already not a predecessor,
to be valid while BB is still a predecessor.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 722c39fef5ab611b3196e964bb3177a5ab473355 by bjorn.a.pettersson
[HIP] Tighten checks in hip-include-path.hip test case

The checks (both positive and negative checks) in the test case
hip-include-path.hip could mistakenly end up matching the string
"clang" from the InstalledDir in case the build dir for example
was named "/home/username/build-clang/". Intention with this
patch is to tighten up the checks a bit to filter our the
part of the paths that match with InstalledDir when doing the
checks, as well as matching "/lib/clang/" rather than
just "clang/".

Problem was found when building with
  -DCLANG_DEFAULT_RTLIB=compiler-rt
  -DCLANG_DEFAULT_CXX_STDLIB=libc++
and having "clang/" in the path to the build dir.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D102723
The file was modifiedclang/test/Driver/hip-include-path.hip
Commit 8c717920d852795447ab14f5d321719b5fa68c56 by llvm-dev
[X86] Remove copy + paste typos in AtomWriteResPair comment.

Remnants from when the Atom model was copied from the Btver2 model.....
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
Commit 222314d8b0cd662b449cf4f1424e93dadcf4cf70 by llvm-dev
[X86] Atom (pre-SLM) doesn't support PTEST instructions
The file was modifiedllvm/lib/Target/X86/X86ScheduleAtom.td
Commit f5b5426433c9e6c24615ef1286d72c527b0b15dd by hokein.wu
[clang] Fix a crash on CheckArgAlignment.

We might encounter an undeduced type before calling getTypeAlignInChars.

NOTE: this retrieves the fix from
8f80c66bd2982788a8eede4419684ca72f48b9a2, which was removed in Adam's
followup fix fbfcfdbf6828b8d36f4ec0ff5f4eac11fb1411a5. We originally
thought the crash was caused by recovery-ast, but it turns out it can
occur for other cases, e.g. typo-correction.

Differential Revision: https://reviews.llvm.org/D102750
The file was modifiedclang/lib/Sema/SemaChecking.cpp
The file was modifiedclang/test/SemaCXX/typo-correction-crash.cpp
Commit c98833cdaad01787ea70ecdfabb05a7e142a6671 by Jan Svoboda
Reapply "[clang][deps] Support inferred modules"

This reapplies commit 95033eb3 that reverted commit 1d9e8e13.

The tests were failing on Windows due to spaces and backslashes in paths not being handled carefully.
The file was modifiedclang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
The file was addedclang/test/ClangScanDeps/modules-inferred.m
The file was addedclang/test/ClangScanDeps/Inputs/frameworks/System.framework/Headers/System.h
The file was addedclang/test/ClangScanDeps/Inputs/frameworks/System.framework/Modules/module.modulemap
The file was addedclang/test/ClangScanDeps/Inputs/modules_inferred_cdb.json
The file was addedclang/test/ClangScanDeps/Inputs/frameworks/module.modulemap
The file was addedclang/test/ClangScanDeps/Inputs/frameworks/Inferred.framework/Headers/Inferred.h
The file was addedclang/test/ClangScanDeps/Inputs/frameworks/Inferred.framework/Frameworks/Sub.framework/Headers/Sub.h
The file was modifiedclang/test/ClangScanDeps/modules-full.cpp
The file was addedclang/test/ClangScanDeps/modules-inferred-explicit-build.m
The file was addedclang/utils/module-deps-to-rsp.py
Commit 6025663578cd367b6f1bcba3f42076eee4fce7a2 by spatel
[SDAG] propagate FMF from target-specific IR intrinsics

This is a step towards relying more on node-level FMF rather than function-wide
or target settings.
I think it was just an oversight that we didn't get this path in D87361
or follow-on patches.

The lack of FMF propagation is blocking D90901 from converting tests to IR-level FMF.

We can't do much more than this currently because we also fail to propagate flags
from x86-specific node to generic FMA node. That would be another patch, so the
test just verifies that we can transfer from IR to initial SDAG node.

Differential Revision: https://reviews.llvm.org/D102725
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/test/CodeGen/X86/fmf-propagation.ll
Commit d59a2a32b942ffb0decef5370eec98b8eba99c11 by kbessonova
[ARM][NEON] Combine base address updates for vst1x intrinsics

Differential Revision: https://reviews.llvm.org/D102256
The file was modifiedllvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.h
The file was modifiedllvm/test/CodeGen/ARM/arm-vst1.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrNEON.td
The file was modifiedllvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp