SuccessChanges

Summary

  1. [Test] Add test for unreachable backedge with duplicating predecessors (details)
  2. [LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration (details)
  3. [JITLink] Suppress expect-death test in release mode. (details)
  4. [RISCV] Optimize xor/or with immediate in the zbs extension (details)
  5. [analyzer][ctu] Avoid parsing invocation list again and again during on-demand parsing of CTU (details)
  6. Revert "[analyzer][ctu] Avoid parsing invocation list again and again during on-demand parsing of CTU" (details)
  7. [GlobalISel] Fix MachineIRBuilder not using the DstOp argument for G_SHUFFLE_VECTOR. (details)
  8. [analyzer][ctu] Reland "Avoid parsing invocation list again and again.. (details)
  9. [libomptarget][nfc] Accept callable for hsa iterate_symbols (details)
  10. [TRE] Reland: allow TRE for non-capturing calls. (details)
  11. [mlir] Check only last dim stride in transfer op lowering (details)
  12. [clang][ARM] Remove non-existent arm1136jz-s CPU (details)
  13. [GlobalISel] Silence unused variable warning in Release builds. NFC. (details)
  14. [llvm][ARM] Remove non-existent arm1176j-s CPU (details)
  15. [clang][ARM] Remove non-existent arm9312 CPU (details)
Commit ce245246043d3c4f12515b2c773ed6c9174345b5 by mkazantsev
[Test] Add test for unreachable backedge with duplicating predecessors
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
Commit 2531fd70d19aa5d61feb533bbdeee7717a4129eb by mkazantsev
[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration

This patch handles one particular case of one-iteration loops for which SCEV
cannot straightforwardly prove BECount = 1. The idea of the optimization is to
symbolically execute conditional branches on the 1st iteration, moving in topoligical
order, and only visiting blocks that may be reached on the first iteration. If we find out
that we never reach header via the latch, then the backedge can be broken.

Differential Revision: https://reviews.llvm.org/D102615
Reviewed By: reames
The file was modifiedllvm/test/Transforms/LoopDeletion/noop-loops-with-subloops.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
The file was modifiedllvm/test/Transforms/LoopDeletion/zero-btc.ll
Commit 0ab14f19685eefa38cf2598071a18b0e117c4b30 by Lang Hames
[JITLink] Suppress expect-death test in release mode.
The file was modifiedllvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
Commit bf77317049a880af541e31ba7ea43cb229ee4c0f by powerman1st
[RISCV] Optimize xor/or with immediate in the zbs extension

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D102893
The file was modifiedllvm/test/CodeGen/RISCV/rv64zbs.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/CodeGen/RISCV/rv32zbs.ll
Commit db8af0f21dc9aad4d336754c857c24470afe53e3 by balazs.benics
[analyzer][ctu] Avoid parsing invocation list again and again during on-demand parsing of CTU

During CTU, the *on-demand parsing* will read and parse the invocation
list to know how to compile the file being imported. However, it seems
that the invocation list will be parsed again if a previous parsing
has failed.
Then, parse again and fail again. This patch tries to overcome the
problem by storing the error code during the first parsing, and
re-create the stored error during the later parsings.

Reviewed By: steakhal

Patch By: OikawaKirie!

Differential Revision: https://reviews.llvm.org/D101763
The file was modifiedclang/include/clang/CrossTU/CrossTranslationUnit.h
The file was addedclang/test/Analysis/ctu-on-demand-parsing-multiple-invocation-list-parsing.cpp
The file was modifiedclang/lib/CrossTU/CrossTranslationUnit.cpp
Commit f05b70c23687fdf3de349ab1dd99ad79c4c40e85 by balazs.benics
Revert "[analyzer][ctu] Avoid parsing invocation list again and again during on-demand parsing of CTU"

This reverts commit db8af0f21dc9aad4d336754c857c24470afe53e3.

clang-x86_64-debian-fast fails on this.

+ : 'RUN: at line 4'
+ /usr/bin/ccache
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/Analysis/ctu-on-demand-parsing-multiple-invocation-list-parsing.cpp
-fPIC -shared -o
/b/1/clang-x86_64-debian-fast/llvm.obj/tools/clang/test/Analysis/Output/ctu-on-demand-parsing-multiple-invocation-list-parsing.cpp.tmp/mock_open.so
ccache: error: execv of
/b/1/clang-x86_64-debian-fast/llvm.src/clang/test/Analysis/ctu-on-demand-parsing-multiple-invocation-list-parsing.cpp
failed: Permission denied
The file was removedclang/test/Analysis/ctu-on-demand-parsing-multiple-invocation-list-parsing.cpp
The file was modifiedclang/lib/CrossTU/CrossTranslationUnit.cpp
The file was modifiedclang/include/clang/CrossTU/CrossTranslationUnit.h
Commit ff30436dc5e54b85b5b942a3a84d0720f657b36f by Amara Emerson
[GlobalISel] Fix MachineIRBuilder not using the DstOp argument for G_SHUFFLE_VECTOR.
The file was modifiedllvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
Commit d59b4acf80d59c461decd41400988febaf0af8ca by balazs.benics
[analyzer][ctu] Reland "Avoid parsing invocation list again and again..

..during on-demand parsing of CTU"

During CTU, the *on-demand parsing* will read and parse the invocation
list to know how to compile the file being imported. However, it seems
that the invocation list will be parsed again if a previous parsing
has failed.
Then, parse again and fail again. This patch tries to overcome the
problem by storing the error code during the first parsing, and
re-create the stored error during the later parsings.

Reland without test.

Reviewed By: steakhal

Patch By: OikawaKirie!

Differential Revision: https://reviews.llvm.org/D101763
The file was modifiedclang/include/clang/CrossTU/CrossTranslationUnit.h
The file was modifiedclang/lib/CrossTU/CrossTranslationUnit.cpp
Commit 75492e20fb7c8e3fc4bc0ff8a5eda844056652cb by jonathanchesterfield
[libomptarget][nfc] Accept callable for hsa iterate_symbols

[libomptarget][nfc] Accept callable for hsa iterate_symbols
Candidate refactor to simplify D102692

Reviewed By: pdhaliwal

Differential Revision: https://reviews.llvm.org/D103030
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
Commit 10c2e261598a9c1b641b5adb10d87d937aba8b58 by a.v.lapshin
[TRE] Reland: allow TRE for non-capturing calls.

The D82085 "allow TRE for non-capturing calls" caused failure during bootstrap.
This patch does the same as D82085 plus fixes bootstrap error.

The problem with D82085 is that it does not create copies for byval
operands, while replacing function call with a branch.

Consider following example:

```
    int zoo ( S p1 );

    int foo ( int count, S p1 ) {
      if ( count > 10 )
        return zoo(p1);

      // temporarily variable created for passing byvalue parameter
      // p1 could be used when zoo(p1) is called(after TRE is done).
      // lifetime.start p1.byvalue.temp
      return foo(count+1, p1);
      // lifetime.end p1.byvalue.temp
    }
```

After recursive call to foo is replaced with a jump into
start of the function, its parameters could be passed to
zoo function. i.e. temporarily variable created for byvalue
parameter "p1" could be passed to zoo. Finally zoo receives
broken operand:

```
    int foo ( int count, S p1 ) {
    :tailrecurse
      p1_tr = phi p1, p1.byvalue.temp
      if ( count > 10 )
        return zoo(p1_tr);

      // temporarily variable created for passing byvalue parameter
      // p1 could be used when zoo(p1) is called(after TRE is done).
      lifetime.start p1.byvalue.temp
      memcpy (p1.byvalue.temp, p1_tr)
      count = count + 1
      lifetime.end p1.byvalue.temp
      br tailrecurse
    }
```

To prevent using p1.byvalue.temp after its scope finished by
lifetime.end marker this patch copies value from p1.byvalue.temp
into another temporarily variable and then copies this variable
into the input parameter for next iteration.

This patch passes bootstrap build and bootstrap build with AddressSanitizer.

Differential Revision: https://reviews.llvm.org/D85614
The file was addedllvm/test/Transforms/TailCallElim/tre-byval-parameter.ll
The file was modifiedllvm/test/Transforms/TailCallElim/basic.ll
The file was modifiedllvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
The file was addedllvm/test/Transforms/TailCallElim/tre-byval-parameter-2.ll
The file was addedllvm/test/Transforms/TailCallElim/tre-multiple-exits.ll
The file was addedllvm/test/Transforms/TailCallElim/tre-noncapturing-alloca-calls.ll
Commit 5017b0f88b81083d3f723e7a8e5cc19b1c4eb366 by springerm
[mlir] Check only last dim stride in transfer op lowering

Lower a 1D vector transfer op to LLVM if the last dim stride is 1. Also fixes a bug in the original unit stride computation.

Differential Revision: https://reviews.llvm.org/D102897
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/test/Integration/Dialect/Vector/CPU/test-transfer-read-1d.mlir
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
Commit 5f4d383a59351711d4f64cbb6a04ef9ffc0d8f88 by david.spickett
[clang][ARM] Remove non-existent arm1136jz-s CPU

There is an ARM1136JF-S and an ARM1136J-S but I could find
no references to an ARM1136JZ-S. In CPU manuals or the manual
for Arm Compiler 5.

See:
https://developer.arm.com/documentation/ddi0211/latest/
https://developer.arm.com/documentation/dui0472/latest/

Using this CPU you get:
$ ./bin/clang --target=arm-linux-gnueabihf -march=armv3m -mcpu=arm1136jz-s -c /tmp/test.c -o /tmp/test.o
'arm1136jz-s' is not a recognized processor for this target (ignoring processor)

Since the llvm target does not know what it is.

This is part of fixing https://bugs.llvm.org/show_bug.cgi?id=50454.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D103019
The file was modifiedllvm/include/llvm/Support/ARMTargetParser.def
The file was modifiedllvm/unittests/Support/TargetParserTest.cpp
Commit 6359842bc088857799318dad366099eeca92a4d5 by benny.kra
[GlobalISel] Silence unused variable warning in Release builds. NFC.
The file was modifiedllvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
Commit 0cd2629d97e70f34adb8d0d2ac4a4d280e3bab86 by david.spickett
[llvm][ARM] Remove non-existent arm1176j-s CPU

This was removed in https://reviews.llvm.org/D52594 for clang.

The one test using it has been updated to use the mpcore
CPU as the linked clang change does.

This is part of fixing https://bugs.llvm.org/show_bug.cgi?id=50454.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D103022
The file was modifiedllvm/lib/Target/ARM/ARM.td
The file was modifiedllvm/test/CodeGen/ARM/build-attributes.ll
The file was modifiedllvm/unittests/Support/TargetParserTest.cpp
Commit de7729d47a8ba0060dd6a6190d20d698539f76fe by david.spickett
[clang][ARM] Remove non-existent arm9312 CPU

I cannot find documentation on this CPU, and it
is not supported by the Arm Compiler 5 product either.

It was likely a mistake or a different name for the
"ep9312", which is an Arm based Cirrus Logic chip.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D103024
The file was modifiedllvm/include/llvm/Support/ARMTargetParser.def
The file was modifiedllvm/unittests/Support/TargetParserTest.cpp