SuccessChanges

Summary

  1. [Docs] Updated the content of getting started documentation under llvm/lib/MC (details)
  2. [MC] Move elf-unique-sections-by-flags.ll to X86/ (details)
  3. [OpenCL] Include header for atomic-ops test (details)
  4. [Test] Add Loop Deletion test with irreducible CFG (details)
  5. [AArch64] Generate LD1 for anyext i8 or i16 vector load (details)
  6. [mlir] Fold complex.create(complex.re(op), complex.im(op)) (details)
  7. Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration" (details)
  8. Revert "Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration"" (details)
  9. [InstCombine] avoid 'tmp' usage in test file; NFC (details)
  10. [InstCombine] avoid 'tmp' usage in test files; NFC (details)
  11. [InstCombine] add fmul tests with shared operand; NFC (details)
  12. Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration" (try 2) (details)
  13. [LoopVectorize] Enable strict reductions when allowReordering() returns false (details)
  14. [SLP][NFC]Add a test for multiple uses of insertelement instruction, (details)
  15. [MCA][InOrderIssueStage] Fix LastWriteBackCycle computation. (details)
  16. [X86][SSE] Regenerate some tests to expose the rip relative vector/broadcast loads (details)
  17. [ARM] Extra test for reverted WLS memset. NFC (details)
  18. [CostModel][AArch64] Add tests for bitreverse. NFC. (details)
  19. [X86][AMX] Fix a bug on tile config. (details)
  20. [clang-cl] Add driver support for /std:c++20 and bump /std:c++latest (PR50465) (details)
Commit cebdf5d8465c71e43386ecec14ec1eb4b208f626 by pyadav2299
[Docs] Updated the content of getting started documentation under llvm/lib/MC

Wrote about llvm/lib/MC subproject on https://llvm.org/docs/GettingStarted.html page.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D101047
The file was modifiedllvm/docs/GettingStarted.rst
Commit ab8c44112c481fb32917b8e9b22b7576a4d6656d by tomas.matheson
[MC] Move elf-unique-sections-by-flags.ll to X86/
The file was addedllvm/test/CodeGen/X86/elf-unique-sections-by-flags.ll
The file was removedllvm/test/CodeGen/Generic/elf-unique-sections-by-flags.ll
Commit ba0fe85ec0e93db44f9babaace84cb9ab29ff5f4 by sven.vanhaastregt
[OpenCL] Include header for atomic-ops test

Avoid duplicating the memory_order and memory_scope enum definitions.
The file was modifiedclang/test/SemaOpenCL/atomic-ops.cl
Commit 5fb58d45989d63c2deee1c901c3d02b6cf01a067 by mkazantsev
[Test] Add Loop Deletion test with irreducible CFG

Authored by Mikael Holmén. It demonstrated miscompile on irreducible
CFG with patch "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration".
The patch is reverted. Checking in the test to make sure this bug
does not return.
The file was addedllvm/test/Transforms/LoopDeletion/irreducible-cfg.ll
Commit 8ac66d61eab3dd44defa5755b884eca71a19431c by andrew.savonichev
[AArch64] Generate LD1 for anyext i8 or i16 vector load

The existing LD1 patterns do not cover cases where result type does
not match the memory type. This happens when illegal vector types are
extended and scalarized, for example:

  load <2 x i16>* %v2i16

is lowered into:

  // first element
  (v4i32 (insert_subvector (v2i32 (scalar_to_vector (load anyext from i16)))))
  // other elements
  (v4i32 (insert_vector_elt (i32 (load anyext from i16)) idx))

Before this patch these patterns were compiled into LDR + INS.
Now they are compiled into LD1.

The problem was reported in
PR24820: LLVM Generates abysmal code in simple situation.

Differential Revision: https://reviews.llvm.org/D102938
The file was modifiedllvm/test/CodeGen/AArch64/sadd_sat_vec.ll
The file was addedllvm/test/CodeGen/AArch64/aarch64-load-ext.ll
The file was modifiedllvm/test/CodeGen/AArch64/ssub_sat_vec.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
Commit dee46d08293f2ff693893d85c472029207ce750e by akuegel
[mlir] Fold complex.create(complex.re(op), complex.im(op))

Differential Revision: https://reviews.llvm.org/D103148
The file was modifiedmlir/lib/Dialect/Complex/IR/ComplexOps.cpp
The file was modifiedmlir/test/Dialect/Complex/canonicalize.mlir
The file was modifiedmlir/include/mlir/Dialect/Complex/IR/ComplexOps.td
Commit 43d2e51c2e86788b9e2a582fdd3d8ffa7829328a by mkazantsev
Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration"

The patch was reverted due to compile time impact of contextual SCEV
queries. It also appeared that it introduced a miscompile on irreducible CFG.

Changes made:
1. isKnownPredicateAt is replaced with more lightweight isKnownPredicate;
2. Irreducible CFG in live code is now detected and excluded from processing.

Differential Revision: https://reviews.llvm.org/D102615
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
The file was modifiedllvm/test/Transforms/LoopDeletion/zero-btc.ll
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
Commit 0de553dce0098e2606345ec5b89cf7d14599c643 by mkazantsev
Revert "Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration""

This reverts commit 43d2e51c2e86788b9e2a582fdd3d8ffa7829328a.

Commited wrong version.
The file was modifiedllvm/test/Transforms/LoopDeletion/zero-btc.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
Commit b70fe92f08e8aac8fa2e0d46d5d0a1ae56fe9d2f by spatel
[InstCombine] avoid 'tmp' usage in test file; NFC

The update script ( utils/update_test_checks.py ) warns against this.
The file was modifiedllvm/test/Transforms/InstCombine/select.ll
Commit 9e43b1e9a1f3b261ef998003bf7edba96d8c64a5 by spatel
[InstCombine] avoid 'tmp' usage in test files; NFC

The update script ( utils/update_test_checks.py ) warns against this.
The file was modifiedllvm/test/Transforms/InstCombine/fmul-exp2.ll
The file was modifiedllvm/test/Transforms/InstCombine/fmul-exp.ll
Commit 01120fe5b39837f87e6fa34a5227b8f8634d7b01 by spatel
[InstCombine] add fmul tests with shared operand; NFC

Baseline tests for:
D102698
The file was modifiedllvm/test/Transforms/InstCombine/fmul-exp2.ll
The file was modifiedllvm/test/Transforms/InstCombine/fmul-exp.ll
Commit be1a23203b1de655b8c7dac7549818d975a0cbbf by mkazantsev
Return "[LoopDeletion] Break backedge if we can prove that the loop is exited on 1st iteration" (try 2)

The patch was reverted due to compile time impact of contextual SCEV
queries. It also appeared that it introduced a miscompile on irreducible CFG.

Changes made:
1. isKnownPredicateAt is replaced with more lightweight isKnownPredicate;
2. Irreducible CFG in live code is now detected and excluded from processing.

Differential Revision: https://reviews.llvm.org/D102615
The file was modifiedllvm/test/Transforms/LoopDeletion/zero-btc.ll
The file was modifiedllvm/test/Transforms/LoopDeletion/eval_first_iteration.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
Commit 9f76a8526010015fc3e5046fb2c5925000ac45a4 by kerry.mclaughlin
[LoopVectorize] Enable strict reductions when allowReordering() returns false

When loop hints are passed via metadata, the allowReordering function
in LoopVectorizationLegality will allow the order of floating point
operations to be changed:

  bool allowReordering() const {
    // When enabling loop hints are provided we allow the vectorizer to change
    // the order of operations that is given by the scalar loop. This is not
    // enabled by default because can be unsafe or inefficient.

The -enable-strict-reductions flag introduced in D98435 will currently only
vectorize reductions in-loop if hints are used, since canVectorizeFPMath()
will return false if reordering is not allowed.

This patch changes canVectorizeFPMath() to query whether it is safe to
vectorize the loop with ordered reductions if no hints are used. For
testing purposes, an additional flag (-hints-allow-reordering) has been
added to disable the reordering behaviour described above.

Reviewed By: sdesmalen

Differential Revision: https://reviews.llvm.org/D101836
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
The file was modifiedllvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
Commit 8be23ed3f02ae633193c400909d135876de6c8cb by a.bataev
[SLP][NFC]Add a test for multiple uses of insertelement instruction,
NFC.
The file was addedllvm/test/Transforms/SLPVectorizer/X86/insert-element-multiple-uses.ll
Commit 63cc9fd579b20e225d1109ebd077a6a13c97c2ab by andrea.dibiagio
[MCA][InOrderIssueStage] Fix LastWriteBackCycle computation.

Conservatively use the instruction latency to compute the last write-back cycle.
Before this patch, the last write cycle computation was incorrect for store
instructions that didn't declare any register writes.
The file was modifiedllvm/test/tools/llvm-mca/AArch64/Cortex/A55-all-stats.s
The file was modifiedllvm/test/tools/llvm-mca/AArch64/Cortex/A55-all-views.s
The file was modifiedllvm/lib/MCA/Stages/InOrderIssueStage.cpp
Commit 629e2b3442257937486bd7a5c8239c173492963e by llvm-dev
[X86][SSE] Regenerate some tests to expose the rip relative vector/broadcast loads
The file was modifiedllvm/test/CodeGen/X86/avx2-arith.ll
The file was modifiedllvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
The file was modifiedllvm/test/CodeGen/X86/combine-mul.ll
The file was modifiedllvm/test/CodeGen/X86/x86-shifts.ll
The file was modifiedllvm/test/CodeGen/X86/combine-rotates.ll
The file was modifiedllvm/test/CodeGen/X86/vec_shift6.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-broadcast-unfold.ll
The file was modifiedllvm/test/CodeGen/X86/sse-domains.ll
The file was modifiedllvm/test/CodeGen/X86/sse2-vector-shifts.ll
The file was modifiedllvm/test/CodeGen/X86/oddsubvector.ll
The file was modifiedllvm/test/CodeGen/X86/vector-gep.ll
Commit a409fcddaed9ad4468d781a447fc5a4b3aac90d4 by david.green
[ARM] Extra test for reverted WLS memset. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-memtp-loop.ll
Commit b6f6501b2412ffaf5d7dce539de3c382b1cf9b64 by sjoerd.meijer
[CostModel][AArch64] Add tests for bitreverse. NFC.
The file was addedllvm/test/Analysis/CostModel/AArch64/bitreverse.ll
Commit 4ed2b6cccdef912013c84244c3f5ee4c018de9b1 by yuanke.luo
[X86][AMX] Fix a bug on tile config.

The previous code detect if a MBB is bottom block to determine if it is
a backedge of a loop. We should check latch block instead of bottom
block and we should check the header and the bottom block are in the
same loop.

Differential Revision: https://reviews.llvm.org/D103145
The file was addedllvm/test/CodeGen/X86/AMX/amx-gemm.ll
The file was modifiedllvm/lib/Target/X86/X86PreTileConfig.cpp
Commit a8f75d497daa2684a03909d7c31d5bce11b427e1 by hans
[clang-cl] Add driver support for /std:c++20 and bump /std:c++latest (PR50465)

VS 2019 16.11 (just released in Preview) is adding support for the
/std:c++20 option and bumping /std:c++latest to "post-c++20". This
updates clang-cl to match.

Differential revision: https://reviews.llvm.org/D103155
The file was modifiedclang/test/Driver/cl-options.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/include/clang/Driver/Options.td