SuccessChanges

Summary

  1. [RISCV] Optimize SEW=64 shifts by splat on RV32. (details)
  2. [SCEV] Add a utility for converting from "exit count" to "trip count" (details)
  3. [llvm-mc] Add -M to replace -riscv-no-aliases and -riscv-arch-reg-names (details)
  4. Revert "[Scudo] Make -fsanitize=scudo use standalone. Migrate tests." (details)
  5. [mlir] Make StripDebugInfo strip out block arguments locs (details)
  6. [SCEV] Generalize getSmallConstantTripCount(L) for multiple exit loops (details)
  7. [libomptarget][nfc][amdgpu] Refactor uses of KernelInfoTable (details)
  8. [AMDGPU][MC][GFX90A] Corrected DS_GWS opcodes (details)
  9. [AMDGPU] Fix kernel LDS lowering for constants (details)
  10. [SimplifyCFG] Use make_early_inc_range() while deleting instructions (details)
  11. [WebAssembly] Add TargetInstrInfo::getCalleeOperand (details)
  12. [SCEV] Compute trip multiple for multiple exit loops (details)
  13. [NFC][X86][Costmodel] Add some more interleaved load/store test with i16 element type (details)
  14. [NFC][Codegen][X86] Add a few more interleaved load/store patterns w/ i16 element type (details)
  15. [libomptarget][nfc][amdgpu] Factor out setting upper bounds (details)
  16. [pstl] Fix -Wundef errors in the test suite (details)
  17. [DebugInstrRef][1/3] Track PHI values through register allocation (details)
  18. [CostModel][AArch64] Add floating point arithmetic tests. NFC. (details)
  19. [pstl] Workaround more errors in the test suite (details)
  20. [libc++] Add a job testing on GCC 11 (details)
  21. Update documentation for InlineModel features. (details)
  22. [RISCV][NFC] Fix some whitespace nits in MC test RUN lines (details)
Commit 9065118b6463adf6cc5552f202cd8302c21cd7b0 by craig.topper
[RISCV] Optimize SEW=64 shifts by splat on RV32.

SEW=64 shifts only uses the log2(64) bits of shift amount. If we're
splatting a 64 bit value in 2 parts, we can avoid splatting the
upper bits and just let the low bits be sign extended. They won't
be read anyway.

For the purposes of SelectionDAG semantics of the generic ISD opcodes,
if hi was non-zero or bit 31 of the low is 1, the shift was already
undefined so it should be ok to replace high with sign extend of low.

In order do be able to find the split i64 value before it becomes
a stack operation, I added a new ISD opcode that will be expanded
to the stack spill in PreprocessISelDAG. This new node is conceptually
similar to BuildPairF64, but I expanded earlier so that we could
go through regular isel to get the right VLSE opcode for the LMUL.
BuildPairF64 is expanded in a CustomInserter.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D102521
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-vp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll
Commit 921d3f7af09c6a08d2d2897e6fcce6127a9f4fd4 by listmail
[SCEV] Add a utility for converting from "exit count" to "trip count"

(Mostly as a logical place to put a comment since this is a reoccuring confusion.)
The file was modifiedllvm/lib/Analysis/LoopCacheAnalysis.cpp
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit 73a117953599af58645d944e68076ec8fb052540 by i
[llvm-mc] Add -M to replace -riscv-no-aliases and -riscv-arch-reg-names

In objdump, many targets support `-M no-aliases`.  Instead of having a
`-*-no-aliases` for each target when LLVM adds the support, it makes more sense
to introduce objdump style `-M`.

-riscv-arch-reg-names is removed. -riscv-no-aliases has too many uses and thus is retained for now.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D103004
The file was modifiedllvm/test/MC/RISCV/numeric-reg-names.s
The file was addedllvm/test/tools/llvm-mc/disassembler-options.test
The file was modifiedllvm/include/llvm/MC/MCInstPrinter.h
The file was modifiedllvm/test/MC/RISCV/numeric-reg-names-d.s
The file was modifiedllvm/tools/llvm-mc/llvm-mc.cpp
The file was modifiedllvm/test/MC/RISCV/rvi-aliases-valid.s
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
The file was modifiedllvm/test/MC/RISCV/numeric-reg-names-f.s
Commit f7c5c0d87b8ae5e55006fd3a31994cd68d64f102 by 31459023+hctim
Revert "[Scudo] Make -fsanitize=scudo use standalone. Migrate tests."

This reverts commit 6911114d8cbed06a8a809c34ae07f4e3e89ab252.

Broke the QEMU sanitizer bots due to a missing header dependency. This
actually needs to be fixed on the bot-side, but for now reverting this
patch until I can fix up the bot.
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
The file was addedcompiler-rt/test/scudo/mismatch.cpp
The file was removedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/aarch64-unknown-fuchsia/libclang_rt.scudo_standalone.so
The file was addedcompiler-rt/test/scudo/aligned-new.cpp
The file was addedcompiler-rt/test/scudo/dealloc-race.c
The file was addedcompiler-rt/test/scudo/valloc.c
The file was addedcompiler-rt/test/scudo/random_shuffle.cpp
The file was addedcompiler-rt/test/scudo/preinit.c
The file was removedcompiler-rt/test/scudo/standalone/tsd_destruction.c
The file was modifiedclang/test/Driver/fuchsia.c
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/overflow.c
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/valloc.c
The file was removedcompiler-rt/test/scudo/standalone/aligned-new.cpp
The file was removedcompiler-rt/test/scudo/standalone/options.cpp
The file was modifiedclang/test/Driver/sanitizer-ld.c
The file was addedcompiler-rt/test/scudo/rss.c
The file was addedcompiler-rt/test/scudo/quarantine.c
The file was addedcompiler-rt/test/scudo/secondary.c
The file was addedcompiler-rt/test/scudo/options.cpp
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/realloc.cpp
The file was addedcompiler-rt/test/scudo/threads.c
The file was addedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-unknown-fuchsia/libclang_rt.scudo.so
The file was addedcompiler-rt/test/scudo/sizes.cpp
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/rss.c
The file was modifiedcompiler-rt/test/scudo/standalone/CMakeLists.txt
The file was addedcompiler-rt/test/scudo/tsd_destruction.c
The file was removedcompiler-rt/test/scudo/standalone/preinit.c
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/quarantine.c
The file was addedcompiler-rt/test/scudo/overflow.c
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/sizes.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/wrappers_cpp.cpp
The file was removedcompiler-rt/test/scudo/standalone/dealloc-race.c
The file was removedcompiler-rt/test/scudo/standalone/random_shuffle.cpp
The file was removedcompiler-rt/test/scudo/standalone/mismatch.cpp
The file was addedcompiler-rt/test/scudo/lit.cfg.py
The file was addedcompiler-rt/test/scudo/interface.cpp
The file was removedcompiler-rt/test/scudo/standalone/double-free.cpp
The file was addedcompiler-rt/test/scudo/preload.cpp
The file was addedcompiler-rt/test/scudo/stats.c
The file was removedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/x86_64-unknown-fuchsia/libclang_rt.scudo_standalone.so
The file was removedcompiler-rt/test/scudo/standalone/lit.cfg.py
The file was removedcompiler-rt/test/scudo/standalone/sized-delete.cpp
The file was removedcompiler-rt/test/scudo/standalone/alignment.c
The file was removedcompiler-rt/test/scudo/standalone/malloc.cpp
The file was addedcompiler-rt/test/scudo/fsanitize.c
The file was addedcompiler-rt/test/scudo/sized-delete.cpp
The file was addedcompiler-rt/test/scudo/symbols.test
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/threads.c
The file was removedcompiler-rt/test/scudo/standalone/lit.site.cfg.py.in
The file was modifiedcompiler-rt/test/scudo/CMakeLists.txt
The file was addedcompiler-rt/test/scudo/alignment.c
The file was removedcompiler-rt/test/scudo/standalone/preload.cpp
The file was removedcompiler-rt/test/scudo/standalone/memalign.c
The file was addedcompiler-rt/test/scudo/lit.site.cfg.py.in
The file was removedcompiler-rt/test/scudo/standalone/lit-unmigrated/secondary.c
The file was addedcompiler-rt/test/scudo/malloc.cpp
The file was removedcompiler-rt/test/scudo/standalone/stats.c
The file was addedcompiler-rt/test/scudo/memalign.c
The file was addedclang/test/Driver/Inputs/resource_dir_with_per_target_subdir/lib/aarch64-unknown-fuchsia/libclang_rt.scudo.so
The file was addedcompiler-rt/test/scudo/double-free.cpp
The file was addedcompiler-rt/test/scudo/realloc.cpp
The file was removedcompiler-rt/test/scudo/standalone/fsanitize.c
Commit e5eff533f7611967ae1ead99846d06597dcb8ee2 by thomasraoux
[mlir] Make StripDebugInfo strip out block arguments locs

Differential Revision: https://reviews.llvm.org/D103187
The file was modifiedmlir/lib/Transforms/StripDebugInfo.cpp
The file was modifiedmlir/test/Transforms/strip-debuginfo.mlir
Commit 9306bb638ff2b13fb8472b5b035e658c1dcbd74c by listmail
[SCEV] Generalize getSmallConstantTripCount(L) for multiple exit loops

This came up in review for another patch, see https://reviews.llvm.org/D102982#2782407 for full context.

I've reviewed the callers to make sure they can handle multiple exit loops w/non-zero returns.  There's two cases in target cost models where results might change (Hexagon and PowerPC), but the results looked legal and reasonable.  If a target maintainer wishes to back out the effect of the costing change, they should explicitly check for multiple exit loops and handle them as desired.

Differential Revision: https://reviews.llvm.org/D103182
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit c5c1ec7945ff2c26f4f9ce5db5ff647ee3f931ab by jonathanchesterfield
[libomptarget][nfc][amdgpu] Refactor uses of KernelInfoTable

Suggested in D103059. Use a single lookup instead of two, more const, less mutation.

Reviewed By: dhruvachak

Differential Revision: https://reviews.llvm.org/D103093
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
Commit 13c6568c6e20ee70aaa8157431e8a3d01be07e81 by dmitry.preobrazhensky
[AMDGPU][MC][GFX90A] Corrected DS_GWS opcodes

Corrected DS_GWS opcodes to use even aligned registers.

Differential Revision: https://reviews.llvm.org/D103185
The file was modifiedllvm/test/MC/AMDGPU/gfx90a_ldst_acc.s
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx90a_ldst_acc.txt
The file was addedllvm/test/MC/AMDGPU/gfx90a_err_pos.s
The file was modifiedllvm/test/MC/AMDGPU/gfx90a_err.s
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Commit 5e2facb922840bfd03eb116eaeead039df021275 by Stanislav.Mekhanoshin
[AMDGPU] Fix kernel LDS lowering for constants

There is a trivial but severe bug in the recent code collecting
LDS globals used by kernel. It aborts scan on the first constant
without scanning further uses. That leads to LDS overallocation
with multiple kernels in certain cases.

Differential Revision: https://reviews.llvm.org/D103190
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPULDSUtils.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_write2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_read2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lower-kernel-lds-constexpr.ll
Commit 5bfe06ad3590d5aeb14c2fc3fae729abc6412cb3 by aheejin
[SimplifyCFG] Use make_early_inc_range() while deleting instructions

We are deleting `phi` nodes within the for loop, so this makes sure we
increment the iterator before we delete the instruction pointed by the
iterator.

This started to break in
https://github.com/llvm/llvm-project/commit/a0be08164622bf938855ff5d19dd8e9d0c96b9b3.

Reviewed By: dschuff, lebedev.ri

Differential Revision: https://reviews.llvm.org/D103181
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was addedllvm/test/Transforms/SimplifyCFG/cleanup-phis.ll
Commit 5dd86aadf0b014913bd35bb7435808eb081bc049 by aheejin
[WebAssembly] Add TargetInstrInfo::getCalleeOperand

DwarfDebug unconditionally assumes for all call instructions the 0th
operand is the callee operand, which seems to be true for other targets,
but not for WebAssembly. This adds `TargetInstrInfo::getCallOperand`
method whose default implementation returns `getOperand(0)` and makes
WebAssembly overrides it to use its own utility method to get the callee
operand.

This also fixes an existing bug in `WebAssembly::getCalleeOp`, which was
uncovered by this CL.

Reviewed By: dschuff, djtodoro

Differential Revision: https://reviews.llvm.org/D102978
The file was modifiedllvm/lib/Target/WebAssembly/Utils/WebAssemblyUtilities.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was addedllvm/test/DebugInfo/WebAssembly/call-site.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
Commit ff08c3468fa4ba25384104206255f3648fd21fe9 by listmail
[SCEV] Compute trip multiple for multiple exit loops

This patch implements getSmallConstantTripMultiple(L) correctly for multiple exit loops. The previous implementation was both imprecise, and violated the specified behavior of the method. This was fine in practice, because it turns out the function was both dead in real code, and not tested for the multiple exit case.

Differential Revision: https://reviews.llvm.org/D103189
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
The file was modifiedllvm/include/llvm/Analysis/ScalarEvolution.h
The file was modifiedllvm/test/Analysis/ScalarEvolution/tripmultiple_calculation.ll
Commit 78c9796f963f0577b86de7bf062f65b4595cb757 by lebedev.ri
[NFC][X86][Costmodel] Add some more interleaved load/store test with i16 element type

Not sure if even larger interleaving factors are needed,
but these are what i have seen being queried in the wild.
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-5.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-6.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-2.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll
The file was addedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-5.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll
Commit ab7f26dc13f282101691370f98f3c0e4371ea12d by lebedev.ri
[NFC][Codegen][X86] Add a few more interleaved load/store patterns w/ i16 element type

Matching the costmodel coverage.
We want them both because they simplify coming up with the patterns
to check their cost, and to track their codegen.

Tests for loads can be fully autogenerated: https://godbolt.org/z/o1fncqo9n
For stores, however, i have done that semi-manually: https://godbolt.org/z/KPzTnvsh1
The file was addedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
The file was addedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
The file was addedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-2.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
The file was addedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
The file was modifiedllvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-2.ll
Commit 2fdf8bbd19c33c0eb5fdf88ff3cbd12aae607768 by jonathanchesterfield
[libomptarget][nfc][amdgpu] Factor out setting upper bounds

Refactor suggested in D103037 to help avoid similar copy-paste errors.
Change is mechanical. Some parts of this would be more robust with unsigned.

Reviewed By: dhruvachak

Differential Revision: https://reviews.llvm.org/D103090
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
Commit 3b9a1bb1af90db9472340ef2122d3855eb9ba3fc by Louis Dionne
[pstl] Fix -Wundef errors in the test suite
The file was modifiedpstl/test/std/utilities/memory/specialized.algorithms/uninitialized_construct.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/alg.partitions/partition.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/copy_move.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.sorting/alg.heap.operations/is_heap.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.sorting/partial_sort_copy.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/equal.pass.cpp
The file was modifiedpstl/test/std/numerics/numeric.ops/transform_scan.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/alg.partitions/partition_copy.pass.cpp
The file was modifiedpstl/test/std/numerics/numeric.ops/scan.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/find_first_of.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/alg.copy/copy_if.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/find.pass.cpp
The file was modifiedpstl/test/std/numerics/numeric.ops/reduce.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/all_of.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/replace_copy.pass.cpp
The file was modifiedpstl/include/pstl/internal/glue_execution_defs.h
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/rotate.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/search_n.pass.cpp
The file was modifiedpstl/include/pstl/internal/unseq_backend_simd.h
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/alg.reverse/reverse_copy.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/unique_copy_equal.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/count.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/nth_element.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.merge/inplace_merge.pass.cpp
The file was modifiedpstl/include/pstl/internal/execution_defs.h
The file was modifiedpstl/test/std/algorithms/alg.sorting/alg.lex.comparison/lexicographical_compare.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/find_end.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.merge/merge.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/unique.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/rotate_copy.pass.cpp
The file was modifiedpstl/test/std/numerics/numeric.ops/adjacent_difference.pass.cpp
The file was modifiedpstl/include/pstl/internal/numeric_impl.h
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/none_of.pass.cpp
The file was modifiedpstl/include/pstl/internal/pstl_config.h
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/alg.reverse/reverse.pass.cpp
The file was modifiedpstl/include/pstl/internal/algorithm_impl.h
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/alg.partitions/is_partitioned.pass.cpp
The file was modifiedpstl/test/std/utilities/memory/specialized.algorithms/uninitialized_copy_move.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/remove.pass.cpp
The file was modifiedpstl/include/pstl/internal/execution_impl.h
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/any_of.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.nonmodifying/find_if.pass.cpp
The file was modifiedpstl/test/support/utils.h
Commit 8496fc2ec8046727e298629aa74943be0137267b by jeremy.morse
[DebugInstrRef][1/3] Track PHI values through register allocation

This patch introduces "DBG_PHI" instructions, a marker of where a PHI
instruction used to be, before PHI elimination. Under the instruction
referencing model, we want to know where every value in the function is
defined -- and a PHI, even if implicit, is such a place.

Just like instruction numbers, we can use this to identify a value to be
used as a variable value, but we don't need to know what instruction
defines that value, for example:

bb1:
   DBG_PHI $rax, 1
   [... more insts ... ]
bb2:
   DBG_INSTR_REF 1, 0, !1234, !DIExpression()

This specifies that on entry to bb1, whatever value is in $rax is known
as value number one -- and the later DBG_INSTR_REF marks the position
where variable !1234 should take on value number one.

PHI locations are stored in MachineFunction for the duration of the
regalloc phase in the DebugPHIPositions map. The map is populated by
PHIElimination, and then flushed back into the instruction stream by
virtregrewriter. A small amount of maintenence is needed in
LiveDebugVariables to account for registers being split, but only for
individual positions, not for entire ranges of blocks.

Differential Revision: https://reviews.llvm.org/D86812
The file was modifiedllvm/include/llvm/CodeGen/MachineInstr.h
The file was modifiedllvm/lib/CodeGen/PrologEpilogInserter.cpp
The file was modifiedllvm/include/llvm/Target/Target.td
The file was modifiedllvm/lib/CodeGen/LiveDebugVariables.cpp
The file was modifiedllvm/include/llvm/Support/TargetOpcodes.def
The file was modifiedllvm/lib/CodeGen/PHIElimination.cpp
The file was addedllvm/test/DebugInfo/MIR/InstrRef/phi-through-regalloc.mir
The file was modifiedllvm/include/llvm/CodeGen/MachineFunction.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was addedllvm/test/DebugInfo/MIR/InstrRef/phi-regallocd-to-stack.mir
Commit 6c92215e07f41cb566d54599e891180fe2ddbea5 by sjoerd.meijer
[CostModel][AArch64] Add floating point arithmetic tests. NFC.
The file was addedllvm/test/Analysis/CostModel/AArch64/arith-fp.ll
The file was modifiedllvm/test/Analysis/CostModel/AArch64/mul.ll
Commit c4823cc5db69f16bb5c96cf7d1b0d070da83605e by Louis Dionne
[pstl] Workaround more errors in the test suite
The file was modifiedpstl/include/pstl/internal/pstl_config.h
The file was modifiedpstl/test/std/numerics/numeric.ops/transform_reduce.pass.cpp
The file was modifiedpstl/test/std/algorithms/alg.modifying.operations/replace.pass.cpp
Commit cc622aee302381b81acd6070206c84bab5bace71 by Louis Dionne
[libc++] Add a job testing on GCC 11

I'm adding the job as a soft-fail for now, but once all the tests have
been fixed to work on it, we'll switch over from GCC 10 to GCC 11 and
remove the soft-fail.

Differential Revision: https://reviews.llvm.org/D103116
The file was modifiedlibcxx/utils/ci/run-buildbot
The file was modifiedlibcxx/utils/ci/buildkite-pipeline.yml
Commit 1494fa6943380fd0ee327c3349b648a32e679f7f by mtrofin
Update documentation for InlineModel features.

Reviewed By: mtrofin

Differential Revision: https://reviews.llvm.org/D103193
The file was modifiedllvm/include/llvm/Analysis/InlineModelFeatureMaps.h
Commit e4fc8c3de8f38eab1feae5ec34e9bc573153d370 by jrtc27
[RISCV][NFC] Fix some whitespace nits in MC test RUN lines
The file was modifiedllvm/test/MC/RISCV/hilo-constaddr.s
The file was modifiedllvm/test/MC/RISCV/user-csr-names-invalid.s
The file was modifiedllvm/test/MC/RISCV/compress-rv32i.s
The file was modifiedllvm/test/MC/RISCV/compress-rv32b.s
The file was modifiedllvm/test/MC/RISCV/compress-rv64b.s
The file was modifiedllvm/test/MC/RISCV/rvv/snippet.s
The file was modifiedllvm/test/MC/RISCV/compress-rv32d.s
The file was modifiedllvm/test/MC/RISCV/compress-rv32f.s
The file was modifiedllvm/test/MC/RISCV/machine-csr-names-invalid.s
The file was modifiedllvm/test/MC/RISCV/compress-rv64i.s
The file was modifiedllvm/test/MC/RISCV/option-rvc.s
The file was modifiedllvm/test/MC/RISCV/compress-cjal.s
The file was modifiedllvm/test/MC/RISCV/option-invalid.s