SuccessChanges

Summary

  1. [RS4GC] Introduce intrinsics to get base ptr and offset (details)
  2. [Fuchsia][CMake] Add missing include path. (details)
  3. Fix non-global-value-max-name-size not considered by LLParser (details)
  4. [libcxx][iterator] adds `std::ranges::next` (details)
  5. [libcxx][iterator] adds `std::ranges::prev` (details)
  6. [gn build] Port 0dc7fd1bc167 (details)
  7. [gn build] Port 857fa7b7b187 (details)
  8. [llvm-objdump] Print the DEBUG type under `--section-headers`. (details)
  9. [NFCI][LoopDeletion] Only query SCEV about loop successor if another successor is also in loop (details)
  10. [NFC] Formatting fix (details)
  11. [NFCI] Lazily evaluate SCEVs of PHIs (details)
  12. [mlir] Add a pass to distribute linalg::TiledLoopOp. (details)
  13. [docs] llvm-objdump: Mention -M no-aliases is supported on AArch64 (details)
  14. [mlir] Add TestLinalgDistribution.cpp to cmake build. (details)
  15. [GlobalISel] Implement splitting of G_SHUFFLE_VECTOR. (details)
  16. [NFC] Reuse existing variables instead of re-requesting successors (details)
  17. [NFCI][LoopDeletion] Do not call complex analysis for known non-zero BTC (details)
  18. [mlir] Support dialect-wide canonicalization pattern registration (details)
  19. [AMDGPU][GlobalISel] Allow amdgpu_gfx calling conv (details)
  20. [SelectionDAG][RISCV] Don't unroll 0/1-type bool VSELECTs (details)
  21. [Matrix] Include matrix pipeline for new PM in new-pm-defaults.ll. (details)
  22. [lit][test] Improve testing of use_llvm_tool (details)
  23. Add triples to a bunch of x86-specific tests that currently fail on PPC (details)
  24. [clang-format] [NFC] realign documentation in Format.h... (details)
  25. [ARM] Extra test for reverted WLS memset. NFC (details)
  26. [OpenMP]Add support for workshare loop modifier in lowering (details)
  27. [AMDGPU][Libomptarget][NFC] Remove atmi_mem_place_t (details)
  28. Revert "[OpenMP]Add support for workshare loop modifier in lowering" (details)
  29. Add --quiet option to llvm-gsymutil to suppress output of warnings. (details)
  30. [mlir][Linalg] Add comprehensive bufferization support for subtensor (5/n) (details)
  31. Add support for #elifdef and #elifndef (details)
  32. [VPlan] Do not sink uniform recipes in sinkScalarOperands. (details)
  33. [RISCV] Allow passing fixed-length vectors via the stack (details)
  34. [DAGCombine][RISCV] Don't try to trunc-store combined vector stores (details)
  35. Fix -Wswitch warning; NFC (details)
  36. AMDGPU/GlobalISel: Remove redundant parameter from function (details)
  37. AMDGPU/GlobalISel: Lower constant-32-bit zextload/sextload consistently (details)
  38. Speculatively fix a -Woverloaded-virtual diagnostic; NFC (details)
  39. Speculatively fix this harder and with improved spelling capabilities. (details)
  40. Reimplement __builtin_unique_stable_name- (details)
  41. Reuse temporary files for print-changed=diff (details)
  42. Correct the 'KEYALL' mask. (details)
  43. Hopefully fix the Clang sphinx doc build. (details)
  44. [OpenMP]Add support for workshare loop modifier in lowering (details)
  45. [VP][SelectionDAG] Add a target-configurable EVL operand type (details)
  46. Disable misc-no-recursion checking in Clang (details)
  47. VirtRegMap: Preserve LiveDebugVariables (details)
  48. [Flang][Openmp] Fortran specific semantic checks for Allocate directive (details)
  49. [OpenCL][NFC] Fix typos in test (details)
  50. [X86][SSE] Regenerate some tests to expose the rip relative vector/broadcast loads (details)
  51. [CostModel][X86] AVX512 truncation ops are slower than cost models indicate. (details)
  52. AMDGPU/GlobalISel: Fix broken test run line (details)
  53. AMDGPU/GlobalISel: Use IncomingValueAssigner for implicit return (details)
  54. [libc++] Deprecate std::iterator and remove it as a base class (details)
  55. [libc++] NFC: Parenthesize expression to satisfy GCC 11 (details)
  56. Revert "Emit correct location lists with basic block sections." (details)
  57. Thread safety analysis: Factor out function for merging locks (NFC) (details)
  58. Thread safety analysis: Allow exlusive/shared joins for managed and asserted capabilities (details)
  59. [AIX] Add -lc++abi and -lunwind for linking (details)
  60. GlobalISel: Do not change register types in lowerLoad (details)
  61. [RISCV] Add a test case showing incorrect call-conv lowering (details)
  62. [HIP] Check compatibility of -fgpu-sanitize with offload arch (details)
  63. [mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops. (details)
  64. [SPE] Disable strict-fp for SPE by default (details)
  65. [LoopUnrollAndJam] Change LoopUnrollAndJamPass to LoopNest pass (details)
  66. [mlir] Async reference counting for block successors with divergent reference counted liveness (details)
Commit 4d26f41f76c4f92023c02ec96ffbd02a6eb2c46d by yrouban
[RS4GC] Introduce intrinsics to get base ptr and offset

There can be a need for some optimizations to get (base, offset)
for any GC pointer. The base can be calculated by generating
needed instructions as it is done by the
RewriteStatepointsForGC::findBasePointer() function. The offset
can be calculated in the same way. Though to not expose the base
calculation and to make the offset calculation as simple as
ptrtoint(derived_ptr) - ptrtoint(base_ptr), which is illegal
outside RS4GC, this patch introduces 2 intrinsics:

@llvm.experimental.gc.get.pointer.base(%derived_ptr)
@llvm.experimental.gc.get.pointer.offset(%derived_ptr)

These intrinsics are inlined by RS4GC along with generation of
statepoint sequences.

With these new intrinsics the GC parseable lowering for atomic
memcpy intrinsics (6ec2c5e402a724ba99bce82a9cac7a3006d660f4)
could be implemented as a separate pass.

Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D100445
The file was modifiedllvm/lib/IR/Verifier.cpp
The file was modifiedllvm/docs/LangRef.rst
The file was modifiedllvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/include/llvm/IR/IRBuilder.h
The file was modifiedllvm/lib/IR/IRBuilder.cpp
The file was modifiedllvm/docs/Statepoints.rst
The file was addedllvm/test/Transforms/RewriteStatepointsForGC/intrinsics.ll
Commit 0ce58c52d50bd2edd09df7c7ef3dd4dc85b05992 by haowei
[Fuchsia][CMake] Add missing include path.

This patch adds include path for missing header files from "sync".
This patch also fixes the build failures caused by scudo.

Differential Revision: https://reviews.llvm.org/D103218
The file was modifiedclang/cmake/caches/Fuchsia-stage2.cmake
Commit 8d25762720660aba3344752e577ae7017e6125c2 by joker.eph
Fix non-global-value-max-name-size not considered by LLParser

`non-global-value-max-name-size` is used by `Value` to cap the length of local value name. However, this flag is not considered by `LLParser`, which leads to unexpected `use of undefined value error`. The fix is to move the responsibility of capping the length to `ValueSymbolTable`.

The test is the one provided by [[ https://bugs.llvm.org/show_bug.cgi?id=45899 | Mikael in the bug report ]].

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D102707
The file was addedllvm/test/Assembler/non-global-value-max-name-size.ll
The file was modifiedllvm/lib/IR/ValueSymbolTable.cpp
The file was modifiedllvm/lib/IR/Function.cpp
The file was modifiedllvm/lib/IR/Module.cpp
The file was modifiedllvm/include/llvm/IR/ValueSymbolTable.h
The file was modifiedllvm/lib/IR/Value.cpp
Commit 857fa7b7b1872a4a9b4072b6e83c85524c7229af by cjdb
[libcxx][iterator] adds `std::ranges::next`

Implements part of P0896 'The One Ranges Proposal'.
Implements [range.iter.op.next].

Depends on D101922.

Differential Revision: https://reviews.llvm.org/D102563
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.next/iterator_count_sentinel.pass.cpp
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.next/iterator_count.pass.cpp
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.next/iterator.pass.cpp
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.next/special_function.compile.pass.cpp
The file was modifiedlibcxx/include/CMakeLists.txt
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.next/iterator_sentinel.pass.cpp
The file was addedlibcxx/include/__iterator/next.h
The file was modifiedlibcxx/include/iterator
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.next/check_round_trip.h
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.next/constraints.verify.cpp
Commit 0dc7fd1bc1670e9f7e58b08b51b478a6334c8b01 by cjdb
[libcxx][iterator] adds `std::ranges::prev`

Implements part of P0896 'The One Ranges Proposal'.
Implements [range.iter.op.prev].

Depends on D102563.

Differential Revision: https://reviews.llvm.org/D102564
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.prev/iterator.pass.cpp
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.prev/iterator_count_sentinel.pass.cpp
The file was addedlibcxx/include/__iterator/prev.h
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.prev/check_round_trip.h
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.prev/iterator_count.pass.cpp
The file was modifiedlibcxx/include/iterator
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.prev/special_function.compile.pass.cpp
The file was addedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.prev/constraints.verify.cpp
The file was modifiedlibcxx/include/CMakeLists.txt
Commit 77274258e2d4c2b253778c316bb39a6f3c12eb6b by llvmgnsyncbot
[gn build] Port 0dc7fd1bc167
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit cc3db8dbdf517cf96264f8f63a828657775062e5 by llvmgnsyncbot
[gn build] Port 857fa7b7b187
The file was modifiedllvm/utils/gn/secondary/libcxx/include/BUILD.gn
Commit d82f2a123f9c443911fc40009d2017915b850758 by esme.yi
[llvm-objdump] Print the DEBUG type under `--section-headers`.

Summary: Under the option --section-headers, we can only
print the section types of TEXT, DATA, and BSS for now.
This patch adds the DEBUG type.

Reviewed By: jhenderson, Higuoxing

Differential Revision: https://reviews.llvm.org/D102603
The file was modifiedllvm/test/tools/llvm-objdump/section-headers.test
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
Commit b0b2bf3b5da950679db1431aae431a6dedea2245 by mkazantsev
[NFCI][LoopDeletion] Only query SCEV about loop successor if another successor is also in loop
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
Commit 59d938e649e62db0cef4903d495e838fbc6a6eb8 by mkazantsev
[NFC] Formatting fix
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
Commit 51d334a845a082338735b0fdfc620a4b15fa26fe by mkazantsev
[NFCI] Lazily evaluate SCEVs of PHIs

Eager evaluation has cost of compile time. Only query them if they are
required for proving predicates.
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
Commit 281ee4291110af5d1337d1da819a284eecf368ec by pifon
[mlir] Add a pass to distribute linalg::TiledLoopOp.

Differential Revision: https://reviews.llvm.org/D103194
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was addedmlir/test/lib/Dialect/Linalg/TestLinalgDistribution.cpp
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt
The file was addedmlir/lib/Dialect/Linalg/Transforms/Distribution.cpp
The file was addedmlir/test/Dialect/Linalg/distribute-tiled-loop.mlir
Commit 3f85e124f6b790134c8074edef4e716c604c2b14 by i
[docs] llvm-objdump: Mention -M no-aliases is supported on AArch64
The file was modifiedllvm/docs/CommandGuide/llvm-objdump.rst
Commit 62686a47a448d4795720adf8cadc9c745192f8b6 by pifon
[mlir] Add TestLinalgDistribution.cpp to cmake build.
The file was modifiedmlir/test/lib/Dialect/Linalg/CMakeLists.txt
Commit 9f39ba13b59632eaa718068a981df0a00c9b9474 by Amara Emerson
[GlobalISel] Implement splitting of G_SHUFFLE_VECTOR.

Thhis is a port from the DAG legalization. We're still missing some of the
canonicalizations of shuffles but it's a start.

Differential Revision: https://reviews.llvm.org/D102828
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit c467585682dcdda75e645ef3ab47c8b48440db12 by mkazantsev
[NFC] Reuse existing variables instead of re-requesting successors
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
Commit 7d418dadf6b1e6fd9bcccf7c5b5e1db74992ee70 by mkazantsev
[NFCI][LoopDeletion] Do not call complex analysis for known non-zero BTC
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
Commit 108ca7a7e73ca6d5f4c17a8291d0e94cd9f740d3 by springerm
[mlir] Support dialect-wide canonicalization pattern registration

* Add `hasCanonicalizer` option to Dialect.
* Initialize canonicalizer with dialect-wide canonicalization patterns.
* Add test case to TestDialect.

Dialect-wide canonicalization patterns are useful if a canonicalization pattern does not conceptually associate with any single operation, i.e., it should not be registered as part of an operation's `getCanonicalizationPatterns` function. E.g., this is the case for canonicalization patterns that match an op interface.

Differential Revision: https://reviews.llvm.org/D103226
The file was modifiedmlir/include/mlir/IR/Dialect.h
The file was modifiedmlir/lib/TableGen/Dialect.cpp
The file was modifiedmlir/include/mlir/TableGen/Dialect.h
The file was modifiedmlir/test/Transforms/test-canonicalize.mlir
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.cpp
The file was modifiedmlir/tools/mlir-tblgen/DialectGen.cpp
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/lib/Transforms/Canonicalizer.cpp
Commit 0bb60dbe34e4a934e47a0493832f3384fb09b7db by sebastian.neubauer
[AMDGPU][GlobalISel] Allow amdgpu_gfx calling conv

Calling functions from shaders already works with the SelectionDAG.

Differential Revision: https://reviews.llvm.org/D103183
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll
Commit 772b58a641affcd786e3062250a0f51acb8b1553 by fraser
[SelectionDAG][RISCV] Don't unroll 0/1-type bool VSELECTs

This patch extends the cases in which the legalizer is able to express
VSELECT in terms of XOR/AND/OR. When dealing with a VSELECT between
boolean vector types, the mask itself is an all-ones or all-ones value
of the operand type, so a 0/1 boolean type behaves identically to a 0/-1
type.

This greatly helps RISC-V which relies on expansion for these nodes. It
also allows scalable-vector bool VSELECTs to use the default expansion,
where before it would crash in SelectionDAG::UnrollVectorOp.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103147
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/vselect-mask.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect.ll
Commit 9a4506e7591fc5aaa9b69d35857908cadb4f5743 by flo
[Matrix] Include matrix pipeline for new PM in new-pm-defaults.ll.

-enable-matrix just adds a single pass, so it's easier to just check in
new-pm-default.ll rather than duplicating the full checks for -O3 with
the new pass manager.

Suggested post-commit by @aeubanks.
The file was modifiedllvm/test/Other/new-pm-defaults.ll
The file was modifiedllvm/test/Other/opt-O3-pipeline-enable-matrix.ll
Commit 2ae58431873d449f63fa6dd20dbd280fa43b3ac2 by james.henderson
[lit][test] Improve testing of use_llvm_tool

Reviewed by: MaskRay

Differential Revision: https://reviews.llvm.org/D103154
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/true.txt
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/path/case4
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/build/case6
The file was removedllvm/utils/lit/tests/Inputs/use-tool-search-env/true.txt
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/path/case5
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/build/case2
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool-required/true.txt
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/build/case7.exe
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/build/case3.exe
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/path/case6
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool-required/found.exe
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/build/case2.exe
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/build/case7
The file was removedllvm/utils/lit/tests/use-tool-search-env.py
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/env-case1
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool-required/lit.cfg
The file was removedllvm/utils/lit/tests/Inputs/use-tool-search-env/test.tool
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/path/case7.exe
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/env-case6
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/path/case5.exe
The file was addedllvm/utils/lit/tests/use-llvm-tool.py
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool-required/found
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/build/case6.exe
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/build/case3
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/path/case4.exe
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/lit.cfg
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/path/case7
The file was removedllvm/utils/lit/tests/Inputs/use-tool-search-env/lit.cfg
The file was addedllvm/utils/lit/tests/Inputs/use-llvm-tool/path/case6.exe
Commit 1546c52d971292ed4145b6d41aaca0d02229ebff by benny.kra
Add triples to a bunch of x86-specific tests that currently fail on PPC
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections-debug-loc-split-range.ll
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-3.ll
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-2.ll
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-1.ll
Commit 7faffdeb48d3d81ba8fc1353f1a9a563a25adf6d by bjoern
[clang-format] [NFC] realign documentation in Format.h...

... and ClanfFormatStyleOptions.rst for EmptyLineAfterAccessModifier

Differential-Revision: https://reviews.llvm.org/D102989
The file was modifiedclang/include/clang/Format/Format.h
Commit 1d5b976b778327901bfe35c164590f80169e5170 by david.green
[ARM] Extra test for reverted WLS memset. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-memtp-loop.ll
Commit ea4c5fb04c6d9618d451fb2d2c360dc95c6d9131 by mats.petersson
[OpenMP]Add support for workshare loop modifier in lowering

When lowering the dynamic, guided, auto and runtime types of scheduling,
there is an optional monotonic or non-monotonic modifier. This patch
adds support in the OMP IR Builder to pass this down to the runtime
functions.

Also implements tests for the variants.

Differential Revision: https://reviews.llvm.org/D102008
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPConstants.h
The file was modifiedllvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
The file was modifiedllvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Commit 8b79dfb302acbcaf2b103759904146161a3e198d by Pushpinder.Singh
[AMDGPU][Libomptarget][NFC] Remove atmi_mem_place_t

This struct was used to specify the device on which memory was
being allocated/free in atmi_malloc/free. It has now been replaced
with int DeviceId.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D103239
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_interop_hsa.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_interop_hsa.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi_runtime.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/atmi.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/data.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/internal.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/rt.h
Commit 86627be23312bd227e5afa88c206771a9aaf6589 by mats.petersson
Revert "[OpenMP]Add support for workshare loop modifier in lowering"

This reverts commit ea4c5fb04c6d9618d451fb2d2c360dc95c6d9131.
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPConstants.h
The file was modifiedllvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
The file was modifiedllvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Commit 5f2d4b23b4c2229e27f1ee9c14c8bc82631b4861 by simon.giesecke
Add --quiet option to llvm-gsymutil to suppress output of warnings.

Differential Revision: https://reviews.llvm.org/D102829
The file was modifiedllvm/lib/DebugInfo/GSYM/GsymCreator.cpp
The file was modifiedllvm/test/tools/llvm-gsymutil/cmdline.test
The file was modifiedllvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
The file was modifiedllvm/include/llvm/DebugInfo/GSYM/GsymCreator.h
The file was modifiedllvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
Commit ce4f99e7f272d481d0689c551d9818019992c841 by nicolas.vasilache
[mlir][Linalg] Add comprehensive bufferization support for subtensor (5/n)

This revision refactors and simplifies the pattern detection logic: thanks to SSA value properties, we can actually look at all the uses of a given value and avoid having to pattern-match specific chains of operations.

A bufferization pattern for subtensor is added and specific inplaceability analysis is implemented for the simple case of subtensor. More advanced use cases will follow.

Differential revision: https://reviews.llvm.org/D102512
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/ComprehensiveBufferize.cpp
The file was modifiedmlir/include/mlir/Interfaces/ViewLikeInterface.h
The file was modifiedmlir/test/Dialect/Linalg/comprehensive-func-bufferize.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.td
The file was modifiedmlir/include/mlir/Interfaces/ViewLikeInterface.td
The file was modifiedmlir/lib/Interfaces/ViewLikeInterface.cpp
Commit 8edd3464afbff65d7d5945b3a8b20009d6ff5deb by aaron
Add support for #elifdef and #elifndef

WG14 adopted N2645 and WG21 EWG has accepted P2334 in principle (still
subject to full EWG vote + CWG review + plenary vote), which add
support for #elifdef as shorthand for #elif defined and #elifndef as
shorthand for #elif !defined. This patch adds support for the new
preprocessor directives.
The file was modifiedclang/include/clang/Lex/PPConditionalDirectiveRecord.h
The file was modifiedclang/include/clang/Basic/DiagnosticLexKinds.td
The file was modifiedclang/include/clang/Lex/DependencyDirectivesSourceMinimizer.h
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
The file was modifiedclang/include/clang/Basic/TokenKinds.def
The file was addedclang/test/Preprocessor/elifdef.c
The file was modifiedclang/include/clang/Lex/PreprocessingRecord.h
The file was modifiedclang/lib/Format/UnwrappedLineParser.cpp
The file was modifiedclang/test/Preprocessor/if_warning.c
The file was modifiedclang/test/Preprocessor/ifdef-recover.c
The file was modifiedclang/lib/Index/IndexingAction.cpp
The file was modifiedclang/include/clang/Lex/Preprocessor.h
The file was modifiedclang/lib/Lex/PPDirectives.cpp
The file was modifiedclang/test/Preprocessor/macro_vaopt_check.cpp
The file was modifiedclang/lib/Lex/PreprocessingRecord.cpp
The file was modifiedclang/unittests/Lex/DependencyDirectivesSourceMinimizerTest.cpp
The file was modifiedclang/include/clang/Lex/PPCallbacks.h
The file was modifiedclang/lib/Basic/IdentifierTable.cpp
The file was modifiedclang/lib/Lex/Preprocessor.cpp
The file was modifiedclang/test/Preprocessor/macro_misc.c
The file was modifiedclang/lib/Lex/Lexer.cpp
The file was modifiedclang/lib/Lex/DependencyDirectivesSourceMinimizer.cpp
The file was modifiedclang/test/Index/complete-preprocessor.m
The file was modifiedclang/lib/Lex/PPConditionalDirectiveRecord.cpp
Commit 38641ddf3e5630db6ecb167b2d1b520b22e56405 by flo
[VPlan] Do not sink uniform recipes in sinkScalarOperands.

For uniform ReplicateRecipes, only the first lane should be used, so
sinking them would mean we have to compute the value of the first lane
multiple times. Also, at the moment, sinking them causes a crash because
the value of the first lane is re-used by all users.

Reported post-commit for D100258.
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge-vf1.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Commit 8c73a31c1175cc9dc8de9f056e10d557e470c10b by fraser
[RISCV] Allow passing fixed-length vectors via the stack

The vector calling convention dictates that when the vector argument
registers are exhaused, GPRs are used to pass the address via the stack.
When the GPRs themselves are exhausted, at best we would previously
crash with an assertion, and at worst we'd generate incorrect code.

This patch addresses this issue by passing fixed-length vectors via the
stack with their full fixed-length size and aligned to their element
type size. Since the calling convention lowering can't yet handle
scalable vector types, this patch adds a fatal error to make it clear
that we are lacking in this regard.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D102422
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was addedllvm/test/CodeGen/RISCV/rvv/unsupported-calling-conv.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
Commit b7101e218c215184b85fc740d726dc7652e4941e by fraser
[DAGCombine][RISCV] Don't try to trunc-store combined vector stores

DAGCombine's `mergeStoresOfConstantsOrVecElts` optimization is told
whether it's to use vector types and also whether it's to issue a
truncating store. However, the truncating store code path assumes a
scalar integer `ConstantSDNode`, and when using vector types it creates
either a `BUILD_VECTOR` or `CONCAT_VECTORS` to store: neither of which
is a constant.

The `riscv64` target is able to expose a crash here because it switches
on both code paths at the same time. The `f32` is stored as `i32` which
must be promoted to `i64`, necessitating a truncating store.
It also decides later that it prefers a vector store of `v2f32`.

While vector truncating stores are legal, this combine is not able to
emit them. We also don't have a test case. This patch adds an assert to
catch this case more gracefully, and updates one of the caller functions
to the function to turn off the use of truncating stores when preferring
vectors.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D103173
The file was addedllvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit ce276b7a6448d9c30f55235392c38b0416e91bbb by aaron
Fix -Wswitch warning; NFC
The file was modifiedclang/lib/Lex/PPDirectives.cpp
Commit 8a203ac6d22026fbb1b4b9cd9cdfdeffd17cb05d by Matthew.Arsenault
AMDGPU/GlobalISel: Remove redundant parameter from function
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Commit ee359000898c40ada69db3f20a87e6424c23596e by Matthew.Arsenault
AMDGPU/GlobalISel: Lower constant-32-bit zextload/sextload consistently

We were accidentally leaning on code in lowerLoad which expands
extending loads which should be removed.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-constant-32bit.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-constant-32bit.mir
Commit 758f51c14ac3d4f243fce83e9733e2aea44dbd9e by aaron
Speculatively fix a -Woverloaded-virtual diagnostic; NFC
The file was modifiedclang/include/clang/Lex/PreprocessingRecord.h
Commit caf86d2959d5e900ed29af5e0ae2be23e3d299c5 by aaron
Speculatively fix this harder and with improved spelling capabilities.
The file was modifiedclang/include/clang/Lex/PreprocessingRecord.h
The file was modifiedclang/lib/Index/IndexingAction.cpp
Commit eba69b59d1a30dead07da2c279c8ecfd2b62ba9f by erich.keane
Reimplement __builtin_unique_stable_name-

The original version of this was reverted, and @rjmcall provided some
advice to architect a new solution.  This is that solution.

This implements a builtin to provide a unique name that is stable across
compilations of this TU for the purposes of implementing the library
component of the unnamed kernel feature of SYCL.  It does this by
running the Itanium mangler with a few modifications.

Because it is somewhat common to wrap non-kernel-related lambdas in
macros that aren't present on the device (such as for logging), this
uniquely generates an ID for all lambdas involved in the naming of a
kernel. It uses the lambda-mangling number to do this, except replaces
this with its own number (starting at 10000 for readabililty reasons)
for lambdas used to name a kernel.

Additionally, this implements itself as constexpr with a slight catch:
if a name would be invalidated by the use of this lambda in a later
kernel invocation, it is diagnosed as an error (see the Sema tests).

Differential Revision: https://reviews.llvm.org/D103112
The file was modifiedclang/include/clang/Basic/TokenKinds.def
The file was modifiedclang/include/clang/Parse/Parser.h
The file was modifiedclang/lib/AST/StmtProfile.cpp
The file was modifiedclang/lib/AST/ComputeDependence.cpp
The file was modifiedclang/lib/AST/JSONNodeDumper.cpp
The file was modifiedclang/include/clang/Basic/LangOptions.h
The file was modifiedclang/lib/AST/StmtPrinter.cpp
The file was modifiedclang/include/clang/AST/TextNodeDumper.h
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/lib/AST/ExprClassification.cpp
The file was modifiedclang/lib/Sema/SemaLambda.cpp
The file was modifiedclang/include/clang/AST/JSONNodeDumper.h
The file was modifiedclang/include/clang/Basic/StmtNodes.td
The file was modifiedclang/lib/CodeGen/CGExprScalar.cpp
The file was modifiedclang/lib/AST/ASTContext.cpp
The file was modifiedclang/include/clang/AST/ComputeDependence.h
The file was modifiedclang/docs/LanguageExtensions.rst
The file was addedclang/test/SemaSYCL/unique_stable_name.cpp
The file was modifiedclang/lib/Serialization/ASTWriterStmt.cpp
The file was modifiedclang/tools/libclang/CXCursor.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/AST/ItaniumMangle.cpp
The file was modifiedclang/lib/AST/TextNodeDumper.cpp
The file was addedclang/test/ParserSYCL/unique_stable_name_sycl_only.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/include/clang/AST/Mangle.h
The file was addedclang/test/CodeGenSYCL/unique_stable_name.cpp
The file was modifiedclang/lib/Basic/IdentifierTable.cpp
The file was modifiedclang/lib/Sema/SemaSYCL.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/ExprEngine.cpp
The file was modifiedclang/include/clang/AST/Expr.h
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was modifiedclang/lib/Sema/SemaExceptionSpec.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
The file was modifiedclang/lib/CodeGen/CGCUDANV.cpp
The file was modifiedclang/lib/Parse/ParseExpr.cpp
The file was modifiedclang/include/clang/Serialization/ASTBitCodes.h
The file was addedclang/test/AST/ast-print-sycl-unique-stable-name.cpp
The file was addedclang/test/ParserSYCL/unique_stable_name.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
The file was modifiedclang/include/clang/AST/ASTContext.h
The file was modifiedclang/include/clang/AST/RecursiveASTVisitor.h
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/lib/Serialization/ASTReaderStmt.cpp
Commit 3879fcdb8733075cc5283199b89111d81b1f2d78 by schmeise
Reuse temporary files for print-changed=diff

Summary:
Make the file name and descriptors static so that they are reused by
print-changed=diff. This avoids errors about being unable to create
temporary files when doing the later comparisons in a large compile.

Author: Jamie Schmeiser <schmeise@ca.ibm.com>
Reviewed By: aeubanks (Arthur Eubanks)
Differential Revision: https://reviews.llvm.org/D100116
The file was modifiedllvm/lib/Passes/StandardInstrumentations.cpp
Commit 023fbf3df32d4100b57597a4e748c94931c1b936 by erich.keane
Correct the 'KEYALL' mask.

It should technically be a 1, since we are only setting the first bit.
The file was modifiedclang/lib/Basic/IdentifierTable.cpp
Commit 96ef4f4a24918642f2133522c8c686bd5cf8dc63 by aaron
Hopefully fix the Clang sphinx doc build.

This was broken several days ago in 826905787ae4c8540bb8a2384fac59c606c7eaff.
The file was modifiedclang/docs/OpenCLSupport.rst
Commit 9091ecdae0290d8c425d48a2c86bbdd4876d6507 by mats.petersson
[OpenMP]Add support for workshare loop modifier in lowering

When lowering the dynamic, guided, auto and runtime types of scheduling,
there is an optional monotonic or non-monotonic modifier. This patch
adds support in the OMP IR Builder to pass this down to the runtime
functions.

Also implements tests for the variants.

Differential Revision: https://reviews.llvm.org/D102008
The file was modifiedllvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPConstants.h
The file was modifiedllvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Commit 5a80dc498818d7f22a04d06986e78d151fb6e103 by fraser
[VP][SelectionDAG] Add a target-configurable EVL operand type

This patch adds a way for the target to configure the type it uses for
the explicit vector length operands of VP SDNodes. The type must be a
legal integer type (there is still no target-independent legalization of
this operand) and must currently be at least as big as i32, the type
used by the IR intrinsics. An implicit zero-extension takes place on
targets which choose a larger type. All VP nodes should be created with
this type used for the EVL operand.

This allows 64-bit RISC-V to avoid custom legalization of all VP nodes,
keeping them in their target-independent form for that bit longer.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D103027
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
Commit 767d34e3bdddef6c1871006dd0a2d06a4e1bcd5d by aaron
Disable misc-no-recursion checking in Clang

We currently enable misc-no-recursion, but Clang uses recursion
intentionally in a fair number of places (like RecursiveASTVisitor).
Disabling this check reduces a noise in reviews that add new AST nodes,
like https://reviews.llvm.org/D103112#2780747 which has five CI
warnings that the author can do nothing about.
The file was modifiedclang/.clang-tidy
Commit 808dc6f8663c4c0696fc6eaf998db61a06330266 by Matthew.Arsenault
VirtRegMap: Preserve LiveDebugVariables

This avoids recomputing it between regalloc runs when allocation is
split, and also avoids a debug info test regression.
The file was modifiedllvm/test/CodeGen/AMDGPU/debug-value.ll
The file was modifiedllvm/lib/CodeGen/VirtRegMap.cpp
Commit aae7eb809e41d9e1e95175a017ca0fdccc87dedd by kiran.chandramohan
[Flang][Openmp] Fortran specific semantic checks for Allocate directive

This patch adds the following Fortran specific semantic checks for the OpenMP
Allocate directive.
1) A type parameter inquiry cannot appear in an ALLOCATE directive.
2) List items specified in the ALLOCATE directive must not have the ALLOCATABLE
attribute unless the directive is associated with an ALLOCATE statement.

Co-authored-by: Irina Dobrescu <irina.dobrescu@arm.com>

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D102061
The file was addedflang/test/Semantics/omp-allocate06.f90
The file was modifiedflang/include/flang/Semantics/symbol.h
The file was modifiedflang/lib/Semantics/resolve-directives.cpp
The file was addedflang/test/Semantics/omp-allocate07.f90
The file was modifiedflang/lib/Semantics/check-omp-structure.cpp
The file was modifiedflang/lib/Semantics/check-omp-structure.h
Commit 85f5272ffc58d73089bf77f0451b37176aa6b64f by sven.vanhaastregt
[OpenCL][NFC] Fix typos in test
The file was modifiedclang/test/Headers/opencl-c-header.cl
Commit e49d6e16235ac48e4dc55535a571989925b8da56 by llvm-dev
[X86][SSE] Regenerate some tests to expose the rip relative vector/broadcast loads
The file was modifiedllvm/test/CodeGen/X86/combine-sdiv.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-512.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-256.ll
Commit fe8d97cbe5ecec50731650947b4e3b45f49228f8 by llvm-dev
[CostModel][X86] AVX512 truncation ops are slower than cost models indicate.

The SkylakeServer model (and later IceLake/TigerLake targets according to Agner) have the PMOV truncations as uops=2, rthroughput=2 instructions.

Noticed while trying to reduce the diffs between cost tables and llvm-mca analysis.
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/arith.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/trunc.ll
Commit 34046de04297dfbded824a756314bff0eb53de3d by Matthew.Arsenault
AMDGPU/GlobalISel: Fix broken test run line
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
Commit 5efc3bfd320712f6842a451fd3dae124380273ce by Matthew.Arsenault
AMDGPU/GlobalISel: Use IncomingValueAssigner for implicit return

This makes no real difference since we assign the same register either
way.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
Commit 1055cb91b48280da0c42c5287b227cfdaae633b2 by Louis Dionne
[libc++] Deprecate std::iterator and remove it as a base class

C++17 deprecated std::iterator and removed it as a base class for all
iterator adaptors. We implement that change, but we still provide a way
to inherit from std::iterator in the few cases where doing otherwise
would be an ABI break.

Supersedes D101729 and the std::iterator base parts of D103101 and D102657.

Differential Revision: https://reviews.llvm.org/D103171
The file was addedlibcxx/test/libcxx/iterators/iterator.requirements/iterator.concepts/cpp20_iter_traits.compile.pass.cpp
The file was modifiedlibcxx/test/std/iterators/iterator.primitives/iterator.basic/iterator.pass.cpp
The file was modifiedlibcxx/test/std/iterators/stream.iterators/istreambuf.iterator/types.pass.cpp
The file was modifiedlibcxx/test/std/iterators/predef.iterators/insert.iterators/insert.iterator/types.pass.cpp
The file was modifiedlibcxx/include/memory
The file was modifiedlibcxx/test/std/iterators/stream.iterators/ostreambuf.iterator/types.pass.cpp
The file was modifiedlibcxx/include/__memory/raw_storage_iterator.h
The file was modifiedlibcxx/test/libcxx/iterators/iterator.requirements/iterator.concepts/cpp20_iter_concepts.pass.cpp
The file was modifiedlibcxx/test/std/iterators/stream.iterators/istreambuf.iterator/istreambuf.iterator_proxy/proxy.pass.cpp
The file was modifiedlibcxx/include/__config
The file was modifiedlibcxx/include/iterator
The file was modifiedlibcxx/test/std/iterators/predef.iterators/insert.iterators/front.insert.iterator/types.pass.cpp
The file was modifiedlibcxx/test/std/iterators/stream.iterators/istream.iterator/types.pass.cpp
The file was modifiedlibcxx/test/std/iterators/stream.iterators/ostream.iterator/types.pass.cpp
The file was modifiedlibcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iterator/types.pass.cpp
The file was addedlibcxx/test/std/iterators/iterator.primitives/iterator.basic/deprecated.verify.cpp
The file was addedlibcxx/test/std/utilities/memory/storage.iterator/types.compile.pass.cpp
The file was removedlibcxx/test/libcxx/iterators/iterator.requirements/iterator.concepts/cpp20_iter_traits.pass.cpp
The file was modifiedlibcxx/test/std/iterators/predef.iterators/insert.iterators/back.insert.iterator/types.pass.cpp
Commit 73099e786aef9db88811338e217e1ea791bcaa2e by Louis Dionne
[libc++] NFC: Parenthesize expression to satisfy GCC 11

Otherwise it issues a -Werror=parentheses suggesting parentheses.
The file was modifiedlibcxx/test/std/iterators/iterator.primitives/range.iter.ops/range.iter.ops.next/check_round_trip.h
Commit 192b4141f0d74dd08a4eacf2184a6881906993ed by thakis
Revert "Emit correct location lists with basic block sections."

Breaks check-llvm on non-linux, see comments on https://reviews.llvm.org/D85085
This reverts commit caae570978c490a137921b9516162a382831209e
and follow-up commit 1546c52d971292ed4145b6d41aaca0d02229ebff.
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections_1.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was removedllvm/test/DebugInfo/X86/basic-block-sections-debug-loc-const-value-2.ll
The file was removedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-4.ll
The file was removedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-5.ll
The file was removedllvm/test/DebugInfo/X86/basic-block-sections-debug-loc-const-value-1.ll
The file was removedllvm/test/DebugInfo/X86/basic-block-sections-debug-loc-split-range.ll
The file was removedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-1.ll
The file was removedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-3.ll
The file was modifiedllvm/test/DebugInfo/X86/basic-block-sections-debug-loc.ll
The file was removedllvm/test/DebugInfo/X86/basic-block-sections-debug-loclist-2.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp
Commit 3d64677c28072867ea6025a22805977386b767f8 by aaron.puchert
Thread safety analysis: Factor out function for merging locks (NFC)

It's going to become a bit more complicated, so let's have it separate.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D102025
The file was modifiedclang/lib/Analysis/ThreadSafety.cpp
Commit cf0b337c1b1f064c81fe40124ddba178572778d6 by aaron.puchert
Thread safety analysis: Allow exlusive/shared joins for managed and asserted capabilities

Similar to how we allow managed and asserted locks to be held and not
held in joining branches, we also allow them to be held shared and
exclusive. The scoped lock should restore the original state at the end
of the scope in any event, and asserted locks need not be released.

We should probably only allow asserted locks to be subsumed by managed,
not by (directly) acquired locks, but that's for another change.

Reviewed By: delesley

Differential Revision: https://reviews.llvm.org/D102026
The file was modifiedclang/lib/Analysis/ThreadSafety.cpp
The file was modifiedclang/test/SemaCXX/warn-thread-safety-analysis.cpp
Commit 7922ff601094585c4b46b2640b7d07986f722c1b by jasonliu
[AIX] Add -lc++abi and -lunwind for linking

Summary:
We are going to have libc++abi.a and libunwind.a on AIX.
Add the necessary linking command to pick the libraries up.

Reviewed By: daltenty

Differential Revision: https://reviews.llvm.org/D102813
The file was modifiedclang/test/Driver/aix-ld.c
The file was modifiedclang/lib/Driver/ToolChain.cpp
The file was modifiedclang/lib/Driver/ToolChains/AIX.cpp
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
Commit e892705d74c7366a1404a3b3471001edaa7659f8 by Matthew.Arsenault
GlobalISel: Do not change register types in lowerLoad

Adjusting the load register type is a widenScalar type action, not a
lowering. lowerLoad should be reserved for operations that change the
memory access size, such as unaligned load decomposition. With this
trying to adjust the register type, it was hard to avoid infinite
loops in the legalizer. Adds a bandaid to avoid regressing a few
AArch64 tests, but I'm not sure what the exact condition is and
there's probably a cleaner way to do this.

For AMDGPU this regresses handling of some cases for unaligned loads,
but the way this is currently working is a pretty ugly hack.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-constant-32bit.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-flat.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-flat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-constant-32bit.mir
Commit 6f4794feb60a9deb939873118a7182a8ea87732e by fraser
[RISCV] Add a test case showing incorrect call-conv lowering

@HsiangKai helped find a bug in the lowering of indirect split
scalable-vector types in our calling convention. An imminent patch will
fix this.
The file was addedllvm/test/CodeGen/RISCV/rvv/calling-conv.ll
Commit 6d2c0950205f50f926ba5e362e845faff22582b7 by Yaxun.Liu
[HIP] Check compatibility of -fgpu-sanitize with offload arch

-fgpu-sanitize is incompatible with offload arch containing xnack-.

This patch checks that.

Reviewed by: Artem Belevich

Differential Revision: https://reviews.llvm.org/D102975
The file was modifiedclang/test/Driver/hip-sanitize-options.hip
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.h
The file was modifiedclang/lib/Driver/ToolChains/AMDGPU.cpp
The file was modifiedclang/lib/Driver/ToolChains/HIP.cpp
The file was modifiedclang/lib/Driver/ToolChains/HIP.h
Commit b44007bec2470db0d9f100c6a9216d8e05cef608 by thomasraoux
[mlir][gpu] Relax restriction on MMA store op to allow chain of mma ops.

In order to allow large matmul operations using the MMA ops we need to chain
operations this is not possible unless "DOp" and "COp" type have matching
layout so remove the "DOp" layout and force accumulator and result type to
match.
Added a test for the case where the MMA value is accumulated.

Differential Revision: https://reviews.llvm.org/D103023
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
The file was modifiedmlir/test/Conversion/GPUToNVVM/wmma-ops-to-nvvm.mlir
The file was modifiedmlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32.mlir
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUDialect.h
The file was modifiedmlir/lib/Conversion/GPUToNVVM/WmmaOpsToNvvm.cpp
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
The file was modifiedmlir/test/Dialect/GPU/invalid.mlir
The file was modifiedmlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f16.mlir
Commit 5c18d1136665f74b15c0df599f56ac3e2e947fb8 by qiucofan
[SPE] Disable strict-fp for SPE by default

As discussed in PR50385, strict-fp on PowerPC SPE has not been handled
well. This patch disables it by default for SPE.

Reviewed By: nemanjai, vit9696, jhibbits

Differential Revision: https://reviews.llvm.org/D103235
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was modifiedclang/test/CodeGen/builtins-ppc-fpconstrained.c
Commit 21653600034084e8335374ddc1eb8d362158d9a8 by konndennsa
[LoopUnrollAndJam] Change LoopUnrollAndJamPass to LoopNest pass

This patch changes LoopUnrollAndJamPass from FunctionPass to LoopNest pass.
The next patch will utilize LoopNest to effectively handle loop nests.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D99149
The file was modifiedllvm/include/llvm/Transforms/Scalar/LoopUnrollAndJamPass.h
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was modifiedllvm/test/Transforms/LoopUnrollAndJam/innerloop.ll
The file was modifiedllvm/include/llvm/Transforms/Scalar/LoopPassManager.h
The file was modifiedllvm/lib/Passes/PassRegistry.def
Commit c412979cde54ec3b5d9f3b83f2b8b5b4b353ed65 by ezhulenev
[mlir] Async reference counting for block successors with divergent reference counted liveness

Support reference counted values implicitly passed (live) only to some of the successors.

Example: if branched to ^bb2 token will leak, unless `drop_ref` operation is properly created

```
^entry:
  %token = async.runtime.create : !async.token
   cond_br %cond, ^bb1, ^bb2
^bb1:
  async.runtime.await %token
  async.runtime.drop_ref %token
  br ^bb2
^bb2:
  return
```

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D103102
The file was modifiedmlir/test/Dialect/Async/async-runtime-ref-counting.mlir
The file was modifiedmlir/lib/Dialect/Async/Transforms/AsyncRuntimeRefCounting.cpp